src/llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-phi-rv64.mir - toolchain/rustc - Git at Google

 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
 # RUN:   | FileCheck %s

 --- |
   define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i1 [ %b, %cond.false ], [ %a, %entry ]
     ret i1 %cond
   }

   define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i8 [ %b, %cond.false ], [ %a, %entry ]
     ret i8 %cond
   }

   define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i16 [ %b, %cond.false ], [ %a, %entry ]
     ret i16 %cond
   }

   define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i32 [ %b, %cond.false ], [ %a, %entry ]
     ret i32 %cond
   }

   define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i64 [ %b, %cond.false ], [ %a, %entry ]
     ret i64 %cond
   }

   define ptr @phi_ptr(i1 %cnd, ptr %a, ptr %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi ptr [ %b, %cond.false ], [ %a, %entry ]
     ret ptr %cond
   }

   define i72 @phi_i72(i1 %cnd, i72 %a, i72 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i72 [ %b, %cond.false ], [ %a, %entry ]
     ret i72 %cond
   }

   define i128 @phi_i128(i1 %cnd, i128 %a, i128 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i128 [ %b, %cond.false ], [ %a, %entry ]
     ret i128 %cond
   }

   define i192 @phi_i192(i1 %cnd, i192 %a, i192 %b) {
   entry:
     br i1 %cnd, label %cond.end, label %cond.false

   cond.false:                                       ; preds = %entry
     br label %cond.end

   cond.end:                                         ; preds = %entry, %cond.false
     %cond = phi i192 [ %b, %cond.false ], [ %a, %entry ]
     ret i192 %cond
   }

 ...
 ---
 name:            phi_i1
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i1
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %1:_(s1) = G_TRUNC %4(s64)
     %5:_(s64) = COPY $x12
     %2:_(s1) = G_TRUNC %5(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %6:_(s1) = G_PHI %2(s1), %bb.2, %1(s1), %bb.1
     %7:_(s64) = G_ANYEXT %6(s1)
     $x10 = COPY %7(s64)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_i8
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i8
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %1:_(s8) = G_TRUNC %4(s64)
     %5:_(s64) = COPY $x12
     %2:_(s8) = G_TRUNC %5(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %6:_(s8) = G_PHI %2(s8), %bb.2, %1(s8), %bb.1
     %7:_(s64) = G_ANYEXT %6(s8)
     $x10 = COPY %7(s64)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_i16
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i16
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %1:_(s16) = G_TRUNC %4(s64)
     %5:_(s64) = COPY $x12
     %2:_(s16) = G_TRUNC %5(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %6:_(s16) = G_PHI %2(s16), %bb.2, %1(s16), %bb.1
     %7:_(s64) = G_ANYEXT %6(s16)
     $x10 = COPY %7(s64)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_i32
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i32
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %1:_(s32) = G_TRUNC %4(s64)
     %5:_(s64) = COPY $x12
     %2:_(s32) = G_TRUNC %5(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %6:_(s32) = G_PHI %2(s32), %bb.2, %1(s32), %bb.1
     %7:_(s64) = G_ANYEXT %6(s32)
     $x10 = COPY %7(s64)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_i64
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i64
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %1:_(s64) = COPY $x11
     %2:_(s64) = COPY $x12
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %4:_(s64) = G_PHI %2(s64), %bb.2, %1(s64), %bb.1
     $x10 = COPY %4(s64)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_ptr
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_ptr
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(p0) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY2]](p0), %bb.1, [[COPY1]](p0), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](p0)
   ; CHECK-NEXT:   PseudoRET implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %1:_(p0) = COPY $x11
     %2:_(p0) = COPY $x12
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %4:_(p0) = G_PHI %2(p0), %bb.2, %1(p0), %bb.1
     $x10 = COPY %4(p0)
     PseudoRET implicit $x10

 ...
 ---
 name:            phi_i72
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
   - { id: 8, class: _ }
   - { id: 9, class: _ }
   - { id: 10, class: _ }
   - { id: 11, class: _ }
   - { id: 12, class: _ }
   - { id: 13, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i72
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
   ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   $x11 = COPY [[PHI1]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10, implicit $x11
   bb.1.entry:
     liveins: $x10, $x11, $x12, $x13, $x14

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %5:_(s64) = COPY $x12
     %6:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
     %1:_(s72) = G_TRUNC %6(s128)
     %7:_(s64) = COPY $x13
     %8:_(s64) = COPY $x14
     %9:_(s128) = G_MERGE_VALUES %7(s64), %8(s64)
     %2:_(s72) = G_TRUNC %9(s128)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %10:_(s72) = G_PHI %2(s72), %bb.2, %1(s72), %bb.1
     %13:_(s128) = G_ANYEXT %10(s72)
     %11:_(s64), %12:_(s64) = G_UNMERGE_VALUES %13(s128)
     $x10 = COPY %11(s64)
     $x11 = COPY %12(s64)
     PseudoRET implicit $x10, implicit $x11

 ...
 ---
 name:            phi_i128
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
   - { id: 8, class: _ }
   - { id: 9, class: _ }
   - { id: 10, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i128
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
   ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   $x11 = COPY [[PHI1]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10, implicit $x11
   bb.1.entry:
     liveins: $x10, $x11, $x12, $x13, $x14

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %5:_(s64) = COPY $x12
     %1:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
     %6:_(s64) = COPY $x13
     %7:_(s64) = COPY $x14
     %2:_(s128) = G_MERGE_VALUES %6(s64), %7(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %8:_(s128) = G_PHI %2(s128), %bb.2, %1(s128), %bb.1
     %9:_(s64), %10:_(s64) = G_UNMERGE_VALUES %8(s128)
     $x10 = COPY %9(s64)
     $x11 = COPY %10(s64)
     PseudoRET implicit $x10, implicit $x11

 ...
 ---
 name:            phi_i192
 alignment:       4
 tracksRegLiveness: true
 registers:
   - { id: 0, class: _ }
   - { id: 1, class: _ }
   - { id: 2, class: _ }
   - { id: 3, class: _ }
   - { id: 4, class: _ }
   - { id: 5, class: _ }
   - { id: 6, class: _ }
   - { id: 7, class: _ }
   - { id: 8, class: _ }
   - { id: 9, class: _ }
   - { id: 10, class: _ }
   - { id: 11, class: _ }
   - { id: 12, class: _ }
   - { id: 13, class: _ }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo:
   varArgsFrameIndex: 0
   varArgsSaveSize: 0
 body:             |
   ; CHECK-LABEL: name: phi_i192
   ; CHECK: bb.0.entry:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT:   liveins: $x10, $x11, $x12
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
   ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
   ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:_(s64) = COPY $x12
   ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
   ; CHECK-NEXT:   [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
   ; CHECK-NEXT:   G_BRCOND [[AND]](s64), %bb.2
   ; CHECK-NEXT:   G_BR %bb.1
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1.cond.false:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.cond.end:
   ; CHECK-NEXT:   [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY1]](s64), %bb.0
   ; CHECK-NEXT:   [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY5]](s64), %bb.1, [[COPY2]](s64), %bb.0
   ; CHECK-NEXT:   [[PHI2:%[0-9]+]]:_(s64) = G_PHI [[COPY6]](s64), %bb.1, [[COPY3]](s64), %bb.0
   ; CHECK-NEXT:   $x10 = COPY [[PHI]](s64)
   ; CHECK-NEXT:   $x10 = COPY [[PHI1]](s64)
   ; CHECK-NEXT:   $x10 = COPY [[PHI2]](s64)
   ; CHECK-NEXT:   PseudoRET implicit $x10, implicit $x10, implicit $x10
   bb.1.entry:
     liveins: $x10, $x11, $x12

     %3:_(s64) = COPY $x10
     %0:_(s1) = G_TRUNC %3(s64)
     %4:_(s64) = COPY $x11
     %5:_(s64) = COPY $x11
     %6:_(s64) = COPY $x11
     %1:_(s192) = G_MERGE_VALUES %4(s64), %5(s64), %6(s64)
     %7:_(s64) = COPY $x12
     %8:_(s64) = COPY $x12
     %9:_(s64) = COPY $x12
     %2:_(s192) = G_MERGE_VALUES %7(s64), %8(s64), %9(s64)
     G_BRCOND %0(s1), %bb.3
     G_BR %bb.2

   bb.2.cond.false:

   bb.3.cond.end:
     %10:_(s192) = G_PHI %2(s192), %bb.2, %1(s192), %bb.1
     %11:_(s64), %12:_(s64), %13:_(s64) = G_UNMERGE_VALUES %10(s192)
     $x10 = COPY %11(s64)
     $x10 = COPY %12(s64)
     $x10 = COPY %13(s64)
     PseudoRET implicit $x10, implicit $x10, implicit $x10

 ...
	# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
	# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
	# RUN: \| FileCheck %s

	--- \|
	define i1 @phi_i1(i1 %cnd, i1 %a, i1 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i1 [ %b, %cond.false ], [ %a, %entry ]
	ret i1 %cond
	}

	define i8 @phi_i8(i1 %cnd, i8 %a, i8 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i8 [ %b, %cond.false ], [ %a, %entry ]
	ret i8 %cond
	}

	define i16 @phi_i16(i1 %cnd, i16 %a, i16 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i16 [ %b, %cond.false ], [ %a, %entry ]
	ret i16 %cond
	}

	define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i32 [ %b, %cond.false ], [ %a, %entry ]
	ret i32 %cond
	}

	define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i64 [ %b, %cond.false ], [ %a, %entry ]
	ret i64 %cond
	}

	define ptr @phi_ptr(i1 %cnd, ptr %a, ptr %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi ptr [ %b, %cond.false ], [ %a, %entry ]
	ret ptr %cond
	}

	define i72 @phi_i72(i1 %cnd, i72 %a, i72 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i72 [ %b, %cond.false ], [ %a, %entry ]
	ret i72 %cond
	}

	define i128 @phi_i128(i1 %cnd, i128 %a, i128 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i128 [ %b, %cond.false ], [ %a, %entry ]
	ret i128 %cond
	}

	define i192 @phi_i192(i1 %cnd, i192 %a, i192 %b) {
	entry:
	br i1 %cnd, label %cond.end, label %cond.false

	cond.false: ; preds = %entry
	br label %cond.end

	cond.end: ; preds = %entry, %cond.false
	%cond = phi i192 [ %b, %cond.false ], [ %a, %entry ]
	ret i192 %cond
	}

	...
	---
	name: phi_i1
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i1
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%1:_(s1) = G_TRUNC %4(s64)
	%5:_(s64) = COPY $x12
	%2:_(s1) = G_TRUNC %5(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%6:_(s1) = G_PHI %2(s1), %bb.2, %1(s1), %bb.1
	%7:_(s64) = G_ANYEXT %6(s1)
	$x10 = COPY %7(s64)
	PseudoRET implicit $x10

	...
	---
	name: phi_i8
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i8
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%1:_(s8) = G_TRUNC %4(s64)
	%5:_(s64) = COPY $x12
	%2:_(s8) = G_TRUNC %5(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%6:_(s8) = G_PHI %2(s8), %bb.2, %1(s8), %bb.1
	%7:_(s64) = G_ANYEXT %6(s8)
	$x10 = COPY %7(s64)
	PseudoRET implicit $x10

	...
	---
	name: phi_i16
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i16
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%1:_(s16) = G_TRUNC %4(s64)
	%5:_(s64) = COPY $x12
	%2:_(s16) = G_TRUNC %5(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%6:_(s16) = G_PHI %2(s16), %bb.2, %1(s16), %bb.1
	%7:_(s64) = G_ANYEXT %6(s16)
	$x10 = COPY %7(s64)
	PseudoRET implicit $x10

	...
	---
	name: phi_i32
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i32
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%1:_(s32) = G_TRUNC %4(s64)
	%5:_(s64) = COPY $x12
	%2:_(s32) = G_TRUNC %5(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%6:_(s32) = G_PHI %2(s32), %bb.2, %1(s32), %bb.1
	%7:_(s64) = G_ANYEXT %6(s32)
	$x10 = COPY %7(s64)
	PseudoRET implicit $x10

	...
	---
	name: phi_i64
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i64
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY2]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%1:_(s64) = COPY $x11
	%2:_(s64) = COPY $x12
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%4:_(s64) = G_PHI %2(s64), %bb.2, %1(s64), %bb.1
	$x10 = COPY %4(s64)
	PseudoRET implicit $x10

	...
	---
	name: phi_ptr
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_ptr
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(p0) = G_PHI [[COPY2]](p0), %bb.1, [[COPY1]](p0), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](p0)
	; CHECK-NEXT: PseudoRET implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%1:_(p0) = COPY $x11
	%2:_(p0) = COPY $x12
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%4:_(p0) = G_PHI %2(p0), %bb.2, %1(p0), %bb.1
	$x10 = COPY %4(p0)
	PseudoRET implicit $x10

	...
	---
	name: phi_i72
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	- { id: 8, class: _ }
	- { id: 9, class: _ }
	- { id: 10, class: _ }
	- { id: 11, class: _ }
	- { id: 12, class: _ }
	- { id: 13, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i72
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
	; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: $x11 = COPY [[PHI1]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
	bb.1.entry:
	liveins: $x10, $x11, $x12, $x13, $x14

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%5:_(s64) = COPY $x12
	%6:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
	%1:_(s72) = G_TRUNC %6(s128)
	%7:_(s64) = COPY $x13
	%8:_(s64) = COPY $x14
	%9:_(s128) = G_MERGE_VALUES %7(s64), %8(s64)
	%2:_(s72) = G_TRUNC %9(s128)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%10:_(s72) = G_PHI %2(s72), %bb.2, %1(s72), %bb.1
	%13:_(s128) = G_ANYEXT %10(s72)
	%11:_(s64), %12:_(s64) = G_UNMERGE_VALUES %13(s128)
	$x10 = COPY %11(s64)
	$x11 = COPY %12(s64)
	PseudoRET implicit $x10, implicit $x11

	...
	---
	name: phi_i128
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	- { id: 8, class: _ }
	- { id: 9, class: _ }
	- { id: 10, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i128
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12, $x13, $x14
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13
	; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY3]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY2]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: $x11 = COPY [[PHI1]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
	bb.1.entry:
	liveins: $x10, $x11, $x12, $x13, $x14

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%5:_(s64) = COPY $x12
	%1:_(s128) = G_MERGE_VALUES %4(s64), %5(s64)
	%6:_(s64) = COPY $x13
	%7:_(s64) = COPY $x14
	%2:_(s128) = G_MERGE_VALUES %6(s64), %7(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%8:_(s128) = G_PHI %2(s128), %bb.2, %1(s128), %bb.1
	%9:_(s64), %10:_(s64) = G_UNMERGE_VALUES %8(s128)
	$x10 = COPY %9(s64)
	$x11 = COPY %10(s64)
	PseudoRET implicit $x10, implicit $x11

	...
	---
	name: phi_i192
	alignment: 4
	tracksRegLiveness: true
	registers:
	- { id: 0, class: _ }
	- { id: 1, class: _ }
	- { id: 2, class: _ }
	- { id: 3, class: _ }
	- { id: 4, class: _ }
	- { id: 5, class: _ }
	- { id: 6, class: _ }
	- { id: 7, class: _ }
	- { id: 8, class: _ }
	- { id: 9, class: _ }
	- { id: 10, class: _ }
	- { id: 11, class: _ }
	- { id: 12, class: _ }
	- { id: 13, class: _ }
	frameInfo:
	maxAlignment: 1
	machineFunctionInfo:
	varArgsFrameIndex: 0
	varArgsSaveSize: 0
	body: \|
	; CHECK-LABEL: name: phi_i192
	; CHECK: bb.0.entry:
	; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
	; CHECK-NEXT: liveins: $x10, $x11, $x12
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
	; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
	; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x12
	; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
	; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
	; CHECK-NEXT: G_BRCOND [[AND]](s64), %bb.2
	; CHECK-NEXT: G_BR %bb.1
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.1.cond.false:
	; CHECK-NEXT: successors: %bb.2(0x80000000)
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: {{ $}}
	; CHECK-NEXT: bb.2.cond.end:
	; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY4]](s64), %bb.1, [[COPY1]](s64), %bb.0
	; CHECK-NEXT: [[PHI1:%[0-9]+]]:_(s64) = G_PHI [[COPY5]](s64), %bb.1, [[COPY2]](s64), %bb.0
	; CHECK-NEXT: [[PHI2:%[0-9]+]]:_(s64) = G_PHI [[COPY6]](s64), %bb.1, [[COPY3]](s64), %bb.0
	; CHECK-NEXT: $x10 = COPY [[PHI]](s64)
	; CHECK-NEXT: $x10 = COPY [[PHI1]](s64)
	; CHECK-NEXT: $x10 = COPY [[PHI2]](s64)
	; CHECK-NEXT: PseudoRET implicit $x10, implicit $x10, implicit $x10
	bb.1.entry:
	liveins: $x10, $x11, $x12

	%3:_(s64) = COPY $x10
	%0:_(s1) = G_TRUNC %3(s64)
	%4:_(s64) = COPY $x11
	%5:_(s64) = COPY $x11
	%6:_(s64) = COPY $x11
	%1:_(s192) = G_MERGE_VALUES %4(s64), %5(s64), %6(s64)
	%7:_(s64) = COPY $x12
	%8:_(s64) = COPY $x12
	%9:_(s64) = COPY $x12
	%2:_(s192) = G_MERGE_VALUES %7(s64), %8(s64), %9(s64)
	G_BRCOND %0(s1), %bb.3
	G_BR %bb.2

	bb.2.cond.false:

	bb.3.cond.end:
	%10:_(s192) = G_PHI %2(s192), %bb.2, %1(s192), %bb.1
	%11:_(s64), %12:_(s64), %13:_(s64) = G_UNMERGE_VALUES %10(s192)
	$x10 = COPY %11(s64)
	$x10 = COPY %12(s64)
	$x10 = COPY %13(s64)
	PseudoRET implicit $x10, implicit $x10, implicit $x10

	...