src/llvm-project/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-brindirect-rv32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s

---
name:            indirectbr
body:             |
  ; CHECK-LABEL: name: indirectbr
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT:   liveins: $x10
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10
  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
  ; CHECK-NEXT:   G_BRINDIRECT [[COPY]](p0)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   $x10 = COPY [[C1]](s32)
  ; CHECK-NEXT:   PseudoRET implicit $x10
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   $x10 = COPY [[C]](s32)
  ; CHECK-NEXT:   PseudoRET implicit $x10
  bb.1:
    successors: %bb.2, %bb.3
    liveins: $x10

    %0:_(p0) = COPY $x10
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 0
    G_BRINDIRECT %0(p0)

  bb.2:
    $x10 = COPY %2(s32)
    PseudoRET implicit $x10

  bb.3:
    $x10 = COPY %1(s32)
    PseudoRET implicit $x10

...