| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=instruction-select \ |
| # RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s |
| # RUN: llc -mtriple=riscv64 -mattr=+zbkb -run-pass=instruction-select \ |
| # RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- |
| name: rotl_i32 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10, $x11 |
| |
| ; CHECK-LABEL: name: rotl_i32 |
| ; CHECK: liveins: $x10, $x11 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 |
| ; CHECK-NEXT: [[ROLW:%[0-9]+]]:gpr = ROLW [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $x10 = COPY [[ROLW]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s32) = G_TRUNC %0(s64) |
| %2:gprb(s64) = COPY $x11 |
| %7:gprb(s64) = G_CONSTANT i64 4294967295 |
| %6:gprb(s64) = G_AND %2, %7 |
| %4:gprb(s32) = G_ROTL %1, %6(s64) |
| %5:gprb(s64) = G_ANYEXT %4(s32) |
| $x10 = COPY %5(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotl_i64 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10, $x11 |
| |
| ; CHECK-LABEL: name: rotl_i64 |
| ; CHECK: liveins: $x10, $x11 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 |
| ; CHECK-NEXT: [[ROL:%[0-9]+]]:gpr = ROL [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $x10 = COPY [[ROL]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s64) = COPY $x11 |
| %2:gprb(s64) = G_ROTL %0, %1(s64) |
| $x10 = COPY %2(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotr_i32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $x10, $x11 |
| |
| ; CHECK-LABEL: name: rotr_i32 |
| ; CHECK: liveins: $x10, $x11 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 |
| ; CHECK-NEXT: [[RORW:%[0-9]+]]:gpr = RORW [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $x10 = COPY [[RORW]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s32) = G_TRUNC %0(s64) |
| %2:gprb(s64) = COPY $x11 |
| %7:gprb(s64) = G_CONSTANT i64 4294967295 |
| %6:gprb(s64) = G_AND %2, %7 |
| %4:gprb(s32) = G_ROTR %1, %6(s64) |
| %5:gprb(s64) = G_ANYEXT %4(s32) |
| $x10 = COPY %5(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotr_i64 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $x10, $x11 |
| |
| ; CHECK-LABEL: name: rotr_i64 |
| ; CHECK: liveins: $x10, $x11 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11 |
| ; CHECK-NEXT: [[ROR:%[0-9]+]]:gpr = ROR [[COPY]], [[COPY1]] |
| ; CHECK-NEXT: $x10 = COPY [[ROR]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s64) = COPY $x11 |
| %2:gprb(s64) = G_ROTR %0, %1(s64) |
| $x10 = COPY %2(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotl_imm_i32 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10 |
| |
| ; CHECK-LABEL: name: rotl_imm_i32 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 17 |
| ; CHECK-NEXT: $x10 = COPY [[RORIW]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s32) = G_TRUNC %0(s64) |
| %2:gprb(s64) = G_CONSTANT i64 15 |
| %3:gprb(s32) = G_ROTL %1, %2(s64) |
| %4:gprb(s64) = G_ANYEXT %3(s32) |
| $x10 = COPY %4(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotl_imm_i64 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10 |
| |
| ; CHECK-LABEL: name: rotl_imm_i64 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 31 |
| ; CHECK-NEXT: $x10 = COPY [[RORI]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s64) = G_CONSTANT i64 33 |
| %2:gprb(s64) = G_ROTL %0, %1(s64) |
| $x10 = COPY %2(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotr_imm_i32 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10 |
| |
| ; CHECK-LABEL: name: rotr_imm_i32 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 15 |
| ; CHECK-NEXT: $x10 = COPY [[RORIW]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s32) = G_TRUNC %0(s64) |
| %2:gprb(s64) = G_CONSTANT i64 15 |
| %3:gprb(s32) = G_ROTR %1, %2(s64) |
| %4:gprb(s64) = G_ANYEXT %3(s32) |
| $x10 = COPY %4(s64) |
| PseudoRET implicit $x10 |
| |
| ... |
| --- |
| name: rotr_imm_i64 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $x10 |
| |
| ; CHECK-LABEL: name: rotr_imm_i64 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 33 |
| ; CHECK-NEXT: $x10 = COPY [[RORI]] |
| ; CHECK-NEXT: PseudoRET implicit $x10 |
| %0:gprb(s64) = COPY $x10 |
| %1:gprb(s64) = G_CONSTANT i64 33 |
| %2:gprb(s64) = G_ROTR %0, %1(s64) |
| $x10 = COPY %2(s64) |
| PseudoRET implicit $x10 |
| |
| ... |