| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=riscv32 -mattr=+m -run-pass=instruction-select %s -o - \ |
| # RUN: -code-model=small | FileCheck %s --check-prefix=RV32-SMALL |
| # RUN: llc -mtriple=riscv32 -mattr=+m -run-pass=instruction-select %s -o - \ |
| # RUN: -code-model=medium | FileCheck %s --check-prefix=RV32-MEDIUM |
| |
| --- | |
| define i32 @jt_test(i32 signext %in) { |
| entry: |
| switch i32 %in, label %default [ |
| i32 1, label %bb1 |
| i32 2, label %bb2 |
| i32 3, label %bb3 |
| i32 4, label %bb4 |
| i32 5, label %bb5 |
| i32 6, label %bb6 |
| ] |
| |
| bb1: ; preds = %entry |
| ret i32 4 |
| |
| bb2: ; preds = %entry |
| ret i32 3 |
| |
| bb3: ; preds = %entry |
| ret i32 2 |
| |
| bb4: ; preds = %entry |
| ret i32 1 |
| |
| bb5: ; preds = %entry |
| ret i32 100 |
| |
| bb6: ; preds = %entry |
| ret i32 200 |
| |
| default: ; preds = %entry |
| ret i32 1000 |
| } |
| |
| ... |
| --- |
| name: jt_test |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| jumpTable: |
| kind: block-address |
| entries: |
| - id: 0 |
| blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6', '%bb.7' ] |
| body: | |
| ; RV32-SMALL-LABEL: name: jt_test |
| ; RV32-SMALL: bb.0.entry: |
| ; RV32-SMALL-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) |
| ; RV32-SMALL-NEXT: liveins: $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; RV32-SMALL-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 5 |
| ; RV32-SMALL-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 200 |
| ; RV32-SMALL-NEXT: [[ADDI2:%[0-9]+]]:gpr = ADDI $x0, 100 |
| ; RV32-SMALL-NEXT: [[ADDI3:%[0-9]+]]:gpr = ADDI $x0, 1 |
| ; RV32-SMALL-NEXT: [[ADDI4:%[0-9]+]]:gpr = ADDI $x0, 2 |
| ; RV32-SMALL-NEXT: [[ADDI5:%[0-9]+]]:gpr = ADDI $x0, 3 |
| ; RV32-SMALL-NEXT: [[ADDI6:%[0-9]+]]:gpr = ADDI $x0, 4 |
| ; RV32-SMALL-NEXT: [[ADDI7:%[0-9]+]]:gpr = ADDI $x0, 1000 |
| ; RV32-SMALL-NEXT: [[ADDI8:%[0-9]+]]:gpr = ADDI [[COPY]], -1 |
| ; RV32-SMALL-NEXT: BLTU [[ADDI]], [[ADDI8]], %bb.8 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.1.entry: |
| ; RV32-SMALL-NEXT: successors: %bb.2(0x15555555), %bb.3(0x15555555), %bb.4(0x15555555), %bb.5(0x15555555), %bb.6(0x15555555), %bb.7(0x15555555) |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: [[LUI:%[0-9]+]]:gpr = LUI target-flags(riscv-hi) %jump-table.0 |
| ; RV32-SMALL-NEXT: [[ADDI9:%[0-9]+]]:gpr = ADDI [[LUI]], target-flags(riscv-lo) %jump-table.0 |
| ; RV32-SMALL-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[ADDI8]], 2 |
| ; RV32-SMALL-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[ADDI9]], [[SLLI]] |
| ; RV32-SMALL-NEXT: [[LW:%[0-9]+]]:gprjalr = LW [[ADD]], 0 :: (load (s32) from jump-table) |
| ; RV32-SMALL-NEXT: PseudoBRIND [[LW]], 0 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.2.bb1: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI6]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.3.bb2: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI5]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.4.bb3: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI4]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.5.bb4: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI3]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.6.bb5: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI2]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.7.bb6: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI1]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; RV32-SMALL-NEXT: {{ $}} |
| ; RV32-SMALL-NEXT: bb.8.default: |
| ; RV32-SMALL-NEXT: $x10 = COPY [[ADDI7]] |
| ; RV32-SMALL-NEXT: PseudoRET implicit $x10 |
| ; |
| ; RV32-MEDIUM-LABEL: name: jt_test |
| ; RV32-MEDIUM: bb.0.entry: |
| ; RV32-MEDIUM-NEXT: successors: %bb.8(0x40000000), %bb.1(0x40000000) |
| ; RV32-MEDIUM-NEXT: liveins: $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10 |
| ; RV32-MEDIUM-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 5 |
| ; RV32-MEDIUM-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI $x0, 200 |
| ; RV32-MEDIUM-NEXT: [[ADDI2:%[0-9]+]]:gpr = ADDI $x0, 100 |
| ; RV32-MEDIUM-NEXT: [[ADDI3:%[0-9]+]]:gpr = ADDI $x0, 1 |
| ; RV32-MEDIUM-NEXT: [[ADDI4:%[0-9]+]]:gpr = ADDI $x0, 2 |
| ; RV32-MEDIUM-NEXT: [[ADDI5:%[0-9]+]]:gpr = ADDI $x0, 3 |
| ; RV32-MEDIUM-NEXT: [[ADDI6:%[0-9]+]]:gpr = ADDI $x0, 4 |
| ; RV32-MEDIUM-NEXT: [[ADDI7:%[0-9]+]]:gpr = ADDI $x0, 1000 |
| ; RV32-MEDIUM-NEXT: [[ADDI8:%[0-9]+]]:gpr = ADDI [[COPY]], -1 |
| ; RV32-MEDIUM-NEXT: BLTU [[ADDI]], [[ADDI8]], %bb.8 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.1.entry: |
| ; RV32-MEDIUM-NEXT: successors: %bb.2(0x15555555), %bb.3(0x15555555), %bb.4(0x15555555), %bb.5(0x15555555), %bb.6(0x15555555), %bb.7(0x15555555) |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: [[PseudoLLA:%[0-9]+]]:gpr = PseudoLLA %jump-table.0 |
| ; RV32-MEDIUM-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[ADDI8]], 2 |
| ; RV32-MEDIUM-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[PseudoLLA]], [[SLLI]] |
| ; RV32-MEDIUM-NEXT: [[LW:%[0-9]+]]:gprjalr = LW [[ADD]], 0 :: (load (s32) from jump-table) |
| ; RV32-MEDIUM-NEXT: PseudoBRIND [[LW]], 0 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.2.bb1: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI6]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.3.bb2: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI5]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.4.bb3: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI4]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.5.bb4: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI3]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.6.bb5: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI2]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.7.bb6: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI1]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| ; RV32-MEDIUM-NEXT: {{ $}} |
| ; RV32-MEDIUM-NEXT: bb.8.default: |
| ; RV32-MEDIUM-NEXT: $x10 = COPY [[ADDI7]] |
| ; RV32-MEDIUM-NEXT: PseudoRET implicit $x10 |
| bb.1.entry: |
| successors: %bb.8, %bb.9 |
| liveins: $x10 |
| |
| %0:gprb(s32) = COPY $x10 |
| %4:gprb(s32) = G_CONSTANT i32 5 |
| %8:gprb(s32) = G_CONSTANT i32 200 |
| %9:gprb(s32) = G_CONSTANT i32 100 |
| %10:gprb(s32) = G_CONSTANT i32 1 |
| %11:gprb(s32) = G_CONSTANT i32 2 |
| %12:gprb(s32) = G_CONSTANT i32 3 |
| %13:gprb(s32) = G_CONSTANT i32 4 |
| %14:gprb(s32) = G_CONSTANT i32 1000 |
| %1:gprb(s32) = G_CONSTANT i32 1 |
| %2:gprb(s32) = G_SUB %0, %1 |
| %16:gprb(s32) = G_ICMP intpred(ugt), %2(s32), %4 |
| G_BRCOND %16(s32), %bb.8 |
| |
| bb.9.entry: |
| successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7 |
| |
| %7:gprb(p0) = G_JUMP_TABLE %jump-table.0 |
| G_BRJT %7(p0), %jump-table.0, %2(s32) |
| |
| bb.2.bb1: |
| $x10 = COPY %13(s32) |
| PseudoRET implicit $x10 |
| |
| bb.3.bb2: |
| $x10 = COPY %12(s32) |
| PseudoRET implicit $x10 |
| |
| bb.4.bb3: |
| $x10 = COPY %11(s32) |
| PseudoRET implicit $x10 |
| |
| bb.5.bb4: |
| $x10 = COPY %10(s32) |
| PseudoRET implicit $x10 |
| |
| bb.6.bb5: |
| $x10 = COPY %9(s32) |
| PseudoRET implicit $x10 |
| |
| bb.7.bb6: |
| $x10 = COPY %8(s32) |
| PseudoRET implicit $x10 |
| |
| bb.8.default: |
| $x10 = COPY %14(s32) |
| PseudoRET implicit $x10 |
| |
| ... |
