| # RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass machine-scheduler -amdgpu-disable-unclustered-high-rp-reschedule -verify-machineinstrs %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck -check-prefix=DEBUG %s |
| # REQUIRES: asserts |
| |
| --- | |
| define void @sink_and_inc_idx_when_skipping_small_region_1() "amdgpu-flat-work-group-size"="1,64" { |
| ret void |
| } |
| |
| define void @sink_and_inc_idx_when_skipping_small_regions_2() "amdgpu-flat-work-group-size"="1,64" { |
| ret void |
| } |
| --- |
| name: sink_and_inc_idx_when_skipping_small_region_1 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_region_1: IsSSA, NoPHIs, TracksLiveness |
| ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing |
| ; DEBUG-NEXT: ********** MI Scheduling ********** |
| ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_region_1:%bb.2 |
| ; DEBUG-NEXT: From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; DEBUG-NEXT: To: End RegionInstrs: 2 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| |
| bb.2: |
| ; predecessors: %bb.1 |
| successors: %bb.3 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| |
| bb.3: |
| ; predcessors: %bb.2 |
| |
| S_NOP 0, implicit %23 |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |
| --- |
| name: sink_and_inc_idx_when_skipping_small_regions_2 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| body: | |
| ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_regions_2: IsSSA, NoPHIs, TracksLiveness |
| ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing |
| ; DEBUG-NEXT: ********** MI Scheduling ********** |
| ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_regions_2:%bb.2 |
| ; DEBUG-NEXT: From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| ; DEBUG-NEXT: To: End RegionInstrs: 4 |
| bb.0: |
| successors: %bb.1 |
| |
| %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0 |
| %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0 |
| %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0 |
| %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0 |
| %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0 |
| %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0 |
| %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0 |
| %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0 |
| %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0 |
| %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0 |
| %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0 |
| %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0 |
| %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0 |
| %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0 |
| %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0 |
| %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0 |
| %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0 |
| %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0 |
| %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0 |
| %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0 |
| %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0 |
| %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0 |
| %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0 |
| |
| bb.1: |
| ; predecessors: %bb.0 |
| successors: %bb.2 |
| |
| %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode |
| S_NOP 0 |
| |
| |
| bb.2: |
| ; predecessors: %bb.1 |
| successors: %bb.3 |
| |
| %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0 |
| S_NOP 0, implicit %24 |
| S_NOP 0, implicit %23 |
| |
| bb.3: |
| ; predcessors: %bb.2 |
| |
| S_NOP 0, implicit %0, implicit %1 |
| S_NOP 0, implicit %2, implicit %3 |
| S_NOP 0, implicit %4, implicit %5 |
| S_NOP 0, implicit %6, implicit %7 |
| S_NOP 0, implicit %8, implicit %9 |
| S_NOP 0, implicit %10, implicit %11 |
| S_NOP 0, implicit %12, implicit %13 |
| S_NOP 0, implicit %14, implicit %15 |
| S_NOP 0, implicit %16, implicit %17 |
| S_NOP 0, implicit %18, implicit %19 |
| S_NOP 0, implicit %20, implicit %21 |
| S_NOP 0, implicit %22 |
| S_ENDPGM 0 |
| ... |