src/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE32 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize64 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE64 %s

---
name:            stackrestore_waveaddress_sgpr
legalized:       true
regBankSelected: true
body: |
  bb.0:
    ; GFX10-WAVE32-LABEL: name: stackrestore_waveaddress_sgpr
    ; GFX10-WAVE32: $sgpr32 = COPY $sgpr32
    ;
    ; GFX10-WAVE64-LABEL: name: stackrestore_waveaddress_sgpr
    ; GFX10-WAVE64: $sgpr32 = COPY $sgpr32
    %0:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
    G_STACKRESTORE %0

...

# Test we aren't special casing the direct register value.
---
name:            stackrestore_direct_sp_sgpr
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr10
    ; GFX10-WAVE32-LABEL: name: stackrestore_direct_sp_sgpr
    ; GFX10-WAVE32: liveins: $sgpr10
    ; GFX10-WAVE32-NEXT: {{  $}}
    ; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
    ; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
    ; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
    ;
    ; GFX10-WAVE64-LABEL: name: stackrestore_direct_sp_sgpr
    ; GFX10-WAVE64: liveins: $sgpr10
    ; GFX10-WAVE64-NEXT: {{  $}}
    ; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
    ; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
    ; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
    %0:sgpr(p5) = COPY $sgpr32
    G_STACKRESTORE %0

...

---
name:            stackrestore_any_sgpr
legalized:       true
regBankSelected: true
body: |
  bb.0:
    liveins: $sgpr10
    ; GFX10-WAVE32-LABEL: name: stackrestore_any_sgpr
    ; GFX10-WAVE32: liveins: $sgpr10
    ; GFX10-WAVE32-NEXT: {{  $}}
    ; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
    ; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
    ; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
    ;
    ; GFX10-WAVE64-LABEL: name: stackrestore_any_sgpr
    ; GFX10-WAVE64: liveins: $sgpr10
    ; GFX10-WAVE64-NEXT: {{  $}}
    ; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
    ; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
    ; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
    %0:sgpr(p5) = COPY $sgpr10
    G_STACKRESTORE %0

...