src/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcopysign.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s

...
---
name:            legalize_s32
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $s0, $s1
    ; CHECK-LABEL: name: legalize_s32
    ; CHECK: liveins: $s0, $s1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %val:_(s32) = COPY $s0
    ; CHECK-NEXT: %sign:_(s32) = COPY $s1
    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], %val(s32), [[C]](s32)
    ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], %sign(s32), [[C]](s32)
    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C1]](s32), [[C1]](s32), [[C1]](s32), [[C1]](s32)
    ; CHECK-NEXT: [[BSP:%[0-9]+]]:_(<4 x s32>) = G_BSP [[BUILD_VECTOR]], [[IVEC1]], [[IVEC]]
    ; CHECK-NEXT: %fcopysign:_(s32), %10:_(s32), %11:_(s32), %12:_(s32) = G_UNMERGE_VALUES [[BSP]](<4 x s32>)
    ; CHECK-NEXT: $s0 = COPY %fcopysign(s32)
    ; CHECK-NEXT: RET_ReallyLR implicit $s0
    %val:_(s32) = COPY $s0
    %sign:_(s32) = COPY $s1
    %fcopysign:_(s32) = G_FCOPYSIGN %val, %sign(s32)
    $s0 = COPY %fcopysign(s32)
    RET_ReallyLR implicit $s0

...
---
name:            legalize_s64
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; CHECK-LABEL: name: legalize_s64
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %val:_(s64) = COPY $d0
    ; CHECK-NEXT: %sign:_(s64) = COPY $d1
    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
    ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], %val(s64), [[C]](s64)
    ; CHECK-NEXT: [[IVEC1:%[0-9]+]]:_(<2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], %sign(s64), [[C]](s64)
    ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<2 x s64>) = G_FNEG [[BUILD_VECTOR]]
    ; CHECK-NEXT: [[BSP:%[0-9]+]]:_(<2 x s64>) = G_BSP [[FNEG]], [[IVEC1]], [[IVEC]]
    ; CHECK-NEXT: %fcopysign:_(s64), %10:_(s64) = G_UNMERGE_VALUES [[BSP]](<2 x s64>)
    ; CHECK-NEXT: $d0 = COPY %fcopysign(s64)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %val:_(s64) = COPY $d0
    %sign:_(s64) = COPY $d1
    %fcopysign:_(s64) = G_FCOPYSIGN %val, %sign(s64)
    $d0 = COPY %fcopysign(s64)
    RET_ReallyLR implicit $d0