tests/mir-opt/pre-codegen/checked_ops.checked_shl.PreCodegen.after.mir

// MIR for `checked_shl` after PreCodegen

fn checked_shl(_1: u32, _2: u32) -> Option<u32> {
    debug x => _1;
    debug rhs => _2;
    let mut _0: std::option::Option<u32>;
    scope 1 (inlined core::num::<impl u32>::checked_shl) {
        debug self => _1;
        debug rhs => _2;
        let mut _6: bool;
        scope 2 {
            debug a => _4;
            debug b => _5;
        }
        scope 3 (inlined core::num::<impl u32>::overflowing_shl) {
            debug self => _1;
            debug rhs => _2;
            let mut _4: u32;
            let mut _5: bool;
            scope 4 (inlined core::num::<impl u32>::wrapping_shl) {
                debug self => _1;
                debug rhs => _2;
                let mut _3: u32;
                scope 5 {
                    scope 6 (inlined core::num::<impl u32>::unchecked_shl) {
                        debug self => _1;
                        debug rhs => _3;
                        scope 7 {
                        }
                    }
                }
            }
        }
    }

    bb0: {
        StorageLive(_4);
        StorageLive(_5);
        StorageLive(_3);
        _3 = BitAnd(_2, const 31_u32);
        _4 = ShlUnchecked(_1, _3);
        StorageDead(_3);
        _5 = Ge(_2, const _);
        StorageLive(_6);
        _6 = unlikely(move _5) -> [return: bb1, unwind unreachable];
    }

    bb1: {
        switchInt(move _6) -> [0: bb2, otherwise: bb3];
    }

    bb2: {
        _0 = Option::<u32>::Some(_4);
        goto -> bb4;
    }

    bb3: {
        _0 = const Option::<u32>::None;
        goto -> bb4;
    }

    bb4: {
        StorageDead(_6);
        StorageDead(_5);
        StorageDead(_4);
        return;
    }
}

ALLOC0 (size: 8, align: 4) {
    00 00 00 00 __ __ __ __                         │ ....░░░░
}