blob: 39dc7e5d996b81771a05ff0b0b0dd752113a8055 [file] [log] [blame]
From 51b0683519bad41cbfe659e02e6531ea722ae019 Mon Sep 17 00:00:00 2001
From: AdityaK <appujee@google.com>
Date: Fri, 19 Jan 2024 14:48:09 -0800
Subject: [PATCH] Disable PhaseOrdering/ARM/arm_mult_q15.ll test
Change-Id: Ie2f3595685375a2b0c344538ef01069550025f57
---
llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
index 7cbce461a492..939b4d39ea20 100644
--- a/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
+++ b/llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes='default<O3>' -S | FileCheck %s
+; UNSUPPORTED: target={{.*}}
; This test after a lot of cleanup should produce pick a tail-predicated 8x
; vector loop. The 8x will be more profitable, to pick a VQDMULH.s16 instruction.
--
2.43.0.429.g432eaa2c6b-goog