| # v850 divh |
| # mach: all |
| |
| .include "testutils.inc" |
| |
| # Regular division - check signs |
| |
| seti 6, r1 |
| seti 45, r2 |
| divh r1, r2 |
| |
| flags 0 |
| reg r1, 6 |
| reg r2, 7 |
| |
| seti -6, r1 |
| seti 45, r2 |
| divh r1, r2 |
| |
| flags s |
| reg r1, -6 |
| reg r2, -7 |
| |
| seti 6, r1 |
| seti -45, r2 |
| divh r1, r2 |
| |
| flags s |
| reg r1, 6 |
| reg r2, -7 |
| |
| seti -6, r1 |
| seti -45, r2 |
| divh r1, r2 |
| |
| flags 0 |
| reg r1, -6 |
| reg r2, 7 |
| |
| # Only the lower half of the dividend is used |
| |
| seti 0x0000fffa, r1 |
| seti -45, r2 |
| divh r1, r2 |
| |
| flags 0 |
| reg r1, 0x0000fffa |
| reg r2, 7 |
| |
| # If the data is divhided by zero, OV=1 and the quotient is undefined. |
| # According to NEC, the S and Z flags, and the output registers, are |
| # unchanged. |
| |
| noflags |
| seti 0, r1 |
| seti 45, r2 |
| seti 67, r3 |
| divh r1, r2 |
| |
| flags v |
| reg r2, 45 |
| |
| allflags |
| seti 0, r1 |
| seti 45, r2 |
| seti 67, r3 |
| divh r1, r2 |
| |
| flags sat + c + v + s + z |
| reg r2, 45 |
| |
| # Zero / (N!=0) => normal |
| |
| noflags |
| seti 45, r1 |
| seti 0, r2 |
| seti 67, r3 |
| divh r1, r2 |
| |
| flags z |
| reg r1, 45 |
| reg r2, 0 |
| |
| # Test for regular overflow |
| |
| noflags |
| seti -1, r1 |
| seti 0x80000000, r2 |
| divh r1, r2 |
| |
| flags v + s |
| reg r1, -1 |
| reg r2, 0x80000000 |
| |
| |
| pass |