| /**************************************************************************** |
| **************************************************************************** |
| *** |
| *** This header was automatically generated from a Linux kernel header |
| *** of the same name, to make information necessary for userspace to |
| *** call into the kernel available to libc. It contains only constants, |
| *** structures, and macros generated from the original header, and thus, |
| *** contains no copyrightable information. |
| *** |
| *** To edit the content of this header, modify the corresponding |
| *** source file (e.g. under external/kernel-headers/original/) then |
| *** run bionic/libc/kernel/tools/update_all.py |
| *** |
| *** Any manual change here will be lost the next time this script will |
| *** be run. You've been warned! |
| *** |
| **************************************************************************** |
| ****************************************************************************/ |
| #ifndef _ASM_RISCV_PERF_REGS_H |
| #define _ASM_RISCV_PERF_REGS_H |
| enum perf_event_riscv_regs { |
| PERF_REG_RISCV_PC, |
| PERF_REG_RISCV_RA, |
| PERF_REG_RISCV_SP, |
| PERF_REG_RISCV_GP, |
| PERF_REG_RISCV_TP, |
| PERF_REG_RISCV_T0, |
| PERF_REG_RISCV_T1, |
| PERF_REG_RISCV_T2, |
| PERF_REG_RISCV_S0, |
| PERF_REG_RISCV_S1, |
| PERF_REG_RISCV_A0, |
| PERF_REG_RISCV_A1, |
| PERF_REG_RISCV_A2, |
| PERF_REG_RISCV_A3, |
| PERF_REG_RISCV_A4, |
| PERF_REG_RISCV_A5, |
| PERF_REG_RISCV_A6, |
| PERF_REG_RISCV_A7, |
| PERF_REG_RISCV_S2, |
| PERF_REG_RISCV_S3, |
| PERF_REG_RISCV_S4, |
| PERF_REG_RISCV_S5, |
| PERF_REG_RISCV_S6, |
| PERF_REG_RISCV_S7, |
| PERF_REG_RISCV_S8, |
| PERF_REG_RISCV_S9, |
| PERF_REG_RISCV_S10, |
| PERF_REG_RISCV_S11, |
| PERF_REG_RISCV_T3, |
| PERF_REG_RISCV_T4, |
| PERF_REG_RISCV_T5, |
| PERF_REG_RISCV_T6, |
| PERF_REG_RISCV_MAX, |
| }; |
| #endif |
