Android TV Reference Remote
Check in SDK based on Telink 8278 chipset, solution provided
by Telink Semiconductor (Shanghai) Co., Ltd.
This source code drop contains the open source software. The libraries,
compiler toolchain and other binaries dependencies are hosted by Telink.
Software version: 1.26
v1.26 Library version
| lib name | origin |
| :-------------------: | :-----------------------: |
| libfirmware_encrypt.a | ble SDK V1.1.1 |
| liblt_8278.a | ble SDK V1.1.1 |
| libapp_ota.a | google BLE RCU SDK v1.24 |
v1.26 Changes
- Prevented advertising in test mode.
- Fixed rapid assist: b/175226965.
- Enabled wake-up keyid (1 vs 2).
- Updated the wake-up packet in custom format.
Change-Id: Ie26641a39f23cb3adc692c63cadcdfe8ea1a9b0d
diff --git a/application/audio/gl_audio.c b/application/audio/gl_audio.c
index d466657..744eaef 100644
--- a/application/audio/gl_audio.c
+++ b/application/audio/gl_audio.c
@@ -212,9 +212,13 @@
* @param none
* @return none
*/
+#define PREVENT_TIME 600 //ms
+_attribute_data_retention_ u32 prevent_repeat_trigger_on_request_tick = 0;
void google_voice_on_request(){
- //app_active_remote_timer = clock_time() | 1;
+ //Prevent repeated triggers(2020.12.15)
+ if(prevent_repeat_trigger_on_request_tick && (!clock_time_exceed(prevent_repeat_trigger_on_request_tick,PREVENT_TIME*1000))) return;
+ prevent_repeat_trigger_on_request_tick = clock_time()|1;
google_voice_ctl |= FLAG_GOOGLE_SEARCH;
}
@@ -516,18 +520,11 @@
default:
{
//send audio stop and restart audio or ignore cmd
- if(mic_open_mode == mic_mode){
- //when mic_open_mode is same.ignore the cmd.
-
- }else{
- //mic_open_mode is changed.send audio stop and restart audio with new mode
- mic_open_mode = mic_mode;
-
- ui_enable_mic(0);
- google_voice_ctl |= FLAG_AUDIO_CLOSE;
- audio_stop_reason = REASON_UPCOMING_AUDIO_START;
- audio_start_reason = REASON_MICOPEN;
- }
+ //Prevent repeated triggers(2020.12.15)
+ ui_enable_mic(0);
+ google_voice_ctl |= FLAG_AUDIO_CLOSE;
+ audio_stop_reason = REASON_UPCOMING_AUDIO_START;
+ audio_start_reason = REASON_MICOPEN;
break;
}
}
@@ -1167,6 +1164,7 @@
}
if((google_voice_ctl & FLAG_NOTIFY_AUDIO_DATA) == 0) return;
+ prevent_repeat_trigger_on_request_tick = 0;
proc_mic_encoder();
google_voice_data_notify_proc();
diff --git a/vendor/827x_ble_remote/app.c b/vendor/827x_ble_remote/app.c
index 2493adc..a0195c4 100644
--- a/vendor/827x_ble_remote/app.c
+++ b/vendor/827x_ble_remote/app.c
@@ -418,6 +418,7 @@
printf("ble_ll_reject\r\n");
if(device_in_connection_state == 0)
{
+ blt_soft_timer_delete(app_terminate_timeout);
blt_soft_timer_add(app_enable_adv_timeout, 3000000);
ble_sts_t status = app_terminate(HCI_ERR_REMOTE_USER_TERM_CONN);
printf("status=%x\r\n",status);
@@ -442,7 +443,7 @@
return -1;
}
-void ble_remote_terminate(u8 e,u8 *p, int n) //*p is terminate reason
+void ble_remote_terminate(u8 e,u8 *p, int n) //*p is terminate reason
{
u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber(); //get bonded device number
@@ -546,7 +547,7 @@
}
-_attribute_ram_code_ void user_set_rf_power (u8 e, u8 *p, int n)
+_attribute_ram_code_ void user_set_rf_power (u8 e, u8 *p, int n)
{
#if (MP_TEST_MODE)
if (gpio_read(DUT_INPUT_PORT) && test_get_mode() == MODE_TEST)
@@ -728,7 +729,7 @@
return 0;
}
-void task_connect (u8 e, u8 *p, int n)
+void task_connect (u8 e, u8 *p, int n)
{
printf("connect\r\n");
app_mtu_size = 23;
@@ -740,12 +741,12 @@
bls_ota_set_random(p+12);
}
-void task_conn_update_req (u8 e, u8 *p, int n)
+void task_conn_update_req (u8 e, u8 *p, int n)
{
printf("task_conn_update_req\r\n");
}
-void task_conn_update_done (u8 e, u8 *p, int n)
+void task_conn_update_done (u8 e, u8 *p, int n)
{
printf("task_conn_update_done\n");
}
@@ -772,7 +773,7 @@
}
return 0;
}
-void app_phy_update_complete_event(u8 e,u8 *p, int n)
+void app_phy_update_complete_event(u8 e,u8 *p, int n)
{
}
#endif
@@ -926,7 +927,6 @@
if(blc_ll_getCurrentState() == BLS_LINK_STATE_ADV && delay3s_to_sleep_tick && clock_time_exceed(delay3s_to_sleep_tick,3000*1000))
{
printf("adv timeout\r\n");
- //cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
app_schedule_ota_enter_deep();
}
if((is_pairing_mode == 0) && (is_reconn_mode == 0) && (device_in_connection_state == 0) && !user_task_flg )
@@ -938,28 +938,11 @@
if(clock_time_exceed(advertise_begin_tick , time* 1000000))
{
printf("idle to sleep\r\n");
- //cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
app_schedule_ota_enter_deep();
}
}
-#if 0
- //conn 60s no event(key/voice/led), enter deepsleep
- else if( device_in_connection_state && !user_task_flg && \
- clock_time_exceed(latest_user_event_tick, CONN_IDLE_ENTER_DEEP_TIME * 1000000) )
- {
- /*
- bls_ll_terminateConnection(HCI_ERR_REMOTE_USER_TERM_CONN); //push terminate cmd into ble TX buffer
- bls_ll_setAdvEnable(0); //disable adv
- sendTerminate_before_enterDeep = 1;
- */
- printf("conn 30s -> deep sleep\r\n");
- cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //deepsleep
- }
-#endif
}
-
#endif
-
}
#endif //END of BLE_REMOTE_PM_ENABLE
@@ -967,7 +950,7 @@
-void ble_remote_set_sleep_wakeup (u8 e, u8 *p, int n)
+void ble_remote_set_sleep_wakeup (u8 e, u8 *p, int n)
{
if( blc_ll_getCurrentState() == BLS_LINK_STATE_CONN && ((u32)(bls_pm_getSystemWakeupTick() - clock_time())) > 80 * CLOCK_16M_SYS_TIMER_CLK_1MS){ //suspend time > 30ms.add gpio wakeup
bls_pm_setWakeupSource(PM_WAKEUP_PAD); //gpio pad wakeup suspend/deepsleep
@@ -1041,87 +1024,12 @@
u8 data[31]; //0-31 byte
}rf_packet_adv_ind_module_t;
-extern u8 wakeup_key[APP_CUSTOM_WAKEUPKEY_NUM];
-
-
-/* //sdmc format
-void app_tx_power_wakeup(u8 keyid)
-{
- rf_packet_adv_ind_module_t tx_power_wakeup;
- smp_param_save_t bondInfo;
-
- printf("app_tx_power_wakeup\r\n");
- rf_set_ble_access_code_adv();
- rf_set_ble_crc_adv();
- bls_smp_param_loadByIndex(0, &bondInfo); //get the latest bonding device (index: bond_number-1 )
-
- tx_power_wakeup.rf_len = 25;
- tx_power_wakeup.dma_len = tx_power_wakeup.rf_len + 2;
- tx_power_wakeup.type = ADV_TYPE_CONNECTABLE_UNDIRECTED;
-
- memcpy(&(tx_power_wakeup.advA[0]),mac_public,6);
- tx_power_wakeup.data[0] = 0x12;
- tx_power_wakeup.data[1] = 0xff;
- tx_power_wakeup.data[2] = 0xff;
- tx_power_wakeup.data[3] = 0xff;
- tx_power_wakeup.data[4] = 'A';
- tx_power_wakeup.data[5] = 'm';
- tx_power_wakeup.data[6] = 'l';
- tx_power_wakeup.data[7] = 'o';
- tx_power_wakeup.data[8] = 'g';
- tx_power_wakeup.data[9] = 'i';
- tx_power_wakeup.data[10] = 'c';
- if(keyid == 0xff)
- {
- tx_power_wakeup.data[11] = 0x01; //schedule ota wakeup packet
- }
- else
- {
- if(keyid == wakeup_key[0])
- tx_power_wakeup.data[11] = 1;
- else if(keyid == wakeup_key[1])
- tx_power_wakeup.data[11] = 2;
- else if(keyid == wakeup_key[2])
- tx_power_wakeup.data[11] = 3;
- else if(keyid == wakeup_key[3])
- tx_power_wakeup.data[11] = 5;
- else if(keyid == wakeup_key[4])
- tx_power_wakeup.data[11] = 0x10;
- }
- memcpy(&(tx_power_wakeup.data[12]), bondInfo.peer_addr, 6);
-
- u8 index=0;
- if(read_wakeup_keyindex_info(&index) == 0)
- {
- tx_power_wakeup.data[18] = index;
- }
- else
- tx_power_wakeup.data[18] = 0;
- printf("tx_power_wakeup.data[18]=%x\r\n",tx_power_wakeup.data[18]);
- for(u8 i=0;i<3;i++)
- {
- rf_set_ble_channel(37+i);
-
- rf_start_stx (&tx_power_wakeup, 100);
-
- while(rf_tx_finish()!=0x01);
-
- rf_tx_finish_clear_flag();
- }
- if(keyid != 0xff)
- {
- index++;
- write_wakeup_keyindex_info(index);
- }
-}
-*/
-
void app_tx_power_wakeup(u8 keyid)
{
rf_packet_adv_ind_module_t tx_power_wakeup;
smp_param_save_t bondInfo;
u8 buffer[40];
- u8 index=0,i,j=0;
+ u8 index=0,i;
u8 pos_index[3]={0};
printf("app_tx_power_wakeup\r\n");
@@ -1129,9 +1037,9 @@
rf_set_ble_crc_adv();
bls_smp_param_loadByIndex(0, &bondInfo); //get the latest bonding device (index: bond_number-1 )
-
flash_read_page(0x78000+wakeup_key_pos, 40, buffer);
- if(buffer[0] == 0xff)
+
+ //google format
{
tx_power_wakeup.rf_len = 19;
tx_power_wakeup.dma_len = tx_power_wakeup.rf_len + 2;
@@ -1149,52 +1057,82 @@
}
else
{
- tx_power_wakeup.data[5] = 1;
+ tx_power_wakeup.data[5] = app_custom_wakeupkey_packet_index(keyid);
}
if(read_wakeup_keyindex_info(&index) == 0)
{
- tx_power_wakeup.data[6] = index;
+ if(keyid == 0xff)
+ {
+ if(index)
+ tx_power_wakeup.data[6] = index-1;
+ else
+ tx_power_wakeup.data[6] = 0;
+ }
+ else
+ tx_power_wakeup.data[6] = index;
}
else
tx_power_wakeup.data[6] = 0;
- printf("tx_power_wakeup.data[6]=%x\r\n",tx_power_wakeup.data[6]);
memcpy(&(tx_power_wakeup.data[7]), bondInfo.peer_addr, 6);
}
- else
- {
- tx_power_wakeup.rf_len = buffer[4];
- tx_power_wakeup.dma_len = tx_power_wakeup.rf_len + 2;
- tx_power_wakeup.type = buffer[3];
- memcpy(&(tx_power_wakeup.advA[0]),mac_public,6);
- printf("buffer\r\n");
- for(i=0;i<5;i++)
- printf(" %x",buffer[i]);
+ for(u8 i=0;i<3;i++)
+ {
+ rf_set_ble_channel(37+i);
+
+ rf_start_stx (&tx_power_wakeup, 100);
+
+ while(rf_tx_finish()!=0x01);
+
+ rf_tx_finish_clear_flag();
+ }
+
+ //custom format
+ if(buffer[0] != 0xff)
+ {
+ tx_power_wakeup.rf_len = buffer[0]+6;
+ tx_power_wakeup.dma_len = tx_power_wakeup.rf_len + 2;
+ tx_power_wakeup.type = 0;
+ memcpy(&(tx_power_wakeup.advA[0]),mac_public,6);
+ for(i=0;i<buffer[0];i++)
+ tx_power_wakeup.data[i] = buffer[4+i];
+ printf("raw packet =\r\n");
+ for(i=0;i<buffer[0];i++)
+ printf(" %x",tx_power_wakeup.data[i]);
for(i=0;i<3;i++)
{
if(buffer[i])
{
- pos_index[i] = buffer[i]-8;
+ pos_index[i] = buffer[i+1];
}
else
pos_index[i] = 0xff;
}
+ printf("\r\npos_index[0]=%x,pos_index[1]=%x,pos_index[2]=%x\r\n",pos_index[0],pos_index[1],pos_index[2]);
- for(i=0;i<buffer[4]-6;i++)
+ for(i=0;i<buffer[0];i++)
{
if(i == pos_index[0])
{
if(keyid == 0xff)
tx_power_wakeup.data[i] = 2;
else
- tx_power_wakeup.data[i] = 1;
+ tx_power_wakeup.data[i] = app_custom_wakeupkey_packet_index(keyid);
}
else if(i == pos_index[1])
{
if(read_wakeup_keyindex_info(&index) == 0)
{
- tx_power_wakeup.data[i] = index;
+ if(keyid == 0xff)
+ {
+ if(index)
+ tx_power_wakeup.data[i] = index-1;
+ else
+ tx_power_wakeup.data[i] = 0;
+ }
+ else
+ tx_power_wakeup.data[i] = index;
}
else
tx_power_wakeup.data[i] = 0;
@@ -1205,27 +1143,24 @@
memcpy(&(tx_power_wakeup.data[i]), bondInfo.peer_addr, 6);
i += 5;
}
- else
- {
- tx_power_wakeup.data[i] = buffer[11+j];
- j++;
- }
}
+
printf("wakeup packet =\r\n");
- for(i=0;i<buffer[4]-6;i++)
+ for(i=0;i<buffer[0];i++)
printf(" %x",tx_power_wakeup.data[i]);
+ for(u8 i=0;i<3;i++)
+ {
+ rf_set_ble_channel(37+i);
+
+ rf_start_stx (&tx_power_wakeup, 100);
+
+ while(rf_tx_finish()!=0x01);
+
+ rf_tx_finish_clear_flag();
+ }
+
}
- for(u8 i=0;i<3;i++)
- {
- rf_set_ble_channel(37+i);
-
- rf_start_stx (&tx_power_wakeup, 100);
-
- while(rf_tx_finish()!=0x01);
-
- rf_tx_finish_clear_flag();
- }
if(keyid != 0xff)
{
index++;
@@ -1251,7 +1186,7 @@
app_is_set_mtusize = 1;
printf("app_mtu_size=%x\r\n",app_mtu_size);
if(app_mtu_size < MTU_SIZE_SETTING)
- blc_att_requestMtuSizeExchange(BLS_CONN_HANDLE, MTU_SIZE_SETTING);
+ blc_att_requestMtuSizeExchange(BLS_CONN_HANDLE, MTU_SIZE_SETTING);
}
}
@@ -1354,46 +1289,58 @@
is_reconn_mode = 0;
////////////////// config adv packet /////////////////////
-#if (BLE_REMOTE_SECURITY_ENABLE)
blc_smp_param_setBondingDeviceMaxNumber(1);
- u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber(); //get bonded device number
- printf("bond_number=%x\r\n",bond_number);
- smp_param_save_t bondInfo;
- if(bond_number) //at least 1 bonding device exist
+ if (test_get_mode() != MODE_TEST)
{
- bls_smp_param_loadByIndex( bond_number - 1, &bondInfo); //get the latest bonding device (index: bond_number-1 )
- }
-
- if(bond_number) //set direct adv
- {
- app_set_adv_interval_downgrade_direct();
- printf("peer_addr=%x %x %x %x %x %x\r\n",bondInfo.peer_addr[0],bondInfo.peer_addr[1],bondInfo.peer_addr[2],bondInfo.peer_addr[3],bondInfo.peer_addr[4],bondInfo.peer_addr[5]);
- if((analog_read(USED_DEEP_ANA_REG) & OTA_FLG) == OTA_FLG)
+ u8 bond_number = blc_smp_param_getCurrentBondingDeviceNumber(); //get bonded device number
+ smp_param_save_t bondInfo;
+ if(bond_number) //at least 1 bonding device exist
{
- printf("ana read = ota succ\r\n");
- service_change = 0x55;
+ bls_smp_param_loadByIndex( bond_number - 1, &bondInfo); //get the latest bonding device (index: bond_number-1 )
}
- enterdeep_time = ADV_RECONN_ENTER_DEEP_COUNT;
- //set direct adv
- u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
- ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
- bondInfo.peer_addr_type, bondInfo.peer_addr,
- MY_APP_ADV_CHANNEL,
- ADV_FP_NONE);
- if(status != BLE_SUCCESS) { while(1); } //debug: adv setting err
- //it is recommended that direct adv only last for several seconds, then switch to indirect adv
- bls_ll_setAdvDuration(MY_DIRECT_ADV_TMIE, 1);
- bls_app_registerEventCallback (BLT_EV_FLAG_ADV_DURATION_TIMEOUT, &direct_adv);
- bls_ll_setAdvEnable(1); //adv enable
- printf("direct adv\r\n");
+ if(bond_number) //set direct adv
+ {
+ app_set_adv_interval_downgrade_direct();
+ printf("\r\npeer_addr=%x %x %x %x %x %x\r\n",bondInfo.peer_addr[0],bondInfo.peer_addr[1],bondInfo.peer_addr[2],bondInfo.peer_addr[3],bondInfo.peer_addr[4],bondInfo.peer_addr[5]);
+ if((analog_read(USED_DEEP_ANA_REG) & OTA_FLG) == OTA_FLG)
+ {
+ printf("ana read = ota succ\r\n");
+ service_change = 0x55;
+ }
+ enterdeep_time = ADV_RECONN_ENTER_DEEP_COUNT;
+ //set direct adv
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_DIRECTED_LOW_DUTY, app_own_address_type,
+ bondInfo.peer_addr_type, bondInfo.peer_addr,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ if(status != BLE_SUCCESS) { while(1); } //debug: adv setting err
+ //it is recommended that direct adv only last for several seconds, then switch to indirect adv
+ bls_ll_setAdvDuration(MY_DIRECT_ADV_TMIE, 1);
+ bls_app_registerEventCallback (BLT_EV_FLAG_ADV_DURATION_TIMEOUT, &direct_adv);
+
+ bls_ll_setAdvEnable(1); //adv enable
+ printf("direct adv\r\n");
+ }
+ else //set indirect adv
+ {
+ app_set_adv_interval_downgrade_indirect();
+ enterdeep_time = ADV_IDLE_ENTER_DEEP_COUNT;
+ u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
+ ADV_TYPE_CONNECTABLE_UNDIRECTED, app_own_address_type,
+ 0, NULL,
+ MY_APP_ADV_CHANNEL,
+ ADV_FP_NONE);
+ if(status != BLE_SUCCESS) { while(1); } //debug: adv setting err
+ printf("inderict adv\r\n");
+ }
}
- else //set indirect adv
-#endif
+ else
{
-
+ printf("test mode\r\n");
app_set_adv_interval_downgrade_indirect();
enterdeep_time = ADV_IDLE_ENTER_DEEP_COUNT;
u8 status = bls_ll_setAdvParam( MY_ADV_INTERVAL_MIN, MY_ADV_INTERVAL_MAX,
@@ -1402,12 +1349,6 @@
MY_APP_ADV_CHANNEL,
ADV_FP_NONE);
if(status != BLE_SUCCESS) { while(1); } //debug: adv setting err
- /*
- if(power_down_flag == 1)
- {
- bls_ll_setAdvEnable(1); //adv enable
- }
- */
printf("inderict adv\r\n");
}
diff --git a/vendor/827x_ble_remote/app_custom.c b/vendor/827x_ble_remote/app_custom.c
index fa42fb5..ebefbfd 100644
--- a/vendor/827x_ble_remote/app_custom.c
+++ b/vendor/827x_ble_remote/app_custom.c
@@ -43,18 +43,18 @@
extern void kb_p_map_init(void);
_attribute_data_retention_ u8 device_type=1;
-
_attribute_data_retention_ u8 key_setting_or_noti[2]={IR_DASHBOARD,G00GLE_MKEY_DASHBOARD};
_attribute_data_retention_ u8 key_guide_or_livetv[2]={IR_GUIDE,G00GLE_MKEY_GUIDE};
_attribute_data_retention_ u16 key_subtitle_or_teletext[2]={IR_SUBTITLE,G00GLE_MKEY_SUBTITLE};
-_attribute_data_retention_ u8 wakeup_key[APP_CUSTOM_WAKEUPKEY_NUM];
+_attribute_data_retention_ u8 wakeup_key1[APP_CUSTOM_WAKEUPKEY_NUM];
+_attribute_data_retention_ u8 wakeup_key2[APP_CUSTOM_WAKEUPKEY_NUM];
_attribute_data_retention_ u8 wakeup_key_pos=0;
_attribute_data_retention_ u8 comb_key_keyid[7]={0xff,0xff,0xff,0xff,0xff,0xff,0xff}; //back,home,center,mute,setting,guide,subtitle
+
const unsigned char Kb_CombKey_KeyId_G10[6] = {7, 0xa, 0x15,0x16,0x0c,0x0d}; //back,home,center,mute,setting,guide keyid in g10
const unsigned char Kb_CombKey_KeyId_G20[7] = {0xd,0x13,0x2a,0x2b,0x18,0x19,0x0f}; //back,home,center,mute,setting,guide keyid in g20
-const unsigned char Kb_Map_Normal_G10[8][3] = \
- {\
+const unsigned char Kb_Map_Normal_G10[8][3] = {\
{0, 1, 2}, \
{3, 4, 5}, \
{6, 7, 8}, \
@@ -64,7 +64,6 @@
{18, 19, 20},\
{21, 22, 23}};
-
const unsigned char Kb_Map_Ble_G10[] = {\
CR_POWER, CR_RIGHT, CR_VOL_DN, \
CR_INPUT, CR_DN, CR_CHN_DN, \
@@ -86,8 +85,7 @@
IR_LEFT, IR_CHN_UP, VK_NONE, \
IR_CENTER, IR_MUTE, VK_NONE };
-const unsigned short int Kb_Map_Correspend_Index_G10[] = {6,VOICE,12,12,21, 7,10,13,0,3, 13,8,11,14,17 };
-
+const unsigned char Kb_Map_Correspend_Index_G10[] = {VOICE,10,0,3,8,11,14,17};
const unsigned char Kb_Map_Normal_G20[8][6] = \
{\
@@ -120,8 +118,7 @@
IR_LEFT, IR_CHN_UP, VK_NONE, VK_NONE, VK_NONE, VK_NONE,\
IR_CENTER, IR_MUTE, VK_NONE, VK_NONE, VK_NONE, VK_NONE};
-const unsigned short int Kb_Map_Correspend_Index_G20[] = {6,VOICE,24,24,42, 13,19,25,0,6, 25,14,20,26,32, 48,15,28,5,11, 34,3,15};
-
+const unsigned char Kb_Map_Correspend_Index_G20[] = {VOICE,19,0,6,14,20,26,32,28,5,11,34};
const unsigned int Kb_Drive_Pins_G10[3] = {GPIO_PD2, GPIO_PD3, GPIO_PD4};
const unsigned int Kb_Drive_Pins_G20[6] = {GPIO_PD2, GPIO_PD3, GPIO_PD4, GPIO_PD7, GPIO_PA0, GPIO_PD1};
@@ -149,41 +146,34 @@
ui_layout = 0;
if((ui_layout&LAYOUT_MASK_BIT0))
{
- printf("notification key\r\n");
key_setting_or_noti[0] = IR_NOTIFICATION;
key_setting_or_noti[1] = CR_NOTIFICATION;
}
else
{
- printf("setting key\r\n");
key_setting_or_noti[0] = IR_SETTING;
key_setting_or_noti[1] = CR_SETTING;
}
if((ui_layout&LAYOUT_MASK_BIT1))
{
- printf("live tv key\r\n");
key_guide_or_livetv[0] = IR_LIVE;
key_guide_or_livetv[1] = CR_LIVE;
}
else
{
- printf("tv guide key\r\n");
key_guide_or_livetv[0] = IR_GUIDE;
key_guide_or_livetv[1] = G00GLE_MKEY_GUIDE;
}
if((ui_layout&LAYOUT_MASK_BIT2))
{
- printf("teletext key\r\n");
key_subtitle_or_teletext[0] = IR_TEXT;
key_subtitle_or_teletext[1] = CR_TEXT;
}
else
{
- printf("subtitle key\r\n");
key_subtitle_or_teletext[0] = IR_SUBTITLE;
key_subtitle_or_teletext[1] = G00GLE_MKEY_SUBTITLE;
}
-
}
void app_custom_param_init(u8 device)
@@ -203,17 +193,67 @@
kb_p_map_init();
}
+void app_custom_wakeup_key_load(u16 mask1, u16 mask2)
+{
+ u8 j=0,i;
+ u8 wakeupkey_num=0;
+ u8 *p_kb_map;
+
+ if((mask1 != 0xffff) && (mask2 != 0xffff) && ((mask1 & mask2) == 0))
+ {
+ if(device_type == REMOTE_G10)
+ {
+ wakeupkey_num = APP_CUSTOM_WAKEUPKEY_NUM-4;
+ p_kb_map = (u8*)Kb_Map_Correspend_Index_G10;
+ }
+ else
+ {
+ wakeupkey_num = APP_CUSTOM_WAKEUPKEY_NUM;
+ p_kb_map = (u8*)Kb_Map_Correspend_Index_G20;
+ }
+ for(i=0;i<wakeupkey_num;i++)
+ {
+ if(mask1&0x01)
+ {
+ wakeup_key1[j] = p_kb_map[i];
+ j++;
+ }
+ mask1 = mask1>>1;
+ }
+ j=0;
+ for(i=0;i<wakeupkey_num;i++)
+ {
+ if(mask2&0x01)
+ {
+ wakeup_key2[j] = p_kb_map[i];
+ j++;
+ }
+ mask2 = mask2>>1;
+ }
+
+ printf("\r\nwakeup key1 =\r\n");
+ for(i=0;i<wakeupkey_num;i++)
+ printf(" %x",wakeup_key1[i]);
+ printf("\r\nwakeup key2 =\r\n");
+ for(i=0;i<wakeupkey_num;i++)
+ printf(" %x",wakeup_key2[i]);
+ }
+}
+
void app_custom_init(void)
{
u8 buffer[64];
- u8 addr_pos=0,i,j;
+ u8 addr_pos=0,i;
u8 device_ui_layout_type=0;
u8 *pREMOTE_B046 = (u8 *)("RemoteB046");
- u32 wakeupmask=0;
+ u16 wakeupkey1_mask,wakeupkey2_mask;
flash_read_page(APP_CUSTOM_ADDR, 64, buffer);
for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
- wakeup_key[i] = 0xff;
+ {
+ wakeup_key1[i] = 0xff;
+ wakeup_key2[i] = 0xff;
+ }
if(buffer[0] == 0xff)
{
printf("default custom info\r\n");
@@ -251,51 +291,31 @@
addr_pos = 9 + my_devNamelen;
device_ui_layout_type = buffer[addr_pos];
-
addr_pos = addr_pos+1;
- for(i=0;i<7;i++)
- printf(" %x",my_PnPtrs[i]);
-
//wakeup key
- wakeupmask = ((u32)(((u32)buffer[addr_pos]<<24) | ((u32)buffer[addr_pos+1]<<16) | ((u32)buffer[addr_pos+2]<<8) | ((u32)buffer[addr_pos+3])));
- if(wakeupmask != 0xffffffff)
- {
- j=0;
- for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
- {
- if(wakeupmask&0x01)
- {
- wakeup_key[j] = Kb_Map_Correspend_Index_G10[i];
- j++;
- }
- wakeupmask = wakeupmask>>1;
- }
- printf("wakeup key =\r\n");
- for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
- printf(" %x",wakeup_key[i]);
- }
+ wakeupkey1_mask = (u16)(((u16)buffer[addr_pos]<<8) | ((u16)buffer[addr_pos+1]));
+ wakeupkey2_mask = (u16)(((u16)buffer[addr_pos+2]<<8) | ((u16)buffer[addr_pos+3]));
+ printf("wakeupkey1_mask=%x,wakeupkey2_mask=%x\r\n",wakeupkey1_mask,wakeupkey2_mask);
+ app_custom_wakeup_key_load(wakeupkey1_mask,wakeupkey2_mask);
app_custom_ui_layout(device_ui_layout_type);
- printf("device_type = %x ,device_ui_type=%x\r\n",device_type,device_ui_layout_type);
wakeup_key_pos = addr_pos + 4;
printf("wakeup_key_pos=%x\r\n",wakeup_key_pos);
if(my_devNamelen>16)
my_devNamelen = 16;
}
app_custom_param_init(device_type);
-
my_FWRevtrs[3] = (device_type) + 0x30;
my_FWRevtrs[4] = (device_ui_layout_type) + 0x30;
-
}
-u8 app_custom_is_wakeup_key(u8 keyid)
+u8 app_custom_is_wakeup_key(u8 keyid)
{
u8 i;
for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
{
- if(keyid == wakeup_key[i])
+ if((keyid == wakeup_key1[i]) || (keyid == wakeup_key2[i]))
{
printf("wakeup_key =%x\r\n",keyid);
return 1;
@@ -304,6 +324,36 @@
return 0;
}
+u8 app_custom_is_enable_wakeup_key(void)
+{
+ u8 buffer[4];
+ u16 wakeupkey1_mask,wakeupkey2_mask;
+ u32 addr=0;
+
+ addr = 0x78000+wakeup_key_pos-4;
+ flash_read_page(addr, 4, buffer);
+ wakeupkey1_mask = (u16)(((u16)buffer[0]<<8) | ((u16)buffer[1]));
+ wakeupkey2_mask = (u16)(((u16)buffer[2]<<8) | ((u16)buffer[3]));
+ if((wakeupkey1_mask != 0xffff) && (wakeupkey2_mask != 0xffff) && ((wakeupkey1_mask & wakeupkey2_mask) == 0))
+ return 1;
+ else
+ return 0;
+}
+
+u8 app_custom_wakeupkey_packet_index(u8 keyid)
+{
+ u8 i;
+
+ for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
+ {
+ if(keyid == wakeup_key1[i])
+ return 1;
+ else if(keyid == wakeup_key2[i])
+ return 2;
+ }
+ return 0;
+}
+
u8 app_custom_get_drive_len(void)
{
u8 len;
@@ -315,16 +365,14 @@
return len;
}
-
void app_custom_test(void)
{
- u8 buffer[]={0x02,0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00,0x09,0x52,0x65,0x6d,0x6f,0x74,0x65,0x47,0x31,0x30,0x07,0xff,0xff,0xff,0xff,0x0f,0x10,0x09,0,0x13,0xff,0xff,0xff,0xff,0xff,0xff,0x0c,0x16,0x3,0x15,0x01};
- u8 ota_key[] = {'g','o','o','g','l','e','G','2','0','R','C','U',0x00,0x00,0x00,0x00,'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'};
+ u8 buffer[]={0x02,0x02, 0x8a, 0x24, 0x66, 0x82, 0x01, 0x00,0x09,0x52,0x65,0x6d,0x6f,0x74,0x65,0x47,0x31,0x30,0x07,0x00,0x04,0x00,0x70,0xd,0x5,0x6,0x7,0x0c,0x16,0x36,0xfd,0x01,0,0,0,0,0,0,0,0};
+ u8 ota_key[]={'g','o','o','g','l','e','G','2','0','R','C','U',0x00,0x00,0x00,0x00,'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'};
flash_erase_sector(APP_CUSTOM_ADDR);
flash_write_page(APP_CUSTOM_ADDR,sizeof(buffer),buffer);
flash_write_page(APP_CUSTOM_ADDR+0x100,sizeof(ota_key),ota_key);
-
}
diff --git a/vendor/827x_ble_remote/app_custom.h b/vendor/827x_ble_remote/app_custom.h
index caf2dc3..844e07e 100644
--- a/vendor/827x_ble_remote/app_custom.h
+++ b/vendor/827x_ble_remote/app_custom.h
@@ -27,7 +27,7 @@
#ifndef APP_CUSTOM_H_
#define APP_CUSTOM_H_
-#define APP_CUSTOM_WAKEUPKEY_NUM 23
+#define APP_CUSTOM_WAKEUPKEY_NUM 12
extern u8 device_type;
extern u8 key_setting_or_noti[2];
@@ -38,5 +38,7 @@
extern void app_custom_init(void);
extern u8 app_custom_get_drive_len(void);
extern void app_custom_param_init(u8 device);
+extern u8 app_custom_is_enable_wakeup_key(void);
+extern u8 app_custom_wakeupkey_packet_index(u8 keyid);
#endif
diff --git a/vendor/827x_ble_remote/app_flash_write.c b/vendor/827x_ble_remote/app_flash_write.c
index e580629..d6fed7a 100644
--- a/vendor/827x_ble_remote/app_flash_write.c
+++ b/vendor/827x_ble_remote/app_flash_write.c
@@ -100,7 +100,7 @@
//search data in flash
s16 offset = bsearch_without_recursion(addr,used_sector,used_block);
- printf("offset=%x \r\n", (u16)offset);
+ //printf("offset=%x \r\n", (u16)offset);
if(offset == -1){
ret = 2; //return 2; //sector data error
@@ -339,7 +339,6 @@
{
u8 i;
u8 dat;
- printf("init_peer_mac\r\n");
for(i=0;i<5;i++)
{
dat = read_peer_mac_info(peer_mac);
diff --git a/vendor/827x_ble_remote/app_ir.c b/vendor/827x_ble_remote/app_ir.c
index 5bf77cf..49635f4 100644
--- a/vendor/827x_ble_remote/app_ir.c
+++ b/vendor/827x_ble_remote/app_ir.c
@@ -429,10 +429,10 @@
u8 find_flag=0;
ir_flash_index = IR_DATA_SECT_MAX_NUM;
+ printf("ir flash head=\r\n");
for(i=0;i<IR_DATA_SECT_NUM;i++)
{
flash_read_page(IR_DATA_SECT_0_ADDR+i*0x1000, 6, data);
- printf("sect i=%x\r\n",i);
for(u8 k=0;k<6;k++)
printf(" %x",data[k]);
for(j=0;j<3;j++)
@@ -455,12 +455,12 @@
if(ir_flash_index == IR_DATA_SECT_MAX_NUM)
{
ir_flash_index = 0;
- printf("no ir data\r\n");
+ printf("\r\nno ir data\r\n");
return;
}
if(nodata_flag == 1)
{
- printf("no ir data, but ir_flash_index =%x\r\n",ir_flash_index);
+ printf("\r\nno ir data, but ir_flash_index =%x\r\n",ir_flash_index);
}
else
{
diff --git a/vendor/827x_ble_remote/app_ui.c b/vendor/827x_ble_remote/app_ui.c
index 0251daa..d3a0dbc 100644
--- a/vendor/827x_ble_remote/app_ui.c
+++ b/vendor/827x_ble_remote/app_ui.c
@@ -77,7 +77,6 @@
extern u8 flag_schedule_ota;
extern u8 device_timeout_state;
extern u8 wakeup_src;
-extern u8 wakeup_key[APP_CUSTOM_WAKEUPKEY_NUM];
extern u8 power_down_flag;
extern u8 wakeup_key_send_flag;
extern int ir_fallback_send(u8 key_down);
@@ -409,23 +408,24 @@
void app_schedule_ota_wakeup_host(void)
{
+#if 1
u8 data = analog_read(DEEP_ANA_REG2);
- u8 i;
u8 flag=0;
if((wakeup_src == 2) && (data) && (power_down_flag == 2))
{
- for(i=0;i<APP_CUSTOM_WAKEUPKEY_NUM;i++)
- {
- if(wakeup_key[i] != 0xff)
- flag++;
- }
+ flag = app_custom_is_enable_wakeup_key();
if(flag)
{
printf("app_schedule_ota_wakeup_host\r\n");
app_tx_power_wakeup(0xff);
}
}
+#else
+ printf("app_schedule_ota_wakeup_host\r\n");
+ app_tx_power_wakeup(0xff);
+
+#endif
}
#endif
@@ -1550,7 +1550,6 @@
device_led_off(APP_LED_RED);
if((analog_read(USED_DEEP_ANA_REG) & POWER_ON_FLG) == 0)
{
- printf("led on 1s\r\n");
device_led_setup(led_cfg[LED_POWER_ON]); //only poweron
}
#endif
@@ -1561,11 +1560,10 @@
#endif
-
#if (BLT_TEST_SOFT_TIMER_ENABLE)
blt_soft_timer_init();
- if(power_down_flag == 1)
+ if((power_down_flag == 1) && (test_get_mode() != MODE_TEST))
{
blt_soft_timer_add(app_poweron_timeout, 1000000);
}
diff --git a/vendor/827x_driver_test/app.c b/vendor/827x_driver_test/app.c
deleted file mode 100644
index 442d485..0000000
--- a/vendor/827x_driver_test/app.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/******************************************************************************
- * @file app.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-extern void app_timer_test_init(void);
-
-extern void app_i2c_test_init(void);
-extern void app_i2c_test_start(void);
-
-extern void app_spi_test_init(void);
-extern void app_spi_test_start(void);
-
-extern void app_uart_test_init(void);
-extern void app_uart_test_start(void);
-
-extern void app_adc_test_init(void);
-extern void app_adc_test_start(void);
-
-extern void app_pwm_test(void);
-
-extern void app_gpio_irq_test_init(void);
-
-extern void app_led_init(void);
-
-extern void test_low_power(void);
-
-extern void app_emi_init(void);
-extern void app_rf_emi_test_start(void);
-
-void user_init()
-{
-
-#if (DRIVER_TEST_MODE == TEST_HW_TIMER)
-
- app_timer_test_init();
-
-#elif (DRIVER_TEST_MODE == TEST_GPIO_IRQ)
-
- app_gpio_irq_test_init();
- app_led_init();
-
-#elif (DRIVER_TEST_MODE == TEST_UART)
-
- app_uart_test_init();
-
-#elif (DRIVER_TEST_MODE == TEST_IIC)
-
- app_i2c_test_init();
-
-#elif (DRIVER_TEST_MODE == TEST_SPI)
-
- app_spi_test_init();
-
-#elif (DRIVER_TEST_MODE == TEST_ADC)
-
- app_adc_test_init();
-
-#elif (DRIVER_TEST_MODE == TEST_PWM)
-
- app_pwm_test();
-
-#elif (DRIVER_TEST_MODE == TEST_LOW_POWER)
-
- test_low_power();
-
-#elif (DRIVER_TEST_MODE == TEST_RF_EMI)
-
- app_emi_init();
-
-#else
-
-
-#endif
-
-}
-
-
-/////////////////////////////////////////////////////////////////////
-// main loop flow
-/////////////////////////////////////////////////////////////////////
-u32 tick_wakeup;
-void main_loop (void)
-{
-#if (DRIVER_TEST_MODE == TEST_UART)
-
- app_uart_test_start();
-
-#elif (DRIVER_TEST_MODE == TEST_IIC)
-
- app_i2c_test_start();
-
-#elif (DRIVER_TEST_MODE == TEST_SPI)
-
- app_spi_test_start();
-
-#elif (DRIVER_TEST_MODE == TEST_ADC)
- app_adc_test_start();
-
-#elif (DRIVER_TEST_MODE == TEST_RF_EMI)
-
- app_rf_emi_test_start();
-
-#else
-
-#endif
-
-}
-
-
-
-
diff --git a/vendor/827x_driver_test/app_adc.c b/vendor/827x_driver_test/app_adc.c
deleted file mode 100644
index 02e1d81..0000000
--- a/vendor/827x_driver_test/app_adc.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/******************************************************************************
- * @file app_adc.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-#if (DRIVER_TEST_MODE == TEST_ADC)
-
-
-#define TEST_ADC_GPIO 1 //test voltage come from adc gpio
-#define TEST_ADC_VBAT 2 //test power supply
-
-
-#define TEST_ADC_SELECT TEST_ADC_GPIO
-
-
-
-
-
-
-
-void adc_gpio_ain_init(void)
-{
- //set misc channel en, and adc state machine state cnt 2( "set" stage and "capture" state for misc channel)
- adc_set_chn_enable_and_max_state_cnt(ADC_MISC_CHN, 2); //set total length for sampling state machine and channel
-
- //set "capture state" length for misc channel: 240
- //set "set state" length for misc channel: 10
- //adc state machine period = 24M/250 = 96K, T = 10.4 uS
- #if (MCU_CORE_TYPE == MCU_CORE_8278)
- adc_set_state_length(240,10); //set R_max_mc,R_max_c,R_max_s
- #else
- adc_set_state_length(240, 0, 10);
- #endif
-
- //set misc channel use differential_mode (telink advice: only differential mode is available)
- //single mode adc source, PB4 for example: PB4 positive channel, GND negative channel
- gpio_set_func(GPIO_PB4, AS_GPIO);
- gpio_set_input_en(GPIO_PB4, 0);
- gpio_set_output_en(GPIO_PB4, 0);
- gpio_write(GPIO_PB4, 0);
-
- adc_set_ain_channel_differential_mode(B4P, GND);
-
-
- //set misc channel resolution 14 bit
- //notice that: in differential_mode MSB is sign bit, rest are data, here BIT(13) is sign bit
- adc_set_resolution(RES14); //set resolution
-
-
- //set misc channel vref 1.2V
- adc_set_ref_voltage(ADC_VREF_1P2V); //set channel Vref
-
-
-
- //set misc t_sample 6 cycle of adc clock: 6 * 1/4M
- adc_set_tsample_cycle(SAMPLING_CYCLES_6); //Number of ADC clock cycles in sampling phase
-
- //set Analog input pre-scaling 1/8
- adc_set_ain_pre_scaler(ADC_PRESCALER_1F8);
-}
-
-
-
-
-void adc_vbat_detect_init(void)
-{
-
-
- //set misc channel en, and adc state machine state cnt 2( "set" stage and "capture" state for misc channel)
- adc_set_chn_enable_and_max_state_cnt(ADC_MISC_CHN, 2); //set total length for sampling state machine and channel
-
-
- //set "capture state" length for misc channel: 240
- //set "set state" length for misc channel: 10
- //adc state machine period = 24M/250 = 96K, T = 10.4 uS
- #if (MCU_CORE_TYPE == MCU_CORE_8278)
- adc_set_state_length(240,10); //set R_max_mc,R_max_c,R_max_s
- #else
- adc_set_state_length(240, 0, 10);
- #endif
-
- //telink advice: you must choose one gpio with adc function to output high level(voltage will equal to vbat), then use adc to measure high level voltage
- gpio_set_func(GPIO_PB0, AS_GPIO);
- gpio_set_input_en(GPIO_PB0, 0);
- gpio_set_output_en(GPIO_PB0, 1);
- gpio_write(GPIO_PB0, 1);
-
- //set misc channel use differential_mode(telink advice: only differential mode is available)
- adc_set_ain_channel_differential_mode(B0P, GND);
-
- //set misc channel resolution 14 bit
- //notice that: in differential_mode MSB is sign bit, rest are data, here BIT(13) is sign bit
- adc_set_resolution(RES14); //set resolution
-
-
-
- //set misc channel vref 1.2V
- adc_set_ref_voltage(ADC_VREF_1P2V); //set channel Vref
-
-
-
- //set misc t_sample 6 cycle of adc clock: 6 * 1/4M
- adc_set_tsample_cycle(SAMPLING_CYCLES_6); //Number of ADC clock cycles in sampling phase
-
- //set Analog input pre-scaling 1/8
- adc_set_ain_pre_scaler(ADC_PRESCALER_1F8);
-
-
-}
-
-
-void app_adc_test_init(void)
-{
-////Step 1: power off sar adc/////////////////////////////////////////////////////////
- /******power off sar adc********/
- adc_power_on_sar_adc(0);
-//////////////////////////////////////////////////////////////////////////////////////
-
-
-
-
-
-////Step 2: Config some common adc settings(user can not change these)/////////////////
- /******enable signal of 24M clock to sar adc********/
- adc_enable_clk_24m_to_sar_adc(1);
-
- /******set adc sample clk as 4MHz******/
- adc_set_sample_clk(5); //adc sample clk= 24M/(1+5)=4M
-
- /******set adc L R channel Gain Stage bias current trimming******/
- #if (MCU_CORE_TYPE == MCU_CORE_8258)
- adc_set_left_gain_bias(GAIN_STAGE_BIAS_PER100);
- adc_set_right_gain_bias(GAIN_STAGE_BIAS_PER100);
- #endif
-////////////////////////////////////////////////////////////////////////////////////////
-
-
-
-
-
-////Step 3: Config adc settings as needed /////////////////////////////////////////////
-#if (TEST_ADC_SELECT == TEST_ADC_GPIO)
- adc_gpio_ain_init();
-
-#elif (TEST_ADC_SELECT == TEST_ADC_VBAT)
-
- adc_vbat_detect_init();
-
-#endif
-////////////////////////////////////////////////////////////////////////////////////////
-
-
-
-////Step 4: power on sar adc/////////////////////////////////////////////////////////
- /******power on sar adc********/
- adc_power_on_sar_adc(1);
-////////////////////////////////////////////////////////////////////////////////////////
-}
-
-
-
-
-
-u16 Adc_cur_rawData; //unit: m V
-u16 Adc_raw_data[256];
-u8 Adc_raw_datIndex = 0;
-
-
-
-//just for display, fake data
-u32 Adc_cur_vol_oct; //debug
-u16 Adc_cal_vol_oct[256];
-u8 Adc_cal_vol_octIndex= 0;
-
-
-
-u32 tick_adc_sample = 0;
-void app_adc_test_start(void)
-{
-
-
-
- if(clock_time_exceed(tick_adc_sample, 200000)){
- tick_adc_sample = clock_time();
-
-
- Adc_cur_rawData = adc_sample_and_get_result();
-
- Adc_raw_data[Adc_raw_datIndex ++] = Adc_cur_rawData;
-
-
-#if 1 //debug
- Adc_cur_vol_oct = (Adc_cur_rawData/1000)<<12 | ((Adc_cur_rawData/100)%10)<<8 \
- | ((Adc_cur_rawData%100)/10)<<4 | (Adc_cur_rawData%10);
- Adc_cal_vol_oct[Adc_cal_vol_octIndex ++] = Adc_cur_vol_oct;
-#endif
-
- }
-}
-
-
-
-
-#endif //end of DRIVER_TEST_MODE == TEST_ADC
diff --git a/vendor/827x_driver_test/app_config.h b/vendor/827x_driver_test/app_config.h
deleted file mode 100644
index 146cd22..0000000
--- a/vendor/827x_driver_test/app_config.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/******************************************************************************
- * @file app_config.h
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#pragma once
-
-/* Enable C linkage for C++ Compilers: */
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-
-#define FIRMWARES_SIGNATURE_ENABLE 0
-#define FirmwareEncryptionKey 0x77180 //512k flash: 0x77180~0x7718F
-
-
-/////////////////// TEST FEATURE SELECTION /////////////////////////////////
-
-#define TEST_HW_TIMER 1
-
-
-
-#define TEST_GPIO_IRQ 10
-
-
-
-#define TEST_UART 20
-
-
-#define TEST_IIC 30
-
-
-#define TEST_SPI 40
-
-
-#define TEST_ADC 50
-
-
-#define TEST_PWM 60
-
-
-#define TEST_LOW_POWER 70
-
-
-#define TEST_RF_EMI 80
-
-
-
-#define DRIVER_TEST_MODE TEST_RF_EMI
-
-
-
-#if (DRIVER_TEST_MODE == TEST_ADC)
-
- #define BATT_CHECK_ENABLE 0
-
-#elif (DRIVER_TEST_MODE == TEST_IIC)
- /**************************************************************************************
- 8258 Demo Code Config
- 1. select i2c demo: master or slave( app_config.h )
- 2. if i2c slave demo, select slave working mode: mapping mode or dma mode
- 3. if i2c master demo, select the peer device i2c slave address mode:
- 826x/8255 mapping mode/dma mode or other not telink's device
-
- *************************************************************************************/
- #define I2C_DEMO_MASTER 1 //i2c master demo
- #define I2C_DEMO_SLAVE 2 //i2c master demo
-
-
- //select i2c demo here(master or slave)
- #define I2C_DEMO_SELECT I2C_DEMO_SLAVE
-
-
-
- #define DBG_DATA_LEN 16
- #define DBG_DATA_NUM 16
-
-
- #define SLAVE_DMA_MODE_ADDR_WRITE 0x44a00 //i2c master write data to 0x4A000
- #define SLAVE_DMA_MODE_ADDR_READ 0x4A100 //i2c master read data from 0x4A100
-
-#elif (DRIVER_TEST_MODE == TEST_SPI)
-
- #define SPI_MASTER_MODE 1 //spi use master mode
- #define SPI_SLAVE_MODE 2 //spi use slave mode
- #define SPI_MODE SPI_MASTER_MODE
-
- #define SLAVE_REGADDR1 0x04
- #define SLAVE_REGADDR2 0x80
- #define SLAVE_REGADDR3 0x00
- #define SPI_READ_CMD 0x80// spi read command
- #define SPI_WRITE_CMD 0x00// spi write command
- #define DBG_DATA_LEN 16
-
-#endif
-
-
-
-
-/////////////////// Clock /////////////////////////////////
-#define CLOCK_SYS_CLOCK_HZ 16000000
-
-enum{
- CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
- CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
- CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
-};
-
-
-
-
-/////////////////// watchdog //////////////////////////////
-#define MODULE_WATCHDOG_ENABLE 0
-#define WATCHDOG_INIT_TIMEOUT 500 //ms
-
-
-
-
-
-
-
-#define DEBUG_GPIO_ENABLE 0
-
-#if(DEBUG_GPIO_ENABLE)
- //define debug GPIO here according to your hardware
- #define GPIO_CHN0 GPIO_PB0
- #define GPIO_CHN1 GPIO_PB1
- #define GPIO_CHN2 GPIO_PB4
- #define GPIO_CHN3 GPIO_PB5
-
- #define PB0_OUTPUT_ENABLE 1
- #define PB1_OUTPUT_ENABLE 1
- #define PB4_OUTPUT_ENABLE 1
- #define PB5_OUTPUT_ENABLE 1
-
-
- #define DBG_CHN0_LOW gpio_write(GPIO_CHN0, 0)
- #define DBG_CHN0_HIGH gpio_write(GPIO_CHN0, 1)
- #define DBG_CHN0_TOGGLE gpio_toggle(GPIO_CHN0)
- #define DBG_CHN1_LOW gpio_write(GPIO_CHN1, 0)
- #define DBG_CHN1_HIGH gpio_write(GPIO_CHN1, 1)
- #define DBG_CHN1_TOGGLE gpio_toggle(GPIO_CHN1)
- #define DBG_CHN2_LOW gpio_write(GPIO_CHN2, 0)
- #define DBG_CHN2_HIGH gpio_write(GPIO_CHN2, 1)
- #define DBG_CHN2_TOGGLE gpio_toggle(GPIO_CHN2)
- #define DBG_CHN3_LOW gpio_write(GPIO_CHN3, 0)
- #define DBG_CHN3_HIGH gpio_write(GPIO_CHN3, 1)
- #define DBG_CHN3_TOGGLE gpio_toggle(GPIO_CHN3)
-#else
- #define DBG_CHN0_LOW
- #define DBG_CHN0_HIGH
- #define DBG_CHN0_TOGGLE
- #define DBG_CHN1_LOW
- #define DBG_CHN1_HIGH
- #define DBG_CHN1_TOGGLE
- #define DBG_CHN2_LOW
- #define DBG_CHN2_HIGH
- #define DBG_CHN2_TOGGLE
- #define DBG_CHN3_LOW
- #define DBG_CHN3_HIGH
- #define DBG_CHN3_TOGGLE
-#endif //end of DEBUG_GPIO_ENABLE
-
-
-
-
-
-#include "../common/default_config.h"
-
-/* Disable C linkage for C++ Compilers: */
-#if defined(__cplusplus)
-}
-#endif
diff --git a/vendor/827x_driver_test/app_emi.c b/vendor/827x_driver_test/app_emi.c
deleted file mode 100644
index 8e73be6..0000000
--- a/vendor/827x_driver_test/app_emi.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/******************************************************************************
- * @file app_emi.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-unsigned char mode=1;//1
-unsigned char power_level = 0;
-unsigned char chn = 2;//2
-unsigned char cmd_now=1;//1
-unsigned char run=1;
-unsigned char tx_cnt=0;
-unsigned char hop=0;
-
-
-
-
-
-
-struct test_list_s {
- unsigned char cmd_id;
- void (*func)(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-};
-
-void emicarrieronly(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emi_con_prbs9(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emirx(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emitxprbs9(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emitx55(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emitx0f(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emi_con_tx55(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-void emi_con_tx0f(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn);
-
-void emi_deepio_noren(RF_ModeTypeDef rf_mode,unsigned char pin,signed char rf_chn);
-void emi_deepio_ren(RF_ModeTypeDef rf_mode,unsigned char pin,signed char rf_chn);
-void emi_deeptimer_noren(RF_ModeTypeDef rf_mode,unsigned char Sec,signed char rf_chn);
-void emi_deeptimer_ren(RF_ModeTypeDef rf_mode,unsigned char Sec,signed char rf_chn);
-void emi_suspendio_noren(RF_ModeTypeDef rf_mode,unsigned char pin,signed char rf_chn);
-void emi_suspendtimer_noren(RF_ModeTypeDef rf_mode,unsigned char Sec,signed char rf_chn);
-void led_init(void);
-void key_init(void);
-void key_serviceloop(void);
-void led_serviceloop(void);
-
-struct test_list_s ate_list[] = {
- {0x01,emicarrieronly},
- {0x02,emi_con_prbs9},
- {0x03,emirx},
- {0x04,emitxprbs9},
- {0x05,emitx55},
- {0x06,emitx0f},
-};
-
-
-
-void app_emi_init(void)
-{
- write_reg32(0x408,0x29417671 );//access code 0xf8118ac9
-
- write_reg8(0x40005,tx_cnt);//tx_cnt
- write_reg8(0x40006,run);//run
- write_reg8(0x40007,cmd_now);//cmd
- write_reg8(0x40008,power_level);//power
- write_reg8(0x40009,chn);//chn
- write_reg8(0x4000a,mode);//mode
- write_reg8(0x4000b,hop);//hop
- write_reg8(0x40004,0);
- write_reg32(0x4000c,0);
-}
-
-
-
-void app_rf_emi_test_start(void)
-{
- unsigned char i=0;
- while(1)
- {
- run = read_reg8(0x40006); // get the run state!
- if(run!=0)
- {
- power_level = read_reg8(0x40008);
- chn = read_reg8(0x40009);
- mode=read_reg8(0x4000a);
- cmd_now = read_reg8(0x40007); // get the command!
- tx_cnt = read_reg8(0x40005);
- for (i=0; i<sizeof (ate_list)/sizeof (struct test_list_s); i++)
- {
- if(cmd_now == ate_list[i].cmd_id)
- {
- if(mode==0)//ble 2M mode
- {
- ate_list[i].func(RF_MODE_BLE_2M,power_level,chn);
- }
- else if(mode==1)//ble 1M mode
- {
- ate_list[i].func(RF_MODE_BLE_1M,power_level,chn);
- }
- else if(mode==2)//zigbee mode
- {
- ate_list[i].func(RF_MODE_ZIGBEE_250K,power_level,chn);
- }
- else if(mode==3)//BLE125K mode
- {
- ate_list[i].func(RF_MODE_LR_S8_125K,power_level,chn);
- }
- else if(mode==4)//BLE500K mode
- {
- ate_list[i].func(RF_MODE_LR_S2_500K,power_level,chn);
- }
- break;
- }
- }
- run = 0;
- write_reg8(0x40006, run);
- }
- }
-
-}
-
-
-
-void emicarrieronly(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- rf_emi_single_tone(pwr,rf_chn);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode ));
- rf_emi_stop();
-}
-
-void emi_con_prbs9(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,0);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode ))
- {
- rf_continue_mode_run();
- }
- rf_emi_stop();
-
- write_reg16(0x60, 0x480);
- write_reg8(0xc24, 0x0);
- write_reg8(0xc0e, 0x60);
- write_reg16(0x60, 0x0);
-
-}
-
-void emirx(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- rf_emi_rx(rf_mode,rf_chn);
- write_reg8(0x40004,0);
- write_reg32(0x4000c,0);
-
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode ))
- {
- rf_emi_rx_loop();
- if(rf_emi_get_rxpkt_cnt()!=read_reg32(0x4000c))
- {
- write_reg8(0x40004,rf_emi_get_rssi_avg());
- write_reg32(0x4000c,rf_emi_get_rxpkt_cnt());
- }
- }
- rf_emi_stop();
-}
-
-void emitxprbs9(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- unsigned int tx_num=0;
- rf_emi_tx_burst_setup(rf_mode,pwr,rf_chn,0);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode && ((read_reg8(0x40005)) == tx_cnt ) ))
- {
- rf_emi_tx_burst_loop(rf_mode,0);
- if(tx_cnt)
- {
- tx_num++;
- if(tx_num>=1000)
- break;
- }
- }
- rf_emi_stop();
-}
-
-
-void emitx55(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- unsigned int tx_num=0;
-// rf_emi_tx_burst_setup_ramp(rf_mode,pwr,rf_chn,2);
- rf_emi_tx_burst_setup(rf_mode,pwr,rf_chn,2);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode && ((read_reg8(0x40005)) == tx_cnt ) ))
- {
- rf_emi_tx_burst_loop(rf_mode,2);
-// rf_emi_tx_burst_loop_ramp(rf_mode,2);
- if(tx_cnt)
- {
- tx_num++;
- if(tx_num>=1000)
- break;
- }
- }
- rf_emi_stop();
-}
-
-void emitx0f(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- unsigned int tx_num=0;
- rf_emi_tx_burst_setup(rf_mode,pwr,rf_chn,1);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode && ((read_reg8(0x40005)) == tx_cnt ) ))
- {
- rf_emi_tx_burst_loop(rf_mode,1);
- if(tx_cnt)
- {
- tx_num++;
- if(tx_num>=1000)
- break;
- }
- }
- rf_emi_stop();
-}
-
-void emi_con_tx55(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,2);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode ))
- rf_continue_mode_run();
- rf_emi_stop();
-}
-
-
-
-void emi_con_tx0f(RF_ModeTypeDef rf_mode,RF_PowerTypeDef pwr,signed char rf_chn)
-{
- rf_emi_tx_continue_setup(rf_mode,pwr,rf_chn,1);
- while( ((read_reg8(0x40006)) == run ) && ((read_reg8(0x40007)) == cmd_now )\
- && ((read_reg8(0x40008)) == power_level ) && ((read_reg8(0x40009)) == chn )\
- && ((read_reg8(0x4000a)) == mode ))
- rf_continue_mode_run();
- rf_emi_stop();
-}
diff --git a/vendor/827x_driver_test/app_gpio_irq.c b/vendor/827x_driver_test/app_gpio_irq.c
deleted file mode 100644
index f2f644f..0000000
--- a/vendor/827x_driver_test/app_gpio_irq.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/******************************************************************************
- * @file app_gpio_irq.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-/*
- * app_gpio_irq.c
- *
- * Created on: 2017-8-25
- * Author: Administrator
- */
-#include "tl_common.h"
-#include "drivers.h"
-
-#if (DRIVER_TEST_MODE == TEST_GPIO_IRQ)
-
-
-
-
-//you can change IO here
-#define GPIO_LED1_PIN GPIO_PA0
-#define GPIO_LED2_PIN GPIO_PA1
-#define GPIO_LED3_PIN GPIO_PA2
-
-
-#define LED_INIT_LEVEL 0
-
-
-#define GPIO_TEST_PIN1 GPIO_PD0
-#define GPIO_TEST_PIN2 GPIO_PD1
-#define GPIO_TEST_PIN3 GPIO_PD2
-
-
-unsigned char gpio_irq_test_mode = 0;
-
-void app_gpio_irq_test_init(void)
-{
-
-//demo1: IRQ_GPIO, TEST_PIN1, falling edge triggers
- /***step1. set pin as gpio and enable input********/
- gpio_set_func(GPIO_TEST_PIN1, AS_GPIO); //enable GPIO func
- gpio_set_input_en(GPIO_TEST_PIN1, 1); //enable input
- gpio_set_output_en(GPIO_TEST_PIN1, 0); //disable output
-
- /***step2. set the polarity and open pullup ***/
- gpio_setup_up_down_resistor(GPIO_TEST_PIN1, PM_PIN_PULLUP_10K); //open pull up resistor
- gpio_set_interrupt_pol(GPIO_TEST_PIN1, pol_falling); //falling edge
-
- /***step3. set irq enable ***/
- reg_irq_src = FLD_IRQ_GPIO_EN; //clean irq status
- reg_irq_mask |= FLD_IRQ_GPIO_EN;
- gpio_en_interrupt(GPIO_TEST_PIN1, 1);
-
-
-
-
-
-//demo2: IRQ_GPIO_RISC0, TEST_PIN2, falling edge triggers
- /***step1. set pin as gpio and enable input********/
- gpio_set_func(GPIO_TEST_PIN2, AS_GPIO); //enable GPIO func
- gpio_set_input_en(GPIO_TEST_PIN2, 1); //enable input
- gpio_set_output_en(GPIO_TEST_PIN2, 0); //disable output
-
- /***step2. set the polarity and open pullup ***/
- gpio_setup_up_down_resistor(GPIO_TEST_PIN2, PM_PIN_PULLUP_10K); //open pull up resistor
- gpio_set_interrupt_pol(GPIO_TEST_PIN2, pol_falling); //falling edge
-
- /***step3. set irq enable ***/
- reg_irq_src = FLD_IRQ_GPIO_RISC0_EN; //clean irq status
- reg_irq_mask |= FLD_IRQ_GPIO_RISC0_EN;
- gpio_en_interrupt_risc0(GPIO_TEST_PIN2, 1);
-
-
-
-
-//demo3: IRQ_GPIO_RISC1, TEST_PIN3, rising edge triggers
- /***step1. set pin as gpio and enable input********/
- gpio_set_func(GPIO_TEST_PIN3, AS_GPIO); //enable GPIO func
- gpio_set_input_en(GPIO_TEST_PIN3, 1); //enable input
- gpio_set_output_en(GPIO_TEST_PIN3, 0); //disable output
-
- /***step2. set the polarity and open pullup ***/
- gpio_setup_up_down_resistor(GPIO_TEST_PIN3, PM_PIN_PULLDOWN_100K); //open pull down resistor
- gpio_set_interrupt_pol(GPIO_TEST_PIN3, pol_rising); //rising edge
-
- /***step3. set irq enable ***/
- reg_irq_src = FLD_IRQ_GPIO_RISC1_EN; //clean irq status
- reg_irq_mask |= FLD_IRQ_GPIO_RISC1_EN;
- gpio_en_interrupt_risc1(GPIO_TEST_PIN3, 1);
-
-
-
-
-
-
-
- irq_enable(); //must
-
-}
-
-//init the LED pin,for indication
-void app_led_init(void)
-{
-
- gpio_set_func(GPIO_LED1_PIN, AS_GPIO);
- gpio_set_output_en(GPIO_LED1_PIN, 1);//enable output
- gpio_set_input_en(GPIO_LED1_PIN, 0); //disable input
- gpio_write(GPIO_LED1_PIN, LED_INIT_LEVEL);
-
- gpio_set_func(GPIO_LED2_PIN, AS_GPIO);
- gpio_set_output_en(GPIO_LED2_PIN, 1);//enable output
- gpio_set_input_en(GPIO_LED2_PIN, 0); //disable input
- gpio_write(GPIO_LED2_PIN, LED_INIT_LEVEL);
-
- gpio_set_func(GPIO_LED3_PIN, AS_GPIO);
- gpio_set_output_en(GPIO_LED3_PIN, 1);//enable output
- gpio_set_input_en(GPIO_LED3_PIN, 0); //disable input
- gpio_write(GPIO_LED3_PIN, LED_INIT_LEVEL);
-
-}
-
-
-int gpio_all_irq_cnt;
-int gpio_irq_cnt;
-int gpio_irq_risr0_cnt;
-int gpio_irq_risr1_cnt;
-
-_attribute_ram_code_ void app_gpio_irq_test_proc(void)
-{
- gpio_all_irq_cnt ++;
-
-
- /************ gpio irq ***************/
- if(reg_irq_src & FLD_IRQ_GPIO_EN){
- reg_irq_src = FLD_IRQ_GPIO_EN; // clear irq_gpio irq flag
-
- gpio_irq_cnt ++;
- DBG_CHN0_TOGGLE;
- gpio_toggle(GPIO_LED1_PIN);
- }
-
-
- /************* gpio irq risc0 *************/
- if(reg_irq_src & FLD_IRQ_GPIO_RISC0_EN){
- reg_irq_src = FLD_IRQ_GPIO_RISC0_EN; // clear irq_gpio irq flag
-
-
- gpio_irq_risr0_cnt ++;
- DBG_CHN1_TOGGLE;
- gpio_toggle(GPIO_LED2_PIN);
- }
-
-
- /************* gpio irq risc1 *************/
- if(reg_irq_src & FLD_IRQ_GPIO_RISC1_EN){
- reg_irq_src = FLD_IRQ_GPIO_RISC1_EN; // clear irq_gpio irq flag
-
- gpio_irq_risr1_cnt ++;
- DBG_CHN2_TOGGLE;
- gpio_toggle(GPIO_LED3_PIN);
- }
-
-
-}
-
-
-
-#endif
diff --git a/vendor/827x_driver_test/app_i2c.c b/vendor/827x_driver_test/app_i2c.c
deleted file mode 100644
index 51586ad..0000000
--- a/vendor/827x_driver_test/app_i2c.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/******************************************************************************
- * @file app_i2c.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-extern void i2c_master_test_init(void);
-extern void i2c_slave_test_init(void);
-extern void i2c_master_mainloop(void);
-extern void i2c_slave_mainloop(void);
-
-
-void app_i2c_test_init(void)
-{
- WaitMs(2000); //leave enough time for SWS_reset when power on
-
-
-#if(I2C_DEMO_SELECT == I2C_DEMO_MASTER)
-
- i2c_master_test_init();
-
-#elif(I2C_DEMO_SELECT == I2C_DEMO_SLAVE)
-
- i2c_slave_test_init();
-
-#endif
-}
-
-
-
-void app_i2c_test_start(void)
-{
-#if (I2C_DEMO_SELECT == I2C_DEMO_MASTER) //master demo mainloop
-
-
- i2c_master_mainloop();
-
-
-#elif(I2C_DEMO_SELECT == I2C_DEMO_SLAVE) //slave demo mainloop
-
- i2c_slave_mainloop();
-
-#endif
-}
diff --git a/vendor/827x_driver_test/app_i2c_master.c b/vendor/827x_driver_test/app_i2c_master.c
deleted file mode 100644
index 7cd7e3c..0000000
--- a/vendor/827x_driver_test/app_i2c_master.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/******************************************************************************
- * @file app_i2c_master.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-#if(DRIVER_TEST_MODE == TEST_IIC && I2C_DEMO_SELECT == I2C_DEMO_MASTER)
-
-
-
-
-
-/**************************************************************************************
- 8258 Demo Code Config
- 1. select i2c demo: master or slave( config it in app_config.h )
- 2. if i2c slave demo, select slave working mode: mapping mode or dma mode
- 3. if i2c master demo, select the peer device i2c slave address mode:
- 826x/8255 mapping mode/dma mode or other not telink's device
- here selecting peer slave device mode is for master sending address byte length
-
- *************************************************************************************/
-
-
-#if(I2C_DEMO_SELECT == I2C_DEMO_MASTER)
- //826x: 8261/8266/8267/8269
- //825x: 8255/8258
- //82xx: 8261/8266/8267/8269 and 8255/8258
-
- #define SLAVE_TELINK_825x_DMA_MODE 1 //slave 825x dma mode, master send 3 byte sram address(0x40000~0x4ffff)
- #define SLAVE_TELINK_82xx_MAPPING_MODE 2 //slave 826x/825x mapping mode, master no need send address(address length is 0)
- #define SLAVE_TELINK_826x_DMA_MODE 3 //slave 826x dma mode, master send 2 byte sram address(0x8000~0xffff)
- #define SLAVE_OTHER_I2C_DEVICE 4 //slave not telink mcu, address length may be 1 or 2 or others.
-
-
- #define PEER_SLAVE_DEVICE SLAVE_TELINK_825x_DMA_MODE
-#endif
-
-/**************************************************************************************
- *
- *************************************************************************************/
-/*************** i2c master data buffer *****************/
-//write buff
-volatile unsigned char i2c_master_tx_buff[DBG_DATA_LEN] = {0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa,0xbb,0xcc,0xdd,0xee,0xff};
-//read buff
-volatile unsigned char i2c_master_rx_buff[DBG_DATA_LEN] = {0};
-
-unsigned char master_rx_buff_debug[DBG_DATA_LEN *DBG_DATA_NUM]; //store i2c master reading data here to debug
-int master_rx_index = 0;
-
-
-
-
-
-
-
-
-
-
-void i2c_master_test_init(void)
-{
-
- //I2C pin set
- i2c_gpio_set(I2C_GPIO_SDA_C0,I2C_GPIO_SCL_C1); //SDA/CK : C0/C1
-
-
-
- //slave device id 0x5C(write) 0x5D(read)
- //i2c clock 200K, only master need set i2c clock
- i2c_master_init(0x5C, (unsigned char)(CLOCK_SYS_CLOCK_HZ/(4*200000)) );
-
-}
-
-
-void i2c_master_mainloop(void)
-{
-
- WaitMs(1000); //1 S
-
-
- #if (PEER_SLAVE_DEVICE == SLAVE_TELINK_825x_DMA_MODE)
- i2c_master_tx_buff[0] += 1;
- //825x slave dma mode, sram address(0x40000~0x4FFFF) length should be 3 byte
- i2c_write_series(SLAVE_DMA_MODE_ADDR_WRITE, 3, (unsigned char *)i2c_master_tx_buff, DBG_DATA_LEN);
- i2c_read_series(SLAVE_DMA_MODE_ADDR_READ, 3, (unsigned char *)i2c_master_rx_buff, DBG_DATA_LEN);
-
- /*********** copy the data read by i2c master from slave for debug ****************/
- memcpy( (unsigned char *)(master_rx_buff_debug + master_rx_index*DBG_DATA_LEN), (unsigned char *)i2c_master_rx_buff, DBG_DATA_LEN);
- master_rx_index ++;
- if(master_rx_index>=DBG_DATA_NUM){
- master_rx_index = 0;
- }
-
- #elif (PEER_SLAVE_DEVICE == SLAVE_TELINK_82xx_MAPPING_MODE)
- i2c_master_tx_buff[0] += 1;
- //slave mapping mode, no need send address information, so address length should be 0
- i2c_write_series(0, 0, (unsigned char*)i2c_master_tx_buff, DBG_DATA_LEN);
- i2c_read_series(0, 0, (unsigned char*)i2c_master_rx_buff, DBG_DATA_LEN);
-
- /*********** copy the data read by i2c master from slave for debug ****************/
- memcpy((unsigned char*)(master_rx_buff_debug + master_rx_index*DBG_DATA_LEN), (unsigned char*)i2c_master_rx_buff, DBG_DATA_LEN);
- master_rx_index ++;
- if(master_rx_index>=DBG_DATA_NUM){
- master_rx_index = 0;
- }
-
- #elif (PEER_SLAVE_DEVICE == SLAVE_TELINK_826x_DMA_MODE)
-
- need add code here
-
- #elif (PEER_SLAVE_DEVICE == SLAVE_OTHER_I2C_DEVICE)
-
- need add code here
-
- #endif
-
-}
-
-
-
-
-
-_attribute_ram_code_ void app_i2c_test_irq_proc(void)
-{
-
-}
-
-
-
-#endif //end of I2C_DEMO_SELECT == I2C_DEMO_MASTER
diff --git a/vendor/827x_driver_test/app_i2c_slave.c b/vendor/827x_driver_test/app_i2c_slave.c
deleted file mode 100644
index 84a97cd..0000000
--- a/vendor/827x_driver_test/app_i2c_slave.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/******************************************************************************
- * @file app_i2c_slave.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-#if(DRIVER_TEST_MODE == TEST_IIC && I2C_DEMO_SELECT == I2C_DEMO_SLAVE)
-
-
-/**************************************************************************************
- 8258 Demo Code Config
- 1. select i2c demo: master or slave( config it in app_config.h )
- 2. if i2c slave demo, select slave working mode: mapping mode or dma mode
- 3. if i2c master demo, select the peer device i2c slave address mode
-
- *************************************************************************************/
-#if(I2C_DEMO_SELECT == I2C_DEMO_SLAVE)
-
- #define SLAVE_DMA_MODE 1 //i2c slave use dma mode
- #define SLAVE_MAPPING_MODE 2 //i2c slave use mapping mode
-
-
- //select i2c slave mode here(dma mode or mapping mode)
- #define I2C_SLAVE_MODE SLAVE_DMA_MODE
-#endif
-
-/**************************************************************************************
- *
- *************************************************************************************/
-
-
-
-
-
-/*************** i2c slave data buffer ****************/
-#if(I2C_SLAVE_MODE == SLAVE_DMA_MODE)
-
- //dma mode write & read buff
- unsigned char * pBuf_slave_dma_for_write;
- unsigned char * pBuf_slave_dma_for_read;
-
-#elif(I2C_SLAVE_MODE == SLAVE_MAPPING_MODE)
-
- //mapping mode, write buffer is the first half 64 byte, read buffer is last half 64 byte
- _attribute_aligned_(128) volatile unsigned char slave_mapping_buff[128] = {0};
-#endif
-
-#define SLAVE_DMA_READ_DATA_CHANGE_EN 0 //1: read buff data changes; 0: read buff data stay unchanged
-
-
-
-unsigned char slave_rx_buff_debug[DBG_DATA_LEN *DBG_DATA_NUM]; //store i2c master writing data here to debug
-int slave_rx_index = 0;
-
-
-
-#define IRQ_IIC_CLEAR 0
-#define IRQ_IIC_READ BIT(0) //read
-#define IRQ_IIC_WRITE BIT(1) //write
-
-
-int i2c_irq_flag = IRQ_IIC_CLEAR;
-
-
-
-
-
-
-
-
-
-void i2c_slave_test_init(void)
-{
-
- i2c_gpio_set(I2C_GPIO_SDA_C0,I2C_GPIO_SCL_C1); //SDA/CK : C0/C1
-
-
-#if(I2C_SLAVE_MODE == SLAVE_DMA_MODE)
- //slave device id 0x5C(write) 0x5D(read)
- //i2c slave dma mode, master need send 3 byte sram address(0x40000~0x4ffff) on i2c bus in i2c reading/writing
- i2c_slave_init(0x5C, I2C_SLAVE_DMA, NULL);
-
- //write&read sram address in dma mode
- //master write data to sram address SLAVE_DMA_MODE_ADDR_WRITE
- //slave put data on sram address SLAVE_DMA_MODE_ADDR_READ
- pBuf_slave_dma_for_write = (unsigned char *)(SLAVE_DMA_MODE_ADDR_WRITE | REG_BASE_ADDR);
- pBuf_slave_dma_for_read = (unsigned char *)(SLAVE_DMA_MODE_ADDR_READ | REG_BASE_ADDR);
-
- memset(pBuf_slave_dma_for_write, 0, DBG_DATA_LEN); //clear write buffer data
- for(int i=0;i<DBG_DATA_LEN;i++){ //set read buffer initial data (1,2,3....16)
- pBuf_slave_dma_for_read[i] = i+1;
- }
-
-
-
-#elif(I2C_SLAVE_MODE == SLAVE_MAPPING_MODE)
- //slave device id 0x5C(write) 0x5D(read)
- //i2c slave mapping mode, master no need send any address when reading/writing,
- //for i2c master: writing data buffer is slave_mapping_buff,
- //and reading data buffer is (slave_mapping_buff+64) (this offset 64 is managed by MCU hardware, user can not change it)
- i2c_slave_init(0x5C, I2C_SLAVE_MAP, (unsigned char *)slave_mapping_buff);
-
- //slave_mapping_buff + 64 is master reading data buffer in mapping mode, put some data here for master read
- //initial data (1,2,3 ... 16)
- for(int i=0;i<DBG_DATA_LEN;i++){
- slave_mapping_buff[64+i] = i+1;
- }
-
-#endif
-
-
-
- reg_i2c_map_host_status = (FLD_HOST_CMD_IRQ | FLD_HOST_READ_IRQ); //clean irq status
-
- reg_irq_mask |= FLD_IRQ_HOST_CMD_EN; //enable i2c irq
-
- irq_enable(); //enable system irq
-
-}
-
-
-void i2c_slave_mainloop(void)
-{
-
-
-
-#if(I2C_SLAVE_MODE == SLAVE_DMA_MODE) //8258 i2c slave dma mode
- //in dma mode, write & read data buffer could be different
- #if (SLAVE_DMA_READ_DATA_CHANGE_EN)
- //i2c slave data changes, and i2c master can read different data
- static u32 data_change_time = 0;
- static u32 data_change_index = 0;
- if(clock_time_exceed(data_change_time, 1000000)){
- data_change_time = clock_time();
- data_change_index ++;
-
-
- for(int i=0;i<DBG_DATA_LEN;i++){
- pBuf_slave_dma_for_read[i] = data_change_index;
- }
- }
- #endif
-
-
-#elif(I2C_SLAVE_MODE == SLAVE_MAPPING_MODE) //8258 i2c slave mapping mode
- //in mapping mode, i2c master reading data from (slave_mapping_buff+64)
-
- #if (SLAVE_DMA_READ_DATA_CHANGE_EN)
- //i2c slave data changes, and i2c master can read different data
- static u32 data_change_time = 0;
- static u32 data_change_index = 0;
- if(clock_time_exceed(data_change_time, 1000000)){
- data_change_time = clock_time();
- data_change_index ++;
- }
-
- if(i2c_irq_flag){ //i2c master write or read operation happens
- if(i2c_irq_flag & IRQ_IIC_READ){ //i2c master has just read data
- DBG_CHN2_TOGGLE;
- for(int i=0;i<DBG_DATA_LEN;i++){
- slave_mapping_buff[64 + i] = data_change_index;
- }
- }
- i2c_irq_flag = IRQ_IIC_CLEAR; //clear
- }
- #endif
-
-#endif
-
-}
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-int irq_cnt = 0;
-int i2c_read_cnt = 0; //for debug
-int i2c_write_cnt = 0; //for debug
-
-
-_attribute_ram_code_ void app_i2c_test_irq_proc(void)
-{
-
- irq_cnt ++; //for debug
-
-
-
- u8 irq_status = reg_i2c_map_host_status;//i2c slave can distinguish the operation host write or read.
-
-
-
- if(irq_status & FLD_HOST_CMD_IRQ){ //both host write & read trigger this status
-
- reg_i2c_map_host_status = irq_status; //clear all irq status
-
- if(irq_status & FLD_HOST_READ_IRQ){ //host read
-
- i2c_read_cnt ++; //for debug
- DBG_CHN0_TOGGLE; //for gpio debug
-
- i2c_irq_flag |= IRQ_IIC_READ;
- }
- else{ //host write
-
- i2c_write_cnt ++; //for debug
- DBG_CHN1_TOGGLE; //for debug
-
- i2c_irq_flag |= IRQ_IIC_WRITE;
-
-
- /*********** copy the data written by i2c master to slave_rx_buff_debug for debug ****************/
- #if (I2C_SLAVE_MODE == SLAVE_DMA_MODE)
- memcpy( (unsigned char*)(slave_rx_buff_debug + slave_rx_index*DBG_DATA_LEN), (unsigned char*)pBuf_slave_dma_for_write, DBG_DATA_LEN);
- #elif (I2C_SLAVE_MODE == SLAVE_MAPPING_MODE)
- memcpy( (unsigned char*)(slave_rx_buff_debug + slave_rx_index*DBG_DATA_LEN), (unsigned char*)slave_mapping_buff, DBG_DATA_LEN);
- #endif
-
- slave_rx_index ++;
- if(slave_rx_index>=DBG_DATA_NUM){
- slave_rx_index = 0;
- }
- /******************************** end ****************************************************/
- }
-
- }
-
-
-}
-
-
-
-
-
-
-#endif
diff --git a/vendor/827x_driver_test/app_pwm.c b/vendor/827x_driver_test/app_pwm.c
deleted file mode 100644
index 64b8d57..0000000
--- a/vendor/827x_driver_test/app_pwm.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/******************************************************************************
- * @file app_pwm.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-//normal mode
-#define TEST_PWM_NORMAL_MODE_1 1
-#define TEST_PWM_NORMAL_MODE_2 2
-#define TEST_PWM_NORMAL_MODE_3 3
-#define TEST_PWM_NORMAL_MODE_4 4
-
-//fifo mode
-#define TEST_PWM0_FIFO_MODE 10
-#define TEST_PWM0_DMA_FIFO_MODE 11
-
-
-
-
-
-#define TEST_PWM_SELECT TEST_PWM0_DMA_FIFO_MODE
-
-
-
-
-
-
-
-#define IR_CARRIER_FREQ 38000 // 1 frame -> 1/38k -> 1000/38 = 26 us
-#define PWM_CARRIER_CYCLE_TICK ( CLOCK_SYS_CLOCK_HZ/IR_CARRIER_FREQ ) //16M: 421 tick, f = 16000000/421 = 38004,T = 421/16=26.3125 us
-#define PWM_CARRIER_HIGH_TICK ( PWM_CARRIER_CYCLE_TICK/3 ) // 1/3 duty
-
-
-
-#define PWM_IR_MAX_NUM 64 //user can define this max number
-typedef struct{
- unsigned int dma_len; // dma len
- unsigned short data[PWM_IR_MAX_NUM];
- unsigned int data_num;
-}pwm_dma_data_t;
-
-
-pwm_dma_data_t T_dmaData_buf;
-
-/*********************************************************************************
- PWM0 : PA2. PC1. PD5
- PWM1 : PA3. PC3.
- PWM2 : PA4. PC4.
- PWM3 : PB0. PD2.
- PWM4 : PB1. PB4.
- PWM5 : PB2. PB5.
- PWM0_N : PA0. PB3. PC4 PD5
- PWM1_N : PC1. PD3.
- PWM2_N : PD4.
- PWM3_N : PC5.
- PWM4_N : PC0. PC6.
- PWM5_N : PC7.
- *********************************************************************************/
-
-void app_pwm_test(void)
-{
- pwm_set_clk(CLOCK_SYS_CLOCK_HZ, CLOCK_SYS_CLOCK_HZ);
-
-
-#if (TEST_PWM_SELECT == TEST_PWM_NORMAL_MODE_1) //test PWMx (0~5) normal mode
- //PA2 PWM0 1ms cycle 1/2 duty
- gpio_set_func(GPIO_PA2, AS_PWM0);
- pwm_set_mode(PWM0_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM0_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM0_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (500 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM0_ID);
-
-
- //PA3 PWM1 1ms cycle 1/3 duty
- gpio_set_func(GPIO_PA3, AS_PWM1);
- pwm_set_mode(PWM1_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM1_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM1_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (333 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM1_ID);
-
-
- //PA4 PWM2 1ms cycle 1/4 duty
- gpio_set_func(GPIO_PA4, AS_PWM2);
- pwm_set_mode(PWM2_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM2_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM2_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (250 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM2_ID);
-
-
- //PB0 PWM3 1ms cycle 1/5 duty
- gpio_set_func(GPIO_PB0, AS_PWM3);
- pwm_set_mode(PWM3_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM3_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM3_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (200 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM3_ID);
-
- //PB1 PWM4 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PB1, AS_PWM4);
- pwm_set_mode(PWM4_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM4_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM4_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (667 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM4_ID);
-
-
- //PB2 PWM5 1ms cycle 3/4 duty
- gpio_set_func(GPIO_PB2, AS_PWM5);
- pwm_set_mode(PWM5_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM5_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM5_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (750 * CLOCK_SYS_CLOCK_1US) );
- pwm_start(PWM5_ID);
-
-#elif (TEST_PWM_SELECT == TEST_PWM_NORMAL_MODE_2) //test PWMx and PWMx_N(0~2) normal mode
-
- //PC1 PWM0 1ms cycle 1/3 duty
- //PA0 PWM0_N 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PC1, AS_PWM0);
- gpio_set_func(GPIO_PA0, AS_PWM0_N);
- pwm_set_mode(PWM0_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM0_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM0_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (333 * CLOCK_SYS_CLOCK_1US) );
-
-
- //PC3 PWM1 1ms cycle 1/4 duty
- //PD3 PWM1_N 1ms cycle 3/4 duty
- gpio_set_func(GPIO_PC3, AS_PWM1);
- gpio_set_func(GPIO_PD3, AS_PWM1_N);
- pwm_set_mode(PWM1_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM1_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM1_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (250 * CLOCK_SYS_CLOCK_1US) );
-
-
- //PC4 PWM2 1ms cycle 1/5 duty
- //PD4 PWM2_N 1ms cycle 4/5 duty
- gpio_set_func(GPIO_PC4, AS_PWM2);
- gpio_set_func(GPIO_PD4, AS_PWM2_N);
- pwm_set_mode(PWM2_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM2_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM2_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (200 * CLOCK_SYS_CLOCK_1US) );
-
-
- pwm_start(PWM0_ID);
- pwm_start(PWM1_ID);
- pwm_start(PWM2_ID);
-
-
-#elif (TEST_PWM_SELECT == TEST_PWM_NORMAL_MODE_3) //test PWMx and PWMx_N(3~5) normal mode
-
- //PD2 PWM3 1ms cycle 1/3 duty
- //PC5 PWM3_N 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PD2, AS_PWM3);
- gpio_set_func(GPIO_PC5, AS_PWM3_N);
- pwm_set_mode(PWM3_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM3_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM3_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (333 * CLOCK_SYS_CLOCK_1US) );
-
-
- //PB4 PWM4 1ms cycle 1/4 duty
- //PC0 PWM4_N 1ms cycle 3/4 duty
- gpio_set_func(GPIO_PB4, AS_PWM4);
- gpio_set_func(GPIO_PC0, AS_PWM4_N);
- pwm_set_mode(PWM4_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM4_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM4_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (250 * CLOCK_SYS_CLOCK_1US) );
-
-
- //PB5 PWM5 1ms cycle 1/5 duty
- //PC7 PWM5_N 1ms cycle 4/5 duty
- gpio_set_func(GPIO_PB5, AS_PWM5);
- gpio_set_func(GPIO_PC7, AS_PWM5_N);
- pwm_set_mode(PWM5_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM5_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM5_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (200 * CLOCK_SYS_CLOCK_1US) );
-
-
- pwm_start(PWM3_ID);
- pwm_start(PWM4_ID);
- pwm_start(PWM5_ID);
-
-#elif (TEST_PWM_SELECT == TEST_PWM_NORMAL_MODE_4) //test rest PWM gpio
-
- #if 1
- //PB3 PWM0_N 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PB3, AS_PWM0_N);
- #elif 0
- //PD5 PWM0 1ms cycle 1/3 duty
- //PC4 PWM0_N 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PD5, AS_PWM0);
- gpio_set_func(GPIO_PC4, AS_PWM0_N);
- #else
- //PD5 PWM0_N 1ms cycle 2/3 duty
- gpio_set_func(GPIO_PD5, AS_PWM0_N);
- #endif
-
- pwm_set_mode(PWM0_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM0_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM0_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (333 * CLOCK_SYS_CLOCK_1US) );
-
-
-
- //PC1 PWM1_N 1ms cycle 3/4 duty
- gpio_set_func(GPIO_PC1, AS_PWM1_N);
- pwm_set_mode(PWM1_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM1_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM1_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (250 * CLOCK_SYS_CLOCK_1US) );
-
-
- //PC6 PWM4_N 1ms cycle 4/5 duty
- gpio_set_func(GPIO_PC6, AS_PWM4_N);
- pwm_set_mode(PWM4_ID, PWM_NORMAL_MODE);
- pwm_set_phase(PWM4_ID, 0); //no phase at pwm beginning
- pwm_set_cycle_and_duty(PWM4_ID, (u16) (1000 * CLOCK_SYS_CLOCK_1US), (u16) (200 * CLOCK_SYS_CLOCK_1US) );
-
-
-
- pwm_start(PWM0_ID);
- pwm_start(PWM1_ID);
- pwm_start(PWM4_ID);
-
-
-#elif (TEST_PWM_SELECT == TEST_PWM0_DMA_FIFO_MODE)
- sleep_us(1000000);
-
-
-
- //only pwm0 support fifo mode
- gpio_set_func(GPIO_PA2, AS_PWM0);
- pwm_set_mode(PWM0_ID, PWM_IR_DMA_FIFO_MODE);
- pwm_set_phase(PWM0_ID, 0); //no phase at pwm beginning
-
- //config TMAX0 & TCMP0: 38k, 1/3 duty
- pwm_set_cycle_and_duty(PWM0_ID, PWM_CARRIER_CYCLE_TICK, PWM_CARRIER_HIGH_TICK );
-
-
-
- //config waveforms
- T_dmaData_buf.data_num = 0;
-
-//preamble: 9 ms carrier, 4.5 ms low
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 9000 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 4500 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
-
-//data 1 : 560 us carrier, 560 us low
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
-
-
-//data 0 : 560 us carrier, 1690 us low
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
- T_dmaData_buf.data[T_dmaData_buf.data_num ++]= pwm_config_dma_fifo_waveform(0, PWM0_PULSE_NORMAL, 1690 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
-
-
-//end: 560 us carrier
- T_dmaData_buf.data[T_dmaData_buf.data_num ++] = pwm_config_dma_fifo_waveform(1, PWM0_PULSE_NORMAL, 560 * CLOCK_SYS_CLOCK_1US/PWM_CARRIER_CYCLE_TICK);
-
- //calculate dma len
- T_dmaData_buf.dma_len = T_dmaData_buf.data_num * 2;
-
-
-
-
- pwm_set_dma_address(&T_dmaData_buf);
-
-
-
-//add pwm0 dma fifo done irq, when all waveform send over, this irq will triggers
- //enable mcu global irq
- irq_enable();
-
- //enable system irq PWM
- reg_irq_mask |= FLD_IRQ_SW_PWM_EN;
-
- //enable pwm0 ir dma fifo done irq
- reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE; //clear irq status
- reg_pwm_irq_mask |= FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
-
-
-//PWM0 ir dma fifo mode begin
- pwm_start_dma_ir_sending();
-
- DBG_CHN0_HIGH; //debug
-
-
-#else
-
-
-#endif
-
-}
-
-
-
-
-_attribute_ram_code_ void app_pwm_irq_test_proc(void)
-{
-
- if(reg_pwm_irq_sta & FLD_IRQ_PWM0_IR_DMA_FIFO_DONE){
- reg_pwm_irq_sta = FLD_IRQ_PWM0_IR_DMA_FIFO_DONE;
- DBG_CHN0_LOW; //finish
- }
-}
-
-
-
-
-
-
diff --git a/vendor/827x_driver_test/app_spi.c b/vendor/827x_driver_test/app_spi.c
deleted file mode 100644
index 322e2f5..0000000
--- a/vendor/827x_driver_test/app_spi.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/******************************************************************************
- * @file app_spi.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-
-extern void spi_master_test_init(void);
-extern void spi_slave_test_init(void);
-extern void spi_master_mainloop(void);
-
-
-
-
-void app_spi_test_init(void)
-{
- WaitMs(2000); //leave enough time for SWS_reset when power on
- //SPI:CK/CN/DO/DI A4/D6/A2/A3, D7/D2/B7/B6
- #if (SPI_MODE==SPI_MASTER_MODE)
- spi_master_test_init();
-
- #else
- spi_slave_test_init();
- #endif
-}
-
-
-
-
-
-
-void app_spi_test_start(void)
-{
-#if (SPI_MODE==SPI_MASTER_MODE)
-
- spi_master_mainloop();
-
-#else
- WaitMs(50);
-#endif
-}
-
-
-void app_spi_test_irq_proc(void)
-{
-
-}
diff --git a/vendor/827x_driver_test/app_spi_master.c b/vendor/827x_driver_test/app_spi_master.c
deleted file mode 100644
index 29196d4..0000000
--- a/vendor/827x_driver_test/app_spi_master.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/******************************************************************************
- * @file app_spi_master.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-#if (DRIVER_TEST_MODE == TEST_SPI)
-
-
-
-
-/**************************************************************************************
- 8258 Demo Code Config
- 1. select spi demo: master or slave( config it in app_config.h )
- 2. if spi slave demo, select slave working mode: dma mode
- 3. if spi master demo, select the peer device spi slave address mode:
- *************************************************************************************/
- #define SLAVE_TELINK_825x_DMA_MODE 1 //slave 825x dma mode, master send 3 byte sram address(0x40000~0x4ffff)
- #define SLAVE_TELINK_826x_DMA_MODE 2 //slave 826x dma mode, master send 2 byte sram address(0x8000~0xffff)
- #define PEER_SLAVE_DEVICE SLAVE_TELINK_825x_DMA_MODE
- #define SPI_CS_PIN GPIO_PD6//SPI CS pin
-
-#if (PEER_SLAVE_DEVICE == SLAVE_TELINK_825x_DMA_MODE)
- unsigned char slaveRegAddr_WriteCMD[] = {SLAVE_REGADDR1,SLAVE_REGADDR2,SLAVE_REGADDR3,SPI_WRITE_CMD};
- unsigned char slaveRegAddr_ReadCMD[] = {SLAVE_REGADDR1,SLAVE_REGADDR2,SLAVE_REGADDR3,SPI_READ_CMD};
-#elif(PEER_SLAVE_DEVICE == SLAVE_TELINK_826x_DMA_MODE)
- unsigned char slaveRegAddr_WriteCMD[] = {SLAVE_REGADDR2,SLAVE_REGADDR3,SPI_WRITE_CMD};
- unsigned char slaveRegAddr_ReadCMD[] = {SLAVE_REGADDR2,SLAVE_REGADDR3,SPI_READ_CMD};
-#endif
-//write buff
-volatile unsigned char spi_master_tx_buff[DBG_DATA_LEN]={0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa,0xbb,0xcc,0xdd,0xee,0xff};
-//read buff
-volatile unsigned char spi_master_rx__buff[DBG_DATA_LEN]={0x00};
-
-void spi_master_test_init(void)
-{
- //spi clock 500K, only master need set i2c clock
- spi_master_init((unsigned char)(CLOCK_SYS_CLOCK_HZ/(2*500000)-1),SPI_MODE0); //div_clock. spi_clk = sys_clk/((div_clk+1)*2),mode select
- spi_master_gpio_set(SPI_GPIO_SCL_A4,SPI_GPIO_CS_D6,SPI_GPIO_SDO_A2,SPI_GPIO_SDI_A3); //master mode £ºspi pin set
-}
-
-void spi_master_mainloop(void)
-{
- WaitMs(1000); //1S
- spi_master_tx_buff[0] += 1;
- spi_master_tx_buff[0] &= 0xff;
-#if (PEER_SLAVE_DEVICE == SLAVE_TELINK_825x_DMA_MODE)
- spi_write(slaveRegAddr_WriteCMD, 4,(unsigned char*)spi_master_tx_buff, DBG_DATA_LEN,SPI_CS_PIN);// pls refer to the datasheet for the write and read format of spi.
- spi_read( slaveRegAddr_ReadCMD , 4,(unsigned char*)spi_master_rx__buff,DBG_DATA_LEN,SPI_CS_PIN);
-#elif (PEER_SLAVE_DEVICE == SLAVE_TELINK_826x_DMA_MODE)
- spi_write(slaveRegAddr_WriteCMD, 3,(unsigned char*)spi_master_tx_buff, DBG_DATA_LEN,SPI_CS_PIN);// pls refer to the datasheet for the write and read format of spi.
- spi_read( slaveRegAddr_ReadCMD , 3,(unsigned char*)spi_master_rx__buff,DBG_DATA_LEN,SPI_CS_PIN);
-#endif
-}
-
-
-
-
-#endif //end of DRIVER_TEST_MODE == TEST_SPI
diff --git a/vendor/827x_driver_test/app_spi_slave.c b/vendor/827x_driver_test/app_spi_slave.c
deleted file mode 100644
index 32ca8da..0000000
--- a/vendor/827x_driver_test/app_spi_slave.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/******************************************************************************
- * @file app_spi_slave.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-
-#include "tl_common.h"
-#include "drivers.h"
-
-void spi_slave_test_init(void)
-{
- spi_slave_init((unsigned char)(CLOCK_SYS_CLOCK_HZ/(2*500000)-1),SPI_MODE0); //slave mode init
-
- spi_slave_gpio_set(SPI_GPIO_SCL_A4,SPI_GPIO_CS_D6,SPI_GPIO_SDO_A2,SPI_GPIO_SDI_A3); //slave mode £ºA2A3A4D6 spi pin set
-}
diff --git a/vendor/827x_driver_test/app_timer.c b/vendor/827x_driver_test/app_timer.c
deleted file mode 100644
index 20920f5..0000000
--- a/vendor/827x_driver_test/app_timer.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/******************************************************************************
- * @file app_timer.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-#if (DRIVER_TEST_MODE == TEST_HW_TIMER)
-
-int timer0_irq_cnt = 0;
-int timer1_irq_cnt = 0;
-int timer2_irq_cnt = 0;
-
-
-void app_timer_test_init(void)
-{
- //timer0 10ms interval irq
- reg_irq_mask |= FLD_IRQ_TMR0_EN;
- reg_tmr0_tick = 0; //clear counter
- reg_tmr0_capt = 10 * CLOCK_SYS_CLOCK_1MS;
- reg_tmr_sta = FLD_TMR_STA_TMR0; //clear irq status
- reg_tmr_ctrl |= FLD_TMR0_EN; //start timer
-
- //timer1 15ms interval irq
- reg_irq_mask |= FLD_IRQ_TMR1_EN;
- reg_tmr1_tick = 0; //clear counter
- reg_tmr1_capt = 15 * CLOCK_SYS_CLOCK_1MS;
- reg_tmr_sta = FLD_TMR_STA_TMR1; //clear irq status
- reg_tmr_ctrl |= FLD_TMR1_EN; //start timer
-
-
- //timer2 20ms interval irq
- reg_irq_mask |= FLD_IRQ_TMR2_EN;
- reg_tmr2_tick = 0; //clear counter
- reg_tmr2_capt = 20 * CLOCK_SYS_CLOCK_1MS;
- reg_tmr_sta = FLD_TMR_STA_TMR2; //clear irq status
- reg_tmr_ctrl |= FLD_TMR2_EN; //start timer
-
- irq_enable();
-}
-
-
-_attribute_ram_code_ void app_timer_test_irq_proc(void){
- if(reg_tmr_sta & FLD_TMR_STA_TMR0){
- reg_tmr_sta = FLD_TMR_STA_TMR0; //clear irq status
- timer0_irq_cnt ++;
- DBG_CHN0_TOGGLE;
- }
-
- if(reg_tmr_sta & FLD_TMR_STA_TMR1){
- reg_tmr_sta = FLD_TMR_STA_TMR1; //clear irq status
- timer1_irq_cnt ++;
- DBG_CHN1_TOGGLE;
- }
-
- if(reg_tmr_sta & FLD_TMR_STA_TMR2){
- reg_tmr_sta = FLD_TMR_STA_TMR2; //clear irq status
- timer2_irq_cnt ++;
- DBG_CHN2_TOGGLE;
- }
-}
-
-
-#endif
diff --git a/vendor/827x_driver_test/app_uart.c b/vendor/827x_driver_test/app_uart.c
deleted file mode 100644
index cde8522..0000000
--- a/vendor/827x_driver_test/app_uart.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/******************************************************************************
- * @file app_uart.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-#define UART_DMA 1 //uart use dma
-#define UART_NDMA 2 //uart not use dma
-#define UART_MODE UART_DMA
-
-
-
-
-
-
-#define LED1 GPIO_PD0
-#define LED2 GPIO_PD1
-#define LED3 GPIO_PD2
-
-
-volatile unsigned char uart_rx_flag=0;
-volatile unsigned char uart_dmairq_tx_cnt=0;
-volatile unsigned char uart_dmairq_rx_cnt=0;
-volatile unsigned int uart_ndmairq_cnt=0;
-volatile unsigned char uart_ndmairq_index=0;
-
-#if (UART_MODE==UART_DMA)
-
- #define UART_DATA_LEN 12 //data max ? (UART_DATA_LEN+4) must 16 byte aligned
- typedef struct{
- unsigned int dma_len; // dma len must be 4 byte
- unsigned char data[UART_DATA_LEN];
- }uart_data_t;
-
- uart_data_t rec_buff = {0, {0, } };
- uart_data_t trans_buff = {6, {0xaa,0xbb,0xcc,0xdd,0xee,0xff, } };
-#elif(UART_MODE==UART_NDMA)
-
- #define rec_buff_Len 16
- #define trans_buff_Len 16
-
- __attribute__((aligned(4))) unsigned char rec_buff[rec_buff_Len]={0};
- __attribute__((aligned(4))) unsigned char trans_buff[trans_buff_Len] = {0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, \
- 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff, 0x00};
-#endif
-
-
-
-
-
-
-
-
-
-void app_uart_test_init(void)
-{
- WaitMs(2000); //leave enough time for SWS_reset when power on
-
- //note: dma addr must be set first before any other uart initialization! (confirmed by sihui)
- uart_recbuff_init( (unsigned short *)&rec_buff, sizeof(rec_buff));
-
- uart_gpio_set(UART_TX_PB1, UART_RX_PB0);// uart tx/rx pin set
-
- uart_reset(); //will reset uart digital registers from 0x90 ~ 0x9f, so uart setting must set after this reset
-
- //baud rate: 9600
- #if (CLOCK_SYS_CLOCK_HZ == 16000000)
-// uart_init(118, 13, PARITY_NONE, STOP_BIT_ONE);
- uart_init(9, 13, PARITY_NONE, STOP_BIT_ONE);
- #elif (CLOCK_SYS_CLOCK_HZ == 24000000)
- uart_init(249, 9, PARITY_NONE, STOP_BIT_ONE);
- #endif
-
-
-#if (UART_MODE==UART_DMA)
- uart_dma_enable(1, 1); //uart data in hardware buffer moved by dma, so we need enable them first
-
- irq_set_mask(FLD_IRQ_DMA_EN);
- dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1); //uart Rx/Tx dma irq enable
-
- uart_irq_enable(0, 0); //uart Rx/Tx irq no need, disable them
-
-
-#elif(UART_MODE==UART_NDMA)
- uart_dma_enable(0, 0);
-
- irq_disable_type(FLD_IRQ_DMA_EN);
- dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 0);
-
- uart_irq_enable(1,0); //uart RX irq enable
-
- uart_ndma_irq_triglevel(1,0); //set the trig level. 1 indicate one byte will occur interrupt
-#endif
-
-
-
- irq_enable();
-
-}
-
-
-
-
-
-void app_uart_test_start(void)
-{
-
- WaitMs(1000);
-
-#if (UART_MODE==UART_DMA)
-
- uart_dma_send( (unsigned short*)&rec_buff);
- WaitMs(300);
- uart_dma_send((unsigned short*)&trans_buff);
-
-#elif(UART_MODE==UART_NDMA)
- for(unsigned char i=0;i<trans_buff_Len;i++){
- uart_ndma_send_byte(trans_buff[i]);
- }
- if(uart_rx_flag>0){
- uart_ndmairq_cnt=0; //Clear uart_ndmairq_cnt
- uart_rx_flag=0;
- for(unsigned char i=0;i<trans_buff_Len;i++){
- uart_ndma_send_byte(rec_buff[i]);
- }
- }
-#endif
-
-}
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-#define rec_buff_Len 16
-#define trans_buff_Len 16
-volatile unsigned int cnt=0;
-
-
-
-void app_uart_test_irq_proc(void)
-{
-
-#if (UART_MODE==UART_DMA)
-
- unsigned char uart_dma_irqsrc;
- //1. UART irq
- uart_dma_irqsrc = dma_chn_irq_status_get();///in function,interrupt flag have already been cleared,so need not to clear DMA interrupt flag here
-
-
- if(uart_dma_irqsrc & FLD_DMA_CHN_UART_RX){
- dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
-
- uart_dmairq_rx_cnt++;
-
- //Received uart data in rec_buff, user can copy data here
-
- }
- if(uart_dma_irqsrc & FLD_DMA_CHN_UART_TX){
- dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
-
- uart_dmairq_tx_cnt++;
- }
-
-#elif(UART_MODE==UART_NDMA)
-
- static unsigned char uart_ndma_irqsrc;
- uart_ndma_irqsrc = uart_ndmairq_get(); ///get the status of uart irq.
- if(uart_ndma_irqsrc){
-
- //cycle the four registers 0x90 0x91 0x92 0x93,in addition reading will clear the irq.
- if(uart_rx_flag==0){
- rec_buff[uart_ndmairq_cnt++] = reg_uart_data_buf(uart_ndmairq_index);
- uart_ndmairq_index++;
- uart_ndmairq_index &= 0x03;// cycle the four registers 0x90 0x91 0x92 0x93, it must be done like this for the design of SOC.
- if(uart_ndmairq_cnt%16==0&&uart_ndmairq_cnt!=0){
- uart_rx_flag=1;
- }
- }
- else{
- read_reg8(0x90+ uart_ndmairq_index);
- uart_ndmairq_index++;
- uart_ndmairq_index &= 0x03;
- }
- }
-
-
-#endif
-
-}
diff --git a/vendor/827x_driver_test/main.c b/vendor/827x_driver_test/main.c
deleted file mode 100644
index 6944b69..0000000
--- a/vendor/827x_driver_test/main.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/******************************************************************************
- * @file main.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-#include "tl_common.h"
-#include "drivers.h"
-#include "stack/ble/ble.h"
-#include "vendor/common/blt_common.h"
-
-
-extern my_fifo_t hci_rx_fifo;
-extern void user_init();
-extern void main_loop (void);
-
-extern void app_i2c_test_irq_proc(void);
-extern void app_uart_test_irq_proc(void);
-extern void app_spi_test_irq_proc(void);
-extern void app_timer_test_irq_proc(void);
-extern void app_gpio_irq_test_proc(void);
-extern void app_pwm_irq_test_proc(void);
-
-
-_attribute_ram_code_ void irq_handler(void)
-{
-
-/***timer demo***/
-#if (DRIVER_TEST_MODE == TEST_HW_TIMER)
- app_timer_test_irq_proc();
-
-/***uart demo***/
-#elif (DRIVER_TEST_MODE == TEST_UART)
- app_uart_test_irq_proc();
-
-/***i2c demo***/
-#elif (DRIVER_TEST_MODE == TEST_IIC)
-
- app_i2c_test_irq_proc();
-
-/***spi demo ***/
-#elif (DRIVER_TEST_MODE == TEST_SPI)
- app_spi_test_irq_proc();
-
-#elif (DRIVER_TEST_MODE == TEST_GPIO_IRQ)
-
- app_gpio_irq_test_proc();
-
-#elif (DRIVER_TEST_MODE == TEST_PWM)
-
- app_pwm_irq_test_proc();
-
-#endif
-
-}
-
-int main (void) {
-
- blc_pm_select_internal_32k_crystal();
-
-#if(MCU_CORE_TYPE == MCU_CORE_8258)
- cpu_wakeup_init();
-#elif(MCU_CORE_TYPE == MCU_CORE_8278)
- cpu_wakeup_init(LDO_MODE,EXTERNAL_XTAL_24M);
-#endif
-
- int deepRetWakeUp = pm_is_MCU_deepRetentionWakeup(); //MCU deep retention wakeUp
-
- rf_drv_init(RF_MODE_BLE_1M);
-
- gpio_init(!deepRetWakeUp);
-
-#if (CLOCK_SYS_CLOCK_HZ == 16000000)
- clock_init(SYS_CLK_16M_Crystal);
-#elif (CLOCK_SYS_CLOCK_HZ == 24000000)
- clock_init(SYS_CLK_24M_Crystal);
-#endif
-
- if(!deepRetWakeUp){//read flash size
- blc_readFlashSize_autoConfigCustomFlashSector();
- }
-
- blc_app_loadCustomizedParameters();
-
- if(!deepRetWakeUp){
- random_generator_init();
- }
-
- user_init();
-
- while (1) {
-#if (MODULE_WATCHDOG_ENABLE)
- wd_clear(); //clear watch dog
-#endif
- main_loop ();
- }
-}
-
-
-
-
diff --git a/vendor/827x_driver_test/test_low_power.c b/vendor/827x_driver_test/test_low_power.c
deleted file mode 100644
index f5306f4..0000000
--- a/vendor/827x_driver_test/test_low_power.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/******************************************************************************
- * @file test_low_power.c
- *
- * @brief for TLSR chips
- *
- * @author public@telink-semi.com;
- * @date Sep. 30, 2010
- *
- * @attention
- *
- * Copyright (C) 2019-2020 Telink Semiconductor (Shanghai) Co., Ltd.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- *****************************************************************************/
-
-#include "tl_common.h"
-#include "drivers.h"
-
-
-
-#define TEST_LP_SUSPEND_NO_WAKEUP 1 //ext32k+suspend+none: 45.09uA
-#define TEST_LP_SUSPEND_GPIO_PAD_WAKEUP 2
-#define TEST_LP_SUSPEND_TIMER_WAKEUP 3
-
-#define TEST_LP_SUSPEND_TIMER_GPIO_PAD_WAKEUP 4
-
-#define TEST_LP_DEEPSLEEP_NO_WAKEUP 5 //ext32k+deep+none: 0.43uA //int32k+deep+none: 0.41uA
-#define TEST_LP_DEEPSLEEP_GPIO_PAD_WAKEUP 6 //ext32k+deep+pad: 0.43uA //int32k+deep+pad: 0.41uA
-#define TEST_LP_DEEPSLEEP_TIMER_WAKEUP 7 //ext32k+deep+tmr: 2.03uA //int32k+deep+tmr: 0.92uA
-
-#define TEST_LP_DEEPSLEEP_RET16K_NO_WAKEUP 8 //ext32k+deepret16k+none(tmr should open: 3.00uA //int32k+deepret16k+none: 1.41uA
-#define TEST_LP_DEEPSLEEP_RET16K_GPIO_PAD_WAKEUP 9 //ext32k+deepret16k+pad(tmr should open: 3.00uA //int32k+deepret16k+pad: 1.41uA
-#define TEST_LP_DEEPSLEEP_RET16K_TIMER_WAKEUP 10//ext32k+deepret16k+tmr: 3.00uA //int32k+deepret16k+tmr: 1.87uA
-
-
-#define TEST_LP_MODE 5
-
-
-
-int first_power_on = 0;
-
-u8 AA_wakeupSrc[256];
-u8 AA_wkp_index;
-
-void test_low_power(void)
-{
- if(analog_read(0x3a) == 0x5a){ //read flag
- first_power_on = 0;
- }
- else{
- first_power_on = 1;
- }
-
-
- if(first_power_on){
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- }
- else{
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- DBG_CHN0_TOGGLE;
- sleep_us(500000);
- }
-
- analog_write(0x3a, 0x5a); //set flag
-
-
-
-#if(TEST_LP_MODE == TEST_LP_SUSPEND_NO_WAKEUP)
-
- gpio_shutdown(GPIO_ALL); //all GPIO high_Z state, no current leakage
-
- cpu_sleep_wakeup(SUSPEND_MODE , 0, 0);
-
-#elif(TEST_LP_MODE == TEST_LP_SUSPEND_GPIO_PAD_WAKEUP)
-
- gpio_setup_up_down_resistor(GPIO_PB6, PM_PIN_PULLDOWN_100K);
- cpu_set_gpio_wakeup(GPIO_PB6, Level_High, 1);
-
-
- while(1){
-
- u32 wakeup_src = cpu_sleep_wakeup(SUSPEND_MODE, PM_WAKEUP_PAD, 0); //PM_WAKEUP_PAD
-
- AA_wakeupSrc[AA_wkp_index++] = wakeup_src;
-
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- DBG_CHN1_TOGGLE;
- sleep_us(100000);
- DBG_CHN1_TOGGLE;
- sleep_us(600000);
- DBG_CHN1_TOGGLE;
- sleep_us(100000);
- }
-
-#elif(TEST_LP_MODE == TEST_LP_SUSPEND_TIMER_WAKEUP)
-
-
- u32 now_tick;
- while(1){
-
- now_tick = clock_time();
-
- u32 wakeup_src = cpu_sleep_wakeup(SUSPEND_MODE, PM_WAKEUP_TIMER, now_tick + 20 * CLOCK_16M_SYS_TIMER_CLK_1S);
-
- AA_wakeupSrc[AA_wkp_index++] = wakeup_src;
-
- DBG_CHN1_TOGGLE;
- sleep_us(20000);
- DBG_CHN1_TOGGLE;
- sleep_us(10000);
- DBG_CHN1_TOGGLE;
- sleep_us(60000);
- DBG_CHN1_TOGGLE;
- sleep_us(10000);
- }
-
-#elif(TEST_LP_MODE == TEST_LP_SUSPEND_TIMER_GPIO_PAD_WAKEUP)
-
- gpio_setup_up_down_resistor(GPIO_PB6, PM_PIN_PULLDOWN_100K);
- cpu_set_gpio_wakeup(GPIO_PB6, Level_High, 1);
-
-
- u32 now_tick;
- while(1){
-
- now_tick = clock_time();
-
- u32 wakeup_src = cpu_sleep_wakeup(SUSPEND_MODE, PM_WAKEUP_TIMER | PM_WAKEUP_PAD, now_tick + 20 * CLOCK_16M_SYS_TIMER_CLK_1S);
-
- AA_wakeupSrc[AA_wkp_index++] = wakeup_src;
-
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- DBG_CHN1_TOGGLE;
- sleep_us(100000);
- DBG_CHN1_TOGGLE;
- sleep_us(600000);
- DBG_CHN1_TOGGLE;
- sleep_us(100000);
- }
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_NO_WAKEUP)
-
- gpio_shutdown(GPIO_ALL); //all GPIO high_Z state, no current leakage
-
- cpu_sleep_wakeup(DEEPSLEEP_MODE , 0, 0);
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_GPIO_PAD_WAKEUP)
-
-
- gpio_setup_up_down_resistor(GPIO_PB6, PM_PIN_PULLDOWN_100K);
- cpu_set_gpio_wakeup(GPIO_PB6, Level_High, 1);
-
- while(1){
- cpu_sleep_wakeup(DEEPSLEEP_MODE, PM_WAKEUP_PAD, 0); //PM_WAKEUP_PAD
- }
-
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_TIMER_WAKEUP)
-
- gpio_shutdown(GPIO_ALL); //all GPIO high_Z state, no current leakage
-
- while(1){
-
- cpu_sleep_wakeup(DEEPSLEEP_MODE , PM_WAKEUP_TIMER, clock_time() + 20*CLOCK_16M_SYS_TIMER_CLK_1S);
-
- DBG_CHN1_TOGGLE;
- sleep_us(700000);
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- DBG_CHN1_TOGGLE;
- sleep_us(700000);
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- }
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_RET16K_NO_WAKEUP)
-
- gpio_shutdown(GPIO_ALL); //all GPIO high_Z state, no current leakage
- cpu_sleep_wakeup(DEEPSLEEP_MODE_RET_SRAM_LOW16K , 0, 0);
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_RET16K_GPIO_PAD_WAKEUP)
-
- gpio_setup_up_down_resistor(GPIO_PB6, PM_PIN_PULLDOWN_100K);
- cpu_set_gpio_wakeup(GPIO_PB6, Level_High, 1);
-
- while(1){
- cpu_sleep_wakeup(DEEPSLEEP_MODE_RET_SRAM_LOW16K, PM_WAKEUP_PAD, 0); //PM_WAKEUP_PAD
- }
-
-#elif(TEST_LP_MODE == TEST_LP_DEEPSLEEP_RET16K_TIMER_WAKEUP)
-
- gpio_shutdown(GPIO_ALL); //all GPIO high_Z state, no current leakage
-
- while(1){
-
- cpu_sleep_wakeup(DEEPSLEEP_MODE_RET_SRAM_LOW16K , PM_WAKEUP_TIMER, clock_time() + 20*CLOCK_16M_SYS_TIMER_CLK_1S);
-
- DBG_CHN1_TOGGLE;
- sleep_us(700000);
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- DBG_CHN1_TOGGLE;
- sleep_us(700000);
- DBG_CHN1_TOGGLE;
- sleep_us(300000);
- }
-#else
-
-
-#endif
-
-
-}
diff --git a/version.h b/version.h
index 57f88a3..e7b4a89 100644
--- a/version.h
+++ b/version.h
@@ -27,6 +27,6 @@
#ifndef VERSION_H_
#define VERSION_H_
-#define FW_VERSION 0x11110124//FW:v1.1.1 SW:v1.24
+#define FW_VERSION 0x11110126//FW:v1.1.1 SW:v1.26
#endif /* VERSION_H_ */
