Remove K310 kernel headers am: 464aadab99 am: 0af8a3fa7e am: 3d2e1aec41 am: b06208fcfb * commit 'b06208fcfb6b350603267746f736c5a7e7a92d8f': Remove K310 kernel headers Change-Id: Ia35b018f6deb091671e11f7abc450039a5846124

commit: 157e733a55f0040238010b1d2e6eb068413744d5 [log] [tgz]
author: Tom Cherry <tomcherry@google.com> Wed Jun 01 20:36:02 2016 +0000
committer: android-build-merger <android-build-merger@google.com> Wed Jun 01 20:36:02 2016 +0000
tree: 262812f4f1b56b786cf9bc765439d3cdab8fdaf7
parent: 47e7517366ca0a9ef87a784b049413c6b4182ce1 [diff]
parent: b06208fcfb6b350603267746f736c5a7e7a92d8f [diff]
diff --git a/k318/kernel-headers/linux/fips_status.h b/k318/kernel-headers/linux/fips_status.h
deleted file mode 100644
index cc760aa..0000000
--- a/k318/kernel-headers/linux/fips_status.h
+++ /dev/null

@@ -1,34 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_FIPS_STATUS__H
-#define _UAPI_FIPS_STATUS__H
-#include <linux/types.h>
-#include <linux/ioctl.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum fips_status {
-  FIPS140_STATUS_NA = 0,
-  FIPS140_STATUS_PASS_CRYPTO = 1,
-  FIPS140_STATUS_QCRYPTO_ALLOWED = 2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  FIPS140_STATUS_PASS = 3,
-  FIPS140_STATUS_FAIL = 0xFF
-};
-#endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-

diff --git a/k318/kernel-headers/linux/ion.h b/k318/kernel-headers/linux/ion.h
deleted file mode 100644
index 8cd5d3c..0000000
--- a/k318/kernel-headers/linux/ion.h
+++ /dev/null

@@ -1,79 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_LINUX_ION_H
-#define _UAPI_LINUX_ION_H
-#include <linux/ioctl.h>
-#include <linux/types.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-typedef int ion_user_handle_t;
-enum ion_heap_type {
-  ION_HEAP_TYPE_SYSTEM,
-  ION_HEAP_TYPE_SYSTEM_CONTIG,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_HEAP_TYPE_CARVEOUT,
-  ION_HEAP_TYPE_CHUNK,
-  ION_HEAP_TYPE_DMA,
-  ION_HEAP_TYPE_CUSTOM,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_NUM_HEAPS = 16,
-};
-#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM)
-#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT)
-#define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA)
-#define ION_NUM_HEAP_IDS (sizeof(unsigned int) * 8)
-#define ION_FLAG_CACHED 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_FLAG_CACHED_NEEDS_SYNC 2
-struct ion_allocation_data {
-  size_t len;
-  size_t align;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int heap_id_mask;
-  unsigned int flags;
-  ion_user_handle_t handle;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct ion_fd_data {
-  ion_user_handle_t handle;
-  int fd;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct ion_handle_data {
-  ion_user_handle_t handle;
-};
-struct ion_custom_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int cmd;
-  unsigned long arg;
-};
-#define ION_IOC_MAGIC 'I'
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IOC_ALLOC _IOWR(ION_IOC_MAGIC, 0, struct ion_allocation_data)
-#define ION_IOC_FREE _IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
-#define ION_IOC_MAP _IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
-#define ION_IOC_SHARE _IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IOC_IMPORT _IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data)
-#define ION_IOC_SYNC _IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data)
-#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
-#endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-

diff --git a/k318/kernel-headers/linux/mfd/msm-adie-codec.h b/k318/kernel-headers/linux/mfd/msm-adie-codec.h
deleted file mode 100644
index 800f6af..0000000
--- a/k318/kernel-headers/linux/mfd/msm-adie-codec.h
+++ /dev/null

@@ -1,95 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H
-#define __UAPI_MFD_MSM_ADIE_CODEC_H
-#include <linux/types.h>
-#define ADIE_CODEC_ACTION_ENTRY 0x1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ADIE_CODEC_ACTION_DELAY_WAIT 0x2
-#define ADIE_CODEC_ACTION_STAGE_REACHED 0x3
-#define ADIE_CODEC_PATH_OFF 0x0050
-#define ADIE_CODEC_DIGITAL_READY 0x0100
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ADIE_CODEC_DIGITAL_ANALOG_READY 0x1000
-#define ADIE_CODEC_ANALOG_OFF 0x0750
-#define ADIE_CODEC_DIGITAL_OFF 0x0600
-#define ADIE_CODEC_FLASH_IMAGE 0x0001
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ADIE_CODEC_RX 0
-#define ADIE_CODEC_TX 1
-#define ADIE_CODEC_LB 3
-#define ADIE_CODEC_MAX 4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ADIE_CODEC_PACK_ENTRY(reg,mask,val) ((val) | (mask << 8) | (reg << 16))
-#define ADIE_CODEC_UNPACK_ENTRY(packed,reg,mask,val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while(0);
-struct adie_codec_action_unit {
-  u32 type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  u32 action;
-};
-struct adie_codec_hwsetting_entry {
-  struct adie_codec_action_unit * actions;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  u32 action_sz;
-  u32 freq_plan;
-  u32 osr;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct adie_codec_dev_profile {
-  u32 path_type;
-  u32 setting_sz;
-  struct adie_codec_hwsetting_entry * settings;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct adie_codec_register {
-  u8 reg;
-  u8 mask;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  u8 val;
-};
-struct adie_codec_register_image {
-  struct adie_codec_register * regs;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  u32 img_sz;
-};
-struct adie_codec_path;
-struct adie_codec_anc_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  u32 size;
-  u32 writes[];
-};
-struct adie_codec_operations {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int codec_id;
-  int(* codec_open) (struct adie_codec_dev_profile * profile, struct adie_codec_path * * path_pptr);
-  int(* codec_close) (struct adie_codec_path * path_ptr);
-  int(* codec_setpath) (struct adie_codec_path * path_ptr, u32 freq_plan, u32 osr);
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int(* codec_proceed_stage) (struct adie_codec_path * path_ptr, u32 state);
-  u32(* codec_freq_supported) (struct adie_codec_dev_profile * profile, u32 requested_freq);
-  int(* codec_enable_sidetone) (struct adie_codec_path * rx_path_ptr, u32 enable);
-  int(* codec_enable_anc) (struct adie_codec_path * rx_path_ptr, u32 enable, struct adie_codec_anc_data * calibration_writes);
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int(* codec_set_device_digital_volume) (struct adie_codec_path * path_ptr, u32 num_channels, u32 vol_percentage);
-  int(* codec_set_device_analog_volume) (struct adie_codec_path * path_ptr, u32 num_channels, u32 volume);
-  int(* codec_set_master_mode) (struct adie_codec_path * path_ptr, u8 master);
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h b/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
deleted file mode 100644
index c9c7820..0000000
--- a/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
+++ /dev/null

@@ -1,1746 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef WCD9320_REGISTERS_H
-#define WCD9320_REGISTERS_H
-#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
-#define TAIKO_A_CHIP_CTL WCD9XXX_A_CHIP_CTL
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CHIP_CTL__POR WCD9XXX_A_CHIP_CTL__POR
-#define TAIKO_A_CHIP_STATUS WCD9XXX_A_CHIP_STATUS
-#define TAIKO_A_CHIP_STATUS__POR WCD9XXX_A_CHIP_STATUS__POR
-#define TAIKO_A_CHIP_ID_BYTE_0 WCD9XXX_A_CHIP_ID_BYTE_0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CHIP_ID_BYTE_0__POR WCD9XXX_A_CHIP_ID_BYTE_0__POR
-#define TAIKO_A_CHIP_ID_BYTE_1 WCD9XXX_A_CHIP_ID_BYTE_1
-#define TAIKO_A_CHIP_ID_BYTE_1__POR WCD9XXX_A_CHIP_ID_BYTE_1__POR
-#define TAIKO_A_CHIP_ID_BYTE_2 WCD9XXX_A_CHIP_ID_BYTE_2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CHIP_ID_BYTE_2__POR WCD9XXX_A_CHIP_ID_BYTE_2__POR
-#define TAIKO_A_CHIP_ID_BYTE_3 WCD9XXX_A_CHIP_ID_BYTE_3
-#define TAIKO_A_CHIP_ID_BYTE_3__POR WCD9XXX_A_CHIP_ID_BYTE_3__POR
-#define TAIKO_A_CHIP_VERSION WCD9XXX_A_CHIP_VERSION
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CHIP_VERSION__POR WCD9XXX_A_CHIP_VERSION__POR
-#define TAIKO_A_SB_VERSION WCD9XXX_A_SB_VERSION
-#define TAIKO_A_SB_VERSION__POR WCD9XXX_A_SB_VERSION__POR
-#define TAIKO_A_SLAVE_ID_1 WCD9XXX_A_SLAVE_ID_1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SLAVE_ID_1__POR WCD9XXX_A_SLAVE_ID_1__POR
-#define TAIKO_A_SLAVE_ID_2 WCD9XXX_A_SLAVE_ID_2
-#define TAIKO_A_SLAVE_ID_2__POR WCD9XXX_A_SLAVE_ID_2__POR
-#define TAIKO_A_SLAVE_ID_3 WCD9XXX_A_SLAVE_ID_3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SLAVE_ID_3__POR WCD9XXX_A_SLAVE_ID_3__POR
-#define TAIKO_A_PIN_CTL_OE0 (0x010)
-#define TAIKO_A_PIN_CTL_OE0__POR (0x00)
-#define TAIKO_A_PIN_CTL_OE1 (0x011)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_PIN_CTL_OE1__POR (0x00)
-#define TAIKO_A_PIN_CTL_DATA0 (0x012)
-#define TAIKO_A_PIN_CTL_DATA0__POR (0x00)
-#define TAIKO_A_PIN_CTL_DATA1 (0x013)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_PIN_CTL_DATA1__POR (0x00)
-#define TAIKO_A_HDRIVE_GENERIC (0x018)
-#define TAIKO_A_HDRIVE_GENERIC__POR (0x00)
-#define TAIKO_A_HDRIVE_OVERRIDE (0x019)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_HDRIVE_OVERRIDE__POR (0x08)
-#define TAIKO_A_ANA_CSR_WAIT_STATE (0x020)
-#define TAIKO_A_ANA_CSR_WAIT_STATE__POR (0x44)
-#define TAIKO_A_PROCESS_MONITOR_CTL0 (0x040)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_PROCESS_MONITOR_CTL0__POR (0x80)
-#define TAIKO_A_PROCESS_MONITOR_CTL1 (0x041)
-#define TAIKO_A_PROCESS_MONITOR_CTL1__POR (0x00)
-#define TAIKO_A_PROCESS_MONITOR_CTL2 (0x042)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_PROCESS_MONITOR_CTL2__POR (0x00)
-#define TAIKO_A_PROCESS_MONITOR_CTL3 (0x043)
-#define TAIKO_A_PROCESS_MONITOR_CTL3__POR (0x01)
-#define TAIKO_A_QFUSE_CTL (0x048)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_QFUSE_CTL__POR (0x00)
-#define TAIKO_A_QFUSE_STATUS (0x049)
-#define TAIKO_A_QFUSE_STATUS__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT0 (0x04A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_QFUSE_DATA_OUT0__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT1 (0x04B)
-#define TAIKO_A_QFUSE_DATA_OUT1__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT2 (0x04C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_QFUSE_DATA_OUT2__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT3 (0x04D)
-#define TAIKO_A_QFUSE_DATA_OUT3__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT4 (0x04E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_QFUSE_DATA_OUT4__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT5 (0x04F)
-#define TAIKO_A_QFUSE_DATA_OUT5__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT6 (0x050)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_QFUSE_DATA_OUT6__POR (0x00)
-#define TAIKO_A_QFUSE_DATA_OUT7 (0x051)
-#define TAIKO_A_QFUSE_DATA_OUT7__POR (0x00)
-#define TAIKO_A_CDC_CTL WCD9XXX_A_CDC_CTL
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CTL__POR WCD9XXX_A_CDC_CTL__POR
-#define TAIKO_A_LEAKAGE_CTL WCD9XXX_A_LEAKAGE_CTL
-#define TAIKO_A_LEAKAGE_CTL__POR WCD9XXX_A_LEAKAGE_CTL__POR
-#define TAIKO_A_INTR_MODE (0x090)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_MODE__POR (0x00)
-#define TAIKO_A_INTR_MASK0 (0x094)
-#define TAIKO_A_INTR_MASK0__POR (0xFF)
-#define TAIKO_A_INTR_MASK1 (0x095)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_MASK1__POR (0xFF)
-#define TAIKO_A_INTR_MASK2 (0x096)
-#define TAIKO_A_INTR_MASK2__POR (0x3F)
-#define TAIKO_A_INTR_MASK3 (0x097)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_MASK3__POR (0x3F)
-#define TAIKO_A_INTR_STATUS0 (0x098)
-#define TAIKO_A_INTR_STATUS0__POR (0x00)
-#define TAIKO_A_INTR_STATUS1 (0x099)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_STATUS1__POR (0x00)
-#define TAIKO_A_INTR_STATUS2 (0x09A)
-#define TAIKO_A_INTR_STATUS2__POR (0x00)
-#define TAIKO_A_INTR_STATUS3 (0x09B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_STATUS3__POR (0x00)
-#define TAIKO_A_INTR_CLEAR0 (0x09C)
-#define TAIKO_A_INTR_CLEAR0__POR (0x00)
-#define TAIKO_A_INTR_CLEAR1 (0x09D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_CLEAR1__POR (0x00)
-#define TAIKO_A_INTR_CLEAR2 (0x09E)
-#define TAIKO_A_INTR_CLEAR2__POR (0x00)
-#define TAIKO_A_INTR_CLEAR3 (0x09F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_CLEAR3__POR (0x00)
-#define TAIKO_A_INTR_LEVEL0 (0x0A0)
-#define TAIKO_A_INTR_LEVEL0__POR (0x01)
-#define TAIKO_A_INTR_LEVEL1 (0x0A1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_LEVEL1__POR (0x00)
-#define TAIKO_A_INTR_LEVEL2 (0x0A2)
-#define TAIKO_A_INTR_LEVEL2__POR (0x00)
-#define TAIKO_A_INTR_LEVEL3 (0x0A3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_LEVEL3__POR (0x00)
-#define TAIKO_A_INTR_TEST0 (0x0A4)
-#define TAIKO_A_INTR_TEST0__POR (0x00)
-#define TAIKO_A_INTR_TEST1 (0x0A5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_TEST1__POR (0x00)
-#define TAIKO_A_INTR_TEST2 (0x0A6)
-#define TAIKO_A_INTR_TEST2__POR (0x00)
-#define TAIKO_A_INTR_TEST3 (0x0A7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_TEST3__POR (0x00)
-#define TAIKO_A_INTR_SET0 (0x0A8)
-#define TAIKO_A_INTR_SET0__POR (0x00)
-#define TAIKO_A_INTR_SET1 (0x0A9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_SET1__POR (0x00)
-#define TAIKO_A_INTR_SET2 (0x0AA)
-#define TAIKO_A_INTR_SET2__POR (0x00)
-#define TAIKO_A_INTR_SET3 (0x0AB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_SET3__POR (0x00)
-#define TAIKO_A_INTR_DESTN0 (0x0AC)
-#define TAIKO_A_INTR_DESTN0__POR (0x00)
-#define TAIKO_A_INTR_DESTN1 (0x0AD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_DESTN1__POR (0x00)
-#define TAIKO_A_INTR_DESTN2 (0x0AE)
-#define TAIKO_A_INTR_DESTN2__POR (0x00)
-#define TAIKO_A_INTR_DESTN3 (0x0AF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_INTR_DESTN3__POR (0x00)
-#define TAIKO_A_CDC_TX_I2S_SCK_MODE (0x0C0)
-#define TAIKO_A_CDC_TX_I2S_SCK_MODE__POR (0x00)
-#define TAIKO_A_CDC_TX_I2S_WS_MODE (0x0C1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_I2S_WS_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_DATA0_MODE (0x0C4)
-#define TAIKO_A_CDC_DMIC_DATA0_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_CLK0_MODE (0x0C5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DMIC_CLK0_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_DATA1_MODE (0x0C6)
-#define TAIKO_A_CDC_DMIC_DATA1_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_CLK1_MODE (0x0C7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DMIC_CLK1_MODE__POR (0x00)
-#define TAIKO_A_CDC_RX_I2S_SCK_MODE (0x0C8)
-#define TAIKO_A_CDC_RX_I2S_SCK_MODE__POR (0x00)
-#define TAIKO_A_CDC_RX_I2S_WS_MODE (0x0C9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX_I2S_WS_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_DATA2_MODE (0x0CA)
-#define TAIKO_A_CDC_DMIC_DATA2_MODE__POR (0x00)
-#define TAIKO_A_CDC_DMIC_CLK2_MODE (0x0CB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DMIC_CLK2_MODE__POR (0x00)
-#define TAIKO_A_CDC_INTR1_MODE (0x0CC)
-#define TAIKO_A_CDC_INTR1_MODE__POR (0x00)
-#define TAIKO_A_CDC_SB_NRZ_SEL_MODE (0x0CD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SB_NRZ_SEL_MODE__POR (0x00)
-#define TAIKO_A_CDC_INTR2_MODE (0x0CE)
-#define TAIKO_A_CDC_INTR2_MODE__POR (0x00)
-#define TAIKO_A_CDC_RF_PA_ON_MODE (0x0CF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RF_PA_ON_MODE__POR (0x00)
-#define TAIKO_A_BIAS_REF_CTL (0x100)
-#define TAIKO_A_BIAS_REF_CTL__POR (0x1C)
-#define TAIKO_A_BIAS_CENTRAL_BG_CTL (0x101)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BIAS_CENTRAL_BG_CTL__POR (0x50)
-#define TAIKO_A_BIAS_PRECHRG_CTL (0x102)
-#define TAIKO_A_BIAS_PRECHRG_CTL__POR (0x07)
-#define TAIKO_A_BIAS_CURR_CTL_1 (0x103)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BIAS_CURR_CTL_1__POR (0x52)
-#define TAIKO_A_BIAS_CURR_CTL_2 (0x104)
-#define TAIKO_A_BIAS_CURR_CTL_2__POR (0x00)
-#define TAIKO_A_BIAS_OSC_BG_CTL (0x105)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BIAS_OSC_BG_CTL__POR (0x16)
-#define TAIKO_A_CLK_BUFF_EN1 (0x108)
-#define TAIKO_A_CLK_BUFF_EN1__POR (0x04)
-#define TAIKO_A_CLK_BUFF_EN2 (0x109)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CLK_BUFF_EN2__POR (0x02)
-#define TAIKO_A_LDO_H_MODE_1 (0x110)
-#define TAIKO_A_LDO_H_MODE_1__POR (0x65)
-#define TAIKO_A_LDO_H_MODE_2 (0x111)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_LDO_H_MODE_2__POR (0xA8)
-#define TAIKO_A_LDO_H_LOOP_CTL (0x112)
-#define TAIKO_A_LDO_H_LOOP_CTL__POR (0x6B)
-#define TAIKO_A_LDO_H_COMP_1 (0x113)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_LDO_H_COMP_1__POR (0x84)
-#define TAIKO_A_LDO_H_COMP_2 (0x114)
-#define TAIKO_A_LDO_H_COMP_2__POR (0xE0)
-#define TAIKO_A_LDO_H_BIAS_1 (0x115)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_LDO_H_BIAS_1__POR (0x6D)
-#define TAIKO_A_LDO_H_BIAS_2 (0x116)
-#define TAIKO_A_LDO_H_BIAS_2__POR (0xA5)
-#define TAIKO_A_LDO_H_BIAS_3 (0x117)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_LDO_H_BIAS_3__POR (0x60)
-#define TAIKO_A_VBAT_CLK (0x118)
-#define TAIKO_A_VBAT_CLK__POR (0x03)
-#define TAIKO_A_VBAT_LOOP (0x119)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_VBAT_LOOP__POR (0x02)
-#define TAIKO_A_VBAT_REF (0x11A)
-#define TAIKO_A_VBAT_REF__POR (0x20)
-#define TAIKO_A_VBAT_ADC_TEST (0x11B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_VBAT_ADC_TEST__POR (0x00)
-#define TAIKO_A_VBAT_FE (0x11C)
-#define TAIKO_A_VBAT_FE__POR (0x48)
-#define TAIKO_A_VBAT_BIAS_1 (0x11D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_VBAT_BIAS_1__POR (0x03)
-#define TAIKO_A_VBAT_BIAS_2 (0x11E)
-#define TAIKO_A_VBAT_BIAS_2__POR (0x00)
-#define TAIKO_A_VBAT_ADC_DATA_MSB (0x11F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_VBAT_ADC_DATA_MSB__POR (0x00)
-#define TAIKO_A_VBAT_ADC_DATA_LSB (0x120)
-#define TAIKO_A_VBAT_ADC_DATA_LSB__POR (0x00)
-#define TAIKO_A_MICB_CFILT_1_CTL (0x128)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_1_CTL__POR (0x40)
-#define TAIKO_A_MICB_CFILT_1_VAL (0x129)
-#define TAIKO_A_MICB_CFILT_1_VAL__POR (0x80)
-#define TAIKO_A_MICB_CFILT_1_PRECHRG (0x12A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_1_PRECHRG__POR (0x38)
-#define TAIKO_A_MICB_1_CTL (0x12B)
-#define TAIKO_A_MICB_1_CTL__POR (0x16)
-#define TAIKO_A_MICB_1_INT_RBIAS (0x12C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_1_INT_RBIAS__POR (0x24)
-#define TAIKO_A_MICB_1_MBHC (0x12D)
-#define TAIKO_A_MICB_1_MBHC__POR (0x01)
-#define TAIKO_A_MICB_CFILT_2_CTL (0x12E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_2_CTL__POR (0x40)
-#define TAIKO_A_MICB_CFILT_2_VAL (0x12F)
-#define TAIKO_A_MICB_CFILT_2_VAL__POR (0x80)
-#define TAIKO_A_MICB_CFILT_2_PRECHRG (0x130)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_2_PRECHRG__POR (0x38)
-#define TAIKO_A_MICB_2_CTL (0x131)
-#define TAIKO_A_MICB_2_CTL__POR (0x16)
-#define TAIKO_A_MICB_2_INT_RBIAS (0x132)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_2_INT_RBIAS__POR (0x24)
-#define TAIKO_A_MICB_2_MBHC (0x133)
-#define TAIKO_A_MICB_2_MBHC__POR (0x02)
-#define TAIKO_A_MICB_CFILT_3_CTL (0x134)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_3_CTL__POR (0x40)
-#define TAIKO_A_MICB_CFILT_3_VAL (0x135)
-#define TAIKO_A_MICB_CFILT_3_VAL__POR (0x80)
-#define TAIKO_A_MICB_CFILT_3_PRECHRG (0x136)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_CFILT_3_PRECHRG__POR (0x38)
-#define TAIKO_A_MICB_3_CTL (0x137)
-#define TAIKO_A_MICB_3_CTL__POR (0x16)
-#define TAIKO_A_MICB_3_INT_RBIAS (0x138)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_3_INT_RBIAS__POR (0x24)
-#define TAIKO_A_MICB_3_MBHC (0x139)
-#define TAIKO_A_MICB_3_MBHC__POR (0x00)
-#define TAIKO_A_MICB_4_CTL (0x13D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_4_CTL__POR (0x16)
-#define TAIKO_A_MICB_4_INT_RBIAS (0x13E)
-#define TAIKO_A_MICB_4_INT_RBIAS__POR (0x24)
-#define TAIKO_A_MICB_4_MBHC (0x13F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MICB_4_MBHC__POR (0x01)
-#define TAIKO_A_MBHC_INSERT_DETECT (0x14A)
-#define TAIKO_A_MBHC_INSERT_DETECT__POR (0x00)
-#define TAIKO_A_MBHC_INSERT_DET_STATUS (0x14B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MBHC_INSERT_DET_STATUS__POR (0x00)
-#define TAIKO_A_TX_COM_BIAS (0x14C)
-#define TAIKO_A_TX_COM_BIAS__POR (0xF0)
-#define TAIKO_A_MBHC_SCALING_MUX_1 (0x14E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MBHC_SCALING_MUX_1__POR (0x00)
-#define TAIKO_A_MBHC_SCALING_MUX_2 (0x14F)
-#define TAIKO_A_MBHC_SCALING_MUX_2__POR (0x80)
-#define TAIKO_A_MAD_ANA_CTRL (0x150)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MAD_ANA_CTRL__POR (0xF1)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_1 (0x151)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_1__POR (0x00)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_2 (0x152)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_2__POR (0x80)
-#define TAIKO_A_TX_1_2_EN (0x153)
-#define TAIKO_A_TX_1_2_EN__POR (0x00)
-#define TAIKO_A_TX_1_2_TEST_EN (0x154)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_1_2_TEST_EN__POR (0xCC)
-#define TAIKO_A_TX_1_2_ADC_CH1 (0x155)
-#define TAIKO_A_TX_1_2_ADC_CH1__POR (0x44)
-#define TAIKO_A_TX_1_2_ADC_CH2 (0x156)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_1_2_ADC_CH2__POR (0x44)
-#define TAIKO_A_TX_1_2_ATEST_REFCTRL (0x157)
-#define TAIKO_A_TX_1_2_ATEST_REFCTRL__POR (0x00)
-#define TAIKO_A_TX_1_2_TEST_CTL (0x158)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_1_2_TEST_CTL__POR (0x38)
-#define TAIKO_A_TX_1_2_TEST_BLOCK_EN (0x159)
-#define TAIKO_A_TX_1_2_TEST_BLOCK_EN__POR (0xFC)
-#define TAIKO_A_TX_1_2_TXFE_CLKDIV (0x15A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_1_2_TXFE_CLKDIV__POR (0x55)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH1 (0x15B)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH1__POR (0x00)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH2 (0x15C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_1_2_SAR_ERR_CH2__POR (0x00)
-#define TAIKO_A_TX_3_4_EN (0x15D)
-#define TAIKO_A_TX_3_4_EN__POR (0x00)
-#define TAIKO_A_TX_3_4_TEST_EN (0x15E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_3_4_TEST_EN__POR (0xCC)
-#define TAIKO_A_TX_3_4_ADC_CH3 (0x15F)
-#define TAIKO_A_TX_3_4_ADC_CH3__POR (0x44)
-#define TAIKO_A_TX_3_4_ADC_CH4 (0x160)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_3_4_ADC_CH4__POR (0x44)
-#define TAIKO_A_TX_3_4_ATEST_REFCTRL (0x161)
-#define TAIKO_A_TX_3_4_ATEST_REFCTRL__POR (0x00)
-#define TAIKO_A_TX_3_4_TEST_CTL (0x162)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_3_4_TEST_CTL__POR (0x38)
-#define TAIKO_A_TX_3_4_TEST_BLOCK_EN (0x163)
-#define TAIKO_A_TX_3_4_TEST_BLOCK_EN__POR (0xFC)
-#define TAIKO_A_TX_3_4_TXFE_CKDIV (0x164)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_3_4_TXFE_CKDIV__POR (0x55)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH3 (0x165)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH3__POR (0x00)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH4 (0x166)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_3_4_SAR_ERR_CH4__POR (0x00)
-#define TAIKO_A_TX_5_6_EN (0x167)
-#define TAIKO_A_TX_5_6_EN__POR (0x11)
-#define TAIKO_A_TX_5_6_TEST_EN (0x168)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_5_6_TEST_EN__POR (0xCC)
-#define TAIKO_A_TX_5_6_ADC_CH5 (0x169)
-#define TAIKO_A_TX_5_6_ADC_CH5__POR (0x44)
-#define TAIKO_A_TX_5_6_ADC_CH6 (0x16A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_5_6_ADC_CH6__POR (0x44)
-#define TAIKO_A_TX_5_6_ATEST_REFCTRL (0x16B)
-#define TAIKO_A_TX_5_6_ATEST_REFCTRL__POR (0x00)
-#define TAIKO_A_TX_5_6_TEST_CTL (0x16C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_5_6_TEST_CTL__POR (0x38)
-#define TAIKO_A_TX_5_6_TEST_BLOCK_EN (0x16D)
-#define TAIKO_A_TX_5_6_TEST_BLOCK_EN__POR (0xFC)
-#define TAIKO_A_TX_5_6_TXFE_CKDIV (0x16E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_5_6_TXFE_CKDIV__POR (0x55)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH5 (0x16F)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH5__POR (0x00)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH6 (0x170)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_5_6_SAR_ERR_CH6__POR (0x00)
-#define TAIKO_A_TX_7_MBHC_EN (0x171)
-#define TAIKO_A_TX_7_MBHC_EN__POR (0x0C)
-#define TAIKO_A_TX_7_MBHC_ATEST_REFCTRL (0x172)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_7_MBHC_ATEST_REFCTRL__POR (0x00)
-#define TAIKO_A_TX_7_MBHC_ADC (0x173)
-#define TAIKO_A_TX_7_MBHC_ADC__POR (0x44)
-#define TAIKO_A_TX_7_MBHC_TEST_CTL (0x174)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_7_MBHC_TEST_CTL__POR (0x38)
-#define TAIKO_A_TX_7_MBHC_SAR_ERR (0x175)
-#define TAIKO_A_TX_7_MBHC_SAR_ERR__POR (0x00)
-#define TAIKO_A_TX_7_TXFE_CLKDIV (0x176)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_TX_7_TXFE_CLKDIV__POR (0x0B)
-#define TAIKO_A_BUCK_MODE_1 (0x181)
-#define TAIKO_A_BUCK_MODE_1__POR (0x21)
-#define TAIKO_A_BUCK_MODE_2 (0x182)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_MODE_2__POR (0xFF)
-#define TAIKO_A_BUCK_MODE_3 (0x183)
-#define TAIKO_A_BUCK_MODE_3__POR (0xCC)
-#define TAIKO_A_BUCK_MODE_4 (0x184)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_MODE_4__POR (0x3A)
-#define TAIKO_A_BUCK_MODE_5 (0x185)
-#define TAIKO_A_BUCK_MODE_5__POR (0x00)
-#define TAIKO_A_BUCK_CTRL_VCL_1 (0x186)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_CTRL_VCL_1__POR (0x48)
-#define TAIKO_A_BUCK_CTRL_VCL_2 (0x187)
-#define TAIKO_A_BUCK_CTRL_VCL_2__POR (0xA3)
-#define TAIKO_A_BUCK_CTRL_VCL_3 (0x188)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_CTRL_VCL_3__POR (0x82)
-#define TAIKO_A_BUCK_CTRL_CCL_1 (0x189)
-#define TAIKO_A_BUCK_CTRL_CCL_1__POR (0xAB)
-#define TAIKO_A_BUCK_CTRL_CCL_2 (0x18A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_CTRL_CCL_2__POR (0xDC)
-#define TAIKO_A_BUCK_CTRL_CCL_3 (0x18B)
-#define TAIKO_A_BUCK_CTRL_CCL_3__POR (0x6A)
-#define TAIKO_A_BUCK_CTRL_CCL_4 (0x18C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_CTRL_CCL_4__POR (0x58)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_1 (0x18D)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_1__POR (0x50)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_2 (0x18E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_2__POR (0x64)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_3 (0x18F)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_3__POR (0x77)
-#define TAIKO_A_BUCK_TMUX_A_D (0x190)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_BUCK_TMUX_A_D__POR (0x00)
-#define TAIKO_A_NCP_BUCKREF (0x191)
-#define TAIKO_A_NCP_BUCKREF__POR (0x00)
-#define TAIKO_A_NCP_EN (0x192)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_NCP_EN__POR (0xFE)
-#define TAIKO_A_NCP_CLK (0x193)
-#define TAIKO_A_NCP_CLK__POR (0x94)
-#define TAIKO_A_NCP_STATIC (0x194)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_NCP_STATIC__POR (0x28)
-#define TAIKO_A_NCP_VTH_LOW (0x195)
-#define TAIKO_A_NCP_VTH_LOW__POR (0x88)
-#define TAIKO_A_NCP_VTH_HIGH (0x196)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_NCP_VTH_HIGH__POR (0xA0)
-#define TAIKO_A_NCP_ATEST (0x197)
-#define TAIKO_A_NCP_ATEST__POR (0x00)
-#define TAIKO_A_NCP_DTEST (0x198)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_NCP_DTEST__POR (0x00)
-#define TAIKO_A_NCP_DLY1 (0x199)
-#define TAIKO_A_NCP_DLY1__POR (0x06)
-#define TAIKO_A_NCP_DLY2 (0x19A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_NCP_DLY2__POR (0x06)
-#define TAIKO_A_RX_AUX_SW_CTL (0x19B)
-#define TAIKO_A_RX_AUX_SW_CTL__POR (0x00)
-#define TAIKO_A_RX_PA_AUX_IN_CONN (0x19C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_PA_AUX_IN_CONN__POR (0x00)
-#define TAIKO_A_RX_COM_TIMER_DIV (0x19E)
-#define TAIKO_A_RX_COM_TIMER_DIV__POR (0xE8)
-#define TAIKO_A_RX_COM_OCP_CTL (0x19F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_COM_OCP_CTL__POR (0x1F)
-#define TAIKO_A_RX_COM_OCP_COUNT (0x1A0)
-#define TAIKO_A_RX_COM_OCP_COUNT__POR (0x77)
-#define TAIKO_A_RX_COM_DAC_CTL (0x1A1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_COM_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_COM_BIAS (0x1A2)
-#define TAIKO_A_RX_COM_BIAS__POR (0x00)
-#define TAIKO_A_RX_HPH_AUTO_CHOP (0x1A4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_AUTO_CHOP__POR (0x38)
-#define TAIKO_A_RX_HPH_CHOP_CTL (0x1A5)
-#define TAIKO_A_RX_HPH_CHOP_CTL__POR (0xB4)
-#define TAIKO_A_RX_HPH_BIAS_PA (0x1A6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_BIAS_PA__POR (0xAA)
-#define TAIKO_A_RX_HPH_BIAS_LDO (0x1A7)
-#define TAIKO_A_RX_HPH_BIAS_LDO__POR (0x87)
-#define TAIKO_A_RX_HPH_BIAS_CNP (0x1A8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_BIAS_CNP__POR (0x8A)
-#define TAIKO_A_RX_HPH_BIAS_WG_OCP (0x1A9)
-#define TAIKO_A_RX_HPH_BIAS_WG_OCP__POR (0x2A)
-#define TAIKO_A_RX_HPH_OCP_CTL (0x1AA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_OCP_CTL__POR (0x68)
-#define TAIKO_A_RX_HPH_CNP_EN (0x1AB)
-#define TAIKO_A_RX_HPH_CNP_EN__POR (0x80)
-#define TAIKO_A_RX_HPH_CNP_WG_CTL (0x1AC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_CNP_WG_CTL__POR (0xDE)
-#define TAIKO_A_RX_HPH_CNP_WG_TIME (0x1AD)
-#define TAIKO_A_RX_HPH_CNP_WG_TIME__POR (0x2A)
-#define TAIKO_A_RX_HPH_L_GAIN (0x1AE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_L_GAIN__POR (0x00)
-#define TAIKO_A_RX_HPH_L_TEST (0x1AF)
-#define TAIKO_A_RX_HPH_L_TEST__POR (0x00)
-#define TAIKO_A_RX_HPH_L_PA_CTL (0x1B0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_L_PA_CTL__POR (0x40)
-#define TAIKO_A_RX_HPH_L_DAC_CTL (0x1B1)
-#define TAIKO_A_RX_HPH_L_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_HPH_L_ATEST (0x1B2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_L_ATEST__POR (0x00)
-#define TAIKO_A_RX_HPH_L_STATUS (0x1B3)
-#define TAIKO_A_RX_HPH_L_STATUS__POR (0x00)
-#define TAIKO_A_RX_HPH_R_GAIN (0x1B4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_R_GAIN__POR (0x00)
-#define TAIKO_A_RX_HPH_R_TEST (0x1B5)
-#define TAIKO_A_RX_HPH_R_TEST__POR (0x00)
-#define TAIKO_A_RX_HPH_R_PA_CTL (0x1B6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_R_PA_CTL__POR (0x40)
-#define TAIKO_A_RX_HPH_R_DAC_CTL (0x1B7)
-#define TAIKO_A_RX_HPH_R_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_HPH_R_ATEST (0x1B8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_HPH_R_ATEST__POR (0x00)
-#define TAIKO_A_RX_HPH_R_STATUS (0x1B9)
-#define TAIKO_A_RX_HPH_R_STATUS__POR (0x00)
-#define TAIKO_A_RX_EAR_BIAS_PA (0x1BA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_BIAS_PA__POR (0xA6)
-#define TAIKO_A_RX_EAR_BIAS_CMBUFF (0x1BB)
-#define TAIKO_A_RX_EAR_BIAS_CMBUFF__POR (0xA0)
-#define TAIKO_A_RX_EAR_EN (0x1BC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_EN__POR (0x00)
-#define TAIKO_A_RX_EAR_GAIN (0x1BD)
-#define TAIKO_A_RX_EAR_GAIN__POR (0x02)
-#define TAIKO_A_RX_EAR_CMBUFF (0x1BE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_CMBUFF__POR (0x04)
-#define TAIKO_A_RX_EAR_ICTL (0x1BF)
-#define TAIKO_A_RX_EAR_ICTL__POR (0x40)
-#define TAIKO_A_RX_EAR_CCOMP (0x1C0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_CCOMP__POR (0x08)
-#define TAIKO_A_RX_EAR_VCM (0x1C1)
-#define TAIKO_A_RX_EAR_VCM__POR (0x03)
-#define TAIKO_A_RX_EAR_CNP (0x1C2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_CNP__POR (0xF2)
-#define TAIKO_A_RX_EAR_DAC_CTL_ATEST (0x1C3)
-#define TAIKO_A_RX_EAR_DAC_CTL_ATEST__POR (0x00)
-#define TAIKO_A_RX_EAR_STATUS (0x1C5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_EAR_STATUS__POR (0x04)
-#define TAIKO_A_RX_LINE_BIAS_PA (0x1C6)
-#define TAIKO_A_RX_LINE_BIAS_PA__POR (0xA8)
-#define TAIKO_A_RX_BUCK_BIAS1 (0x1C7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_BUCK_BIAS1__POR (0x42)
-#define TAIKO_A_RX_BUCK_BIAS2 (0x1C8)
-#define TAIKO_A_RX_BUCK_BIAS2__POR (0x84)
-#define TAIKO_A_RX_LINE_COM (0x1C9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_COM__POR (0x80)
-#define TAIKO_A_RX_LINE_CNP_EN (0x1CA)
-#define TAIKO_A_RX_LINE_CNP_EN__POR (0x00)
-#define TAIKO_A_RX_LINE_CNP_WG_CTL (0x1CB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_CNP_WG_CTL__POR (0x00)
-#define TAIKO_A_RX_LINE_CNP_WG_TIME (0x1CC)
-#define TAIKO_A_RX_LINE_CNP_WG_TIME__POR (0x04)
-#define TAIKO_A_RX_LINE_1_GAIN (0x1CD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_1_GAIN__POR (0x00)
-#define TAIKO_A_RX_LINE_1_TEST (0x1CE)
-#define TAIKO_A_RX_LINE_1_TEST__POR (0x00)
-#define TAIKO_A_RX_LINE_1_DAC_CTL (0x1CF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_1_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_LINE_1_STATUS (0x1D0)
-#define TAIKO_A_RX_LINE_1_STATUS__POR (0x00)
-#define TAIKO_A_RX_LINE_2_GAIN (0x1D1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_2_GAIN__POR (0x00)
-#define TAIKO_A_RX_LINE_2_TEST (0x1D2)
-#define TAIKO_A_RX_LINE_2_TEST__POR (0x00)
-#define TAIKO_A_RX_LINE_2_DAC_CTL (0x1D3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_2_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_LINE_2_STATUS (0x1D4)
-#define TAIKO_A_RX_LINE_2_STATUS__POR (0x00)
-#define TAIKO_A_RX_LINE_3_GAIN (0x1D5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_3_GAIN__POR (0x00)
-#define TAIKO_A_RX_LINE_3_TEST (0x1D6)
-#define TAIKO_A_RX_LINE_3_TEST__POR (0x00)
-#define TAIKO_A_RX_LINE_3_DAC_CTL (0x1D7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_3_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_LINE_3_STATUS (0x1D8)
-#define TAIKO_A_RX_LINE_3_STATUS__POR (0x00)
-#define TAIKO_A_RX_LINE_4_GAIN (0x1D9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_4_GAIN__POR (0x00)
-#define TAIKO_A_RX_LINE_4_TEST (0x1DA)
-#define TAIKO_A_RX_LINE_4_TEST__POR (0x00)
-#define TAIKO_A_RX_LINE_4_DAC_CTL (0x1DB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_4_DAC_CTL__POR (0x00)
-#define TAIKO_A_RX_LINE_4_STATUS (0x1DC)
-#define TAIKO_A_RX_LINE_4_STATUS__POR (0x00)
-#define TAIKO_A_RX_LINE_CNP_DBG (0x1DD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RX_LINE_CNP_DBG__POR (0x00)
-#define TAIKO_A_SPKR_DRV_EN (0x1DF)
-#define TAIKO_A_SPKR_DRV_EN__POR (0x6F)
-#define TAIKO_A_SPKR_DRV_GAIN (0x1E0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_GAIN__POR (0x00)
-#define TAIKO_A_SPKR_DRV_DAC_CTL (0x1E1)
-#define TAIKO_A_SPKR_DRV_DAC_CTL__POR (0x04)
-#define TAIKO_A_SPKR_DRV_OCP_CTL (0x1E2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_OCP_CTL__POR (0x98)
-#define TAIKO_A_SPKR_DRV_CLIP_DET (0x1E3)
-#define TAIKO_A_SPKR_DRV_CLIP_DET__POR (0x48)
-#define TAIKO_A_SPKR_DRV_IEC (0x1E4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_IEC__POR (0x20)
-#define TAIKO_A_SPKR_DRV_DBG_DAC (0x1E5)
-#define TAIKO_A_SPKR_DRV_DBG_DAC__POR (0x05)
-#define TAIKO_A_SPKR_DRV_DBG_PA (0x1E6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_DBG_PA__POR (0x18)
-#define TAIKO_A_SPKR_DRV_DBG_PWRSTG (0x1E7)
-#define TAIKO_A_SPKR_DRV_DBG_PWRSTG__POR (0x00)
-#define TAIKO_A_SPKR_DRV_BIAS_LDO (0x1E8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_BIAS_LDO__POR (0x45)
-#define TAIKO_A_SPKR_DRV_BIAS_INT (0x1E9)
-#define TAIKO_A_SPKR_DRV_BIAS_INT__POR (0xA5)
-#define TAIKO_A_SPKR_DRV_BIAS_PA (0x1EA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_BIAS_PA__POR (0x55)
-#define TAIKO_A_SPKR_DRV_STATUS_OCP (0x1EB)
-#define TAIKO_A_SPKR_DRV_STATUS_OCP__POR (0x00)
-#define TAIKO_A_SPKR_DRV_STATUS_PA (0x1EC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_DRV_STATUS_PA__POR (0x00)
-#define TAIKO_A_SPKR_PROT_EN (0x1ED)
-#define TAIKO_A_SPKR_PROT_EN__POR (0x00)
-#define TAIKO_A_SPKR_PROT_ADC_EN (0x1EE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_ADC_EN__POR (0x44)
-#define TAIKO_A_SPKR_PROT_ISENSE_BIAS (0x1EF)
-#define TAIKO_A_SPKR_PROT_ISENSE_BIAS__POR (0x44)
-#define TAIKO_A_SPKR_PROT_VSENSE_BIAS (0x1F0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_VSENSE_BIAS__POR (0x44)
-#define TAIKO_A_SPKR_PROT_ADC_ATEST_REFCTRL (0x1F1)
-#define TAIKO_A_SPKR_PROT_ADC_ATEST_REFCTRL__POR (0x00)
-#define TAIKO_A_SPKR_PROT_ADC_TEST_CTL (0x1F2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_ADC_TEST_CTL__POR (0x38)
-#define TAIKO_A_SPKR_PROT_TEST_BLOCK_EN (0x1F3)
-#define TAIKO_A_SPKR_PROT_TEST_BLOCK_EN__POR (0xFC)
-#define TAIKO_A_SPKR_PROT_ATEST (0x1F4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_ATEST__POR (0x00)
-#define TAIKO_A_SPKR_PROT_V_SAR_ERR (0x1F5)
-#define TAIKO_A_SPKR_PROT_V_SAR_ERR__POR (0x00)
-#define TAIKO_A_SPKR_PROT_I_SAR_ERR (0x1F6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_I_SAR_ERR__POR (0x00)
-#define TAIKO_A_SPKR_PROT_LDO_CTRL (0x1F7)
-#define TAIKO_A_SPKR_PROT_LDO_CTRL__POR (0x00)
-#define TAIKO_A_SPKR_PROT_ISENSE_CTRL (0x1F8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_SPKR_PROT_ISENSE_CTRL__POR (0x00)
-#define TAIKO_A_SPKR_PROT_VSENSE_CTRL (0x1F9)
-#define TAIKO_A_SPKR_PROT_VSENSE_CTRL__POR (0x00)
-#define TAIKO_A_RC_OSC_FREQ (0x1FA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RC_OSC_FREQ__POR (0x46)
-#define TAIKO_A_RC_OSC_TEST (0x1FB)
-#define TAIKO_A_RC_OSC_TEST__POR (0x0A)
-#define TAIKO_A_RC_OSC_STATUS (0x1FC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_RC_OSC_STATUS__POR (0x18)
-#define TAIKO_A_RC_OSC_TUNER (0x1FD)
-#define TAIKO_A_RC_OSC_TUNER__POR (0x00)
-#define TAIKO_A_MBHC_HPH (0x1FE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_MBHC_HPH__POR (0x44)
-#define TAIKO_A_CDC_ANC1_B1_CTL (0x200)
-#define TAIKO_A_CDC_ANC1_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_B1_CTL (0x280)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_SHIFT (0x201)
-#define TAIKO_A_CDC_ANC1_SHIFT__POR (0x00)
-#define TAIKO_A_CDC_ANC2_SHIFT (0x281)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_SHIFT__POR (0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B1_CTL (0x202)
-#define TAIKO_A_CDC_ANC1_IIR_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B1_CTL (0x282)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_IIR_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B2_CTL (0x203)
-#define TAIKO_A_CDC_ANC1_IIR_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B2_CTL (0x283)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_IIR_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B3_CTL (0x204)
-#define TAIKO_A_CDC_ANC1_IIR_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B3_CTL (0x284)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_IIR_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_LPF_B1_CTL (0x206)
-#define TAIKO_A_CDC_ANC1_LPF_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_LPF_B1_CTL (0x286)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_LPF_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_LPF_B2_CTL (0x207)
-#define TAIKO_A_CDC_ANC1_LPF_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_LPF_B2_CTL (0x287)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_LPF_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_SPARE (0x209)
-#define TAIKO_A_CDC_ANC1_SPARE__POR (0x00)
-#define TAIKO_A_CDC_ANC2_SPARE (0x289)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_SPARE__POR (0x00)
-#define TAIKO_A_CDC_ANC1_SMLPF_CTL (0x20A)
-#define TAIKO_A_CDC_ANC1_SMLPF_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_SMLPF_CTL (0x28A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_SMLPF_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_DCFLT_CTL (0x20B)
-#define TAIKO_A_CDC_ANC1_DCFLT_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_DCFLT_CTL (0x28B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_DCFLT_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_GAIN_CTL (0x20C)
-#define TAIKO_A_CDC_ANC1_GAIN_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_GAIN_CTL (0x28C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_GAIN_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC1_B2_CTL (0x20D)
-#define TAIKO_A_CDC_ANC1_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_ANC2_B2_CTL (0x28D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_ANC2_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_TIMER (0x220)
-#define TAIKO_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_TIMER (0x228)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_TIMER (0x230)
-#define TAIKO_A_CDC_TX3_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_TIMER (0x238)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_TIMER (0x240)
-#define TAIKO_A_CDC_TX5_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_TIMER (0x248)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_TIMER (0x250)
-#define TAIKO_A_CDC_TX7_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_TIMER (0x258)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_TIMER (0x260)
-#define TAIKO_A_CDC_TX9_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_TIMER (0x268)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_VOL_CTL_TIMER__POR (0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_GAIN (0x221)
-#define TAIKO_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_GAIN (0x229)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_GAIN (0x231)
-#define TAIKO_A_CDC_TX3_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_GAIN (0x239)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_GAIN (0x241)
-#define TAIKO_A_CDC_TX5_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_GAIN (0x249)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_GAIN (0x251)
-#define TAIKO_A_CDC_TX7_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_GAIN (0x259)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_GAIN (0x261)
-#define TAIKO_A_CDC_TX9_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_GAIN (0x269)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_VOL_CTL_GAIN__POR (0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_CFG (0x222)
-#define TAIKO_A_CDC_TX1_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_CFG (0x22A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_CFG (0x232)
-#define TAIKO_A_CDC_TX3_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_CFG (0x23A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_CFG (0x242)
-#define TAIKO_A_CDC_TX5_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_CFG (0x24A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_CFG (0x252)
-#define TAIKO_A_CDC_TX7_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_CFG (0x25A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_CFG (0x262)
-#define TAIKO_A_CDC_TX9_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_CFG (0x26A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_VOL_CTL_CFG__POR (0x00)
-#define TAIKO_A_CDC_TX1_MUX_CTL (0x223)
-#define TAIKO_A_CDC_TX1_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX2_MUX_CTL (0x22B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX3_MUX_CTL (0x233)
-#define TAIKO_A_CDC_TX3_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX4_MUX_CTL (0x23B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX5_MUX_CTL (0x243)
-#define TAIKO_A_CDC_TX5_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX6_MUX_CTL (0x24B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX7_MUX_CTL (0x253)
-#define TAIKO_A_CDC_TX7_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX8_MUX_CTL (0x25B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX9_MUX_CTL (0x263)
-#define TAIKO_A_CDC_TX9_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX10_MUX_CTL (0x26B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_MUX_CTL__POR (0x08)
-#define TAIKO_A_CDC_TX1_CLK_FS_CTL (0x224)
-#define TAIKO_A_CDC_TX1_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX2_CLK_FS_CTL (0x22C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX3_CLK_FS_CTL (0x234)
-#define TAIKO_A_CDC_TX3_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX4_CLK_FS_CTL (0x23C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX5_CLK_FS_CTL (0x244)
-#define TAIKO_A_CDC_TX5_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX6_CLK_FS_CTL (0x24C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX7_CLK_FS_CTL (0x254)
-#define TAIKO_A_CDC_TX7_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX8_CLK_FS_CTL (0x25C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX9_CLK_FS_CTL (0x264)
-#define TAIKO_A_CDC_TX9_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX10_CLK_FS_CTL (0x26C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_CLK_FS_CTL__POR (0x03)
-#define TAIKO_A_CDC_TX1_DMIC_CTL (0x225)
-#define TAIKO_A_CDC_TX1_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX2_DMIC_CTL (0x22D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX2_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX3_DMIC_CTL (0x235)
-#define TAIKO_A_CDC_TX3_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX4_DMIC_CTL (0x23D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX4_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX5_DMIC_CTL (0x245)
-#define TAIKO_A_CDC_TX5_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX6_DMIC_CTL (0x24D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX6_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX7_DMIC_CTL (0x255)
-#define TAIKO_A_CDC_TX7_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX8_DMIC_CTL (0x25D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX8_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX9_DMIC_CTL (0x265)
-#define TAIKO_A_CDC_TX9_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_TX10_DMIC_CTL (0x26D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX10_DMIC_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B1_CTL (0x278)
-#define TAIKO_A_CDC_DEBUG_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B2_CTL (0x279)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DEBUG_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B3_CTL (0x27A)
-#define TAIKO_A_CDC_DEBUG_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B4_CTL (0x27B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DEBUG_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B5_CTL (0x27C)
-#define TAIKO_A_CDC_DEBUG_B5_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B6_CTL (0x27D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_DEBUG_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_DEBUG_B7_CTL (0x27E)
-#define TAIKO_A_CDC_DEBUG_B7_CTL__POR (0x00)
-#define TAIKO_A_CDC_SRC1_PDA_CFG (0x2A0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SRC1_PDA_CFG__POR (0x00)
-#define TAIKO_A_CDC_SRC2_PDA_CFG (0x2A8)
-#define TAIKO_A_CDC_SRC2_PDA_CFG__POR (0x00)
-#define TAIKO_A_CDC_SRC1_FS_CTL (0x2A1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SRC1_FS_CTL__POR (0x1B)
-#define TAIKO_A_CDC_SRC2_FS_CTL (0x2A9)
-#define TAIKO_A_CDC_SRC2_FS_CTL__POR (0x1B)
-#define TAIKO_A_CDC_RX1_B1_CTL (0x2B0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX1_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_B1_CTL (0x2B8)
-#define TAIKO_A_CDC_RX2_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_B1_CTL (0x2C0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX3_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_B1_CTL (0x2C8)
-#define TAIKO_A_CDC_RX4_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_B1_CTL (0x2D0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX5_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_B1_CTL (0x2D8)
-#define TAIKO_A_CDC_RX6_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_B1_CTL (0x2E0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX7_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX1_B2_CTL (0x2B1)
-#define TAIKO_A_CDC_RX1_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_B2_CTL (0x2B9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX2_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_B2_CTL (0x2C1)
-#define TAIKO_A_CDC_RX3_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_B2_CTL (0x2C9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX4_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_B2_CTL (0x2D1)
-#define TAIKO_A_CDC_RX5_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_B2_CTL (0x2D9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX6_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_B2_CTL (0x2E1)
-#define TAIKO_A_CDC_RX7_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX1_B3_CTL (0x2B2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX1_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_B3_CTL (0x2BA)
-#define TAIKO_A_CDC_RX2_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_B3_CTL (0x2C2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX3_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_B3_CTL (0x2CA)
-#define TAIKO_A_CDC_RX4_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_B3_CTL (0x2D2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX5_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_B3_CTL (0x2DA)
-#define TAIKO_A_CDC_RX6_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_B3_CTL (0x2E2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX7_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX1_B4_CTL (0x2B3)
-#define TAIKO_A_CDC_RX1_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_B4_CTL (0x2BB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX2_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_B4_CTL (0x2C3)
-#define TAIKO_A_CDC_RX3_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_B4_CTL (0x2CB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX4_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_B4_CTL (0x2D3)
-#define TAIKO_A_CDC_RX5_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_B4_CTL (0x2DB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX6_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_B4_CTL (0x2E3)
-#define TAIKO_A_CDC_RX7_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX1_B5_CTL (0x2B4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX1_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX2_B5_CTL (0x2BC)
-#define TAIKO_A_CDC_RX2_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX3_B5_CTL (0x2C4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX3_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX4_B5_CTL (0x2CC)
-#define TAIKO_A_CDC_RX4_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX5_B5_CTL (0x2D4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX5_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX6_B5_CTL (0x2DC)
-#define TAIKO_A_CDC_RX6_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX7_B5_CTL (0x2E4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX7_B5_CTL__POR (0x78)
-#define TAIKO_A_CDC_RX1_B6_CTL (0x2B5)
-#define TAIKO_A_CDC_RX1_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX2_B6_CTL (0x2BD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX2_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX3_B6_CTL (0x2C5)
-#define TAIKO_A_CDC_RX3_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX4_B6_CTL (0x2CD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX4_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX5_B6_CTL (0x2D5)
-#define TAIKO_A_CDC_RX5_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX6_B6_CTL (0x2DD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX6_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX7_B6_CTL (0x2E5)
-#define TAIKO_A_CDC_RX7_B6_CTL__POR (0x80)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL (0x2B6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B1_CTL (0x2BE)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B1_CTL (0x2C6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX3_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B1_CTL (0x2CE)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B1_CTL (0x2D6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX5_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B1_CTL (0x2DE)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B1_CTL (0x2E6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX7_VOL_CTL_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B2_CTL (0x2B7)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B2_CTL (0x2BF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX2_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B2_CTL (0x2C7)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B2_CTL (0x2CF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX4_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B2_CTL (0x2D7)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B2_CTL (0x2DF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_RX6_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B2_CTL (0x2E7)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_VBAT_CFG (0x2E8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_CFG__POR (0x1A)
-#define TAIKO_A_CDC_VBAT_ADC_CAL1 (0x2E9)
-#define TAIKO_A_CDC_VBAT_ADC_CAL1__POR (0x00)
-#define TAIKO_A_CDC_VBAT_ADC_CAL2 (0x2EA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_ADC_CAL2__POR (0x00)
-#define TAIKO_A_CDC_VBAT_ADC_CAL3 (0x2EB)
-#define TAIKO_A_CDC_VBAT_ADC_CAL3__POR (0x04)
-#define TAIKO_A_CDC_VBAT_PK_EST1 (0x2EC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_PK_EST1__POR (0xE0)
-#define TAIKO_A_CDC_VBAT_PK_EST2 (0x2ED)
-#define TAIKO_A_CDC_VBAT_PK_EST2__POR (0x01)
-#define TAIKO_A_CDC_VBAT_PK_EST3 (0x2EE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_PK_EST3__POR (0x40)
-#define TAIKO_A_CDC_VBAT_RF_PROC1 (0x2EF)
-#define TAIKO_A_CDC_VBAT_RF_PROC1__POR (0x2A)
-#define TAIKO_A_CDC_VBAT_RF_PROC2 (0x2F0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_RF_PROC2__POR (0x86)
-#define TAIKO_A_CDC_VBAT_TAC1 (0x2F1)
-#define TAIKO_A_CDC_VBAT_TAC1__POR (0x70)
-#define TAIKO_A_CDC_VBAT_TAC2 (0x2F2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_TAC2__POR (0x18)
-#define TAIKO_A_CDC_VBAT_TAC3 (0x2F3)
-#define TAIKO_A_CDC_VBAT_TAC3__POR (0x18)
-#define TAIKO_A_CDC_VBAT_TAC4 (0x2F4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_TAC4__POR (0x03)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD1 (0x2F5)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD1__POR (0x01)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD2 (0x2F6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_GAIN_UPD2__POR (0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD3 (0x2F7)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD3__POR (0x64)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD4 (0x2F8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_GAIN_UPD4__POR (0x01)
-#define TAIKO_A_CDC_VBAT_DEBUG1 (0x2F9)
-#define TAIKO_A_CDC_VBAT_DEBUG1__POR (0x00)
-#define TAIKO_A_CDC_CLK_ANC_RESET_CTL (0x300)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_ANC_RESET_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_RX_RESET_CTL (0x301)
-#define TAIKO_A_CDC_CLK_RX_RESET_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_TX_RESET_B1_CTL (0x302)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_TX_RESET_B2_CTL (0x303)
-#define TAIKO_A_CDC_CLK_TX_RESET_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_DMIC_B1_CTL (0x304)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_DMIC_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_DMIC_B2_CTL (0x305)
-#define TAIKO_A_CDC_CLK_DMIC_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_RX_I2S_CTL (0x306)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_RX_I2S_CTL__POR (0x03)
-#define TAIKO_A_CDC_CLK_TX_I2S_CTL (0x307)
-#define TAIKO_A_CDC_CLK_TX_I2S_CTL__POR (0x03)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B1_CTL (0x308)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B2_CTL (0x309)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x30A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B2_CTL (0x30B)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_OTHR_CTL (0x30C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_OTHR_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL (0x30D)
-#define TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_ANC_CLK_EN_CTL (0x30E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_ANC_CLK_EN_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_RX_B1_CTL (0x30F)
-#define TAIKO_A_CDC_CLK_RX_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_RX_B2_CTL (0x310)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_RX_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_MCLK_CTL (0x311)
-#define TAIKO_A_CDC_CLK_MCLK_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_PDM_CTL (0x312)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_PDM_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_SD_CTL (0x313)
-#define TAIKO_A_CDC_CLK_SD_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLK_POWER_CTL (0x314)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLK_POWER_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLSH_B1_CTL (0x320)
-#define TAIKO_A_CDC_CLSH_B1_CTL__POR (0xE4)
-#define TAIKO_A_CDC_CLSH_B2_CTL (0x321)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLSH_B3_CTL (0x322)
-#define TAIKO_A_CDC_CLSH_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CLSH_BUCK_NCP_VARS (0x323)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_BUCK_NCP_VARS__POR (0x00)
-#define TAIKO_A_CDC_CLSH_IDLE_HPH_THSD (0x324)
-#define TAIKO_A_CDC_CLSH_IDLE_HPH_THSD__POR (0x12)
-#define TAIKO_A_CDC_CLSH_IDLE_EAR_THSD (0x325)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_IDLE_EAR_THSD__POR (0x0C)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_HPH_THSD (0x326)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR (0x18)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_EAR_THSD (0x327)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR (0x23)
-#define TAIKO_A_CDC_CLSH_K_ADDR (0x328)
-#define TAIKO_A_CDC_CLSH_K_ADDR__POR (0x00)
-#define TAIKO_A_CDC_CLSH_K_DATA (0x329)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_K_DATA__POR (0xA4)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_L (0x32A)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_L__POR (0xD7)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_U (0x32B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_U__POR (0x05)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_L (0x32C)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_L__POR (0x60)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_U (0x32D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_U__POR (0x09)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_EAR (0x32E)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_EAR__POR (0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_HPH (0x32F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_V_PA_HD_HPH__POR (0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_EAR (0x330)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_EAR__POR (0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_HPH (0x331)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_HPH__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B1_CTL (0x340)
-#define TAIKO_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B1_CTL (0x350)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B2_CTL (0x341)
-#define TAIKO_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B2_CTL (0x351)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B3_CTL (0x342)
-#define TAIKO_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B3_CTL (0x352)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B4_CTL (0x343)
-#define TAIKO_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B4_CTL (0x353)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B5_CTL (0x344)
-#define TAIKO_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B5_CTL (0x354)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B5_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B6_CTL (0x345)
-#define TAIKO_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B6_CTL (0x355)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B7_CTL (0x346)
-#define TAIKO_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B7_CTL (0x356)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B7_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B8_CTL (0x347)
-#define TAIKO_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL (0x357)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_CTL (0x348)
-#define TAIKO_A_CDC_IIR1_CTL__POR (0x40)
-#define TAIKO_A_CDC_IIR2_CTL (0x358)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_CTL__POR (0x40)
-#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL (0x349)
-#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_TIMER_CTL (0x359)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_GAIN_TIMER_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_COEF_B1_CTL (0x34A)
-#define TAIKO_A_CDC_IIR1_COEF_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_COEF_B1_CTL (0x35A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_COEF_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR1_COEF_B2_CTL (0x34B)
-#define TAIKO_A_CDC_IIR1_COEF_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_IIR2_COEF_B2_CTL (0x35B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_IIR2_COEF_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_TOP_GAIN_UPDATE (0x360)
-#define TAIKO_A_CDC_TOP_GAIN_UPDATE__POR (0x00)
-#define TAIKO_A_CDC_COMP0_B1_CTL (0x368)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP0_B1_CTL__POR (0x30)
-#define TAIKO_A_CDC_COMP1_B1_CTL (0x370)
-#define TAIKO_A_CDC_COMP1_B1_CTL__POR (0x30)
-#define TAIKO_A_CDC_COMP2_B1_CTL (0x378)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP2_B1_CTL__POR (0x30)
-#define TAIKO_A_CDC_COMP0_B2_CTL (0x369)
-#define TAIKO_A_CDC_COMP0_B2_CTL__POR (0xB5)
-#define TAIKO_A_CDC_COMP1_B2_CTL (0x371)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP1_B2_CTL__POR (0xB5)
-#define TAIKO_A_CDC_COMP2_B2_CTL (0x379)
-#define TAIKO_A_CDC_COMP2_B2_CTL__POR (0xB5)
-#define TAIKO_A_CDC_COMP0_B3_CTL (0x36A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP0_B3_CTL__POR (0x28)
-#define TAIKO_A_CDC_COMP1_B3_CTL (0x372)
-#define TAIKO_A_CDC_COMP1_B3_CTL__POR (0x28)
-#define TAIKO_A_CDC_COMP2_B3_CTL (0x37A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP2_B3_CTL__POR (0x28)
-#define TAIKO_A_CDC_COMP0_B4_CTL (0x36B)
-#define TAIKO_A_CDC_COMP0_B4_CTL__POR (0x3C)
-#define TAIKO_A_CDC_COMP1_B4_CTL (0x373)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP1_B4_CTL__POR (0x3C)
-#define TAIKO_A_CDC_COMP2_B4_CTL (0x37B)
-#define TAIKO_A_CDC_COMP2_B4_CTL__POR (0x3C)
-#define TAIKO_A_CDC_COMP0_B5_CTL (0x36C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP0_B5_CTL__POR (0x1F)
-#define TAIKO_A_CDC_COMP1_B5_CTL (0x374)
-#define TAIKO_A_CDC_COMP1_B5_CTL__POR (0x1F)
-#define TAIKO_A_CDC_COMP2_B5_CTL (0x37C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP2_B5_CTL__POR (0x1F)
-#define TAIKO_A_CDC_COMP0_B6_CTL (0x36D)
-#define TAIKO_A_CDC_COMP0_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_COMP1_B6_CTL (0x375)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP1_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_COMP2_B6_CTL (0x37D)
-#define TAIKO_A_CDC_COMP2_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS (0x36E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS__POR (0x03)
-#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS (0x376)
-#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x03)
-#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS (0x37E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS__POR (0x03)
-#define TAIKO_A_CDC_COMP0_FS_CFG (0x36F)
-#define TAIKO_A_CDC_COMP0_FS_CFG__POR (0x03)
-#define TAIKO_A_CDC_COMP1_FS_CFG (0x377)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_COMP1_FS_CFG__POR (0x03)
-#define TAIKO_A_CDC_COMP2_FS_CFG (0x37F)
-#define TAIKO_A_CDC_COMP2_FS_CFG__POR (0x03)
-#define TAIKO_A_CDC_CONN_RX1_B1_CTL (0x380)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX1_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX1_B2_CTL (0x381)
-#define TAIKO_A_CDC_CONN_RX1_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX1_B3_CTL (0x382)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX1_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX2_B1_CTL (0x383)
-#define TAIKO_A_CDC_CONN_RX2_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX2_B2_CTL (0x384)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX2_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX2_B3_CTL (0x385)
-#define TAIKO_A_CDC_CONN_RX2_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX3_B1_CTL (0x386)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX3_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX3_B2_CTL (0x387)
-#define TAIKO_A_CDC_CONN_RX3_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX4_B1_CTL (0x388)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX4_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX4_B2_CTL (0x389)
-#define TAIKO_A_CDC_CONN_RX4_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX5_B1_CTL (0x38A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX5_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX5_B2_CTL (0x38B)
-#define TAIKO_A_CDC_CONN_RX5_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX6_B1_CTL (0x38C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX6_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX6_B2_CTL (0x38D)
-#define TAIKO_A_CDC_CONN_RX6_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX7_B1_CTL (0x38E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX7_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX7_B2_CTL (0x38F)
-#define TAIKO_A_CDC_CONN_RX7_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX7_B3_CTL (0x390)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX7_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_ANC_B1_CTL (0x391)
-#define TAIKO_A_CDC_CONN_ANC_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_ANC_B2_CTL (0x392)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_ANC_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_B1_CTL (0x393)
-#define TAIKO_A_CDC_CONN_TX_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_B2_CTL (0x394)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_B3_CTL (0x395)
-#define TAIKO_A_CDC_CONN_TX_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_B4_CTL (0x396)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B1_CTL (0x397)
-#define TAIKO_A_CDC_CONN_EQ1_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B2_CTL (0x398)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_EQ1_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B3_CTL (0x399)
-#define TAIKO_A_CDC_CONN_EQ1_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B4_CTL (0x39A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_EQ1_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B1_CTL (0x39B)
-#define TAIKO_A_CDC_CONN_EQ2_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B2_CTL (0x39C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_EQ2_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B3_CTL (0x39D)
-#define TAIKO_A_CDC_CONN_EQ2_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B4_CTL (0x39E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_EQ2_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_SRC1_B1_CTL (0x39F)
-#define TAIKO_A_CDC_CONN_SRC1_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_SRC1_B2_CTL (0x3A0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_SRC1_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_SRC2_B1_CTL (0x3A1)
-#define TAIKO_A_CDC_CONN_SRC2_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_SRC2_B2_CTL (0x3A2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_SRC2_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B1_CTL (0x3A3)
-#define TAIKO_A_CDC_CONN_TX_SB_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B2_CTL (0x3A4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_SB_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B3_CTL (0x3A5)
-#define TAIKO_A_CDC_CONN_TX_SB_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B4_CTL (0x3A6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_SB_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B5_CTL (0x3A7)
-#define TAIKO_A_CDC_CONN_TX_SB_B5_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B6_CTL (0x3A8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_SB_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B7_CTL (0x3A9)
-#define TAIKO_A_CDC_CONN_TX_SB_B7_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B8_CTL (0x3AA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_SB_B8_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B9_CTL (0x3AB)
-#define TAIKO_A_CDC_CONN_TX_SB_B9_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B10_CTL (0x3AC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_TX_SB_B10_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B11_CTL (0x3AD)
-#define TAIKO_A_CDC_CONN_TX_SB_B11_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX_SB_B1_CTL (0x3AE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_RX_SB_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_RX_SB_B2_CTL (0x3AF)
-#define TAIKO_A_CDC_CONN_RX_SB_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_CLSH_CTL (0x3B0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_CLSH_CTL__POR (0x00)
-#define TAIKO_A_CDC_CONN_MISC (0x3B1)
-#define TAIKO_A_CDC_CONN_MISC__POR (0x01)
-#define TAIKO_A_CDC_CONN_MAD (0x3B2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_CONN_MAD__POR (0x01)
-#define TAIKO_A_CDC_MBHC_EN_CTL (0x3C0)
-#define TAIKO_A_CDC_MBHC_EN_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_FIR_B1_CFG (0x3C1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_FIR_B1_CFG__POR (0x00)
-#define TAIKO_A_CDC_MBHC_FIR_B2_CFG (0x3C2)
-#define TAIKO_A_CDC_MBHC_FIR_B2_CFG__POR (0x06)
-#define TAIKO_A_CDC_MBHC_TIMER_B1_CTL (0x3C3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_TIMER_B1_CTL__POR (0x03)
-#define TAIKO_A_CDC_MBHC_TIMER_B2_CTL (0x3C4)
-#define TAIKO_A_CDC_MBHC_TIMER_B2_CTL__POR (0x09)
-#define TAIKO_A_CDC_MBHC_TIMER_B3_CTL (0x3C5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_TIMER_B3_CTL__POR (0x1E)
-#define TAIKO_A_CDC_MBHC_TIMER_B4_CTL (0x3C6)
-#define TAIKO_A_CDC_MBHC_TIMER_B4_CTL__POR (0x45)
-#define TAIKO_A_CDC_MBHC_TIMER_B5_CTL (0x3C7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_TIMER_B5_CTL__POR (0x04)
-#define TAIKO_A_CDC_MBHC_TIMER_B6_CTL (0x3C8)
-#define TAIKO_A_CDC_MBHC_TIMER_B6_CTL__POR (0x78)
-#define TAIKO_A_CDC_MBHC_B1_STATUS (0x3C9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_B1_STATUS__POR (0x00)
-#define TAIKO_A_CDC_MBHC_B2_STATUS (0x3CA)
-#define TAIKO_A_CDC_MBHC_B2_STATUS__POR (0x00)
-#define TAIKO_A_CDC_MBHC_B3_STATUS (0x3CB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_B3_STATUS__POR (0x00)
-#define TAIKO_A_CDC_MBHC_B4_STATUS (0x3CC)
-#define TAIKO_A_CDC_MBHC_B4_STATUS__POR (0x00)
-#define TAIKO_A_CDC_MBHC_B5_STATUS (0x3CD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_B5_STATUS__POR (0x00)
-#define TAIKO_A_CDC_MBHC_B1_CTL (0x3CE)
-#define TAIKO_A_CDC_MBHC_B1_CTL__POR (0xC0)
-#define TAIKO_A_CDC_MBHC_B2_CTL (0x3CF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_B2_CTL__POR (0x5D)
-#define TAIKO_A_CDC_MBHC_VOLT_B1_CTL (0x3D0)
-#define TAIKO_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B2_CTL (0x3D1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B3_CTL (0x3D2)
-#define TAIKO_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B4_CTL (0x3D3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B5_CTL (0x3D4)
-#define TAIKO_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B6_CTL (0x3D5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B7_CTL (0x3D6)
-#define TAIKO_A_CDC_MBHC_VOLT_B7_CTL__POR (0xFF)
-#define TAIKO_A_CDC_MBHC_VOLT_B8_CTL (0x3D7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B8_CTL__POR (0x07)
-#define TAIKO_A_CDC_MBHC_VOLT_B9_CTL (0x3D8)
-#define TAIKO_A_CDC_MBHC_VOLT_B9_CTL__POR (0xFF)
-#define TAIKO_A_CDC_MBHC_VOLT_B10_CTL (0x3D9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B10_CTL__POR (0x7F)
-#define TAIKO_A_CDC_MBHC_VOLT_B11_CTL (0x3DA)
-#define TAIKO_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B12_CTL (0x3DB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_VOLT_B12_CTL__POR (0x80)
-#define TAIKO_A_CDC_MBHC_CLK_CTL (0x3DC)
-#define TAIKO_A_CDC_MBHC_CLK_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_INT_CTL (0x3DD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_INT_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_DEBUG_CTL (0x3DE)
-#define TAIKO_A_CDC_MBHC_DEBUG_CTL__POR (0x00)
-#define TAIKO_A_CDC_MBHC_SPARE (0x3DF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MBHC_SPARE__POR (0x00)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_1 (0x3E0)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_1__POR (0x00)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_2 (0x3E1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_MAIN_CTL_2__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_1 (0x3E2)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_1__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_2 (0x3E3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_2__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_3 (0x3E4)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_3__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_4 (0x3E5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_4__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_5 (0x3E6)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_5__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_6 (0x3E7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_6__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_7 (0x3E8)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_7__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_8 (0x3E9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_8__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_PTR (0x3EA)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_PTR__POR (0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_VAL (0x3EB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_VAL__POR (0x40)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_1 (0x3EC)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_1__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_2 (0x3ED)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_ULTR_CTL_2__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_3 (0x3EE)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_3__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_4 (0x3EF)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_ULTR_CTL_4__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_5 (0x3F0)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_5__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_6 (0x3F1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_ULTR_CTL_6__POR (0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_7 (0x3F2)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_7__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_1 (0x3F3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_BEACON_CTL_1__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_2 (0x3F4)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_2__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_3 (0x3F5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_BEACON_CTL_3__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_4 (0x3F6)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_4__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_5 (0x3F7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_BEACON_CTL_5__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_6 (0x3F8)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_6__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_7 (0x3F9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_BEACON_CTL_7__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_8 (0x3FA)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_8__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_PTR (0x3FB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_PTR__POR (0x00)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_VAL (0x3FC)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_VAL__POR (0x00)
-#define TAIKO_A_CDC_TX_1_GAIN (0x153)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_1_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_2_GAIN (0x155)
-#define TAIKO_A_CDC_TX_2_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_1_2_ADC_IB (0x156)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_1_2_ADC_IB__POR (0x44)
-#define TAIKO_A_CDC_TX_3_GAIN (0x15D)
-#define TAIKO_A_CDC_TX_3_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_4_GAIN (0x15F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_4_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_3_4_ADC_IB (0x160)
-#define TAIKO_A_CDC_TX_3_4_ADC_IB__POR (0x44)
-#define TAIKO_A_CDC_TX_5_GAIN (0x167)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_5_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_6_GAIN (0x169)
-#define TAIKO_A_CDC_TX_6_GAIN__POR (0x02)
-#define TAIKO_A_CDC_TX_5_6_ADC_IB (0x16A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_TX_5_6_ADC_IB__POR (0x44)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL0 (0x270)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL0__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL1 (0x271)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL1__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL2 (0x272)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL2__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL3 (0x273)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL3__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL4 (0x274)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL4__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL5 (0x275)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL5__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL6 (0x276)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL6__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL7 (0x277)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL7__POR (0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD_MON (0x2FA)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD_MON__POR (0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_MON_VAL (0x2FB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_VBAT_GAIN_MON_VAL__POR (0x00)
-#define TAIKO_A_CDC_PA_RAMP_B1_CTL (0x361)
-#define TAIKO_A_CDC_PA_RAMP_B1_CTL__POR (0x00)
-#define TAIKO_A_CDC_PA_RAMP_B2_CTL (0x362)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_PA_RAMP_B2_CTL__POR (0x00)
-#define TAIKO_A_CDC_PA_RAMP_B3_CTL (0x363)
-#define TAIKO_A_CDC_PA_RAMP_B3_CTL__POR (0x00)
-#define TAIKO_A_CDC_PA_RAMP_B4_CTL (0x364)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_A_CDC_PA_RAMP_B4_CTL__POR (0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_B1_CTL (0x365)
-#define TAIKO_A_CDC_SPKR_CLIPDET_B1_CTL__POR (0x00)
-#define TAIKO_SLIM_PGD_PORT_INT_EN0 (0x30)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_RX_0 (0x34)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_RX_1 (0x35)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_TX_0 (0x36)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_TX_1 (0x37)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_RX_0 (0x38)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_RX_1 (0x39)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_TX_0 (0x3A)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_TX_1 (0x3B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_SLIM_PGD_PORT_INT_RX_SOURCE0 (0x60)
-#define TAIKO_SLIM_PGD_PORT_INT_TX_SOURCE0 (0x70)
-#define TAIKO_PACKED_REG_SIZE sizeof(u32)
-#define TAIKO_CODEC_PACK_ENTRY(reg,mask,val) ((val & 0xff) | ((mask & 0xff) << 8) | ((reg & 0xffff) << 16))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define TAIKO_CODEC_UNPACK_ENTRY(packed,reg,mask,val) do { ((reg) = ((packed >> 16) & (0xffff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while(0);
-#endif
-

diff --git a/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
deleted file mode 100644
index fd5c944..0000000
--- a/k318/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
+++ /dev/null

@@ -1,434 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef WCD9XXX_CODEC_DIGITAL_H
-#define WCD9XXX_CODEC_DIGITAL_H
-#define WCD9XXX_A_CHIP_CTL (0x00)
-#define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CHIP_STATUS (0x01)
-#define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_0 (0x04)
-#define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CHIP_ID_BYTE_1 (0x05)
-#define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_2 (0x06)
-#define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CHIP_ID_BYTE_3 (0x07)
-#define WCD9XXX_A_CHIP_ID_BYTE_3__POR (0x00000001)
-#define WCD9XXX_A_CHIP_VERSION (0x08)
-#define WCD9XXX_A_CHIP_VERSION__POR (0x00000020)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_SB_VERSION (0x09)
-#define WCD9XXX_A_SB_VERSION__POR (0x00000010)
-#define WCD9XXX_A_SLAVE_ID_1 (0x0C)
-#define WCD9XXX_A_SLAVE_ID_1__POR (0x00000077)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_SLAVE_ID_2 (0x0D)
-#define WCD9XXX_A_SLAVE_ID_2__POR (0x00000066)
-#define WCD9XXX_A_SLAVE_ID_3 (0x0E)
-#define WCD9XXX_A_SLAVE_ID_3__POR (0x00000055)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CTL (0x80)
-#define WCD9XXX_A_CDC_CTL__POR (0x00000000)
-#define WCD9XXX_A_LEAKAGE_CTL (0x88)
-#define WCD9XXX_A_LEAKAGE_CTL__POR (0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_INTR_MODE (0x90)
-#define WCD9XXX_A_INTR_MASK0 (0x94)
-#define WCD9XXX_A_INTR_STATUS0 (0x98)
-#define WCD9XXX_A_INTR_CLEAR0 (0x9C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_INTR_LEVEL0 (0xA0)
-#define WCD9XXX_A_INTR_LEVEL1 (0xA1)
-#define WCD9XXX_A_INTR_LEVEL2 (0xA2)
-#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
-#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
-#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
-#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL (0x101)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL__POR (0x50)
-#define WCD9XXX_A_CLK_BUFF_EN1 (0x108)
-#define WCD9XXX_A_CLK_BUFF_EN1__POR (0x04)
-#define WCD9XXX_A_CLK_BUFF_EN2 (0x109)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CLK_BUFF_EN2__POR (0x02)
-#define WCD9XXX_A_RX_COM_BIAS (0x1A2)
-#define WCD9XXX_A_RX_COM_BIAS__POR (0x00)
-#define WCD9XXX_A_RC_OSC_FREQ (0x1FA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RC_OSC_FREQ__POR (0x46)
-#define WCD9XXX_A_BIAS_OSC_BG_CTL (0x105)
-#define WCD9XXX_A_BIAS_OSC_BG_CTL__POR (0x16)
-#define WCD9XXX_A_RC_OSC_TEST (0x1FB)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RC_OSC_TEST__POR (0x0A)
-#define WCD9XXX_A_CDC_CLK_MCLK_CTL (0x311)
-#define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_EN_CTL (0x3C0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG (0x3C1)
-#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG (0x3C2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG__POR (0x06)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL (0x3C3)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL__POR (0x03)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL (0x3C4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL__POR (0x09)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL (0x3C5)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL__POR (0x1E)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL (0x3C6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL__POR (0x45)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL (0x3C7)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL__POR (0x04)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL (0x3C8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL__POR (0x78)
-#define WCD9XXX_A_CDC_MBHC_B1_STATUS (0x3C9)
-#define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_B2_STATUS (0x3CA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_B3_STATUS (0x3CB)
-#define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_B4_STATUS (0x3CC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_B5_STATUS (0x3CD)
-#define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_B1_CTL (0x3CE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_B1_CTL__POR (0xC0)
-#define WCD9XXX_A_CDC_MBHC_B2_CTL (0x3CF)
-#define WCD9XXX_A_CDC_MBHC_B2_CTL__POR (0x5D)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL (0x3D0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL (0x3D1)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL (0x3D2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL (0x3D3)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL (0x3D4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL (0x3D5)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL (0x3D6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL__POR (0xFF)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL (0x3D7)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL__POR (0x07)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL (0x3D8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL__POR (0xFF)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL (0x3D9)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL__POR (0x7F)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL (0x3DA)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL (0x3DB)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL__POR (0x80)
-#define WCD9XXX_A_CDC_MBHC_CLK_CTL (0x3DC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_CLK_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_INT_CTL (0x3DD)
-#define WCD9XXX_A_CDC_MBHC_INT_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL (0x3DE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_MBHC_SPARE (0x3DF)
-#define WCD9XXX_A_CDC_MBHC_SPARE__POR (0x00)
-#define WCD9XXX_A_MBHC_SCALING_MUX_1 (0x14E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MBHC_SCALING_MUX_1__POR (0x00)
-#define WCD9XXX_A_RX_HPH_OCP_CTL (0x1AA)
-#define WCD9XXX_A_RX_HPH_OCP_CTL__POR (0x68)
-#define WCD9XXX_A_MICB_1_CTL (0x12B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_1_CTL__POR (0x16)
-#define WCD9XXX_A_MICB_1_INT_RBIAS (0x12C)
-#define WCD9XXX_A_MICB_1_INT_RBIAS__POR (0x24)
-#define WCD9XXX_A_MICB_1_MBHC (0x12D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_1_MBHC__POR (0x01)
-#define WCD9XXX_A_MICB_CFILT_2_CTL (0x12E)
-#define WCD9XXX_A_MICB_CFILT_2_CTL__POR (0x40)
-#define WCD9XXX_A_MICB_CFILT_2_VAL (0x12F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_CFILT_2_VAL__POR (0x80)
-#define WCD9XXX_A_MICB_CFILT_2_PRECHRG (0x130)
-#define WCD9XXX_A_MICB_CFILT_2_PRECHRG__POR (0x38)
-#define WCD9XXX_A_MICB_2_CTL (0x131)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_2_CTL__POR (0x16)
-#define WCD9XXX_A_MICB_2_INT_RBIAS (0x132)
-#define WCD9XXX_A_MICB_2_INT_RBIAS__POR (0x24)
-#define WCD9XXX_A_MICB_2_MBHC (0x133)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_2_MBHC__POR (0x02)
-#define WCD9XXX_A_MICB_CFILT_3_CTL (0x134)
-#define WCD9XXX_A_MICB_CFILT_3_CTL__POR (0x40)
-#define WCD9XXX_A_MICB_CFILT_3_VAL (0x135)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_CFILT_3_VAL__POR (0x80)
-#define WCD9XXX_A_MICB_CFILT_3_PRECHRG (0x136)
-#define WCD9XXX_A_MICB_CFILT_3_PRECHRG__POR (0x38)
-#define WCD9XXX_A_MICB_3_CTL (0x137)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_3_CTL__POR (0x16)
-#define WCD9XXX_A_MICB_3_INT_RBIAS (0x138)
-#define WCD9XXX_A_MICB_3_INT_RBIAS__POR (0x24)
-#define WCD9XXX_A_MICB_3_MBHC (0x139)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_3_MBHC__POR (0x00)
-#define WCD9XXX_A_MICB_4_CTL (0x13D)
-#define WCD9XXX_A_MICB_4_CTL__POR (0x16)
-#define WCD9XXX_A_MICB_4_INT_RBIAS (0x13E)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_4_INT_RBIAS__POR (0x24)
-#define WCD9XXX_A_MICB_4_MBHC (0x13F)
-#define WCD9XXX_A_MICB_4_MBHC__POR (0x01)
-#define WCD9XXX_A_MICB_CFILT_1_VAL (0x129)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_CFILT_1_VAL__POR (0x80)
-#define WCD9XXX_A_RX_HPH_L_STATUS (0x1B3)
-#define WCD9XXX_A_RX_HPH_L_STATUS__POR (0x00)
-#define WCD9XXX_A_MBHC_HPH (0x1FE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MBHC_HPH__POR (0x44)
-#define WCD9XXX_A_RX_HPH_CNP_WG_TIME (0x1AD)
-#define WCD9XXX_A_RX_HPH_CNP_WG_TIME__POR (0x2A)
-#define WCD9XXX_A_RX_HPH_R_DAC_CTL (0x1B7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_R_DAC_CTL__POR (0x00)
-#define WCD9XXX_A_RX_HPH_L_DAC_CTL (0x1B1)
-#define WCD9XXX_A_RX_HPH_L_DAC_CTL__POR (0x00)
-#define WCD9XXX_A_TX_7_MBHC_EN (0x171)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_TX_7_MBHC_EN__POR (0x0C)
-#define WCD9XXX_A_PIN_CTL_OE0 (0x010)
-#define WCD9XXX_A_PIN_CTL_OE0__POR (0x00)
-#define WCD9XXX_A_PIN_CTL_OE1 (0x011)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_PIN_CTL_OE1__POR (0x00)
-#define WCD9XXX_A_MICB_CFILT_1_CTL (0x128)
-#define WCD9XXX_A_LDO_H_MODE_1 (0x110)
-#define WCD9XXX_A_LDO_H_MODE_1__POR (0x65)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MICB_CFILT_1_CTL__POR (0x40)
-#define WCD9XXX_A_TX_7_MBHC_TEST_CTL (0x174)
-#define WCD9XXX_A_TX_7_MBHC_TEST_CTL__POR (0x38)
-#define WCD9XXX_A_MBHC_SCALING_MUX_2 (0x14F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MBHC_SCALING_MUX_2__POR (0x80)
-#define WCD9XXX_A_TX_COM_BIAS (0x14C)
-#define WCD9XXX_A_TX_COM_BIAS__POR (0xF0)
-#define WCD9XXX_A_MBHC_INSERT_DETECT (0x14A)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MBHC_INSERT_DETECT__POR (0x00)
-#define WCD9XXX_A_MBHC_INSERT_DET_STATUS (0x14B)
-#define WCD9XXX_A_MBHC_INSERT_DET_STATUS__POR (0x00)
-#define WCD9XXX_A_MAD_ANA_CTRL (0x150)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_MAD_ANA_CTRL__POR (0xF1)
-#define WCD9XXX_A_CDC_CLK_OTHR_CTL (0x30C)
-#define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR (0x00)
-#define WCD9XXX_A_BUCK_MODE_1 (0x181)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_MODE_1__POR (0x21)
-#define WCD9XXX_A_BUCK_MODE_2 (0x182)
-#define WCD9XXX_A_BUCK_MODE_2__POR (0xFF)
-#define WCD9XXX_A_BUCK_MODE_3 (0x183)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_MODE_3__POR (0xCC)
-#define WCD9XXX_A_BUCK_MODE_4 (0x184)
-#define WCD9XXX_A_BUCK_MODE_4__POR (0x3A)
-#define WCD9XXX_A_BUCK_MODE_5 (0x185)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_MODE_5__POR (0x00)
-#define WCD9XXX_A_BUCK_CTRL_VCL_1 (0x186)
-#define WCD9XXX_A_BUCK_CTRL_VCL_1__POR (0x48)
-#define WCD9XXX_A_BUCK_CTRL_VCL_2 (0x187)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_CTRL_VCL_2__POR (0xA3)
-#define WCD9XXX_A_BUCK_CTRL_VCL_3 (0x188)
-#define WCD9XXX_A_BUCK_CTRL_VCL_3__POR (0x82)
-#define WCD9XXX_A_BUCK_CTRL_CCL_1 (0x189)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_CTRL_CCL_1__POR (0xAB)
-#define WCD9XXX_A_BUCK_CTRL_CCL_2 (0x18A)
-#define WCD9XXX_A_BUCK_CTRL_CCL_2__POR (0xDC)
-#define WCD9XXX_A_BUCK_CTRL_CCL_3 (0x18B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_CTRL_CCL_3__POR (0x6A)
-#define WCD9XXX_A_BUCK_CTRL_CCL_4 (0x18C)
-#define WCD9XXX_A_BUCK_CTRL_CCL_4__POR (0x58)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1 (0x18D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR (0x50)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2 (0x18E)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR (0x64)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3 (0x18F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR (0x77)
-#define WCD9XXX_A_BUCK_TMUX_A_D (0x190)
-#define WCD9XXX_A_BUCK_TMUX_A_D__POR (0x00)
-#define WCD9XXX_A_NCP_EN (0x192)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_NCP_EN__POR (0xFE)
-#define WCD9XXX_A_NCP_STATIC (0x194)
-#define WCD9XXX_A_NCP_STATIC__POR (0x28)
-#define WCD9XXX_A_NCP_BUCKREF (0x191)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_NCP_BUCKREF__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_B1_CTL (0x320)
-#define WCD9XXX_A_CDC_CLSH_B1_CTL__POR (0xE4)
-#define WCD9XXX_A_CDC_CLSH_B2_CTL (0x321)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_B2_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_B3_CTL (0x322)
-#define WCD9XXX_A_CDC_CLSH_B3_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS (0x323)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD (0x324)
-#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR (0x12)
-#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD (0x325)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR (0x0C)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD (0x326)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR (0x18)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD (0x327)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR (0x23)
-#define WCD9XXX_A_CDC_CLSH_K_ADDR (0x328)
-#define WCD9XXX_A_CDC_CLSH_K_ADDR__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_K_DATA (0x329)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_K_DATA__POR (0xA4)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L (0x32A)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR (0xD7)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U (0x32B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR (0x05)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L (0x32C)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR (0x60)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U (0x32D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR (0x09)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR (0x32E)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH (0x32F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR (0x330)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR (0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH (0x331)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR (0x00)
-#define WCD9XXX_A_CDC_RX1_B6_CTL (0x2B5)
-#define WCD9XXX_A_CDC_RX1_B6_CTL__POR (0x80)
-#define WCD9XXX_A_CDC_RX2_B6_CTL (0x2BD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_RX2_B6_CTL__POR (0x80)
-#define WCD9XXX_A_RX_HPH_L_GAIN (0x1AE)
-#define WCD9XXX_A_RX_HPH_L_GAIN__POR (0x00)
-#define WCD9XXX_A_RX_HPH_R_GAIN (0x1B4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_R_GAIN__POR (0x00)
-#define WCD9XXX_A_RX_HPH_CHOP_CTL (0x1A5)
-#define WCD9XXX_A_RX_HPH_CHOP_CTL__POR (0xB4)
-#define WCD9XXX_A_RX_HPH_BIAS_PA (0x1A6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_BIAS_PA__POR (0x7A)
-#define WCD9XXX_A_RX_HPH_L_TEST (0x1AF)
-#define WCD9XXX_A_RX_HPH_L_TEST__POR (0x00)
-#define WCD9XXX_A_RX_HPH_R_TEST (0x1B5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_R_TEST__POR (0x00)
-#define WCD9XXX_A_CDC_CLK_RX_B1_CTL (0x30F)
-#define WCD9XXX_A_CDC_CLK_RX_B1_CTL__POR (0x00)
-#define WCD9XXX_A_NCP_CLK (0x193)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_NCP_CLK__POR (0x94)
-#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP (0x1A9)
-#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP__POR (0x2A)
-#define WCD9XXX_A_RX_HPH_CNP_WG_CTL (0x1AC)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_CNP_WG_CTL__POR (0xDE)
-#define WCD9XXX_A_RX_HPH_L_PA_CTL (0x1B0)
-#define WCD9XXX_A_RX_HPH_L_PA_CTL__POR (0x42)
-#define WCD9XXX_A_RX_HPH_R_PA_CTL (0x1B6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_RX_HPH_R_PA_CTL__POR (0x42)
-#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL (0x383)
-#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL (0x361)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL (0x362)
-#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL (0x363)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL (0x364)
-#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL__POR (0x00)
-#define WCD9330_A_LEAKAGE_CTL (0x03C)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9330_A_LEAKAGE_CTL__POR (0x04)
-#define WCD9330_A_CDC_CTL (0x034)
-#define WCD9330_A_CDC_CTL__POR (0x00)
-#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0 (0xB42)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0 (0xB56)
-#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0 (0xB6A)
-#define WCD9XXX_A_CDC_CLSH_K1_MSB (0xC08)
-#define WCD9XXX_A_CDC_CLSH_K1_LSB (0xC09)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_A_ANA_RX_SUPPLIES (0x608)
-#define WCD9XXX_A_ANA_HPH (0x609)
-#define WCD9XXX_A_CDC_CLSH_CRC (0xC01)
-#define WCD9XXX_FLYBACK_EN (0x6A4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_RX_BIAS_FLYB_BUFF (0x6C7)
-#define WCD9XXX_HPH_L_EN (0x6D3)
-#define WCD9XXX_HPH_R_EN (0x6D6)
-#define WCD9XXX_HPH_REFBUFF_UHQA_CTL (0x6DD)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_CLASSH_CTRL_VCL_2 (0x69B)
-#define WCD9XXX_CDC_CLSH_HPH_V_PA (0xC04)
-#define WCD9XXX_CDC_RX0_RX_PATH_SEC0 (0xB49)
-#define WCD9XXX_CDC_RX1_RX_PATH_CTL (0xB55)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define WCD9XXX_CDC_RX2_RX_PATH_CTL (0xB69)
-#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL (0xD41)
-#define WCD9XXX_CLASSH_CTRL_CCL_1 (0x69C)
-#endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-

diff --git a/k318/kernel-headers/linux/msm_audio.h b/k318/kernel-headers/linux/msm_audio.h
deleted file mode 100644
index fab6458..0000000
--- a/k318/kernel-headers/linux/msm_audio.h
+++ /dev/null

@@ -1,425 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_LINUX_MSM_AUDIO_H
-#define _UAPI_LINUX_MSM_AUDIO_H
-#include <linux/types.h>
-#include <linux/ioctl.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_IOCTL_MAGIC 'a'
-#define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned)
-#define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned)
-#define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, struct msm_audio_config)
-#define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, struct msm_audio_config)
-#define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, struct msm_audio_stats)
-#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned)
-#define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned)
-#define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned)
-#define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned)
-#define AUDIO_PLAY_DTMF _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned)
-#define AUDIO_GET_EVENT _IOR(AUDIO_IOCTL_MAGIC, 13, struct msm_audio_event)
-#define AUDIO_ABORT_GET_EVENT _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_REGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned)
-#define AUDIO_DEREGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 16, unsigned)
-#define AUDIO_ASYNC_WRITE _IOW(AUDIO_IOCTL_MAGIC, 17, struct msm_audio_aio_buf)
-#define AUDIO_ASYNC_READ _IOW(AUDIO_IOCTL_MAGIC, 18, struct msm_audio_aio_buf)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_INCALL _IOW(AUDIO_IOCTL_MAGIC, 19, struct msm_voicerec_mode)
-#define AUDIO_GET_NUM_SND_DEVICE _IOR(AUDIO_IOCTL_MAGIC, 20, unsigned)
-#define AUDIO_GET_SND_DEVICES _IOWR(AUDIO_IOCTL_MAGIC, 21, struct msm_snd_device_list)
-#define AUDIO_ENABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 22, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_DISABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 23, unsigned)
-#define AUDIO_ROUTE_STREAM _IOW(AUDIO_IOCTL_MAGIC, 24, struct msm_audio_route_config)
-#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned)
-#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned)
-#define AUDIO_SET_MUTE _IOW(AUDIO_IOCTL_MAGIC, 33, unsigned)
-#define AUDIO_UPDATE_ACDB _IOW(AUDIO_IOCTL_MAGIC, 34, unsigned)
-#define AUDIO_START_VOICE _IOW(AUDIO_IOCTL_MAGIC, 35, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_STOP_VOICE _IOW(AUDIO_IOCTL_MAGIC, 36, unsigned)
-#define AUDIO_REINIT_ACDB _IOW(AUDIO_IOCTL_MAGIC, 39, unsigned)
-#define AUDIO_OUTPORT_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 40, unsigned short)
-#define AUDIO_SET_ERR_THRESHOLD_VALUE _IOW(AUDIO_IOCTL_MAGIC, 41, unsigned short)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_GET_BITSTREAM_ERROR_INFO _IOR(AUDIO_IOCTL_MAGIC, 42, struct msm_audio_bitstream_error_info)
-#define AUDIO_SET_SRS_TRUMEDIA_PARAM _IOW(AUDIO_IOCTL_MAGIC, 43, unsigned)
-#define AUDIO_SET_STREAM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 80, struct msm_audio_stream_config)
-#define AUDIO_GET_STREAM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 81, struct msm_audio_stream_config)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_GET_SESSION_ID _IOR(AUDIO_IOCTL_MAGIC, 82, unsigned short)
-#define AUDIO_GET_STREAM_INFO _IOR(AUDIO_IOCTL_MAGIC, 83, struct msm_audio_bitstream_info)
-#define AUDIO_SET_PAN _IOW(AUDIO_IOCTL_MAGIC, 84, unsigned)
-#define AUDIO_SET_QCONCERT_PLUS _IOW(AUDIO_IOCTL_MAGIC, 85, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_MBADRC _IOW(AUDIO_IOCTL_MAGIC, 86, unsigned)
-#define AUDIO_SET_VOLUME_PATH _IOW(AUDIO_IOCTL_MAGIC, 87, struct msm_vol_info)
-#define AUDIO_SET_MAX_VOL_ALL _IOW(AUDIO_IOCTL_MAGIC, 88, unsigned)
-#define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 89, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 90, unsigned)
-#define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 91, unsigned)
-#define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 92, unsigned)
-#define AUDIO_GET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 93, struct msm_audio_buf_cfg)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 94, struct msm_audio_buf_cfg)
-#define AUDIO_SET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 95, struct msm_acdb_cmd_device)
-#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96, struct msm_acdb_cmd_device)
-#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, struct msm_audio_ion_info)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, struct msm_audio_ion_info)
-#define AUDIO_SET_EFFECTS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 99, struct msm_hwacc_effects_config)
-#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, struct msm_hwacc_buf_cfg)
-#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, struct msm_hwacc_buf_avail)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
-#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
-#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
-#define AUDIO_PM_AWAKE _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_PM_RELAX _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned)
-#define AUDIO_MAX_COMMON_IOCTL_NUM 107
-#define HANDSET_MIC 0x01
-#define HANDSET_SPKR 0x02
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HEADSET_MIC 0x03
-#define HEADSET_SPKR_MONO 0x04
-#define HEADSET_SPKR_STEREO 0x05
-#define SPKR_PHONE_MIC 0x06
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SPKR_PHONE_MONO 0x07
-#define SPKR_PHONE_STEREO 0x08
-#define BT_SCO_MIC 0x09
-#define BT_SCO_SPKR 0x0A
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define BT_A2DP_SPKR 0x0B
-#define TTY_HEADSET_MIC 0x0C
-#define TTY_HEADSET_SPKR 0x0D
-#define DEFAULT_TX 0x0E
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DEFAULT_RX 0x0F
-#define BT_A2DP_TX 0x10
-#define HEADSET_MONO_PLUS_SPKR_MONO_RX 0x11
-#define HEADSET_MONO_PLUS_SPKR_STEREO_RX 0x12
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HEADSET_STEREO_PLUS_SPKR_MONO_RX 0x13
-#define HEADSET_STEREO_PLUS_SPKR_STEREO_RX 0x14
-#define I2S_RX 0x20
-#define I2S_TX 0x21
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ADRC_ENABLE 0x0001
-#define EQUALIZER_ENABLE 0x0002
-#define IIR_ENABLE 0x0004
-#define QCONCERT_PLUS_ENABLE 0x0008
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MBADRC_ENABLE 0x0010
-#define SRS_ENABLE 0x0020
-#define SRS_DISABLE 0x0040
-#define AGC_ENABLE 0x0001
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define NS_ENABLE 0x0002
-#define TX_IIR_ENABLE 0x0004
-#define FLUENCE_ENABLE 0x0008
-#define VOC_REC_UPLINK 0x00
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define VOC_REC_DOWNLINK 0x01
-#define VOC_REC_BOTH 0x02
-struct msm_audio_config {
-  uint32_t buffer_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t buffer_count;
-  uint32_t channel_count;
-  uint32_t sample_rate;
-  uint32_t type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t meta_field;
-  uint32_t bits;
-  uint32_t unused[3];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_audio_stream_config {
-  uint32_t buffer_size;
-  uint32_t buffer_count;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_audio_buf_cfg {
-  uint32_t meta_info_enable;
-  uint32_t frames_per_buf;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_audio_stats {
-  uint32_t byte_count;
-  uint32_t sample_count;
-  uint32_t unused[2];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct msm_audio_ion_info {
-  int fd;
-  void * vaddr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct msm_audio_pmem_info {
-  int fd;
-  void * vaddr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct msm_audio_aio_buf {
-  void * buf_addr;
-  uint32_t buf_len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t data_len;
-  void * private_data;
-  unsigned short mfield_sz;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_IOCTL_MAGIC 's'
-#define SND_MUTE_UNMUTED 0
-#define SND_MUTE_MUTED 1
-struct msm_mute_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t mute;
-  uint32_t path;
-};
-struct msm_vol_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t vol;
-  uint32_t path;
-};
-struct msm_voicerec_mode {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t rec_mode;
-};
-struct msm_snd_device_config {
-  uint32_t device;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t ear_mute;
-  uint32_t mic_mute;
-};
-#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum cad_device_path_type {
-  CAD_DEVICE_PATH_RX,
-  CAD_DEVICE_PATH_TX,
-  CAD_DEVICE_PATH_RX_TX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  CAD_DEVICE_PATH_LB,
-  CAD_DEVICE_PATH_MAX
-};
-struct cad_devices_type {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t rx_device;
-  uint32_t tx_device;
-  enum cad_device_path_type pathtype;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_cad_device_config {
-  struct cad_devices_type device;
-  uint32_t ear_mute;
-  uint32_t mic_mute;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define CAD_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_cad_device_config *)
-#define SND_METHOD_VOICE 0
-#define SND_METHOD_MIDI 4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_snd_volume_config {
-  uint32_t device;
-  uint32_t method;
-  uint32_t volume;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
-struct msm_cad_volume_config {
-  struct cad_devices_type device;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t method;
-  uint32_t volume;
-};
-#define CAD_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_cad_volume_config *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
-struct msm_snd_endpoint {
-  int id;
-  char name[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
-#define SND_AVC_CTL _IOW(SND_IOCTL_MAGIC, 6, unsigned *)
-#define SND_AGC_CTL _IOW(SND_IOCTL_MAGIC, 7, unsigned *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define CAD_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
-struct msm_cad_endpoint {
-  int id;
-  char name[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define CAD_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_cad_endpoint *)
-struct msm_audio_pcm_config {
-  uint32_t pcm_feedback;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t buffer_count;
-  uint32_t buffer_size;
-};
-#define AUDIO_EVENT_SUSPEND 0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_EVENT_RESUME 1
-#define AUDIO_EVENT_WRITE_DONE 2
-#define AUDIO_EVENT_READ_DONE 3
-#define AUDIO_EVENT_STREAM_INFO 4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_EVENT_BITSTREAM_ERROR_INFO 5
-#define AUDIO_CODEC_TYPE_MP3 0
-#define AUDIO_CODEC_TYPE_AAC 1
-struct msm_audio_bitstream_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t codec_type;
-  uint32_t chan_info;
-  uint32_t sample_rate;
-  uint32_t bit_stream_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bit_rate;
-  uint32_t unused[3];
-};
-struct msm_audio_bitstream_error_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t dec_id;
-  uint32_t err_msg_indicator;
-  uint32_t err_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-union msm_audio_event_payload {
-  struct msm_audio_aio_buf aio_buf;
-  struct msm_audio_bitstream_info stream_info;
-  struct msm_audio_bitstream_error_info error_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int reserved;
-};
-struct msm_audio_event {
-  int event_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int timeout_ms;
-  union msm_audio_event_payload event_payload;
-};
-#define MSM_SNDDEV_CAP_RX 0x1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_SNDDEV_CAP_TX 0x2
-#define MSM_SNDDEV_CAP_VOICE 0x4
-struct msm_snd_device_info {
-  uint32_t dev_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t dev_cap;
-  char dev_name[64];
-};
-struct msm_snd_device_list {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t num_dev;
-  struct msm_snd_device_info * list;
-};
-struct msm_dtmf_config {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t path;
-  uint16_t dtmf_hi;
-  uint16_t dtmf_low;
-  uint16_t duration;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t tx_gain;
-  uint16_t rx_gain;
-  uint16_t mixing;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_ROUTE_STREAM_VOICE_RX 0
-#define AUDIO_ROUTE_STREAM_VOICE_TX 1
-#define AUDIO_ROUTE_STREAM_PLAYBACK 2
-#define AUDIO_ROUTE_STREAM_REC 3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_audio_route_config {
-  uint32_t stream_type;
-  uint32_t stream_id;
-  uint32_t dev_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define AUDIO_MAX_EQ_BANDS 12
-struct msm_audio_eq_band {
-  uint16_t band_idx;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t filter_type;
-  uint32_t center_freq_hz;
-  uint32_t filter_gain;
-  uint32_t q_factor;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed));
-struct msm_audio_eq_stream_config {
-  uint32_t enable;
-  uint32_t num_bands;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msm_audio_eq_band eq_bands[AUDIO_MAX_EQ_BANDS];
-} __attribute__((packed));
-struct msm_acdb_cmd_device {
-  uint32_t command_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t device_id;
-  uint32_t network_id;
-  uint32_t sample_rate_id;
-  uint32_t interface_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t algorithm_block_id;
-  uint32_t total_bytes;
-  uint32_t * phys_buf;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_hwacc_data_config {
-  __u32 buf_size;
-  __u32 num_buf;
-  __u32 num_channels;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u8 channel_map[8];
-  __u32 sample_rate;
-  __u32 bits_per_sample;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_hwacc_buf_cfg {
-  __u32 input_len;
-  __u32 output_len;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_hwacc_buf_avail {
-  __u32 input_num_avail;
-  __u32 output_num_avail;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msm_hwacc_effects_config {
-  struct msm_hwacc_data_config input;
-  struct msm_hwacc_data_config output;
-  struct msm_hwacc_buf_cfg buf_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 meta_mode_enabled;
-  __u32 overwrite_topology;
-  __s32 topology;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_audio_calibration.h b/k318/kernel-headers/linux/msm_audio_calibration.h
deleted file mode 100644
index 3feecfa..0000000
--- a/k318/kernel-headers/linux/msm_audio_calibration.h
+++ /dev/null

@@ -1,670 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_MSM_AUDIO_CALIBRATION_H
-#define _UAPI_MSM_AUDIO_CALIBRATION_H
-#include <linux/types.h>
-#include <linux/ioctl.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define CAL_IOCTL_MAGIC 'a'
-#define AUDIO_ALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 200, void *)
-#define AUDIO_DEALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 201, void *)
-#define AUDIO_PREPARE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 202, void *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 203, void *)
-#define AUDIO_GET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 204, void *)
-#define AUDIO_POST_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, 205, void *)
-#define AUDIO_GET_RTAC_ADM_INFO _IOR(CAL_IOCTL_MAGIC, 207, void *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_GET_RTAC_VOICE_INFO _IOR(CAL_IOCTL_MAGIC, 208, void *)
-#define AUDIO_GET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, 209, void *)
-#define AUDIO_SET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, 210, void *)
-#define AUDIO_GET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, 211, void *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, 212, void *)
-#define AUDIO_GET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, 213, void *)
-#define AUDIO_SET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, 214, void *)
-#define AUDIO_GET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, 215, void *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define AUDIO_SET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, 216, void *)
-#define AUDIO_GET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, 217, void *)
-#define AUDIO_SET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, 218, void *)
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  CVP_VOC_RX_TOPOLOGY_CAL_TYPE = 0,
-  CVP_VOC_TX_TOPOLOGY_CAL_TYPE,
-  CVP_VOCPROC_STATIC_CAL_TYPE,
-  CVP_VOCPROC_DYNAMIC_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  CVS_VOCSTRM_STATIC_CAL_TYPE,
-  CVP_VOCDEV_CFG_CAL_TYPE,
-  CVP_VOCPROC_STATIC_COL_CAL_TYPE,
-  CVP_VOCPROC_DYNAMIC_COL_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  CVS_VOCSTRM_STATIC_COL_CAL_TYPE,
-  ADM_TOPOLOGY_CAL_TYPE,
-  ADM_CUST_TOPOLOGY_CAL_TYPE,
-  ADM_AUDPROC_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ADM_AUDVOL_CAL_TYPE,
-  ASM_TOPOLOGY_CAL_TYPE,
-  ASM_CUST_TOPOLOGY_CAL_TYPE,
-  ASM_AUDSTRM_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  AFE_COMMON_RX_CAL_TYPE,
-  AFE_COMMON_TX_CAL_TYPE,
-  AFE_ANC_CAL_TYPE,
-  AFE_AANC_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  AFE_FB_SPKR_PROT_CAL_TYPE,
-  AFE_HW_DELAY_CAL_TYPE,
-  AFE_SIDETONE_CAL_TYPE,
-  AFE_TOPOLOGY_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  AFE_CUST_TOPOLOGY_CAL_TYPE,
-  LSM_CUST_TOPOLOGY_CAL_TYPE,
-  LSM_TOPOLOGY_CAL_TYPE,
-  LSM_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ADM_RTAC_INFO_CAL_TYPE,
-  VOICE_RTAC_INFO_CAL_TYPE,
-  ADM_RTAC_APR_CAL_TYPE,
-  ASM_RTAC_APR_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  VOICE_RTAC_APR_CAL_TYPE,
-  MAD_CAL_TYPE,
-  ULP_AFE_CAL_TYPE,
-  ULP_LSM_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DTS_EAGLE_CAL_TYPE,
-  AUDIO_CORE_METAINFO_CAL_TYPE,
-  SRS_TRUMEDIA_CAL_TYPE,
-  CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ADM_RTAC_AUDVOL_CAL_TYPE,
-  ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
-  AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
-  AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MAX_CAL_TYPES,
-};
-#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
-#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  VERSION_0_0,
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  PER_VOCODER_CAL_BIT_MASK = 0x10000,
-};
-#define MAX_IOCTL_CMD_SIZE 512
-struct audio_cal_header {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t data_size;
-  int32_t version;
-  int32_t cal_type;
-  int32_t cal_type_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_header {
-  int32_t version;
-  int32_t buffer_number;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_data {
-  int32_t cal_size;
-  int32_t mem_handle;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_alloc {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_alloc {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_alloc cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_dealloc {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_dealloc {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_dealloc cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_prepare {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_prepare {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_prepare cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_post {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_post {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_post cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_metainfo {
-  uint32_t nKey;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  RX_DEVICE,
-  TX_DEVICE,
-  MAX_PATH_TYPE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_adm_top {
-  int32_t topology;
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t path;
-  int32_t app_type;
-  int32_t sample_rate;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_info_audproc {
-  int32_t acdb_id;
-  int32_t path;
-  int32_t app_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t sample_rate;
-};
-struct audio_cal_info_audvol {
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t path;
-  int32_t app_type;
-  int32_t vol_index;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_info_afe {
-  int32_t acdb_id;
-  int32_t path;
-  int32_t sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_afe_top {
-  int32_t topology;
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t path;
-  int32_t sample_rate;
-};
-struct audio_cal_info_asm_top {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t topology;
-  int32_t app_type;
-};
-struct audio_cal_info_audstrm {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t app_type;
-};
-struct audio_cal_info_aanc {
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MAX_HW_DELAY_ENTRIES 25
-struct audio_cal_hw_delay_entry {
-  uint32_t sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t delay_usec;
-};
-struct audio_cal_hw_delay_data {
-  uint32_t num_entries;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_hw_delay_entry entry[MAX_HW_DELAY_ENTRIES];
-};
-struct audio_cal_info_hw_delay {
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t path;
-  int32_t property_type;
-  struct audio_cal_hw_delay_data data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum msm_spkr_prot_states {
-  MSM_SPKR_PROT_CALIBRATED,
-  MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
-  MSM_SPKR_PROT_DISABLED,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MSM_SPKR_PROT_NOT_CALIBRATED,
-  MSM_SPKR_PROT_PRE_CALIBRATED,
-  MSM_SPKR_PROT_IN_FTM_MODE
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
-enum msm_spkr_count {
-  SP_V2_SPKR_1,
-  SP_V2_SPKR_2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SP_V2_NUM_MAX_SPKRS
-};
-struct audio_cal_info_spk_prot_cfg {
-  int32_t r0[SP_V2_NUM_MAX_SPKRS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t t0[SP_V2_NUM_MAX_SPKRS];
-  uint32_t quick_calib_flag;
-  uint32_t mode;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_info_sp_th_vi_ftm_cfg {
-  uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
-  uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
-  uint32_t mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_sp_ex_vi_ftm_cfg {
-  uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
-  uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t mode;
-};
-struct audio_cal_info_sp_ex_vi_param {
-  int32_t freq_q20[SP_V2_NUM_MAX_SPKRS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t resis_q24[SP_V2_NUM_MAX_SPKRS];
-  int32_t qmct_q24[SP_V2_NUM_MAX_SPKRS];
-  int32_t status[SP_V2_NUM_MAX_SPKRS];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_info_sp_th_vi_param {
-  int32_t r_dc_q24[SP_V2_NUM_MAX_SPKRS];
-  int32_t temp_q22[SP_V2_NUM_MAX_SPKRS];
-  int32_t status[SP_V2_NUM_MAX_SPKRS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_msm_spk_prot_status {
-  int32_t r0[SP_V2_NUM_MAX_SPKRS];
-  int32_t status;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_sidetone {
-  uint16_t enable;
-  uint16_t gain;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t tx_acdb_id;
-  int32_t rx_acdb_id;
-  int32_t mid;
-  int32_t pid;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_lsm_top {
-  int32_t topology;
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t app_type;
-};
-struct audio_cal_info_lsm {
-  int32_t acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t path;
-  int32_t app_type;
-};
-struct audio_cal_info_voc_top {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t topology;
-  int32_t acdb_id;
-};
-struct audio_cal_info_vocproc {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t tx_acdb_id;
-  int32_t rx_acdb_id;
-  int32_t tx_sample_rate;
-  int32_t rx_sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  DEFAULT_FEATURE_SET,
-  VOL_BOOST_FEATURE_SET,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_info_vocvol {
-  int32_t tx_acdb_id;
-  int32_t rx_acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t feature_set;
-};
-struct audio_cal_info_vocdev_cfg {
-  int32_t tx_acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t rx_acdb_id;
-};
-#define MAX_VOICE_COLUMNS 20
-union audio_cal_col_na {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t val8;
-  uint16_t val16;
-  uint32_t val32;
-  uint64_t val64;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __packed;
-struct audio_cal_col {
-  uint32_t id;
-  uint32_t type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union audio_cal_col_na na_value;
-} __packed;
-struct audio_cal_col_data {
-  uint32_t num_columns;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_col column[MAX_VOICE_COLUMNS];
-} __packed;
-struct audio_cal_info_voc_col {
-  int32_t table_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t tx_acdb_id;
-  int32_t rx_acdb_id;
-  struct audio_cal_col_data data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_basic {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_basic {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_basic cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_adm_top {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_adm_top cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_adm_top {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_adm_top cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_metainfo {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_metainfo cal_info;
-};
-struct audio_core_metainfo {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_metainfo cal_type;
-};
-struct audio_cal_type_audproc {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_audproc cal_info;
-};
-struct audio_cal_audproc {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_audproc cal_type;
-};
-struct audio_cal_type_audvol {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_audvol cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_audvol {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_audvol cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_asm_top {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_asm_top cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_asm_top {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_asm_top cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_audstrm {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_audstrm cal_info;
-};
-struct audio_cal_audstrm {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_audstrm cal_type;
-};
-struct audio_cal_type_afe {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_afe cal_info;
-};
-struct audio_cal_afe {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_afe cal_type;
-};
-struct audio_cal_type_afe_top {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_afe_top cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_afe_top {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_afe_top cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_aanc {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_aanc cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_aanc {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_aanc cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_fb_spk_prot_cfg {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_spk_prot_cfg cal_info;
-};
-struct audio_cal_fb_spk_prot_cfg {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_fb_spk_prot_cfg cal_type;
-};
-struct audio_cal_type_sp_th_vi_ftm_cfg {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_sp_th_vi_ftm_cfg cal_info;
-};
-struct audio_cal_sp_th_vi_ftm_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_sp_th_vi_ftm_cfg cal_type;
-};
-struct audio_cal_type_sp_ex_vi_ftm_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_sp_ex_vi_ftm_cfg cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_sp_ex_vi_ftm_cfg {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_sp_ex_vi_ftm_cfg cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_hw_delay {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_hw_delay cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_hw_delay {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_hw_delay cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_sidetone {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_sidetone cal_info;
-};
-struct audio_cal_sidetone {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_sidetone cal_type;
-};
-struct audio_cal_type_lsm_top {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_lsm_top cal_info;
-};
-struct audio_cal_lsm_top {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_lsm_top cal_type;
-};
-struct audio_cal_type_lsm {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_lsm cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_lsm {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_lsm cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_voc_top {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_voc_top cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_voc_top {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_voc_top cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_vocproc {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_vocproc cal_info;
-};
-struct audio_cal_vocproc {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_vocproc cal_type;
-};
-struct audio_cal_type_vocvol {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_vocvol cal_info;
-};
-struct audio_cal_vocvol {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_vocvol cal_type;
-};
-struct audio_cal_type_vocdev_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_vocdev_cfg cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_vocdev_cfg {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_vocdev_cfg cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_type_voc_col {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_voc_col cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_voc_col {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_voc_col cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct audio_cal_type_fb_spk_prot_status {
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_info_msm_spk_prot_status cal_info;
-};
-struct audio_cal_fb_spk_prot_status {
-  struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_fb_spk_prot_status cal_type;
-};
-struct audio_cal_type_sp_th_vi_param {
-  struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_sp_th_vi_param cal_info;
-};
-struct audio_cal_sp_th_vi_param {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_header hdr;
-  struct audio_cal_type_sp_th_vi_param cal_type;
-};
-struct audio_cal_type_sp_ex_vi_param {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct audio_cal_type_header cal_hdr;
-  struct audio_cal_data cal_data;
-  struct audio_cal_info_sp_ex_vi_param cal_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_sp_ex_vi_param {
-  struct audio_cal_header hdr;
-  struct audio_cal_type_sp_ex_vi_param cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_dsps.h b/k318/kernel-headers/linux/msm_dsps.h
deleted file mode 100644
index f2a33eb..0000000
--- a/k318/kernel-headers/linux/msm_dsps.h
+++ /dev/null

@@ -1,31 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_DSPS_H_
-#define _UAPI_DSPS_H_
-#include <linux/ioctl.h>
-#define DSPS_IOCTL_MAGIC 'd'
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DSPS_IOCTL_ON _IO(DSPS_IOCTL_MAGIC, 1)
-#define DSPS_IOCTL_OFF _IO(DSPS_IOCTL_MAGIC, 2)
-#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int *)
-#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5)
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_ion.h b/k318/kernel-headers/linux/msm_ion.h
deleted file mode 100644
index 177c345..0000000
--- a/k318/kernel-headers/linux/msm_ion.h
+++ /dev/null

@@ -1,142 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_MSM_ION_H
-#define _UAPI_MSM_ION_H
-#include "ion.h"
-enum msm_ion_heap_types {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
-  ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
-  ION_HEAP_TYPE_SYSTEM_SECURE,
-  ION_HEAP_TYPE_HYP_CMA,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum ion_heap_ids {
-  INVALID_HEAP_ID = - 1,
-  ION_CP_MM_HEAP_ID = 8,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_SECURE_HEAP_ID = 9,
-  ION_SECURE_DISPLAY_HEAP_ID = 10,
-  ION_CP_MFC_HEAP_ID = 12,
-  ION_CP_WB_HEAP_ID = 16,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_CAMERA_HEAP_ID = 20,
-  ION_SYSTEM_CONTIG_HEAP_ID = 21,
-  ION_ADSP_HEAP_ID = 22,
-  ION_PIL1_HEAP_ID = 23,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_SF_HEAP_ID = 24,
-  ION_SYSTEM_HEAP_ID = 25,
-  ION_PIL2_HEAP_ID = 26,
-  ION_QSECOM_HEAP_ID = 27,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ION_AUDIO_HEAP_ID = 28,
-  ION_MM_FIRMWARE_HEAP_ID = 29,
-  ION_HEAP_ID_RESERVED = 31
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
-#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
-enum ion_fixed_position {
-  NOT_FIXED,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  FIXED_LOW,
-  FIXED_MIDDLE,
-  FIXED_HIGH,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum cp_mem_usage {
-  VIDEO_BITSTREAM = 0x1,
-  VIDEO_PIXEL = 0x2,
-  VIDEO_NONPIXEL = 0x3,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DISPLAY_SECURE_CP_USAGE = 0x4,
-  CAMERA_SECURE_CP_USAGE = 0x5,
-  MAX_USAGE = 0x6,
-  UNKNOWN = 0x7FFFFFFF,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define ION_FLAG_CP_TOUCH (1 << 17)
-#define ION_FLAG_CP_BITSTREAM (1 << 18)
-#define ION_FLAG_CP_PIXEL (1 << 19)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_FLAG_CP_NON_PIXEL (1 << 20)
-#define ION_FLAG_CP_CAMERA (1 << 21)
-#define ION_FLAG_CP_HLOS (1 << 22)
-#define ION_FLAG_CP_HLOS_FREE (1 << 23)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_FLAG_CP_SEC_DISPLAY (1 << 25)
-#define ION_FLAG_CP_APP (1 << 26)
-#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
-#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
-#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
-#define ION_SECURE ION_FLAG_SECURE
-#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_HEAP(bit) (1 << (bit))
-#define ION_ADSP_HEAP_NAME "adsp"
-#define ION_SYSTEM_HEAP_NAME "system"
-#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_KMALLOC_HEAP_NAME "kmalloc"
-#define ION_AUDIO_HEAP_NAME "audio"
-#define ION_SF_HEAP_NAME "sf"
-#define ION_MM_HEAP_NAME "mm"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_CAMERA_HEAP_NAME "camera_preview"
-#define ION_IOMMU_HEAP_NAME "iommu"
-#define ION_MFC_HEAP_NAME "mfc"
-#define ION_WB_HEAP_NAME "wb"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
-#define ION_PIL1_HEAP_NAME "pil_1"
-#define ION_PIL2_HEAP_NAME "pil_2"
-#define ION_QSECOM_HEAP_NAME "qsecom"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_SECURE_HEAP_NAME "secure_heap"
-#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
-#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
-#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
-struct ion_flush_data {
-  ion_user_handle_t handle;
-  int fd;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  void * vaddr;
-  unsigned int offset;
-  unsigned int length;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct ion_prefetch_data {
-  int heap_id;
-  unsigned long len;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IOC_MSM_MAGIC 'M'
-#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data)
-#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data)
-#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, struct ion_prefetch_data)
-#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data)
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_mdp.h b/k318/kernel-headers/linux/msm_mdp.h
deleted file mode 100644
index d07f2e9..0000000
--- a/k318/kernel-headers/linux/msm_mdp.h
+++ /dev/null

@@ -1,1335 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_MSM_MDP_H_
-#define _UAPI_MSM_MDP_H_
-#include <linux/types.h>
-#include <linux/fb.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_IOCTL_MAGIC 'm'
-#define MSMFB_GRP_DISP _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
-#define MSMFB_BLIT _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
-#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
-#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
-#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
-#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_GET_CCS_MATRIX _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
-#define MSMFB_SET_CCS_MATRIX _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
-#define MSMFB_OVERLAY_SET _IOWR(MSMFB_IOCTL_MAGIC, 135, struct mdp_overlay)
-#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data)
-#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
-#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection)
-#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay)
-#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
-#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt)
-#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req)
-#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
-#define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
-#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req)
-#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data)
-#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
-#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
-#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data)
-#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data)
-#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
-#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
-#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
-#define MSMFB_BUFFER_SYNC _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_OVERLAY_COMMIT _IO(MSMFB_IOCTL_MAGIC, 163)
-#define MSMFB_DISPLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 164, struct mdp_display_commit)
-#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
-#define MSMFB_METADATA_GET _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, unsigned int)
-#define MSMFB_ASYNC_BLIT _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
-#define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, struct mdp_overlay_list)
-#define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, struct mdp_pp_feature_version)
-#define FB_TYPE_3D_PANEL 0x10101010
-#define MDP_IMGTYPE2_START 0x10000
-#define MSMFB_DRIVER_VERSION 0xF9E8D701
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_GET_MAJOR(rev) ((rev) >> 28)
-#define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF)
-#define MDSS_GET_STEP(rev) ((rev) & 0xFFFF)
-#define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
-#define MDSS_MDP_REV(major,minor,step) ((((major) & 0x000F) << 28) | (((minor) & 0x0FFF) << 16) | ((step) & 0xFFFF))
-#define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0)
-#define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1)
-#define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2)
-#define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0)
-#define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0)
-#define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1)
-#define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0)
-#define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0)
-#define MDSS_MDP_HW_REV_107_1 MDSS_MDP_REV(1, 7, 1)
-#define MDSS_MDP_HW_REV_107_2 MDSS_MDP_REV(1, 7, 2)
-#define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0)
-#define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0)
-#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0)
-#define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0)
-#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0)
-#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0)
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  NOTIFY_UPDATE_INIT,
-  NOTIFY_UPDATE_DEINIT,
-  NOTIFY_UPDATE_START,
-  NOTIFY_UPDATE_STOP,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  NOTIFY_UPDATE_POWER_OFF,
-};
-enum {
-  NOTIFY_TYPE_NO_UPDATE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  NOTIFY_TYPE_SUSPEND,
-  NOTIFY_TYPE_UPDATE,
-  NOTIFY_TYPE_BL_UPDATE,
-  NOTIFY_TYPE_BL_AD_ATTEN_UPDATE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  MDP_RGB_565,
-  MDP_XRGB_8888,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CBCR_H2V2,
-  MDP_Y_CBCR_H2V2_ADRENO,
-  MDP_ARGB_8888,
-  MDP_RGB_888,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CRCB_H2V2,
-  MDP_YCRYCB_H2V1,
-  MDP_CBYCRY_H2V1,
-  MDP_Y_CRCB_H2V1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CBCR_H2V1,
-  MDP_Y_CRCB_H1V2,
-  MDP_Y_CBCR_H1V2,
-  MDP_RGBA_8888,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BGRA_8888,
-  MDP_RGBX_8888,
-  MDP_Y_CRCB_H2V2_TILE,
-  MDP_Y_CBCR_H2V2_TILE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CR_CB_H2V2,
-  MDP_Y_CR_CB_GH2V2,
-  MDP_Y_CB_CR_H2V2,
-  MDP_Y_CRCB_H1V1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CBCR_H1V1,
-  MDP_YCRCB_H1V1,
-  MDP_YCBCR_H1V1,
-  MDP_BGR_565,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BGR_888,
-  MDP_Y_CBCR_H2V2_VENUS,
-  MDP_BGRX_8888,
-  MDP_RGBA_8888_TILE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_ARGB_8888_TILE,
-  MDP_ABGR_8888_TILE,
-  MDP_BGRA_8888_TILE,
-  MDP_RGBX_8888_TILE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_XRGB_8888_TILE,
-  MDP_XBGR_8888_TILE,
-  MDP_BGRX_8888_TILE,
-  MDP_YCBYCR_H2V1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_RGB_565_TILE,
-  MDP_BGR_565_TILE,
-  MDP_ARGB_1555,
-  MDP_RGBA_5551,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_ARGB_4444,
-  MDP_RGBA_4444,
-  MDP_RGB_565_UBWC,
-  MDP_RGBA_8888_UBWC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_Y_CBCR_H2V2_UBWC,
-  MDP_RGBX_8888_UBWC,
-  MDP_Y_CRCB_H2V2_VENUS,
-  MDP_IMGTYPE_LIMIT,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_RGB_BORDERFILL,
-  MDP_FB_FORMAT = MDP_IMGTYPE2_START,
-  MDP_IMGTYPE_LIMIT2
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  PMEM_IMG,
-  FB_IMG,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  HSIC_HUE = 0,
-  HSIC_SAT,
-  HSIC_INT,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  HSIC_CON,
-  NUM_HSIC_PARAM,
-};
-enum mdss_mdp_max_bw_mode {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDSS_MAX_BW_LIMIT_DEFAULT = 0x1,
-  MDSS_MAX_BW_LIMIT_CAMERA = 0x2,
-  MDSS_MAX_BW_LIMIT_HFLIP = 0x4,
-  MDSS_MAX_BW_LIMIT_VFLIP = 0x8,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MDSS_MDP_ROT_ONLY 0x80
-#define MDSS_MDP_RIGHT_MIXER 0x100
-#define MDSS_MDP_DUAL_PIPE 0x200
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_ROT_NOP 0
-#define MDP_FLIP_LR 0x1
-#define MDP_FLIP_UD 0x2
-#define MDP_ROT_90 0x4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_ROT_180 (MDP_FLIP_UD | MDP_FLIP_LR)
-#define MDP_ROT_270 (MDP_ROT_90 | MDP_FLIP_UD | MDP_FLIP_LR)
-#define MDP_DITHER 0x8
-#define MDP_BLUR 0x10
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_BLEND_FG_PREMULT 0x20000
-#define MDP_IS_FG 0x40000
-#define MDP_SOLID_FILL 0x00000020
-#define MDP_VPU_PIPE 0x00000040
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_DEINTERLACE 0x80000000
-#define MDP_SHARPENING 0x40000000
-#define MDP_NO_DMA_BARRIER_START 0x20000000
-#define MDP_NO_DMA_BARRIER_END 0x10000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_NO_BLIT 0x08000000
-#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
-#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
-#define MDP_BLIT_SRC_GEM 0x04000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_BLIT_DST_GEM 0x02000000
-#define MDP_BLIT_NON_CACHED 0x01000000
-#define MDP_OV_PIPE_SHARE 0x00800000
-#define MDP_DEINTERLACE_ODD 0x00400000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OV_PLAY_NOWAIT 0x00200000
-#define MDP_SOURCE_ROTATED_90 0x00100000
-#define MDP_OVERLAY_PP_CFG_EN 0x00080000
-#define MDP_BACKEND_COMPOSITION 0x00040000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_BORDERFILL_SUPPORTED 0x00010000
-#define MDP_SECURE_OVERLAY_SESSION 0x00008000
-#define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000
-#define MDP_OV_PIPE_FORCE_DMA 0x00004000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_MEMORY_ID_TYPE_FB 0x00001000
-#define MDP_BWC_EN 0x00000400
-#define MDP_DECIMATION_EN 0x00000800
-#define MDP_SMP_FORCE_ALLOC 0x00200000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_TRANSP_NOP 0xffffffff
-#define MDP_ALPHA_NOP 0xff
-#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
-#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
-#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
-#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
-#define MDP_FB_PAGE_PROTECTION_INVALID (5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
-struct mdp_rect {
-  uint32_t x;
-  uint32_t y;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t w;
-  uint32_t h;
-};
-struct mdp_img {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t width;
-  uint32_t height;
-  uint32_t format;
-  uint32_t offset;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int memory_id;
-  uint32_t priv;
-};
-struct mult_factor {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t numer;
-  uint32_t denom;
-};
-#define MDP_CCS_RGB2YUV 0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_CCS_YUV2RGB 1
-#define MDP_CCS_SIZE 9
-#define MDP_BV_SIZE 3
-struct mdp_ccs {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int direction;
-  uint16_t ccs[MDP_CCS_SIZE];
-  uint16_t bv[MDP_BV_SIZE];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_csc {
-  int id;
-  uint32_t csc_mv[9];
-  uint32_t csc_pre_bv[3];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t csc_post_bv[3];
-  uint32_t csc_pre_lv[6];
-  uint32_t csc_post_lv[6];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_BLIT_REQ_VERSION 3
-struct color {
-  uint32_t r;
-  uint32_t g;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t b;
-  uint32_t alpha;
-};
-struct mdp_blit_req {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_img src;
-  struct mdp_img dst;
-  struct mdp_rect src_rect;
-  struct mdp_rect dst_rect;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct color const_color;
-  uint32_t alpha;
-  uint32_t transp_mask;
-  uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int sharpening_strength;
-  uint8_t color_space;
-  uint32_t fps;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_blit_req_list {
-  uint32_t count;
-  struct mdp_blit_req req[];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSMFB_DATA_VERSION 2
-struct msmfb_data {
-  uint32_t offset;
-  int memory_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int id;
-  uint32_t flags;
-  uint32_t priv;
-  uint32_t iova;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MSMFB_NEW_REQUEST - 1
-struct msmfb_overlay_data {
-  uint32_t id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msmfb_data data;
-  uint32_t version_key;
-  struct msmfb_data plane1_data;
-  struct msmfb_data plane2_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msmfb_data dst_data;
-};
-struct msmfb_img {
-  uint32_t width;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t height;
-  uint32_t format;
-};
-#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msmfb_writeback_data {
-  struct msmfb_data buf_info;
-  struct msmfb_img img;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_OPS_ENABLE 0x1
-#define MDP_PP_OPS_READ 0x2
-#define MDP_PP_OPS_WRITE 0x4
-#define MDP_PP_OPS_DISABLE 0x8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_IGC_FLAG_ROM0 0x10
-#define MDP_PP_IGC_FLAG_ROM1 0x20
-#define MDSS_PP_DSPP_CFG 0x000
-#define MDSS_PP_SSPP_CFG 0x100
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_LM_CFG 0x200
-#define MDSS_PP_WB_CFG 0x300
-#define MDSS_PP_ARG_MASK 0x3C00
-#define MDSS_PP_ARG_NUM 4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_ARG_SHIFT 10
-#define MDSS_PP_LOCATION_MASK 0x0300
-#define MDSS_PP_LOGICAL_MASK 0x00FF
-#define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
-#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
-#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
-struct mdp_qseed_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t table_num;
-  uint32_t ops;
-  uint32_t len;
-  uint32_t * data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_sharp_cfg {
-  uint32_t flags;
-  uint32_t strength;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t edge_thr;
-  uint32_t smooth_thr;
-  uint32_t noise_thr;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_qseed_cfg_data {
-  uint32_t block;
-  struct mdp_qseed_cfg qseed_data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OVERLAY_PP_CSC_CFG 0x1
-#define MDP_OVERLAY_PP_QSEED_CFG 0x2
-#define MDP_OVERLAY_PP_PA_CFG 0x4
-#define MDP_OVERLAY_PP_IGC_CFG 0x8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OVERLAY_PP_SHARP_CFG 0x10
-#define MDP_OVERLAY_PP_HIST_CFG 0x20
-#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
-#define MDP_OVERLAY_PP_PA_V2_CFG 0x80
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OVERLAY_PP_PCC_CFG 0x100
-#define MDP_CSC_FLAG_ENABLE 0x1
-#define MDP_CSC_FLAG_YUV_IN 0x2
-#define MDP_CSC_FLAG_YUV_OUT 0x4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_CSC_MATRIX_COEFF_SIZE 9
-#define MDP_CSC_CLAMP_SIZE 6
-#define MDP_CSC_BIAS_SIZE 3
-struct mdp_csc_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t flags;
-  uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE];
-  uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE];
-  uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE];
-  uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE];
-};
-struct mdp_csc_cfg_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  struct mdp_csc_cfg csc_data;
-};
-struct mdp_pa_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t flags;
-  uint32_t hue_adj;
-  uint32_t sat_adj;
-  uint32_t val_adj;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t cont_adj;
-};
-struct mdp_pa_mem_col_cfg {
-  uint32_t color_adjust_p0;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t color_adjust_p1;
-  uint32_t hue_region;
-  uint32_t sat_region;
-  uint32_t val_region;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MDP_SIX_ZONE_LUT_SIZE 384
-#define MDP_PP_PA_HUE_ENABLE 0x10
-#define MDP_PP_PA_SAT_ENABLE 0x20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_VAL_ENABLE 0x40
-#define MDP_PP_PA_CONT_ENABLE 0x80
-#define MDP_PP_PA_SIX_ZONE_ENABLE 0x100
-#define MDP_PP_PA_SKIN_ENABLE 0x200
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_SKY_ENABLE 0x400
-#define MDP_PP_PA_FOL_ENABLE 0x800
-#define MDP_PP_PA_MEM_PROT_HUE_EN 0x1
-#define MDP_PP_PA_MEM_PROT_SAT_EN 0x2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_MEM_PROT_VAL_EN 0x4
-#define MDP_PP_PA_MEM_PROT_CONT_EN 0x8
-#define MDP_PP_PA_MEM_PROT_SIX_EN 0x10
-#define MDP_PP_PA_MEM_PROT_BLEND_EN 0x20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_HUE_MASK 0x1000
-#define MDP_PP_PA_SAT_MASK 0x2000
-#define MDP_PP_PA_VAL_MASK 0x4000
-#define MDP_PP_PA_CONT_MASK 0x8000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000
-#define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000
-#define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000
-#define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_MEM_COL_SKY_MASK 0x100000
-#define MDP_PP_PA_MEM_COL_FOL_MASK 0x200000
-#define MDP_PP_PA_MEM_PROTECT_EN 0x400000
-#define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_PP_PA_LEFT_HOLD 0x1
-#define MDP_PP_PA_RIGHT_HOLD 0x2
-struct mdp_pa_v2_data {
-  uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t global_hue_adj;
-  uint32_t global_sat_adj;
-  uint32_t global_val_adj;
-  uint32_t global_cont_adj;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pa_mem_col_cfg skin_cfg;
-  struct mdp_pa_mem_col_cfg sky_cfg;
-  struct mdp_pa_mem_col_cfg fol_cfg;
-  uint32_t six_zone_len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t six_zone_thresh;
-  uint32_t * six_zone_curve_p0;
-  uint32_t * six_zone_curve_p1;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pa_mem_col_data_v1_7 {
-  uint32_t color_adjust_p0;
-  uint32_t color_adjust_p1;
-  uint32_t color_adjust_p2;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t blend_gain;
-  uint8_t sat_hold;
-  uint8_t val_hold;
-  uint32_t hue_region;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t sat_region;
-  uint32_t val_region;
-};
-struct mdp_pa_data_v1_7 {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t mode;
-  uint32_t global_hue_adj;
-  uint32_t global_sat_adj;
-  uint32_t global_val_adj;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t global_cont_adj;
-  struct mdp_pa_mem_col_data_v1_7 skin_cfg;
-  struct mdp_pa_mem_col_data_v1_7 sky_cfg;
-  struct mdp_pa_mem_col_data_v1_7 fol_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t six_zone_thresh;
-  uint32_t six_zone_adj_p0;
-  uint32_t six_zone_adj_p1;
-  uint8_t six_zone_sat_hold;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t six_zone_val_hold;
-  uint32_t six_zone_len;
-  uint32_t * six_zone_curve_p0;
-  uint32_t * six_zone_curve_p1;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_pa_v2_cfg_data {
-  uint32_t version;
-  uint32_t block;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t flags;
-  struct mdp_pa_v2_data pa_v2_data;
-  void * cfg_payload;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  mdp_igc_rec601 = 1,
-  mdp_igc_rec709,
-  mdp_igc_srgb,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_igc_custom,
-  mdp_igc_rec_max,
-};
-struct mdp_igc_lut_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  uint32_t version;
-  uint32_t len, ops;
-  uint32_t * c0_c1_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * c2_data;
-  void * cfg_payload;
-};
-struct mdp_igc_lut_data_v1_7 {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t table_fmt;
-  uint32_t len;
-  uint32_t * c0_c1_data;
-  uint32_t * c2_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_histogram_cfg {
-  uint32_t ops;
-  uint32_t block;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t frame_cnt;
-  uint8_t bit_mask;
-  uint16_t num_bins;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_hist_lut_data_v1_7 {
-  uint32_t len;
-  uint32_t * data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_hist_lut_data {
-  uint32_t block;
-  uint32_t version;
-  uint32_t hist_lut_first;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t ops;
-  uint32_t len;
-  uint32_t * data;
-  void * cfg_payload;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_pcc_coeff {
-  uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pcc_coeff_v1_7 {
-  uint32_t c, r, g, b, rg, gb, rb, rgb;
-};
-struct mdp_pcc_data_v1_7 {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pcc_coeff_v1_7 r, g, b;
-};
-struct mdp_pcc_cfg_data {
-  uint32_t version;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  uint32_t ops;
-  struct mdp_pcc_coeff r, g, b;
-  void * cfg_payload;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  mdp_lut_igc,
-  mdp_lut_pgc,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_lut_hist,
-  mdp_lut_rgb,
-  mdp_lut_max,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_overlay_pp_params {
-  uint32_t config_ops;
-  struct mdp_csc_cfg csc_cfg;
-  struct mdp_qseed_cfg qseed_cfg[2];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pa_cfg pa_cfg;
-  struct mdp_pa_v2_data pa_v2_cfg;
-  struct mdp_igc_lut_data igc_cfg;
-  struct mdp_sharp_cfg sharp_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_histogram_cfg hist_cfg;
-  struct mdp_hist_lut_data hist_lut_cfg;
-  struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
-  struct mdp_pcc_cfg_data pcc_cfg_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum mdss_mdp_blend_op {
-  BLEND_OP_NOT_DEFINED = 0,
-  BLEND_OP_OPAQUE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  BLEND_OP_PREMULTIPLIED,
-  BLEND_OP_COVERAGE,
-  BLEND_OP_MAX,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
-#define MAX_PLANES 4
-struct mdp_scale_data {
-  uint8_t enable_pxl_ext;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int init_phase_x[MAX_PLANES];
-  int phase_step_x[MAX_PLANES];
-  int init_phase_y[MAX_PLANES];
-  int phase_step_y[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int num_ext_pxls_left[MAX_PLANES];
-  int num_ext_pxls_right[MAX_PLANES];
-  int num_ext_pxls_top[MAX_PLANES];
-  int num_ext_pxls_btm[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int left_ftch[MAX_PLANES];
-  int left_rpt[MAX_PLANES];
-  int right_ftch[MAX_PLANES];
-  int right_rpt[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int top_rpt[MAX_PLANES];
-  int btm_rpt[MAX_PLANES];
-  int top_ftch[MAX_PLANES];
-  int btm_ftch[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t roi_w[MAX_PLANES];
-};
-enum mdp_overlay_pipe_type {
-  PIPE_TYPE_AUTO = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  PIPE_TYPE_VIG,
-  PIPE_TYPE_RGB,
-  PIPE_TYPE_DMA,
-  PIPE_TYPE_CURSOR,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  PIPE_TYPE_MAX,
-};
-struct mdp_overlay {
-  struct msmfb_img src;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_rect src_rect;
-  struct mdp_rect dst_rect;
-  uint32_t z_order;
-  uint32_t is_fg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t alpha;
-  uint32_t blend_op;
-  uint32_t transp_mask;
-  uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t pipe_type;
-  uint32_t id;
-  uint8_t priority;
-  uint32_t user_data[6];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bg_color;
-  uint8_t horz_deci;
-  uint8_t vert_deci;
-  struct mdp_overlay_pp_params overlay_pp_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_scale_data scale;
-  uint8_t color_space;
-  uint32_t frame_rate;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msmfb_overlay_3d {
-  uint32_t is_3d;
-  uint32_t width;
-  uint32_t height;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct msmfb_overlay_blt {
-  uint32_t enable;
-  uint32_t offset;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t width;
-  uint32_t height;
-  uint32_t bpp;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_histogram {
-  uint32_t frame_cnt;
-  uint32_t bin_cnt;
-  uint32_t * r;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * g;
-  uint32_t * b;
-};
-#define MISR_CRC_BATCH_SIZE 32
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  DISPLAY_MISR_EDP,
-  DISPLAY_MISR_DSI0,
-  DISPLAY_MISR_DSI1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DISPLAY_MISR_HDMI,
-  DISPLAY_MISR_LCDC,
-  DISPLAY_MISR_MDP,
-  DISPLAY_MISR_ATV,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DISPLAY_MISR_DSI_CMD,
-  DISPLAY_MISR_MAX
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MISR_OP_NONE,
-  MISR_OP_SFM,
-  MISR_OP_MFM,
-  MISR_OP_BM,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MISR_OP_MAX
-};
-struct mdp_misr {
-  uint32_t block_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t frame_count;
-  uint32_t crc_op_mode;
-  uint32_t crc_value[MISR_CRC_BATCH_SIZE];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  MDP_BLOCK_RESERVED = 0,
-  MDP_BLOCK_OVERLAY_0,
-  MDP_BLOCK_OVERLAY_1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BLOCK_VG_1,
-  MDP_BLOCK_VG_2,
-  MDP_BLOCK_RGB_1,
-  MDP_BLOCK_RGB_2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BLOCK_DMA_P,
-  MDP_BLOCK_DMA_S,
-  MDP_BLOCK_DMA_E,
-  MDP_BLOCK_OVERLAY_2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
-  MDP_LOGICAL_BLOCK_DISP_1,
-  MDP_LOGICAL_BLOCK_DISP_2,
-  MDP_BLOCK_MAX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_histogram_start_req {
-  uint32_t block;
-  uint8_t frame_cnt;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t bit_mask;
-  uint16_t num_bins;
-};
-struct mdp_histogram_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  uint32_t bin_cnt;
-  uint32_t * c0;
-  uint32_t * c1;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * c2;
-  uint32_t * extra_info;
-};
-#define GC_LUT_ENTRIES_V1_7 512
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_ar_gc_lut_data {
-  uint32_t x_start;
-  uint32_t slope;
-  uint32_t offset;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_pgc_lut_data {
-  uint32_t version;
-  uint32_t block;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t flags;
-  uint8_t num_r_stages;
-  uint8_t num_g_stages;
-  uint8_t num_b_stages;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_ar_gc_lut_data * r_data;
-  struct mdp_ar_gc_lut_data * g_data;
-  struct mdp_ar_gc_lut_data * b_data;
-  void * cfg_payload;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define PGC_LUT_ENTRIES 1024
-struct mdp_pgc_lut_data_v1_7 {
-  uint32_t len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * c0_data;
-  uint32_t * c1_data;
-  uint32_t * c2_data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_rgb_lut_data {
-  uint32_t flags;
-  uint32_t lut_type;
-  struct fb_cmap cmap;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  mdp_rgb_lut_gc,
-  mdp_rgb_lut_hist,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_lut_cfg_data {
-  uint32_t lut_type;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdp_igc_lut_data igc_lut_data;
-    struct mdp_pgc_lut_data pgc_lut_data;
-    struct mdp_hist_lut_data hist_lut_data;
-    struct mdp_rgb_lut_data rgb_lut_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  } data;
-};
-struct mdp_bl_scale_data {
-  uint32_t min_lvl;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t scale;
-};
-struct mdp_pa_cfg_data {
-  uint32_t block;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pa_cfg pa_data;
-};
-struct mdp_dither_data_v1_7 {
-  uint32_t g_y_depth;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t r_cr_depth;
-  uint32_t b_cb_depth;
-};
-struct mdp_dither_cfg_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t version;
-  uint32_t block;
-  uint32_t flags;
-  uint32_t mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t g_y_depth;
-  uint32_t r_cr_depth;
-  uint32_t b_cb_depth;
-  void * cfg_payload;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MDP_GAMUT_TABLE_NUM 8
-#define MDP_GAMUT_TABLE_NUM_V1_7 4
-#define MDP_GAMUT_SCALE_OFF_TABLE_NUM 3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_GAMUT_TABLE_V1_7_SZ 1229
-#define MDP_GAMUT_SCALE_OFF_SZ 16
-#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32
-struct mdp_gamut_cfg_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  uint32_t flags;
-  uint32_t version;
-  uint32_t gamut_first;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
-  uint16_t * r_tbl[MDP_GAMUT_TABLE_NUM];
-  uint16_t * g_tbl[MDP_GAMUT_TABLE_NUM];
-  uint16_t * b_tbl[MDP_GAMUT_TABLE_NUM];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  void * cfg_payload;
-};
-enum {
-  mdp_gamut_fine_mode = 0x1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_gamut_coarse_mode,
-};
-struct mdp_gamut_data_v1_7 {
-  uint32_t mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t map_en;
-  uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7];
-  uint32_t * c0_data[MDP_GAMUT_TABLE_NUM_V1_7];
-  uint32_t * c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
-  uint32_t * scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
-};
-struct mdp_calib_config_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t ops;
-  uint32_t addr;
-  uint32_t data;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_calib_config_buffer {
-  uint32_t ops;
-  uint32_t size;
-  uint32_t * buffer;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_calib_dcm_state {
-  uint32_t ops;
-  uint32_t dcm_state;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  DCM_UNINIT,
-  DCM_UNBLANK,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DCM_ENTER,
-  DCM_EXIT,
-  DCM_BLANK,
-  DTM_ENTER,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DTM_EXIT,
-};
-#define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000
-#define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_SPLIT_MASK 0x30000000
-#define MDSS_MAX_BL_BRIGHTNESS 255
-#define AD_BL_LIN_LEN 256
-#define AD_BL_ATT_LUT_LEN 33
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_AD_MODE_AUTO_BL 0x0
-#define MDSS_AD_MODE_AUTO_STR 0x1
-#define MDSS_AD_MODE_TARG_STR 0x3
-#define MDSS_AD_MODE_MAN_STR 0x7
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_AD_MODE_CALIB 0xF
-#define MDP_PP_AD_INIT 0x10
-#define MDP_PP_AD_CFG 0x20
-struct mdss_ad_init {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t asym_lut[33];
-  uint32_t color_corr_lut[33];
-  uint8_t i_control[2];
-  uint16_t black_lvl;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t white_lvl;
-  uint8_t var;
-  uint8_t limit_ampl;
-  uint8_t i_dither;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t slope_max;
-  uint8_t slope_min;
-  uint8_t dither_ctl;
-  uint8_t format;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t auto_size;
-  uint16_t frame_w;
-  uint16_t frame_h;
-  uint8_t logo_v;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t logo_h;
-  uint32_t alpha;
-  uint32_t alpha_base;
-  uint32_t al_thresh;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bl_lin_len;
-  uint32_t bl_att_len;
-  uint32_t * bl_lin;
-  uint32_t * bl_lin_inv;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * bl_att_lut;
-};
-#define MDSS_AD_BL_CTRL_MODE_EN 1
-#define MDSS_AD_BL_CTRL_MODE_DIS 0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdss_ad_cfg {
-  uint32_t mode;
-  uint32_t al_calib_lut[33];
-  uint16_t backlight_min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t backlight_max;
-  uint16_t backlight_scale;
-  uint16_t amb_light_min;
-  uint16_t filter[2];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t calib[4];
-  uint8_t strength_limit;
-  uint8_t t_filter_recursion;
-  uint16_t stab_itr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bl_ctrl_mode;
-};
-struct mdss_ad_init_cfg {
-  uint32_t ops;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union {
-    struct mdss_ad_init init;
-    struct mdss_ad_cfg cfg;
-  } params;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdss_ad_input {
-  uint32_t mode;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    uint32_t amb_light;
-    uint32_t strength;
-    uint32_t calib_bl;
-  } in;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t output;
-};
-#define MDSS_CALIB_MODE_BL 0x1
-struct mdss_calib_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t ops;
-  uint32_t calib_mask;
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_op_pcc_cfg,
-  mdp_op_csc_cfg,
-  mdp_op_lut_cfg,
-  mdp_op_qseed_cfg,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_bl_scale_cfg,
-  mdp_op_pa_cfg,
-  mdp_op_pa_v2_cfg,
-  mdp_op_dither_cfg,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_op_gamut_cfg,
-  mdp_op_calib_cfg,
-  mdp_op_ad_cfg,
-  mdp_op_ad_input,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_op_calib_mode,
-  mdp_op_calib_buffer,
-  mdp_op_calib_dcm_state,
-  mdp_op_max,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  WB_FORMAT_NV12,
-  WB_FORMAT_RGB_565,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  WB_FORMAT_RGB_888,
-  WB_FORMAT_xRGB_8888,
-  WB_FORMAT_ARGB_8888,
-  WB_FORMAT_BGRA_8888,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  WB_FORMAT_BGRX_8888,
-  WB_FORMAT_ARGB_8888_INPUT_ALPHA
-};
-struct msmfb_mdp_pp {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t op;
-  union {
-    struct mdp_pcc_cfg_data pcc_cfg_data;
-    struct mdp_csc_cfg_data csc_cfg_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdp_lut_cfg_data lut_cfg_data;
-    struct mdp_qseed_cfg_data qseed_cfg_data;
-    struct mdp_bl_scale_data bl_scale_data;
-    struct mdp_pa_cfg_data pa_cfg_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
-    struct mdp_dither_cfg_data dither_cfg_data;
-    struct mdp_gamut_cfg_data gamut_cfg_data;
-    struct mdp_calib_config_data calib_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdss_ad_init_cfg ad_init_cfg;
-    struct mdss_calib_cfg mdss_calib_cfg;
-    struct mdss_ad_input ad_input;
-    struct mdp_calib_config_buffer calib_buffer;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdp_calib_dcm_state calib_dcm;
-  } data;
-};
-#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  metadata_op_none,
-  metadata_op_base_blend,
-  metadata_op_frame_rate,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  metadata_op_vic,
-  metadata_op_wb_format,
-  metadata_op_wb_secure,
-  metadata_op_get_caps,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  metadata_op_crc,
-  metadata_op_get_ion_fd,
-  metadata_op_max
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_blend_cfg {
-  uint32_t is_premultiplied;
-};
-struct mdp_mixer_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t writeback_format;
-  uint32_t alpha;
-};
-struct mdss_hw_caps {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t mdp_rev;
-  uint8_t rgb_pipes;
-  uint8_t vig_pipes;
-  uint8_t dma_pipes;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t max_smp_cnt;
-  uint8_t smp_per_pipe;
-  uint32_t features;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct msmfb_metadata {
-  uint32_t op;
-  uint32_t flags;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct mdp_misr misr_request;
-    struct mdp_blend_cfg blend_cfg;
-    struct mdp_mixer_cfg mixer_cfg;
-    uint32_t panel_frame_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    uint32_t video_info_code;
-    struct mdss_hw_caps caps;
-    uint8_t secure_en;
-    int fbmem_ionfd;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  } data;
-};
-#define MDP_MAX_FENCE_FD 32
-#define MDP_BUF_SYNC_FLAG_WAIT 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
-struct mdp_buf_sync {
-  uint32_t flags;
-  uint32_t acq_fen_fd_cnt;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t session_id;
-  int * acq_fen_fd;
-  int * rel_fen_fd;
-  int * retire_fen_fd;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_async_blit_req_list {
-  struct mdp_buf_sync sync;
-  uint32_t count;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_blit_req req[];
-};
-#define MDP_DISPLAY_COMMIT_OVERLAY 1
-struct mdp_display_commit {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t flags;
-  uint32_t wait_for_finish;
-  struct fb_var_screeninfo var;
-  struct mdp_rect l_roi;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_rect r_roi;
-};
-struct mdp_overlay_list {
-  uint32_t num_overlays;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_overlay * * overlay_list;
-  uint32_t flags;
-  uint32_t processed_overlays;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_page_protection {
-  uint32_t page_protection;
-};
-struct mdp_mixer_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int pndx;
-  int pnum;
-  int ptype;
-  int mixer_num;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int z_order;
-};
-#define MAX_PIPE_PER_MIXER 7
-struct msmfb_mixer_info_req {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int mixer_num;
-  int cnt;
-  struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  DISPLAY_SUBSYSTEM_ID,
-  ROTATOR_SUBSYSTEM_ID,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  MDP_IOMMU_DOMAIN_CP,
-  MDP_IOMMU_DOMAIN_NS,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  MDP_WRITEBACK_MIRROR_OFF,
-  MDP_WRITEBACK_MIRROR_ON,
-  MDP_WRITEBACK_MIRROR_PAUSE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_WRITEBACK_MIRROR_RESUME,
-};
-enum mdp_color_space {
-  MDP_CSC_ITU_R_601,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_CSC_ITU_R_601_FR,
-  MDP_CSC_ITU_R_709,
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_igc_v1_7 = 1,
-  mdp_igc_vmax,
-  mdp_hist_lut_v1_7,
-  mdp_hist_lut_vmax,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_pgc_v1_7,
-  mdp_pgc_vmax,
-  mdp_dither_v1_7,
-  mdp_dither_vmax,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_gamut_v1_7,
-  mdp_gamut_vmax,
-  mdp_pa_v1_7,
-  mdp_pa_vmax,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  mdp_pcc_v1_7,
-  mdp_pcc_vmax,
-  mdp_pp_legacy,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  IGC = 1,
-  PCC,
-  GC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  PA,
-  GAMUT,
-  DITHER,
-  QSEED,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  HIST_LUT,
-  HIST,
-  PP_FEATURE_MAX,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pp_feature_version {
-  uint32_t pp_feature;
-  uint32_t version_info;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_rmnet.h b/k318/kernel-headers/linux/msm_rmnet.h
deleted file mode 100644
index 7e34d6d..0000000
--- a/k318/kernel-headers/linux/msm_rmnet.h
+++ /dev/null

@@ -1,165 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_MSM_RMNET_H_
-#define _UAPI_MSM_RMNET_H_
-#define RMNET_MODE_NONE (0x00)
-#define RMNET_MODE_LLP_ETH (0x01)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_MODE_LLP_IP (0x02)
-#define RMNET_MODE_QOS (0x04)
-#define RMNET_MODE_MASK (RMNET_MODE_LLP_ETH | RMNET_MODE_LLP_IP | RMNET_MODE_QOS)
-#define RMNET_IS_MODE_QOS(mode) ((mode & RMNET_MODE_QOS) == RMNET_MODE_QOS)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IS_MODE_IP(mode) ((mode & RMNET_MODE_LLP_IP) == RMNET_MODE_LLP_IP)
-enum rmnet_ioctl_cmds_e {
-  RMNET_IOCTL_SET_LLP_ETHERNET = 0x000089F1,
-  RMNET_IOCTL_SET_LLP_IP = 0x000089F2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_GET_LLP = 0x000089F3,
-  RMNET_IOCTL_SET_QOS_ENABLE = 0x000089F4,
-  RMNET_IOCTL_SET_QOS_DISABLE = 0x000089F5,
-  RMNET_IOCTL_GET_QOS = 0x000089F6,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_GET_OPMODE = 0x000089F7,
-  RMNET_IOCTL_OPEN = 0x000089F8,
-  RMNET_IOCTL_CLOSE = 0x000089F9,
-  RMNET_IOCTL_FLOW_ENABLE = 0x000089FA,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_FLOW_DISABLE = 0x000089FB,
-  RMNET_IOCTL_FLOW_SET_HNDL = 0x000089FC,
-  RMNET_IOCTL_EXTENDED = 0x000089FD,
-  RMNET_IOCTL_MAX
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum rmnet_ioctl_extended_cmds_e {
-  RMNET_IOCTL_GET_SUPPORTED_FEATURES = 0x0000,
-  RMNET_IOCTL_SET_MRU = 0x0001,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_GET_MRU = 0x0002,
-  RMNET_IOCTL_GET_EPID = 0x0003,
-  RMNET_IOCTL_GET_DRIVER_NAME = 0x0004,
-  RMNET_IOCTL_ADD_MUX_CHANNEL = 0x0005,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_SET_EGRESS_DATA_FORMAT = 0x0006,
-  RMNET_IOCTL_SET_INGRESS_DATA_FORMAT = 0x0007,
-  RMNET_IOCTL_SET_AGGREGATION_COUNT = 0x0008,
-  RMNET_IOCTL_GET_AGGREGATION_COUNT = 0x0009,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_SET_AGGREGATION_SIZE = 0x000A,
-  RMNET_IOCTL_GET_AGGREGATION_SIZE = 0x000B,
-  RMNET_IOCTL_FLOW_CONTROL = 0x000C,
-  RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL = 0x000D,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_GET_HWSW_MAP = 0x000E,
-  RMNET_IOCTL_SET_RX_HEADROOM = 0x000F,
-  RMNET_IOCTL_GET_EP_PAIR = 0x0010,
-  RMNET_IOCTL_SET_QOS_VERSION = 0x0011,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_GET_QOS_VERSION = 0x0012,
-  RMNET_IOCTL_GET_SUPPORTED_QOS_MODES = 0x0013,
-  RMNET_IOCTL_SET_SLEEP_STATE = 0x0014,
-  RMNET_IOCTL_SET_XLAT_DEV_INFO = 0x0015,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_IOCTL_DEREGISTER_DEV = 0x0016,
-  RMNET_IOCTL_GET_SG_SUPPORT = 0x0017,
-  RMNET_IOCTL_EXTENDED_MAX = 0x0018
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1 << 0)
-#define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT (1 << 1)
-#define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT (1 << 2)
-#define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT (1 << 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1 << 4)
-#define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE (1 << 5)
-#define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE (1 << 6)
-#define RMNET_IOCTL_FEAT_FLOW_CONTROL (1 << 7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1 << 8)
-#define RMNET_IOCTL_FEAT_GET_HWSW_MAP (1 << 9)
-#define RMNET_IOCTL_EGRESS_FORMAT_MAP (1 << 1)
-#define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1 << 3)
-#define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM (1 << 4)
-#define RMNET_IOCTL_INGRESS_FORMAT_MAP (1 << 1)
-#define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1 << 3)
-#define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM (1 << 4)
-#define RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA (1 << 5)
-#ifndef IFNAMSIZ
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define IFNAMSIZ 16
-#endif
-struct rmnet_ioctl_extended_s {
-  uint32_t extended_ioctl;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union {
-    uint32_t data;
-    int8_t if_name[IFNAMSIZ];
-    struct {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint32_t mux_id;
-      int8_t vchannel_name[IFNAMSIZ];
-    } rmnet_mux_val;
-    struct {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint8_t flow_mode;
-      uint8_t mux_id;
-    } flow_control_prop;
-    struct {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint32_t consumer_pipe_num;
-      uint32_t producer_pipe_num;
-    } ipa_ep_pair;
-    struct {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint32_t __data;
-      uint32_t agg_size;
-      uint32_t agg_count;
-    } ingress_format;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  } u;
-};
-struct rmnet_ioctl_data_s {
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    uint32_t operation_mode;
-    uint32_t tcm_handle;
-  } u;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_IOCTL_QOS_MODE_6 (1 << 0)
-#define RMNET_IOCTL_QOS_MODE_8 (1 << 1)
-#define QMI_QOS_HDR_S __attribute((__packed__)) qmi_qos_hdr_s
-struct QMI_QOS_HDR_S {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char version;
-  unsigned char flags;
-  uint32_t flow_id;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct qmi_qos_hdr8_s {
-  struct QMI_QOS_HDR_S hdr;
-  uint8_t reserved[2];
-} __attribute((__packed__));
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_rotator.h b/k318/kernel-headers/linux/msm_rotator.h
deleted file mode 100644
index 88bd68e..0000000
--- a/k318/kernel-headers/linux/msm_rotator.h
+++ /dev/null

@@ -1,76 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI__MSM_ROTATOR_H__
-#define _UAPI__MSM_ROTATOR_H__
-#include <linux/types.h>
-#include <linux/msm_mdp.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_ROTATOR_IOCTL_MAGIC 'R'
-#define MSM_ROTATOR_IOCTL_START _IOWR(MSM_ROTATOR_IOCTL_MAGIC, 1, struct msm_rotator_img_info)
-#define MSM_ROTATOR_IOCTL_ROTATE _IOW(MSM_ROTATOR_IOCTL_MAGIC, 2, struct msm_rotator_data_info)
-#define MSM_ROTATOR_IOCTL_FINISH _IOW(MSM_ROTATOR_IOCTL_MAGIC, 3, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ROTATOR_VERSION_01 0xA5B4C301
-enum rotator_clk_type {
-  ROTATOR_CORE_CLK,
-  ROTATOR_PCLK,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  ROTATOR_IMEM_CLK
-};
-struct msm_rotator_img_info {
-  unsigned int session_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msmfb_img src;
-  struct msmfb_img dst;
-  struct mdp_rect src_rect;
-  unsigned int dst_x;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int dst_y;
-  unsigned char rotations;
-  int enable;
-  unsigned int downscale_ratio;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int secure;
-};
-struct msm_rotator_data_info {
-  int session_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msmfb_data src;
-  struct msmfb_data dst;
-  unsigned int version_key;
-  struct msmfb_data src_chroma;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct msmfb_data dst_chroma;
-};
-struct msm_rot_clocks {
-  const char * clk_name;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  enum rotator_clk_type clk_type;
-  unsigned int clk_rate;
-};
-struct msm_rotator_platform_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int number_of_clocks;
-  unsigned int hardware_version_number;
-  struct msm_rot_clocks * rotator_clks;
-  char rot_iommu_split_domain;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#endif
-

diff --git a/k318/kernel-headers/linux/msm_thermal_ioctl.h b/k318/kernel-headers/linux/msm_thermal_ioctl.h
deleted file mode 100644
index 547746b..0000000
--- a/k318/kernel-headers/linux/msm_thermal_ioctl.h
+++ /dev/null

@@ -1,76 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _MSM_THERMAL_IOCTL_H
-#define _MSM_THERMAL_IOCTL_H
-#include <linux/ioctl.h>
-#define MSM_THERMAL_IOCTL_NAME "msm_thermal_query"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_IOCTL_FREQ_SIZE 16
-struct __attribute__((__packed__)) cpu_freq_arg {
-  uint32_t cpu_num;
-  uint32_t freq_req;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct __attribute__((__packed__)) clock_plan_arg {
-  uint32_t cluster_num;
-  uint32_t freq_table_len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t set_idx;
-  unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
-};
-struct __attribute__((__packed__)) voltage_plan_arg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t cluster_num;
-  uint32_t voltage_table_len;
-  uint32_t set_idx;
-  uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct __attribute__((__packed__)) msm_thermal_ioctl {
-  uint32_t size;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct cpu_freq_arg cpu_freq;
-    struct clock_plan_arg clock_freq;
-    struct voltage_plan_arg voltage;
-  };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  MSM_SET_CPU_MAX_FREQ = 0x00,
-  MSM_SET_CPU_MIN_FREQ = 0x01,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MSM_SET_CLUSTER_MAX_FREQ = 0x02,
-  MSM_SET_CLUSTER_MIN_FREQ = 0x03,
-  MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
-  MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MSM_CMD_MAX_NR,
-};
-#define MSM_THERMAL_MAGIC_NUM 0xCA
-#define MSM_THERMAL_SET_CPU_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CPU_MAX_FREQ, struct msm_thermal_ioctl)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_THERMAL_SET_CPU_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CPU_MIN_FREQ, struct msm_thermal_ioctl)
-#define MSM_THERMAL_SET_CLUSTER_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CLUSTER_MAX_FREQ, struct msm_thermal_ioctl)
-#define MSM_THERMAL_SET_CLUSTER_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CLUSTER_MIN_FREQ, struct msm_thermal_ioctl)
-#define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
-#endif
-

diff --git a/k318/kernel-headers/linux/qcedev.h b/k318/kernel-headers/linux/qcedev.h
deleted file mode 100644
index c868498..0000000
--- a/k318/kernel-headers/linux/qcedev.h
+++ /dev/null

@@ -1,156 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_QCEDEV__H
-#define _UAPI_QCEDEV__H
-#include <linux/types.h>
-#include <linux/ioctl.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#include "fips_status.h"
-#define QCEDEV_MAX_SHA_BLOCK_SIZE 64
-#define QCEDEV_MAX_BEARER 31
-#define QCEDEV_MAX_KEY_SIZE 64
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define QCEDEV_MAX_IV_SIZE 32
-#define QCEDEV_MAX_BUFFERS 16
-#define QCEDEV_MAX_SHA_DIGEST 32
-#define QCEDEV_USE_PMEM 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define QCEDEV_NO_PMEM 0
-#define QCEDEV_AES_KEY_128 16
-#define QCEDEV_AES_KEY_192 24
-#define QCEDEV_AES_KEY_256 32
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum qcedev_oper_enum {
-  QCEDEV_OPER_DEC = 0,
-  QCEDEV_OPER_ENC = 1,
-  QCEDEV_OPER_DEC_NO_KEY = 2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_OPER_ENC_NO_KEY = 3,
-  QCEDEV_OPER_LAST
-};
-enum qcedev_cipher_alg_enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_ALG_DES = 0,
-  QCEDEV_ALG_3DES = 1,
-  QCEDEV_ALG_AES = 2,
-  QCEDEV_ALG_LAST
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum qcedev_cipher_mode_enum {
-  QCEDEV_AES_MODE_CBC = 0,
-  QCEDEV_AES_MODE_ECB = 1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_AES_MODE_CTR = 2,
-  QCEDEV_AES_MODE_XTS = 3,
-  QCEDEV_AES_MODE_CCM = 4,
-  QCEDEV_DES_MODE_CBC = 5,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_DES_MODE_ECB = 6,
-  QCEDEV_AES_DES_MODE_LAST
-};
-enum qcedev_sha_alg_enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_ALG_SHA1 = 0,
-  QCEDEV_ALG_SHA256 = 1,
-  QCEDEV_ALG_SHA1_HMAC = 2,
-  QCEDEV_ALG_SHA256_HMAC = 3,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  QCEDEV_ALG_AES_CMAC = 4,
-  QCEDEV_ALG_SHA_ALG_LAST
-};
-struct buf_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union {
-    uint32_t offset;
-    uint8_t * vaddr;
-  };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t len;
-};
-struct qcedev_vbuf_info {
-  struct buf_info src[QCEDEV_MAX_BUFFERS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct buf_info dst[QCEDEV_MAX_BUFFERS];
-};
-struct qcedev_pmem_info {
-  int fd_src;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct buf_info src[QCEDEV_MAX_BUFFERS];
-  int fd_dst;
-  struct buf_info dst[QCEDEV_MAX_BUFFERS];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct qcedev_cipher_op_req {
-  uint8_t use_pmem;
-  union {
-    struct qcedev_pmem_info pmem;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct qcedev_vbuf_info vbuf;
-  };
-  uint32_t entries;
-  uint32_t data_len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t in_place_op;
-  uint8_t enckey[QCEDEV_MAX_KEY_SIZE];
-  uint32_t encklen;
-  uint8_t iv[QCEDEV_MAX_IV_SIZE];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t ivlen;
-  uint32_t byteoffset;
-  enum qcedev_cipher_alg_enum alg;
-  enum qcedev_cipher_mode_enum mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  enum qcedev_oper_enum op;
-};
-struct qcedev_sha_op_req {
-  struct buf_info data[QCEDEV_MAX_BUFFERS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t entries;
-  uint32_t data_len;
-  uint8_t digest[QCEDEV_MAX_SHA_DIGEST];
-  uint32_t diglen;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t * authkey;
-  uint32_t authklen;
-  enum qcedev_sha_alg_enum alg;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct qfips_verify_t {
-  unsigned kernel_size;
-  void * kernel;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct file;
-#define QCEDEV_IOC_MAGIC 0x87
-#define QCEDEV_IOCTL_ENC_REQ _IOWR(QCEDEV_IOC_MAGIC, 1, struct qcedev_cipher_op_req)
-#define QCEDEV_IOCTL_DEC_REQ _IOWR(QCEDEV_IOC_MAGIC, 2, struct qcedev_cipher_op_req)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define QCEDEV_IOCTL_SHA_INIT_REQ _IOWR(QCEDEV_IOC_MAGIC, 3, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_UPDATE_REQ _IOWR(QCEDEV_IOC_MAGIC, 4, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_FINAL_REQ _IOWR(QCEDEV_IOC_MAGIC, 5, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_GET_SHA_REQ _IOWR(QCEDEV_IOC_MAGIC, 6, struct qcedev_sha_op_req)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define QCEDEV_IOCTL_LOCK_CE _IO(QCEDEV_IOC_MAGIC, 7)
-#define QCEDEV_IOCTL_UNLOCK_CE _IO(QCEDEV_IOC_MAGIC, 8)
-#define QCEDEV_IOCTL_GET_CMAC_REQ _IOWR(QCEDEV_IOC_MAGIC, 9, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_UPDATE_FIPS_STATUS _IOWR(QCEDEV_IOC_MAGIC, 10, enum fips_status)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define QCEDEV_IOCTL_QUERY_FIPS_STATUS _IOR(QCEDEV_IOC_MAGIC, 11, enum fips_status)
-#endif
-

diff --git a/k318/kernel-headers/linux/rmnet_data.h b/k318/kernel-headers/linux/rmnet_data.h
deleted file mode 100644
index 697e850..0000000
--- a/k318/kernel-headers/linux/rmnet_data.h
+++ /dev/null

@@ -1,136 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _RMNET_DATA_H_
-#define _RMNET_DATA_H_
-#define RMNET_LOCAL_LOGICAL_ENDPOINT - 1
-#define RMNET_EGRESS_FORMAT__RESERVED__ (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_EGRESS_FORMAT_MAP (1 << 1)
-#define RMNET_EGRESS_FORMAT_AGGREGATION (1 << 2)
-#define RMNET_EGRESS_FORMAT_MUXING (1 << 3)
-#define RMNET_EGRESS_FORMAT_MAP_CKSUMV3 (1 << 4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_EGRESS_FORMAT_MAP_CKSUMV4 (1 << 5)
-#define RMNET_INGRESS_FIX_ETHERNET (1 << 0)
-#define RMNET_INGRESS_FORMAT_MAP (1 << 1)
-#define RMNET_INGRESS_FORMAT_DEAGGREGATION (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_INGRESS_FORMAT_DEMUXING (1 << 3)
-#define RMNET_INGRESS_FORMAT_MAP_COMMANDS (1 << 4)
-#define RMNET_INGRESS_FORMAT_MAP_CKSUMV3 (1 << 5)
-#define RMNET_INGRESS_FORMAT_MAP_CKSUMV4 (1 << 6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_NETLINK_PROTO 31
-#define RMNET_MAX_STR_LEN 16
-#define RMNET_NL_DATA_MAX_LEN 64
-#define RMNET_NETLINK_MSG_COMMAND 0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define RMNET_NETLINK_MSG_RETURNCODE 1
-#define RMNET_NETLINK_MSG_RETURNDATA 2
-struct rmnet_nl_msg_s {
-  uint16_t reserved;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint16_t message_type;
-  uint16_t reserved2 : 14;
-  uint16_t crd : 2;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    uint16_t arg_length;
-    uint16_t return_code;
-  };
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    uint8_t data[RMNET_NL_DATA_MAX_LEN];
-    struct {
-      uint8_t dev[RMNET_MAX_STR_LEN];
-      uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint16_t agg_size;
-      uint16_t agg_count;
-      uint8_t tail_spacing;
-    } data_format;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct {
-      uint8_t dev[RMNET_MAX_STR_LEN];
-      int32_t ep_id;
-      uint8_t operating_mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint8_t next_dev[RMNET_MAX_STR_LEN];
-    } local_ep_config;
-    struct {
-      uint32_t id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint8_t vnd_name[RMNET_MAX_STR_LEN];
-    } vnd;
-    struct {
-      uint32_t id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      uint32_t map_flow_id;
-      uint32_t tc_flow_id;
-    } flow_control;
-  };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum rmnet_netlink_message_types_e {
-  RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE,
-  RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED,
-  RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT,
-  RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT,
-  RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT,
-  RMNET_NETLINK_SET_LOGICAL_EP_CONFIG,
-  RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG,
-  RMNET_NETLINK_GET_LOGICAL_EP_CONFIG,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_NETLINK_NEW_VND,
-  RMNET_NETLINK_NEW_VND_WITH_PREFIX,
-  RMNET_NETLINK_GET_VND_NAME,
-  RMNET_NETLINK_FREE_VND,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_NETLINK_ADD_VND_TC_FLOW,
-  RMNET_NETLINK_DEL_VND_TC_FLOW
-};
-enum rmnet_config_endpoint_modes_e {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_EPMODE_NONE,
-  RMNET_EPMODE_VND,
-  RMNET_EPMODE_BRIDGE,
-  RMNET_EPMODE_LENGTH
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum rmnet_config_return_codes_e {
-  RMNET_CONFIG_OK,
-  RMNET_CONFIG_UNKNOWN_MESSAGE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_CONFIG_UNKNOWN_ERROR,
-  RMNET_CONFIG_NOMEM,
-  RMNET_CONFIG_DEVICE_IN_USE,
-  RMNET_CONFIG_INVALID_REQUEST,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  RMNET_CONFIG_NO_SUCH_DEVICE,
-  RMNET_CONFIG_BAD_ARGUMENTS,
-  RMNET_CONFIG_BAD_EGRESS_DEVICE,
-  RMNET_CONFIG_TC_HANDLE_FULL
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#endif
-

diff --git a/k318/kernel-headers/linux/sockios.h b/k318/kernel-headers/linux/sockios.h
deleted file mode 100644
index 3cab990..0000000
--- a/k318/kernel-headers/linux/sockios.h
+++ /dev/null

@@ -1,120 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _LINUX_SOCKIOS_H
-#define _LINUX_SOCKIOS_H
-#include <asm/sockios.h>
-#define SIOCINQ FIONREAD
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCOUTQ TIOCOUTQ
-#define SIOCADDRT 0x890B
-#define SIOCDELRT 0x890C
-#define SIOCRTMSG 0x890D
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFNAME 0x8910
-#define SIOCSIFLINK 0x8911
-#define SIOCGIFCONF 0x8912
-#define SIOCGIFFLAGS 0x8913
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSIFFLAGS 0x8914
-#define SIOCGIFADDR 0x8915
-#define SIOCSIFADDR 0x8916
-#define SIOCGIFDSTADDR 0x8917
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSIFDSTADDR 0x8918
-#define SIOCGIFBRDADDR 0x8919
-#define SIOCSIFBRDADDR 0x891a
-#define SIOCGIFNETMASK 0x891b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSIFNETMASK 0x891c
-#define SIOCGIFMETRIC 0x891d
-#define SIOCSIFMETRIC 0x891e
-#define SIOCGIFMEM 0x891f
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSIFMEM 0x8920
-#define SIOCGIFMTU 0x8921
-#define SIOCSIFMTU 0x8922
-#define SIOCSIFNAME 0x8923
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSIFHWADDR 0x8924
-#define SIOCGIFENCAP 0x8925
-#define SIOCSIFENCAP 0x8926
-#define SIOCGIFHWADDR 0x8927
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFSLAVE 0x8929
-#define SIOCSIFSLAVE 0x8930
-#define SIOCADDMULTI 0x8931
-#define SIOCDELMULTI 0x8932
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFINDEX 0x8933
-#define SIOGIFINDEX SIOCGIFINDEX
-#define SIOCSIFPFLAGS 0x8934
-#define SIOCGIFPFLAGS 0x8935
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCDIFADDR 0x8936
-#define SIOCSIFHWBROADCAST 0x8937
-#define SIOCGIFCOUNT 0x8938
-#define SIOCKILLADDR 0x8939
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFBR 0x8940
-#define SIOCSIFBR 0x8941
-#define SIOCGIFTXQLEN 0x8942
-#define SIOCSIFTXQLEN 0x8943
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCETHTOOL 0x8946
-#define SIOCGMIIPHY 0x8947
-#define SIOCGMIIREG 0x8948
-#define SIOCSMIIREG 0x8949
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCWANDEV 0x894A
-#define SIOCOUTQNSD 0x894B
-#define SIOCDARP 0x8953
-#define SIOCGARP 0x8954
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSARP 0x8955
-#define SIOCDRARP 0x8960
-#define SIOCGRARP 0x8961
-#define SIOCSRARP 0x8962
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFMAP 0x8970
-#define SIOCSIFMAP 0x8971
-#define SIOCADDDLCI 0x8980
-#define SIOCDELDLCI 0x8981
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCGIFVLAN 0x8982
-#define SIOCSIFVLAN 0x8983
-#define SIOCBONDENSLAVE 0x8990
-#define SIOCBONDRELEASE 0x8991
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCBONDSETHWADDR 0x8992
-#define SIOCBONDSLAVEINFOQUERY 0x8993
-#define SIOCBONDINFOQUERY 0x8994
-#define SIOCBONDCHANGEACTIVE 0x8995
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCBRADDBR 0x89a0
-#define SIOCBRDELBR 0x89a1
-#define SIOCBRADDIF 0x89a2
-#define SIOCBRDELIF 0x89a3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SIOCSHWTSTAMP 0x89b0
-#define SIOCGHWTSTAMP 0x89b1
-#define SIOCDEVPRIVATE 0x89F0
-#define SIOCPROTOPRIVATE 0x89E0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/sound/asound.h b/k318/kernel-headers/sound/asound.h
deleted file mode 100644
index a3b58ab..0000000
--- a/k318/kernel-headers/sound/asound.h
+++ /dev/null

@@ -1,999 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI__SOUND_ASOUND_H
-#define _UAPI__SOUND_ASOUND_H
-#include <linux/types.h>
-#define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff)
-#define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff)
-#define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff)
-#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_aes_iec958 {
-  unsigned char status[24];
-  unsigned char subcode[147];
-  unsigned char pad;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char dig_subframe[4];
-};
-struct snd_cea_861_aud_if {
-  unsigned char db1_ct_cc;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char db2_sf_ss;
-  unsigned char db3;
-  unsigned char db4_ca;
-  unsigned char db5_dminh_lsv;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
-enum {
-  SNDRV_HWDEP_IFACE_OPL2 = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_OPL3,
-  SNDRV_HWDEP_IFACE_OPL4,
-  SNDRV_HWDEP_IFACE_SB16CSP,
-  SNDRV_HWDEP_IFACE_EMU10K1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_YSS225,
-  SNDRV_HWDEP_IFACE_ICS2115,
-  SNDRV_HWDEP_IFACE_SSCAPE,
-  SNDRV_HWDEP_IFACE_VX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_MIXART,
-  SNDRV_HWDEP_IFACE_USX2Y,
-  SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
-  SNDRV_HWDEP_IFACE_BLUETOOTH,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_USX2Y_PCM,
-  SNDRV_HWDEP_IFACE_PCXHR,
-  SNDRV_HWDEP_IFACE_SB_RC,
-  SNDRV_HWDEP_IFACE_HDA,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_USB_STREAM,
-  SNDRV_HWDEP_IFACE_FW_DICE,
-  SNDRV_HWDEP_IFACE_FW_FIREWORKS,
-  SNDRV_HWDEP_IFACE_FW_BEBOB,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_HWDEP_IFACE_AUDIO_BE,
-  SNDRV_HWDEP_IFACE_AUDIO_CODEC,
-  SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_AUDIO_CODEC
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_hwdep_info {
-  unsigned int device;
-  int card;
-  unsigned char id[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char name[80];
-  int iface;
-  unsigned char reserved[64];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_hwdep_dsp_status {
-  unsigned int version;
-  unsigned char id[32];
-  unsigned int num_dsps;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int dsp_loaded;
-  unsigned int chip_ready;
-  unsigned char reserved[16];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_hwdep_dsp_image {
-  unsigned int index;
-  unsigned char name[64];
-  unsigned char __user * image;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  size_t length;
-  unsigned long driver_data;
-};
-#define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info)
-#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
-#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
-#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 12)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-typedef unsigned long snd_pcm_uframes_t;
-typedef signed long snd_pcm_sframes_t;
-enum {
-  SNDRV_PCM_CLASS_GENERIC = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_PCM_CLASS_MULTI,
-  SNDRV_PCM_CLASS_MODEM,
-  SNDRV_PCM_CLASS_DIGITIZER,
-  SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
-  SNDRV_PCM_SUBCLASS_MULTI_MIX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
-};
-enum {
-  SNDRV_PCM_STREAM_PLAYBACK = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_PCM_STREAM_CAPTURE,
-  SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
-};
-typedef int __bitwise snd_pcm_access_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
-#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
-#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
-#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
-#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
-typedef int __bitwise snd_pcm_format_t;
-#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
-#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
-#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
-#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
-#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
-#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
-#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
-#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
-#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
-#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
-#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
-#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
-#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
-#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
-#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
-#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
-#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
-#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
-#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
-#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
-#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
-#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
-#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
-#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
-#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
-#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
-#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
-#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
-#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
-#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
-#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
-#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
-#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
-#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
-#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
-#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
-#ifdef SNDRV_LITTLE_ENDIAN
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
-#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
-#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
-#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
-#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
-#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
-#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
-#endif
-#ifdef SNDRV_BIG_ENDIAN
-#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
-#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
-#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
-#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
-#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
-#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
-#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-typedef int __bitwise snd_pcm_subformat_t;
-#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
-#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_INFO_MMAP 0x00000001
-#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
-#define SNDRV_PCM_INFO_DOUBLE 0x00000004
-#define SNDRV_PCM_INFO_BATCH 0x00000010
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
-#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
-#define SNDRV_PCM_INFO_COMPLEX 0x00000400
-#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
-#define SNDRV_PCM_INFO_RESUME 0x00040000
-#define SNDRV_PCM_INFO_PAUSE 0x00080000
-#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
-#define SNDRV_PCM_INFO_SYNC_START 0x00400000
-#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
-#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
-typedef int __bitwise snd_pcm_state_t;
-#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
-#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
-#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
-#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
-#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
-#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
-#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
-#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
-  SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
-  SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-union snd_pcm_sync_id {
-  unsigned char id[16];
-  unsigned short id16[8];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int id32[4];
-};
-struct snd_pcm_info {
-  unsigned int device;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int subdevice;
-  int stream;
-  int card;
-  unsigned char id[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char name[80];
-  unsigned char subname[32];
-  int dev_class;
-  int dev_subclass;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int subdevices_count;
-  unsigned int subdevices_avail;
-  union snd_pcm_sync_id sync;
-  unsigned char reserved[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-typedef int snd_pcm_hw_param_t;
-#define SNDRV_PCM_HW_PARAM_ACCESS 0
-#define SNDRV_PCM_HW_PARAM_FORMAT 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
-#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
-#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
-#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
-#define SNDRV_PCM_HW_PARAM_CHANNELS 10
-#define SNDRV_PCM_HW_PARAM_RATE 11
-#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
-#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
-#define SNDRV_PCM_HW_PARAM_PERIODS 15
-#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
-#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
-#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
-#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
-#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0)
-#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1)
-#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_interval {
-  unsigned int min, max;
-  unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_MASK_MAX 256
-struct snd_mask {
-  __u32 bits[(SNDRV_MASK_MAX + 31) / 32];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_pcm_hw_params {
-  unsigned int flags;
-  struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
-  struct snd_mask mres[5];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
-  struct snd_interval ires[9];
-  unsigned int rmask;
-  unsigned int cmask;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int info;
-  unsigned int msbits;
-  unsigned int rate_num;
-  unsigned int rate_den;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  snd_pcm_uframes_t fifo_size;
-  unsigned char reserved[64];
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_PCM_TSTAMP_NONE = 0,
-  SNDRV_PCM_TSTAMP_ENABLE,
-  SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_pcm_sw_params {
-  int tstamp_mode;
-  unsigned int period_step;
-  unsigned int sleep_min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  snd_pcm_uframes_t avail_min;
-  snd_pcm_uframes_t xfer_align;
-  snd_pcm_uframes_t start_threshold;
-  snd_pcm_uframes_t stop_threshold;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  snd_pcm_uframes_t silence_threshold;
-  snd_pcm_uframes_t silence_size;
-  snd_pcm_uframes_t boundary;
-  unsigned int proto;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int tstamp_type;
-  unsigned char reserved[56];
-};
-struct snd_pcm_channel_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int channel;
-  __kernel_off_t offset;
-  unsigned int first;
-  unsigned int step;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_pcm_status {
-  snd_pcm_state_t state;
-  struct timespec trigger_tstamp;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct timespec tstamp;
-  snd_pcm_uframes_t appl_ptr;
-  snd_pcm_uframes_t hw_ptr;
-  snd_pcm_sframes_t delay;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  snd_pcm_uframes_t avail;
-  snd_pcm_uframes_t avail_max;
-  snd_pcm_uframes_t overrange;
-  snd_pcm_state_t suspended_state;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 reserved_alignment;
-  struct timespec audio_tstamp;
-  unsigned char reserved[56 - sizeof(struct timespec)];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_pcm_mmap_status {
-  snd_pcm_state_t state;
-  int pad1;
-  snd_pcm_uframes_t hw_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct timespec tstamp;
-  snd_pcm_state_t suspended_state;
-  struct timespec audio_tstamp;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_pcm_mmap_control {
-  snd_pcm_uframes_t appl_ptr;
-  snd_pcm_uframes_t avail_min;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0)
-#define SNDRV_PCM_SYNC_PTR_APPL (1 << 1)
-#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2)
-struct snd_pcm_sync_ptr {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int flags;
-  union {
-    struct snd_pcm_mmap_status status;
-    unsigned char reserved[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  } s;
-  union {
-    struct snd_pcm_mmap_control control;
-    unsigned char reserved[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  } c;
-};
-struct snd_xferi {
-  snd_pcm_sframes_t result;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  void __user * buf;
-  snd_pcm_uframes_t frames;
-};
-struct snd_xfern {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  snd_pcm_sframes_t result;
-  void __user * __user * bufs;
-  snd_pcm_uframes_t frames;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
-  SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
-  SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
-};
-enum {
-  SNDRV_CHMAP_UNKNOWN = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_NA,
-  SNDRV_CHMAP_MONO,
-  SNDRV_CHMAP_FL,
-  SNDRV_CHMAP_FR,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_RL,
-  SNDRV_CHMAP_RR,
-  SNDRV_CHMAP_FC,
-  SNDRV_CHMAP_LFE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_SL,
-  SNDRV_CHMAP_SR,
-  SNDRV_CHMAP_RC,
-  SNDRV_CHMAP_FLC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_FRC,
-  SNDRV_CHMAP_RLC,
-  SNDRV_CHMAP_RRC,
-  SNDRV_CHMAP_FLW,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_FRW,
-  SNDRV_CHMAP_FLH,
-  SNDRV_CHMAP_FCH,
-  SNDRV_CHMAP_FRH,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_TC,
-  SNDRV_CHMAP_TFL,
-  SNDRV_CHMAP_TFR,
-  SNDRV_CHMAP_TFC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_TRL,
-  SNDRV_CHMAP_TRR,
-  SNDRV_CHMAP_TRC,
-  SNDRV_CHMAP_TFLC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_TFRC,
-  SNDRV_CHMAP_TSL,
-  SNDRV_CHMAP_TSR,
-  SNDRV_CHMAP_LLFE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_RLFE,
-  SNDRV_CHMAP_BC,
-  SNDRV_CHMAP_BLC,
-  SNDRV_CHMAP_BRC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
-};
-#define SNDRV_CHMAP_POSITION_MASK 0xffff
-#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
-#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
-#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
-#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
-#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
-#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
-#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
-#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
-#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
-#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
-#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
-#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
-#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
-#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
-#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
-#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
-#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
-#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
-#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
-#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
-#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
-#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
-#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
-#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
-  SNDRV_RAWMIDI_STREAM_INPUT,
-  SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
-#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
-#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
-struct snd_rawmidi_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int device;
-  unsigned int subdevice;
-  int stream;
-  int card;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int flags;
-  unsigned char id[64];
-  unsigned char name[80];
-  unsigned char subname[32];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int subdevices_count;
-  unsigned int subdevices_avail;
-  unsigned char reserved[64];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_rawmidi_params {
-  int stream;
-  size_t buffer_size;
-  size_t avail_min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int no_active_sensing : 1;
-  unsigned char reserved[16];
-};
-struct snd_rawmidi_status {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int stream;
-  struct timespec tstamp;
-  size_t avail;
-  size_t xruns;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[16];
-};
-#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
-#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
-#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
-#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
-#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
-enum {
-  SNDRV_TIMER_CLASS_NONE = - 1,
-  SNDRV_TIMER_CLASS_SLAVE = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_TIMER_CLASS_GLOBAL,
-  SNDRV_TIMER_CLASS_CARD,
-  SNDRV_TIMER_CLASS_PCM,
-  SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  SNDRV_TIMER_SCLASS_NONE = 0,
-  SNDRV_TIMER_SCLASS_APPLICATION,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_TIMER_SCLASS_SEQUENCER,
-  SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
-  SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_GLOBAL_SYSTEM 0
-#define SNDRV_TIMER_GLOBAL_RTC 1
-#define SNDRV_TIMER_GLOBAL_HPET 2
-#define SNDRV_TIMER_GLOBAL_HRTIMER 3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_FLG_SLAVE (1 << 0)
-struct snd_timer_id {
-  int dev_class;
-  int dev_sclass;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int card;
-  int device;
-  int subdevice;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_timer_ginfo {
-  struct snd_timer_id tid;
-  unsigned int flags;
-  int card;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char id[64];
-  unsigned char name[80];
-  unsigned long reserved0;
-  unsigned long resolution;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned long resolution_min;
-  unsigned long resolution_max;
-  unsigned int clients;
-  unsigned char reserved[32];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_timer_gparams {
-  struct snd_timer_id tid;
-  unsigned long period_num;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned long period_den;
-  unsigned char reserved[32];
-};
-struct snd_timer_gstatus {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_timer_id tid;
-  unsigned long resolution;
-  unsigned long resolution_num;
-  unsigned long resolution_den;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[32];
-};
-struct snd_timer_select {
-  struct snd_timer_id id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[32];
-};
-struct snd_timer_info {
-  unsigned int flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int card;
-  unsigned char id[64];
-  unsigned char name[80];
-  unsigned long reserved0;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned long resolution;
-  unsigned char reserved[64];
-};
-#define SNDRV_TIMER_PSFLG_AUTO (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1)
-#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2)
-struct snd_timer_params {
-  unsigned int flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int ticks;
-  unsigned int queue_size;
-  unsigned int reserved0;
-  unsigned int filter;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[60];
-};
-struct snd_timer_status {
-  struct timespec tstamp;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int resolution;
-  unsigned int lost;
-  unsigned int overrun;
-  unsigned int queue;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[64];
-};
-#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
-#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
-#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
-#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
-#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
-#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
-#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
-#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
-#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
-#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
-#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_timer_read {
-  unsigned int resolution;
-  unsigned int ticks;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum {
-  SNDRV_TIMER_EVENT_RESOLUTION = 0,
-  SNDRV_TIMER_EVENT_TICK,
-  SNDRV_TIMER_EVENT_START,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_TIMER_EVENT_STOP,
-  SNDRV_TIMER_EVENT_CONTINUE,
-  SNDRV_TIMER_EVENT_PAUSE,
-  SNDRV_TIMER_EVENT_EARLY,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_TIMER_EVENT_SUSPEND,
-  SNDRV_TIMER_EVENT_RESUME,
-  SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
-  SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
-  SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
-  SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
-  SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_timer_tread {
-  int event;
-  struct timespec tstamp;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int val;
-};
-#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
-struct snd_ctl_card_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int card;
-  int pad;
-  unsigned char id[16];
-  unsigned char driver[16];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char name[32];
-  unsigned char longname[80];
-  unsigned char reserved_[16];
-  unsigned char mixername[80];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char components[128];
-};
-typedef int __bitwise snd_ctl_elem_type_t;
-#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
-#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
-#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
-#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
-#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
-#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
-typedef int __bitwise snd_ctl_elem_iface_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
-#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
-#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
-#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
-#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
-#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
-#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0)
-#define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1)
-#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE)
-#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6)
-#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8)
-#define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9)
-#define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28)
-#define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29)
-#define SNDRV_CTL_POWER_D0 0x0000
-#define SNDRV_CTL_POWER_D1 0x0100
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_POWER_D2 0x0200
-#define SNDRV_CTL_POWER_D3 0x0300
-#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000)
-#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
-struct snd_ctl_elem_id {
-  unsigned int numid;
-  snd_ctl_elem_iface_t iface;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int device;
-  unsigned int subdevice;
-  unsigned char name[44];
-  unsigned int index;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_ctl_elem_list {
-  unsigned int offset;
-  unsigned int space;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int used;
-  unsigned int count;
-  struct snd_ctl_elem_id __user * pids;
-  unsigned char reserved[50];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_ctl_elem_info {
-  struct snd_ctl_elem_id id;
-  snd_ctl_elem_type_t type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int access;
-  unsigned int count;
-  __kernel_pid_t owner;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct {
-      long min;
-      long max;
-      long step;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } integer;
-    struct {
-      long long min;
-      long long max;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      long long step;
-    } integer64;
-    struct {
-      unsigned int items;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-      unsigned int item;
-      char name[64];
-      __u64 names_ptr;
-      unsigned int names_length;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } enumerated;
-    unsigned char reserved[128];
-  } value;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    unsigned short d[4];
-    unsigned short * d_ptr;
-  } dimen;
-  unsigned char reserved[64 - 4 * sizeof(unsigned short)];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_ctl_elem_value {
-  struct snd_ctl_elem_id id;
-  unsigned int indirect : 1;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union {
-    union {
-      long value[128];
-      long * value_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } integer;
-    union {
-      long long value[64];
-      long long * value_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } integer64;
-    union {
-      unsigned int item[128];
-      unsigned int * item_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } enumerated;
-    union {
-      unsigned char data[512];
-      unsigned char * data_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    } bytes;
-    struct snd_aes_iec958 iec958;
-  } value;
-  struct timespec tstamp;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned char reserved[128 - sizeof(struct timespec)];
-};
-struct snd_ctl_tlv {
-  unsigned int numid;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  unsigned int length;
-  unsigned int tlv[0];
-};
-#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
-#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
-#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
-#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
-#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
-#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
-#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
-#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
-#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
-#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
-#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
-#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
-#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum sndrv_ctl_event_type {
-  SNDRV_CTL_EVENT_ELEM = 0,
-  SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0)
-#define SNDRV_CTL_EVENT_MASK_INFO (1 << 1)
-#define SNDRV_CTL_EVENT_MASK_ADD (1 << 2)
-#define SNDRV_CTL_EVENT_MASK_TLV (1 << 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
-struct snd_ctl_event {
-  int type;
-  union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    struct {
-      unsigned int mask;
-      struct snd_ctl_elem_id id;
-    } elem;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-    unsigned char data8[60];
-  } data;
-};
-#define SNDRV_CTL_NAME_NONE ""
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_NAME_PLAYBACK "Playback "
-#define SNDRV_CTL_NAME_CAPTURE "Capture "
-#define SNDRV_CTL_NAME_IEC958_NONE ""
-#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
-#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
-#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
-#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
-#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
-#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what
-#endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-

diff --git a/k318/kernel-headers/sound/audio_effects.h b/k318/kernel-headers/sound/audio_effects.h
deleted file mode 100644
index 1b4489f..0000000
--- a/k318/kernel-headers/sound/audio_effects.h
+++ /dev/null

@@ -1,352 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _AUDIO_EFFECTS_H
-#define _AUDIO_EFFECTS_H
-#define CONFIG_CACHE 0
-#define CONFIG_SET 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define CONFIG_GET 2
-#define VIRTUALIZER_MODULE 0x00001000
-#define VIRTUALIZER_ENABLE 0x00001001
-#define VIRTUALIZER_STRENGTH 0x00001002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define VIRTUALIZER_OUT_TYPE 0x00001003
-#define VIRTUALIZER_GAIN_ADJUST 0x00001004
-#define VIRTUALIZER_ENABLE_PARAM_LEN 1
-#define VIRTUALIZER_STRENGTH_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define VIRTUALIZER_OUT_TYPE_PARAM_LEN 1
-#define VIRTUALIZER_GAIN_ADJUST_PARAM_LEN 1
-#define REVERB_MODULE 0x00002000
-#define REVERB_ENABLE 0x00002001
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_MODE 0x00002002
-#define REVERB_PRESET 0x00002003
-#define REVERB_WET_MIX 0x00002004
-#define REVERB_GAIN_ADJUST 0x00002005
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_ROOM_LEVEL 0x00002006
-#define REVERB_ROOM_HF_LEVEL 0x00002007
-#define REVERB_DECAY_TIME 0x00002008
-#define REVERB_DECAY_HF_RATIO 0x00002009
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_REFLECTIONS_LEVEL 0x0000200a
-#define REVERB_REFLECTIONS_DELAY 0x0000200b
-#define REVERB_LEVEL 0x0000200c
-#define REVERB_DELAY 0x0000200d
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_DIFFUSION 0x0000200e
-#define REVERB_DENSITY 0x0000200f
-#define REVERB_ENABLE_PARAM_LEN 1
-#define REVERB_MODE_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_PRESET_PARAM_LEN 1
-#define REVERB_WET_MIX_PARAM_LEN 1
-#define REVERB_GAIN_ADJUST_PARAM_LEN 1
-#define REVERB_ROOM_LEVEL_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_ROOM_HF_LEVEL_PARAM_LEN 1
-#define REVERB_DECAY_TIME_PARAM_LEN 1
-#define REVERB_DECAY_HF_RATIO_PARAM_LEN 1
-#define REVERB_REFLECTIONS_LEVEL_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_REFLECTIONS_DELAY_PARAM_LEN 1
-#define REVERB_LEVEL_PARAM_LEN 1
-#define REVERB_DELAY_PARAM_LEN 1
-#define REVERB_DIFFUSION_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_DENSITY_PARAM_LEN 1
-#define BASS_BOOST_MODULE 0x00003000
-#define BASS_BOOST_ENABLE 0x00003001
-#define BASS_BOOST_MODE 0x00003002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define BASS_BOOST_STRENGTH 0x00003003
-#define BASS_BOOST_ENABLE_PARAM_LEN 1
-#define BASS_BOOST_MODE_PARAM_LEN 1
-#define BASS_BOOST_STRENGTH_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_MODULE 0x00004000
-#define EQ_ENABLE 0x00004001
-#define EQ_CONFIG 0x00004002
-#define EQ_NUM_BANDS 0x00004003
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_BAND_LEVELS 0x00004004
-#define EQ_BAND_LEVEL_RANGE 0x00004005
-#define EQ_BAND_FREQS 0x00004006
-#define EQ_SINGLE_BAND_FREQ_RANGE 0x00004007
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_SINGLE_BAND_FREQ 0x00004008
-#define EQ_BAND_INDEX 0x00004009
-#define EQ_PRESET_ID 0x0000400a
-#define EQ_NUM_PRESETS 0x0000400b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_PRESET_NAME 0x0000400c
-#define EQ_ENABLE_PARAM_LEN 1
-#define EQ_CONFIG_PARAM_LEN 3
-#define EQ_CONFIG_PER_BAND_PARAM_LEN 5
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_NUM_BANDS_PARAM_LEN 1
-#define EQ_BAND_LEVELS_PARAM_LEN 13
-#define EQ_BAND_LEVEL_RANGE_PARAM_LEN 2
-#define EQ_BAND_FREQS_PARAM_LEN 13
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_SINGLE_BAND_FREQ_RANGE_PARAM_LEN 2
-#define EQ_SINGLE_BAND_FREQ_PARAM_LEN 1
-#define EQ_BAND_INDEX_PARAM_LEN 1
-#define EQ_PRESET_ID_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_NUM_PRESETS_PARAM_LEN 1
-#define EQ_PRESET_NAME_PARAM_LEN 32
-#define EQ_TYPE_NONE 0
-#define EQ_BASS_BOOST 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_BASS_CUT 2
-#define EQ_TREBLE_BOOST 3
-#define EQ_TREBLE_CUT 4
-#define EQ_BAND_BOOST 5
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_BAND_CUT 6
-#define SOFT_VOLUME_MODULE 0x00006000
-#define SOFT_VOLUME_ENABLE 0x00006001
-#define SOFT_VOLUME_GAIN_2CH 0x00006002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SOFT_VOLUME_GAIN_MASTER 0x00006003
-#define SOFT_VOLUME_ENABLE_PARAM_LEN 1
-#define SOFT_VOLUME_GAIN_2CH_PARAM_LEN 2
-#define SOFT_VOLUME_GAIN_MASTER_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SOFT_VOLUME2_MODULE 0x00007000
-#define SOFT_VOLUME2_ENABLE 0x00007001
-#define SOFT_VOLUME2_GAIN_2CH 0x00007002
-#define SOFT_VOLUME2_GAIN_MASTER 0x00007003
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SOFT_VOLUME2_ENABLE_PARAM_LEN SOFT_VOLUME_ENABLE_PARAM_LEN
-#define SOFT_VOLUME2_GAIN_2CH_PARAM_LEN SOFT_VOLUME_GAIN_2CH_PARAM_LEN
-#define SOFT_VOLUME2_GAIN_MASTER_PARAM_LEN SOFT_VOLUME_GAIN_MASTER_PARAM_LEN
-#define PBE_CONF_MODULE_ID 0x00010C2A
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define PBE_CONF_PARAM_ID 0x00010C49
-#define PBE_MODULE 0x00008000
-#define PBE_ENABLE 0x00008001
-#define PBE_CONFIG 0x00008002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define PBE_ENABLE_PARAM_LEN 1
-#define PBE_CONFIG_PARAM_LEN 28
-#define COMMAND_PAYLOAD_LEN 3
-#define COMMAND_PAYLOAD_SZ (COMMAND_PAYLOAD_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MAX_INBAND_PARAM_SZ 4096
-#define Q27_UNITY (1 << 27)
-#define Q8_UNITY (1 << 8)
-#define CUSTOM_OPENSL_PRESET 18
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define VIRTUALIZER_ENABLE_PARAM_SZ (VIRTUALIZER_ENABLE_PARAM_LEN * sizeof(uint32_t))
-#define VIRTUALIZER_STRENGTH_PARAM_SZ (VIRTUALIZER_STRENGTH_PARAM_LEN * sizeof(uint32_t))
-#define VIRTUALIZER_OUT_TYPE_PARAM_SZ (VIRTUALIZER_OUT_TYPE_PARAM_LEN * sizeof(uint32_t))
-#define VIRTUALIZER_GAIN_ADJUST_PARAM_SZ (VIRTUALIZER_GAIN_ADJUST_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct virtualizer_params {
-  uint32_t device;
-  uint32_t enable_flag;
-  uint32_t strength;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t out_type;
-  int32_t gain_adjust;
-};
-#define NUM_OSL_REVERB_PRESETS_SUPPORTED 6
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_ENABLE_PARAM_SZ (REVERB_ENABLE_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_MODE_PARAM_SZ (REVERB_MODE_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_PRESET_PARAM_SZ (REVERB_PRESET_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_WET_MIX_PARAM_SZ (REVERB_WET_MIX_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_GAIN_ADJUST_PARAM_SZ (REVERB_GAIN_ADJUST_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_ROOM_LEVEL_PARAM_SZ (REVERB_ROOM_LEVEL_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_ROOM_HF_LEVEL_PARAM_SZ (REVERB_ROOM_HF_LEVEL_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_DECAY_TIME_PARAM_SZ (REVERB_DECAY_TIME_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_DECAY_HF_RATIO_PARAM_SZ (REVERB_DECAY_HF_RATIO_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_REFLECTIONS_LEVEL_PARAM_SZ (REVERB_REFLECTIONS_LEVEL_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_REFLECTIONS_DELAY_PARAM_SZ (REVERB_REFLECTIONS_DELAY_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_LEVEL_PARAM_SZ (REVERB_LEVEL_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define REVERB_DELAY_PARAM_SZ (REVERB_DELAY_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_DIFFUSION_PARAM_SZ (REVERB_DIFFUSION_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_DENSITY_PARAM_SZ (REVERB_DENSITY_PARAM_LEN * sizeof(uint32_t))
-struct reverb_params {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t device;
-  uint32_t enable_flag;
-  uint32_t mode;
-  uint32_t preset;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t wet_mix;
-  int32_t gain_adjust;
-  int32_t room_level;
-  int32_t room_hf_level;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t decay_time;
-  uint32_t decay_hf_ratio;
-  int32_t reflections_level;
-  uint32_t reflections_delay;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t level;
-  uint32_t delay;
-  uint32_t diffusion;
-  uint32_t density;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define BASS_BOOST_ENABLE_PARAM_SZ (BASS_BOOST_ENABLE_PARAM_LEN * sizeof(uint32_t))
-#define BASS_BOOST_MODE_PARAM_SZ (BASS_BOOST_MODE_PARAM_LEN * sizeof(uint32_t))
-#define BASS_BOOST_STRENGTH_PARAM_SZ (BASS_BOOST_STRENGTH_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct bass_boost_params {
-  uint32_t device;
-  uint32_t enable_flag;
-  uint32_t mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t strength;
-};
-#define MAX_EQ_BANDS 12
-#define MAX_OSL_EQ_BANDS 5
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_ENABLE_PARAM_SZ (EQ_ENABLE_PARAM_LEN * sizeof(uint32_t))
-#define EQ_CONFIG_PARAM_SZ (EQ_CONFIG_PARAM_LEN * sizeof(uint32_t))
-#define EQ_CONFIG_PER_BAND_PARAM_SZ (EQ_CONFIG_PER_BAND_PARAM_LEN * sizeof(uint32_t))
-#define EQ_CONFIG_PARAM_MAX_LEN (EQ_CONFIG_PARAM_LEN + MAX_EQ_BANDS * EQ_CONFIG_PER_BAND_PARAM_LEN)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_CONFIG_PARAM_MAX_SZ (EQ_CONFIG_PARAM_MAX_LEN * sizeof(uint32_t))
-#define EQ_NUM_BANDS_PARAM_SZ (EQ_NUM_BANDS_PARAM_LEN * sizeof(uint32_t))
-#define EQ_BAND_LEVELS_PARAM_SZ (EQ_BAND_LEVELS_PARAM_LEN * sizeof(uint32_t))
-#define EQ_BAND_LEVEL_RANGE_PARAM_SZ (EQ_BAND_LEVEL_RANGE_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_BAND_FREQS_PARAM_SZ (EQ_BAND_FREQS_PARAM_LEN * sizeof(uint32_t))
-#define EQ_SINGLE_BAND_FREQ_RANGE_PARAM_SZ (EQ_SINGLE_BAND_FREQ_RANGE_PARAM_LEN * sizeof(uint32_t))
-#define EQ_SINGLE_BAND_FREQ_PARAM_SZ (EQ_SINGLE_BAND_FREQ_PARAM_LEN * sizeof(uint32_t))
-#define EQ_BAND_INDEX_PARAM_SZ (EQ_BAND_INDEX_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EQ_PRESET_ID_PARAM_SZ (EQ_PRESET_ID_PARAM_LEN * sizeof(uint32_t))
-#define EQ_NUM_PRESETS_PARAM_SZ (EQ_NUM_PRESETS_PARAM_LEN * sizeof(uint8_t))
-struct eq_config_t {
-  int32_t eq_pregain;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t preset_id;
-  uint32_t num_bands;
-};
-struct eq_per_band_config_t {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t band_idx;
-  uint32_t filter_type;
-  uint32_t freq_millihertz;
-  int32_t gain_millibels;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t quality_factor;
-};
-struct eq_per_band_freq_range_t {
-  uint32_t band_index;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t min_freq_millihertz;
-  uint32_t max_freq_millihertz;
-};
-struct eq_params {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t device;
-  uint32_t enable_flag;
-  struct eq_config_t config;
-  struct eq_per_band_config_t per_band_cfg[MAX_EQ_BANDS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct eq_per_band_freq_range_t per_band_freq_range[MAX_EQ_BANDS];
-  uint32_t band_index;
-  uint32_t freq_millihertz;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define PBE_ENABLE_PARAM_SZ (PBE_ENABLE_PARAM_LEN * sizeof(uint32_t))
-#define PBE_CONFIG_PARAM_SZ (PBE_CONFIG_PARAM_LEN * sizeof(uint16_t))
-struct pbe_config_t {
-  int16_t real_bass_mix;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int16_t bass_color_control;
-  uint16_t main_chain_delay;
-  uint16_t xover_filter_order;
-  uint16_t bandpass_filter_order;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int16_t drc_delay;
-  uint16_t rms_tav;
-  int16_t exp_threshold;
-  uint16_t exp_slope;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int16_t comp_threshold;
-  uint16_t comp_slope;
-  uint16_t makeup_gain;
-  uint32_t comp_attack;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t comp_release;
-  uint32_t exp_attack;
-  uint32_t exp_release;
-  int16_t limiter_bass_threshold;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int16_t limiter_high_threshold;
-  int16_t limiter_bass_makeup_gain;
-  int16_t limiter_high_makeup_gain;
-  int16_t limiter_bass_gc;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int16_t limiter_high_gc;
-  int16_t limiter_delay;
-  uint16_t reserved;
-  int32_t p1LowPassCoeffs[5 * 2];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int32_t p1HighPassCoeffs[5 * 2];
-  int32_t p1BandPassCoeffs[5 * 3];
-  int32_t p1BassShelfCoeffs[5];
-  int32_t p1TrebleShelfCoeffs[5];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __packed;
-struct pbe_params {
-  uint32_t device;
-  uint32_t enable_flag;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t cfg_len;
-  struct pbe_config_t config;
-};
-#define SOFT_VOLUME_ENABLE_PARAM_SZ (SOFT_VOLUME_ENABLE_PARAM_LEN * sizeof(uint32_t))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SOFT_VOLUME_GAIN_MASTER_PARAM_SZ (SOFT_VOLUME_GAIN_MASTER_PARAM_LEN * sizeof(uint32_t))
-#define SOFT_VOLUME_GAIN_2CH_PARAM_SZ (SOFT_VOLUME_GAIN_2CH_PARAM_LEN * sizeof(uint16_t))
-struct soft_volume_params {
-  uint32_t device;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t enable_flag;
-  uint32_t master_gain;
-  uint32_t left_gain;
-  uint32_t right_gain;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct msm_nt_eff_all_config {
-  struct bass_boost_params bass_boost;
-  struct pbe_params pbe;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct virtualizer_params virtualizer;
-  struct reverb_params reverb;
-  struct eq_params equalizer;
-  struct soft_volume_params saplus_vol;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct soft_volume_params topo_switch_vol;
-};
-#endif
-

diff --git a/k318/kernel-headers/sound/compress_offload.h b/k318/kernel-headers/sound/compress_offload.h
deleted file mode 100644
index 3de9105..0000000
--- a/k318/kernel-headers/sound/compress_offload.h
+++ /dev/null

@@ -1,121 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef __COMPRESS_OFFLOAD_H
-#define __COMPRESS_OFFLOAD_H
-#include <linux/types.h>
-#include <sound/asound.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#include <sound/compress_params.h>
-#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 2)
-struct snd_compressed_buffer {
-  __u32 fragment_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 fragments;
-} __attribute__((packed, aligned(4)));
-struct snd_compr_params {
-  struct snd_compressed_buffer buffer;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_codec codec;
-  __u8 no_wake_mode;
-} __attribute__((packed, aligned(4)));
-struct snd_compr_tstamp {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 byte_offset;
-  __u64 copied_total;
-  __u32 pcm_frames;
-  __u32 pcm_io_frames;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 sampling_rate;
-  uint64_t timestamp;
-} __attribute__((packed, aligned(4)));
-struct snd_compr_avail {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u64 avail;
-  struct snd_compr_tstamp tstamp;
-} __attribute__((packed, aligned(4)));
-enum snd_compr_direction {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SND_COMPRESS_PLAYBACK = 0,
-  SND_COMPRESS_CAPTURE
-};
-struct snd_compr_caps {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 num_codecs;
-  __u32 direction;
-  __u32 min_fragment_size;
-  __u32 max_fragment_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 min_fragments;
-  __u32 max_fragments;
-  __u32 codecs[MAX_NUM_CODECS];
-  __u32 reserved[11];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed, aligned(4)));
-struct snd_compr_codec_caps {
-  __u32 codec;
-  __u32 num_descriptors;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_codec_desc descriptor[MAX_NUM_CODEC_DESCRIPTORS];
-} __attribute__((packed, aligned(4)));
-struct snd_compr_audio_info {
-  uint32_t frame_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t reserved[15];
-} __attribute__((packed, aligned(4)));
-enum {
-  SNDRV_COMPRESS_ENCODER_PADDING = 1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  SNDRV_COMPRESS_ENCODER_DELAY = 2,
-  SNDRV_COMPRESS_MIN_BLK_SIZE = 3,
-  SNDRV_COMPRESS_MAX_BLK_SIZE = 4,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_compr_metadata {
-  __u32 key;
-  __u32 value[8];
-} __attribute__((packed, aligned(4)));
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_IOCTL_VERSION _IOR('C', 0x00, int)
-#define SNDRV_COMPRESS_GET_CAPS _IOWR('C', 0x10, struct snd_compr_caps)
-#define SNDRV_COMPRESS_GET_CODEC_CAPS _IOWR('C', 0x11, struct snd_compr_codec_caps)
-#define SNDRV_COMPRESS_SET_PARAMS _IOW('C', 0x12, struct snd_compr_params)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_GET_PARAMS _IOR('C', 0x13, struct snd_codec)
-#define SNDRV_COMPRESS_SET_METADATA _IOW('C', 0x14, struct snd_compr_metadata)
-#define SNDRV_COMPRESS_GET_METADATA _IOWR('C', 0x15, struct snd_compr_metadata)
-#define SNDRV_COMPRESS_TSTAMP _IOR('C', 0x20, struct snd_compr_tstamp)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_AVAIL _IOR('C', 0x21, struct snd_compr_avail)
-#define SNDRV_COMPRESS_PAUSE _IO('C', 0x30)
-#define SNDRV_COMPRESS_RESUME _IO('C', 0x31)
-#define SNDRV_COMPRESS_START _IO('C', 0x32)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_STOP _IO('C', 0x33)
-#define SNDRV_COMPRESS_DRAIN _IO('C', 0x34)
-#define SNDRV_COMPRESS_NEXT_TRACK _IO('C', 0x35)
-#define SNDRV_COMPRESS_PARTIAL_DRAIN _IO('C', 0x36)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM _IOW('C', 0x80, union snd_codec_options)
-#define SND_COMPR_TRIGGER_DRAIN 7
-#define SND_COMPR_TRIGGER_NEXT_TRACK 8
-#define SND_COMPR_TRIGGER_PARTIAL_DRAIN 9
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_METADATA_MODE _IOW('C', 0x99, bool)
-#endif
-

diff --git a/k318/kernel-headers/sound/compress_params.h b/k318/kernel-headers/sound/compress_params.h
deleted file mode 100644
index cf92f58..0000000
--- a/k318/kernel-headers/sound/compress_params.h
+++ /dev/null

@@ -1,339 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef __SND_COMPRESS_PARAMS_H
-#define __SND_COMPRESS_PARAMS_H
-#include <linux/types.h>
-#define SND_DEC_DDP_MAX_PARAMS 18
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MAX_NUM_CODECS 32
-#define MAX_NUM_CODEC_DESCRIPTORS 32
-#define MAX_NUM_BITRATES 32
-#define MAX_NUM_SAMPLE_RATES 32
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MAX_NUM_FRAMES_PER_BUFFER 1
-#define COMPRESSED_META_DATA_MODE 0x10
-#define META_DATA_LEN_BYTES 36
-#define Q6_AC3_DECODER 0x00010BF6
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define Q6_EAC3_DECODER 0x00010C3C
-#define Q6_DTS 0x00010D88
-#define Q6_DTS_LBR 0x00010DBB
-#define SND_AUDIOCODEC_PCM ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_MP3 ((__u32) 0x00000002)
-#define SND_AUDIOCODEC_AMR ((__u32) 0x00000003)
-#define SND_AUDIOCODEC_AMRWB ((__u32) 0x00000004)
-#define SND_AUDIOCODEC_AMRWBPLUS ((__u32) 0x00000005)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_AAC ((__u32) 0x00000006)
-#define SND_AUDIOCODEC_WMA ((__u32) 0x00000007)
-#define SND_AUDIOCODEC_REAL ((__u32) 0x00000008)
-#define SND_AUDIOCODEC_VORBIS ((__u32) 0x00000009)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_FLAC ((__u32) 0x0000000A)
-#define SND_AUDIOCODEC_IEC61937 ((__u32) 0x0000000B)
-#define SND_AUDIOCODEC_G723_1 ((__u32) 0x0000000C)
-#define SND_AUDIOCODEC_G729 ((__u32) 0x0000000D)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_DTS_PASS_THROUGH ((__u32) 0x0000000E)
-#define SND_AUDIOCODEC_DTS_LBR ((__u32) 0x0000000F)
-#define SND_AUDIOCODEC_DTS_TRANSCODE_LOOPBACK ((__u32) 0x00000010)
-#define SND_AUDIOCODEC_PASS_THROUGH ((__u32) 0x00000011)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_MP2 ((__u32) 0x00000012)
-#define SND_AUDIOCODEC_DTS_LBR_PASS_THROUGH ((__u32) 0x00000013)
-#define SND_AUDIOCODEC_AC3 ((__u32) 0x00000014)
-#define SND_AUDIOCODEC_AC3_PASS_THROUGH ((__u32) 0x00000015)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_WMA_PRO ((__u32) 0x00000016)
-#define SND_AUDIOCODEC_DTS ((__u32) 0x00000017)
-#define SND_AUDIOCODEC_EAC3 ((__u32) 0x00000018)
-#define SND_AUDIOCODEC_ALAC ((__u32) 0x00000019)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCODEC_APE ((__u32) 0x00000020)
-#define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_APE
-#define SND_AUDIOPROFILE_PCM ((__u32) 0x00000001)
-#define SND_AUDIOCHANMODE_MP3_MONO ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOCHANMODE_MP3_STEREO ((__u32) 0x00000002)
-#define SND_AUDIOCHANMODE_MP3_JOINTSTEREO ((__u32) 0x00000004)
-#define SND_AUDIOCHANMODE_MP3_DUAL ((__u32) 0x00000008)
-#define SND_AUDIOPROFILE_AMR ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_AMR_DTX_OFF ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AMR_VAD1 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AMR_VAD2 ((__u32) 0x00000004)
-#define SND_AUDIOSTREAMFORMAT_UNDEFINED ((__u32) 0x00000000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOSTREAMFORMAT_CONFORMANCE ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_IF1 ((__u32) 0x00000002)
-#define SND_AUDIOSTREAMFORMAT_IF2 ((__u32) 0x00000004)
-#define SND_AUDIOSTREAMFORMAT_FSF ((__u32) 0x00000008)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOSTREAMFORMAT_RTPPAYLOAD ((__u32) 0x00000010)
-#define SND_AUDIOSTREAMFORMAT_ITU ((__u32) 0x00000020)
-#define SND_AUDIOPROFILE_AMRWB ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AMRWB_DTX_OFF ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_AMRWB_VAD1 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AMRWB_VAD2 ((__u32) 0x00000004)
-#define SND_AUDIOPROFILE_AMRWBPLUS ((__u32) 0x00000001)
-#define SND_AUDIOPROFILE_AAC ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_AAC_MAIN ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AAC_LC ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AAC_SSR ((__u32) 0x00000004)
-#define SND_AUDIOMODE_AAC_LTP ((__u32) 0x00000008)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_AAC_HE ((__u32) 0x00000010)
-#define SND_AUDIOMODE_AAC_SCALABLE ((__u32) 0x00000020)
-#define SND_AUDIOMODE_AAC_ERLC ((__u32) 0x00000040)
-#define SND_AUDIOMODE_AAC_LD ((__u32) 0x00000080)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_AAC_HE_PS ((__u32) 0x00000100)
-#define SND_AUDIOMODE_AAC_HE_MPS ((__u32) 0x00000200)
-#define SND_AUDIOSTREAMFORMAT_MP2ADTS ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_MP4ADTS ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOSTREAMFORMAT_MP4LOAS ((__u32) 0x00000004)
-#define SND_AUDIOSTREAMFORMAT_MP4LATM ((__u32) 0x00000008)
-#define SND_AUDIOSTREAMFORMAT_ADIF ((__u32) 0x00000010)
-#define SND_AUDIOSTREAMFORMAT_MP4FF ((__u32) 0x00000020)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOSTREAMFORMAT_RAW ((__u32) 0x00000040)
-#define SND_AUDIOPROFILE_WMA7 ((__u32) 0x00000001)
-#define SND_AUDIOPROFILE_WMA8 ((__u32) 0x00000002)
-#define SND_AUDIOPROFILE_WMA9 ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOPROFILE_WMA10 ((__u32) 0x00000008)
-#define SND_AUDIOMODE_WMA_LEVEL1 ((__u32) 0x00000001)
-#define SND_AUDIOMODE_WMA_LEVEL2 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_WMA_LEVEL3 ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_WMA_LEVEL4 ((__u32) 0x00000008)
-#define SND_AUDIOMODE_WMAPRO_LEVELM0 ((__u32) 0x00000010)
-#define SND_AUDIOMODE_WMAPRO_LEVELM1 ((__u32) 0x00000020)
-#define SND_AUDIOMODE_WMAPRO_LEVELM2 ((__u32) 0x00000040)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_WMAPRO_LEVELM3 ((__u32) 0x00000080)
-#define SND_AUDIOSTREAMFORMAT_WMA_ASF ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_WMA_NOASF_HDR ((__u32) 0x00000002)
-#define SND_AUDIOPROFILE_REALAUDIO ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_REALAUDIO_G2 ((__u32) 0x00000001)
-#define SND_AUDIOMODE_REALAUDIO_8 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_REALAUDIO_10 ((__u32) 0x00000004)
-#define SND_AUDIOMODE_REALAUDIO_SURROUND ((__u32) 0x00000008)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOPROFILE_VORBIS ((__u32) 0x00000001)
-#define SND_AUDIOMODE_VORBIS ((__u32) 0x00000001)
-#define SND_AUDIOPROFILE_FLAC ((__u32) 0x00000001)
-#define SND_AUDIOMODE_FLAC_LEVEL0 ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_FLAC_LEVEL1 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_FLAC_LEVEL2 ((__u32) 0x00000004)
-#define SND_AUDIOMODE_FLAC_LEVEL3 ((__u32) 0x00000008)
-#define SND_AUDIOMODE_FLAC_LEVEL4 ((__u32) 0x00000010)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_FLAC_LEVEL5 ((__u32) 0x00000020)
-#define SND_AUDIOMODE_FLAC_LEVEL6 ((__u32) 0x00000040)
-#define SND_AUDIOMODE_FLAC_LEVEL7 ((__u32) 0x00000080)
-#define SND_AUDIOMODE_FLAC_LEVEL8 ((__u32) 0x00000100)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOSTREAMFORMAT_FLAC ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_FLAC_OGG ((__u32) 0x00000002)
-#define SND_AUDIOPROFILE_IEC61937 ((__u32) 0x00000001)
-#define SND_AUDIOPROFILE_IEC61937_SPDIF ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_IEC_REF_STREAM_HEADER ((__u32) 0x00000000)
-#define SND_AUDIOMODE_IEC_LPCM ((__u32) 0x00000001)
-#define SND_AUDIOMODE_IEC_AC3 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_IEC_MPEG1 ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_IEC_MP3 ((__u32) 0x00000008)
-#define SND_AUDIOMODE_IEC_MPEG2 ((__u32) 0x00000010)
-#define SND_AUDIOMODE_IEC_AACLC ((__u32) 0x00000020)
-#define SND_AUDIOMODE_IEC_DTS ((__u32) 0x00000040)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_IEC_ATRAC ((__u32) 0x00000080)
-#define SND_AUDIOMODE_IEC_SACD ((__u32) 0x00000100)
-#define SND_AUDIOMODE_IEC_EAC3 ((__u32) 0x00000200)
-#define SND_AUDIOMODE_IEC_DTS_HD ((__u32) 0x00000400)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_IEC_MLP ((__u32) 0x00000800)
-#define SND_AUDIOMODE_IEC_DST ((__u32) 0x00001000)
-#define SND_AUDIOMODE_IEC_WMAPRO ((__u32) 0x00002000)
-#define SND_AUDIOMODE_IEC_REF_CXT ((__u32) 0x00004000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_IEC_HE_AAC ((__u32) 0x00008000)
-#define SND_AUDIOMODE_IEC_HE_AAC2 ((__u32) 0x00010000)
-#define SND_AUDIOMODE_IEC_MPEG_SURROUND ((__u32) 0x00020000)
-#define SND_AUDIOPROFILE_G723_1 ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_G723_1_ANNEX_A ((__u32) 0x00000001)
-#define SND_AUDIOMODE_G723_1_ANNEX_B ((__u32) 0x00000002)
-#define SND_AUDIOMODE_G723_1_ANNEX_C ((__u32) 0x00000004)
-#define SND_AUDIOPROFILE_G729 ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SND_AUDIOMODE_G729_ANNEX_A ((__u32) 0x00000001)
-#define SND_AUDIOMODE_G729_ANNEX_B ((__u32) 0x00000002)
-#define SND_RATECONTROLMODE_CONSTANTBITRATE ((__u32) 0x00000001)
-#define SND_RATECONTROLMODE_VARIABLEBITRATE ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_enc_wma {
-  __u32 super_block_align;
-  __u32 bits_per_sample;
-  __u32 channelmask;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 encodeopt;
-  __u32 encodeopt1;
-  __u32 encodeopt2;
-  __u32 avg_bit_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_enc_vorbis {
-  __s32 quality;
-  __u32 managed;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 max_bit_rate;
-  __u32 min_bit_rate;
-  __u32 downmix;
-} __attribute__((packed, aligned(4)));
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_enc_real {
-  __u32 quant_bits;
-  __u32 start_region;
-  __u32 num_regions;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed, aligned(4)));
-struct snd_enc_flac {
-  __u32 num;
-  __u32 gain;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed, aligned(4)));
-struct snd_enc_generic {
-  __u32 bw;
-  __s32 reserved[15];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed, aligned(4)));
-struct snd_dec_ddp {
-  __u32 params_length;
-  __u32 params_id[SND_DEC_DDP_MAX_PARAMS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 params_value[SND_DEC_DDP_MAX_PARAMS];
-} __attribute__((packed, aligned(4)));
-struct snd_dec_flac {
-  __u16 sample_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u16 min_blk_size;
-  __u16 max_blk_size;
-  __u16 min_frame_size;
-  __u16 max_frame_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-} __attribute__((packed, aligned(4)));
-struct snd_dec_vorbis {
-  __u32 bit_stream_fmt;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_dec_alac {
-  __u32 frame_length;
-  __u8 compatible_version;
-  __u8 bit_depth;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u8 pb;
-  __u8 mb;
-  __u8 kb;
-  __u8 num_channels;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u16 max_run;
-  __u32 max_frame_bytes;
-  __u32 avg_bit_rate;
-  __u32 sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 channel_layout_tag;
-};
-struct snd_dec_ape {
-  __u16 compatible_version;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u16 compression_level;
-  __u32 format_flags;
-  __u32 blocks_per_frame;
-  __u32 final_frame_blocks;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 total_frames;
-  __u16 bits_per_sample;
-  __u16 num_channels;
-  __u32 sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 seek_table_present;
-};
-union snd_codec_options {
-  struct snd_enc_wma wma;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_enc_vorbis vorbis;
-  struct snd_enc_real real;
-  struct snd_enc_flac flac;
-  struct snd_enc_generic generic;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_dec_ddp ddp;
-  struct snd_dec_flac flac_dec;
-  struct snd_dec_vorbis vorbis_dec;
-  struct snd_dec_alac alac;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct snd_dec_ape ape;
-} __attribute__((packed, aligned(4)));
-struct snd_codec_desc {
-  __u32 max_ch;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 sample_rates[MAX_NUM_SAMPLE_RATES];
-  __u32 num_sample_rates;
-  __u32 bit_rate[MAX_NUM_BITRATES];
-  __u32 num_bitrates;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 rate_control;
-  __u32 profiles;
-  __u32 modes;
-  __u32 formats;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 min_buffer;
-  __u32 reserved[15];
-} __attribute__((packed, aligned(4)));
-struct snd_codec {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 id;
-  __u32 ch_in;
-  __u32 ch_out;
-  __u32 sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 bit_rate;
-  __u32 rate_control;
-  __u32 profile;
-  __u32 level;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 ch_mode;
-  __u32 format;
-  __u32 align;
-  __u32 compr_passthr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  union snd_codec_options options;
-  __u32 reserved[3];
-} __attribute__((packed, aligned(4)));
-#endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-

diff --git a/k318/kernel-headers/sound/lsm_params.h b/k318/kernel-headers/sound/lsm_params.h
deleted file mode 100644
index 49ea6a3..0000000
--- a/k318/kernel-headers/sound/lsm_params.h
+++ /dev/null

@@ -1,145 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_LSM_PARAMS_H__
-#define _UAPI_LSM_PARAMS_H__
-#include <linux/types.h>
-#include <sound/asound.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_LSM_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0)
-#define LSM_OUT_FORMAT_PCM (0)
-#define LSM_OUT_FORMAT_ADPCM (1 << 0)
-#define LSM_OUT_DATA_RAW (0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define LSM_OUT_DATA_PACKED (1)
-#define LSM_OUT_DATA_EVENTS_DISABLED (0)
-#define LSM_OUT_DATA_EVENTS_ENABLED (1)
-#define LSM_OUT_TRANSFER_MODE_RT (0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define LSM_OUT_TRANSFER_MODE_FTRT (1)
-enum lsm_app_id {
-  LSM_VOICE_WAKEUP_APP_ID = 1,
-  LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum lsm_detection_mode {
-  LSM_MODE_KEYWORD_ONLY_DETECTION = 1,
-  LSM_MODE_USER_KEYWORD_DETECTION
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum lsm_vw_status {
-  LSM_VOICE_WAKEUP_STATUS_RUNNING = 1,
-  LSM_VOICE_WAKEUP_STATUS_DETECTED,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  LSM_VOICE_WAKEUP_STATUS_END_SPEECH,
-  LSM_VOICE_WAKEUP_STATUS_REJECTED
-};
-enum LSM_PARAM_TYPE {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  LSM_ENDPOINT_DETECT_THRESHOLD = 0,
-  LSM_OPERATION_MODE,
-  LSM_GAIN,
-  LSM_MIN_CONFIDENCE_LEVELS,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  LSM_REG_SND_MODEL,
-  LSM_DEREG_SND_MODEL,
-  LSM_CUSTOM_PARAMS,
-  LSM_PARAMS_MAX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_lsm_ep_det_thres {
-  __u32 epd_begin;
-  __u32 epd_end;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_lsm_detect_mode {
-  enum lsm_detection_mode mode;
-  bool detect_failure;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_lsm_gain {
-  __u16 gain;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_lsm_sound_model_v2 {
-  __u8 __user * data;
-  __u8 * confidence_level;
-  __u32 data_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  enum lsm_detection_mode detection_mode;
-  __u8 num_confidence_levels;
-  bool detect_failure;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_lsm_session_data {
-  enum lsm_app_id app_id;
-};
-struct snd_lsm_event_status {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u16 status;
-  __u16 payload_size;
-  __u8 payload[0];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct snd_lsm_detection_params {
-  __u8 * conf_level;
-  enum lsm_detection_mode detect_mode;
-  __u8 num_confidence_levels;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  bool detect_failure;
-};
-struct lsm_params_info {
-  __u32 module_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 param_id;
-  __u32 param_size;
-  __u8 __user * param_data;
-  enum LSM_PARAM_TYPE param_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct snd_lsm_module_params {
-  __u8 __user * params;
-  __u32 num_params;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 data_size;
-};
-struct snd_lsm_output_format_cfg {
-  __u8 format;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u8 packing;
-  __u8 events;
-  __u8 mode;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_LSM_DEREG_SND_MODEL _IOW('U', 0x01, int)
-#define SNDRV_LSM_EVENT_STATUS _IOW('U', 0x02, struct snd_lsm_event_status)
-#define SNDRV_LSM_ABORT_EVENT _IOW('U', 0x03, int)
-#define SNDRV_LSM_START _IOW('U', 0x04, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_LSM_STOP _IOW('U', 0x05, int)
-#define SNDRV_LSM_SET_SESSION_DATA _IOW('U', 0x06, struct snd_lsm_session_data)
-#define SNDRV_LSM_REG_SND_MODEL_V2 _IOW('U', 0x07, struct snd_lsm_sound_model_v2)
-#define SNDRV_LSM_LAB_CONTROL _IOW('U', 0x08, uint32_t)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_LSM_STOP_LAB _IO('U', 0x09)
-#define SNDRV_LSM_SET_PARAMS _IOW('U', 0x0A, struct snd_lsm_detection_params)
-#define SNDRV_LSM_SET_MODULE_PARAMS _IOW('U', 0x0B, struct snd_lsm_module_params)
-#define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, struct snd_lsm_output_format_cfg)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/kernel-headers/sound/msmcal-hwdep.h b/k318/kernel-headers/sound/msmcal-hwdep.h
deleted file mode 100644
index f7aa752..0000000
--- a/k318/kernel-headers/sound/msmcal-hwdep.h
+++ /dev/null

@@ -1,41 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _CALIB_HWDEP_H
-#define _CALIB_HWDEP_H
-#define WCD9XXX_CODEC_HWDEP_NODE 1000
-enum wcd_cal_type {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  WCD9XXX_MIN_CAL,
-  WCD9XXX_ANC_CAL = WCD9XXX_MIN_CAL,
-  WCD9XXX_MAD_CAL,
-  WCD9XXX_MBHC_CAL,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  WCD9XXX_VBAT_CAL,
-  WCD9XXX_MAX_CAL,
-};
-struct wcdcal_ioctl_buffer {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 size;
-  __u8 __user * buffer;
-  enum wcd_cal_type cal_type;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_CTL_IOCTL_HWDEP_CAL_TYPE _IOW('U', 0x1, struct wcdcal_ioctl_buffer)
-#endif
-

diff --git a/k318/kernel-headers/sound/voice_params.h b/k318/kernel-headers/sound/voice_params.h
deleted file mode 100644
index 043574b..0000000
--- a/k318/kernel-headers/sound/voice_params.h
+++ /dev/null

@@ -1,31 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef __VOICE_PARAMS_H__
-#define __VOICE_PARAMS_H__
-#include <linux/types.h>
-#include <sound/asound.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum voice_lch_mode {
-  VOICE_LCH_START = 1,
-  VOICE_LCH_STOP
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_VOICE_IOCTL_LCH _IOW('U', 0x00, enum voice_lch_mode)
-#endif
-

diff --git a/k318/kernel-headers/sound/voice_svc.h b/k318/kernel-headers/sound/voice_svc.h
deleted file mode 100644
index 9606d9d..0000000
--- a/k318/kernel-headers/sound/voice_svc.h
+++ /dev/null

@@ -1,66 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef __VOICE_SVC_H__
-#define __VOICE_SVC_H__
-#include <linux/types.h>
-#include <linux/ioctl.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define VOICE_SVC_DRIVER_NAME "voice_svc"
-#define VOICE_SVC_MVM_STR "MVM"
-#define VOICE_SVC_CVS_STR "CVS"
-#define MAX_APR_SERVICE_NAME_LEN 64
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSG_REGISTER 0x1
-#define MSG_REQUEST 0x2
-#define MSG_RESPONSE 0x3
-struct voice_svc_write_msg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 msg_type;
-  __u8 payload[0];
-};
-struct voice_svc_register {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  char svc_name[MAX_APR_SERVICE_NAME_LEN];
-  __u32 src_port;
-  __u8 reg_flag;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct voice_svc_cmd_response {
-  __u32 src_port;
-  __u32 dest_port;
-  __u32 token;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 opcode;
-  __u32 payload_size;
-  __u8 payload[0];
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct voice_svc_cmd_request {
-  char svc_name[MAX_APR_SERVICE_NAME_LEN];
-  __u32 src_port;
-  __u32 dest_port;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 token;
-  __u32 opcode;
-  __u32 payload_size;
-  __u8 payload[0];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#endif
-

diff --git a/k318/kernel-headers/video/msm_hdmi_modes.h b/k318/kernel-headers/video/msm_hdmi_modes.h
deleted file mode 100644
index 4e507cd..0000000
--- a/k318/kernel-headers/video/msm_hdmi_modes.h
+++ /dev/null

@@ -1,357 +0,0 @@
-/****************************************************************************
- ****************************************************************************
- ***
- ***   This header was automatically generated from a Linux kernel header
- ***   of the same name, to make information necessary for userspace to
- ***   call into the kernel available to libc.  It contains only constants,
- ***   structures, and macros generated from the original header, and thus,
- ***   contains no copyrightable information.
- ***
- ***   To edit the content of this header, modify the corresponding
- ***   source file (e.g. under external/kernel-headers/original/) then
- ***   run bionic/libc/kernel/tools/update_all.py
- ***
- ***   Any manual change here will be lost the next time this script will
- ***   be run. You've been warned!
- ***
- ****************************************************************************
- ****************************************************************************/
-#ifndef _UAPI_MSM_HDMI_MODES_H__
-#define _UAPI_MSM_HDMI_MODES_H__
-#include <linux/types.h>
-#include <linux/errno.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_HDMI_RGB_888_24BPP_FORMAT BIT(0)
-#define MSM_HDMI_YUV_420_12BPP_FORMAT BIT(1)
-enum aspect_ratio {
-  HDMI_RES_AR_INVALID,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  HDMI_RES_AR_4_3,
-  HDMI_RES_AR_5_4,
-  HDMI_RES_AR_16_9,
-  HDMI_RES_AR_16_10,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  HDMI_RES_AR_64_27,
-  HDMI_RES_AR_256_135,
-  HDMI_RES_AR_MAX,
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum msm_hdmi_s3d_mode {
-  HDMI_S3D_NONE,
-  HDMI_S3D_SIDE_BY_SIDE,
-  HDMI_S3D_TOP_AND_BOTTOM,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  HDMI_S3D_FRAME_PACKING,
-  HDMI_S3D_MAX,
-};
-struct msm_hdmi_mode_timing_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t video_format;
-  uint32_t active_h;
-  uint32_t front_porch_h;
-  uint32_t pulse_width_h;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t back_porch_h;
-  uint32_t active_low_h;
-  uint32_t active_v;
-  uint32_t front_porch_v;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t pulse_width_v;
-  uint32_t back_porch_v;
-  uint32_t active_low_v;
-  uint32_t pixel_freq;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t refresh_rate;
-  uint32_t interlaced;
-  uint32_t supported;
-  enum aspect_ratio ar;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t pixel_formats;
-};
-#define MSM_HDMI_INIT_RES_PAGE 1
-#define MSM_HDMI_MODES_CEA (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_HDMI_MODES_XTND (1 << 1)
-#define MSM_HDMI_MODES_DVI (1 << 2)
-#define MSM_HDMI_MODES_ALL (MSM_HDMI_MODES_CEA | MSM_HDMI_MODES_XTND | MSM_HDMI_MODES_DVI)
-#define HDMI_VFRMT_UNKNOWN 0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_640x480p60_4_3 1
-#define HDMI_VFRMT_720x480p60_4_3 2
-#define HDMI_VFRMT_720x480p60_16_9 3
-#define HDMI_VFRMT_1280x720p60_16_9 4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080i60_16_9 5
-#define HDMI_VFRMT_720x480i60_4_3 6
-#define HDMI_VFRMT_1440x480i60_4_3 HDMI_VFRMT_720x480i60_4_3
-#define HDMI_VFRMT_720x480i60_16_9 7
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x480i60_16_9 HDMI_VFRMT_720x480i60_16_9
-#define HDMI_VFRMT_720x240p60_4_3 8
-#define HDMI_VFRMT_1440x240p60_4_3 HDMI_VFRMT_720x240p60_4_3
-#define HDMI_VFRMT_720x240p60_16_9 9
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x240p60_16_9 HDMI_VFRMT_720x240p60_16_9
-#define HDMI_VFRMT_2880x480i60_4_3 10
-#define HDMI_VFRMT_2880x480i60_16_9 11
-#define HDMI_VFRMT_2880x240p60_4_3 12
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_2880x240p60_16_9 13
-#define HDMI_VFRMT_1440x480p60_4_3 14
-#define HDMI_VFRMT_1440x480p60_16_9 15
-#define HDMI_VFRMT_1920x1080p60_16_9 16
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x576p50_4_3 17
-#define HDMI_VFRMT_720x576p50_16_9 18
-#define HDMI_VFRMT_1280x720p50_16_9 19
-#define HDMI_VFRMT_1920x1080i50_16_9 20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x576i50_4_3 21
-#define HDMI_VFRMT_1440x576i50_4_3 HDMI_VFRMT_720x576i50_4_3
-#define HDMI_VFRMT_720x576i50_16_9 22
-#define HDMI_VFRMT_1440x576i50_16_9 HDMI_VFRMT_720x576i50_16_9
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x288p50_4_3 23
-#define HDMI_VFRMT_1440x288p50_4_3 HDMI_VFRMT_720x288p50_4_3
-#define HDMI_VFRMT_720x288p50_16_9 24
-#define HDMI_VFRMT_1440x288p50_16_9 HDMI_VFRMT_720x288p50_16_9
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_2880x576i50_4_3 25
-#define HDMI_VFRMT_2880x576i50_16_9 26
-#define HDMI_VFRMT_2880x288p50_4_3 27
-#define HDMI_VFRMT_2880x288p50_16_9 28
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x576p50_4_3 29
-#define HDMI_VFRMT_1440x576p50_16_9 30
-#define HDMI_VFRMT_1920x1080p50_16_9 31
-#define HDMI_VFRMT_1920x1080p24_16_9 32
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080p25_16_9 33
-#define HDMI_VFRMT_1920x1080p30_16_9 34
-#define HDMI_VFRMT_2880x480p60_4_3 35
-#define HDMI_VFRMT_2880x480p60_16_9 36
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_2880x576p50_4_3 37
-#define HDMI_VFRMT_2880x576p50_16_9 38
-#define HDMI_VFRMT_1920x1250i50_16_9 39
-#define HDMI_VFRMT_1920x1080i100_16_9 40
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p100_16_9 41
-#define HDMI_VFRMT_720x576p100_4_3 42
-#define HDMI_VFRMT_720x576p100_16_9 43
-#define HDMI_VFRMT_720x576i100_4_3 44
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x576i100_4_3 HDMI_VFRMT_720x576i100_4_3
-#define HDMI_VFRMT_720x576i100_16_9 45
-#define HDMI_VFRMT_1440x576i100_16_9 HDMI_VFRMT_720x576i100_16_9
-#define HDMI_VFRMT_1920x1080i120_16_9 46
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p120_16_9 47
-#define HDMI_VFRMT_720x480p120_4_3 48
-#define HDMI_VFRMT_720x480p120_16_9 49
-#define HDMI_VFRMT_720x480i120_4_3 50
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x480i120_4_3 HDMI_VFRMT_720x480i120_4_3
-#define HDMI_VFRMT_720x480i120_16_9 51
-#define HDMI_VFRMT_1440x480i120_16_9 HDMI_VFRMT_720x480i120_16_9
-#define HDMI_VFRMT_720x576p200_4_3 52
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x576p200_16_9 53
-#define HDMI_VFRMT_720x576i200_4_3 54
-#define HDMI_VFRMT_1440x576i200_4_3 HDMI_VFRMT_720x576i200_4_3
-#define HDMI_VFRMT_720x576i200_16_9 55
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x576i200_16_9 HDMI_VFRMT_720x576i200_16_9
-#define HDMI_VFRMT_720x480p240_4_3 56
-#define HDMI_VFRMT_720x480p240_16_9 57
-#define HDMI_VFRMT_720x480i240_4_3 58
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x480i240_4_3 HDMI_VFRMT_720x480i240_4_3
-#define HDMI_VFRMT_720x480i240_16_9 59
-#define HDMI_VFRMT_1440x480i240_16_9 HDMI_VFRMT_720x480i240_16_9
-#define HDMI_VFRMT_1280x720p24_16_9 60
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p25_16_9 61
-#define HDMI_VFRMT_1280x720p30_16_9 62
-#define HDMI_VFRMT_1920x1080p120_16_9 63
-#define HDMI_VFRMT_1920x1080p100_16_9 64
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p24_64_27 65
-#define HDMI_VFRMT_1280x720p25_64_27 66
-#define HDMI_VFRMT_1280x720p30_64_27 67
-#define HDMI_VFRMT_1280x720p50_64_27 68
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p60_64_27 69
-#define HDMI_VFRMT_1280x720p100_64_27 70
-#define HDMI_VFRMT_1280x720p120_64_27 71
-#define HDMI_VFRMT_1920x1080p24_64_27 72
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080p25_64_27 73
-#define HDMI_VFRMT_1920x1080p30_64_27 74
-#define HDMI_VFRMT_1920x1080p50_64_27 75
-#define HDMI_VFRMT_1920x1080p60_64_27 76
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080p100_64_27 77
-#define HDMI_VFRMT_1920x1080p120_64_27 78
-#define HDMI_VFRMT_1680x720p24_64_27 79
-#define HDMI_VFRMT_1680x720p25_64_27 80
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1680x720p30_64_27 81
-#define HDMI_VFRMT_1680x720p50_64_27 82
-#define HDMI_VFRMT_1680x720p60_64_27 83
-#define HDMI_VFRMT_1680x720p100_64_27 84
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1680x720p120_64_27 85
-#define HDMI_VFRMT_2560x1080p24_64_27 86
-#define HDMI_VFRMT_2560x1080p25_64_27 87
-#define HDMI_VFRMT_2560x1080p30_64_27 88
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_2560x1080p50_64_27 89
-#define HDMI_VFRMT_2560x1080p60_64_27 90
-#define HDMI_VFRMT_2560x1080p100_64_27 91
-#define HDMI_VFRMT_2560x1080p120_64_27 92
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p24_16_9 93
-#define HDMI_VFRMT_3840x2160p25_16_9 94
-#define HDMI_VFRMT_3840x2160p30_16_9 95
-#define HDMI_VFRMT_3840x2160p50_16_9 96
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p60_16_9 97
-#define HDMI_VFRMT_4096x2160p24_256_135 98
-#define HDMI_VFRMT_4096x2160p25_256_135 99
-#define HDMI_VFRMT_4096x2160p30_256_135 100
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_4096x2160p50_256_135 101
-#define HDMI_VFRMT_4096x2160p60_256_135 102
-#define HDMI_VFRMT_3840x2160p24_64_27 103
-#define HDMI_VFRMT_3840x2160p25_64_27 104
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p30_64_27 105
-#define HDMI_VFRMT_3840x2160p50_64_27 106
-#define HDMI_VFRMT_3840x2160p60_64_27 107
-#define HDMI_VFRMT_END 127
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define EVFRMT_OFF(x) (HDMI_VFRMT_END + x)
-#define HDMI_EVFRMT_3840x2160p30_16_9 EVFRMT_OFF(1)
-#define HDMI_EVFRMT_3840x2160p25_16_9 EVFRMT_OFF(2)
-#define HDMI_EVFRMT_3840x2160p24_16_9 EVFRMT_OFF(3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_EVFRMT_4096x2160p24_16_9 EVFRMT_OFF(4)
-#define HDMI_EVFRMT_END HDMI_EVFRMT_4096x2160p24_16_9
-#define WQXGA_OFF(x) (HDMI_EVFRMT_END + x)
-#define HDMI_VFRMT_2560x1600p60_16_9 WQXGA_OFF(1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_WQXGAFRMT_END HDMI_VFRMT_2560x1600p60_16_9
-#define WXGA_OFF(x) (HDMI_WQXGAFRMT_END + x)
-#define HDMI_VFRMT_1280x800p60_16_10 WXGA_OFF(1)
-#define HDMI_VFRMT_1366x768p60_16_10 WXGA_OFF(2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_WXGAFRMT_END HDMI_VFRMT_1366x768p60_16_10
-#define ETI_OFF(x) (HDMI_WXGAFRMT_END + x)
-#define HDMI_VFRMT_800x600p60_4_3 ETI_OFF(1)
-#define ETI_VFRMT_END HDMI_VFRMT_800x600p60_4_3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ETII_OFF(x) (ETI_VFRMT_END + x)
-#define HDMI_VFRMT_1024x768p60_4_3 ETII_OFF(1)
-#define HDMI_VFRMT_1280x1024p60_5_4 ETII_OFF(2)
-#define ETII_VFRMT_END HDMI_VFRMT_1280x1024p60_5_4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define ETIII_OFF(x) (ETII_VFRMT_END + x)
-#define HDMI_VFRMT_848x480p60_16_9 ETIII_OFF(1)
-#define HDMI_VFRMT_1280x960p60_4_3 ETIII_OFF(2)
-#define HDMI_VFRMT_1360x768p60_16_9 ETIII_OFF(3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x900p60_16_10 ETIII_OFF(4)
-#define HDMI_VFRMT_1400x1050p60_4_3 ETIII_OFF(5)
-#define HDMI_VFRMT_1680x1050p60_16_10 ETIII_OFF(6)
-#define HDMI_VFRMT_1600x1200p60_4_3 ETIII_OFF(7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1200p60_16_10 ETIII_OFF(8)
-#define ETIII_VFRMT_END HDMI_VFRMT_1920x1200p60_16_10
-#define RESERVE_OFF(x) (ETIII_VFRMT_END + x)
-#define HDMI_VFRMT_RESERVE1 RESERVE_OFF(1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_RESERVE2 RESERVE_OFF(2)
-#define HDMI_VFRMT_RESERVE3 RESERVE_OFF(3)
-#define HDMI_VFRMT_RESERVE4 RESERVE_OFF(4)
-#define HDMI_VFRMT_RESERVE5 RESERVE_OFF(5)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_RESERVE6 RESERVE_OFF(6)
-#define HDMI_VFRMT_RESERVE7 RESERVE_OFF(7)
-#define HDMI_VFRMT_RESERVE8 RESERVE_OFF(8)
-#define RESERVE_VFRMT_END HDMI_VFRMT_RESERVE8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_MAX (RESERVE_VFRMT_END + 1)
-#define VFRMT_NOT_SUPPORTED(VFRMT) { VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, false, HDMI_RES_AR_INVALID }
-#define HDMI_VFRMT_640x480p60_4_3_TIMING { HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true, 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_720x480p60_4_3_TIMING { HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x480p60_16_9_TIMING { HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1280x720p60_16_9_TIMING { HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false, 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1920x1080i60_16_9_TIMING { HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false, 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1440x480i60_4_3_TIMING { HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x480i60_16_9_TIMING { HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1920x1080p60_16_9_TIMING { HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_720x576p50_4_3_TIMING { HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_720x576p50_16_9_TIMING { HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x720p50_16_9_TIMING { HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false, 720, 5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1440x576i50_4_3_TIMING { HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_1440x576i50_16_9_TIMING { HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1920x1080p50_16_9_TIMING { HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080p24_16_9_TIMING { HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false, 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1920x1080p25_16_9_TIMING { HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1920x1080p30_16_9_TIMING { HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1024x768p60_4_3_TIMING { HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false, 768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x1024p60_5_4_TIMING { HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false, 1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4, 0 }
-#define HDMI_VFRMT_2560x1600p60_16_9_TIMING { HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false, 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_EVFRMT_3840x2160p30_16_9_TIMING { HDMI_EVFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_EVFRMT_3840x2160p25_16_9_TIMING { HDMI_EVFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_EVFRMT_3840x2160p24_16_9_TIMING { HDMI_EVFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_EVFRMT_4096x2160p24_16_9_TIMING { HDMI_EVFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_800x600p60_4_3_TIMING { HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false, 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_848x480p60_16_9_TIMING { HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false, 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x960p60_4_3_TIMING { HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false, 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_1360x768p60_16_9_TIMING { HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false, 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_1440x900p60_16_10_TIMING { HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false, 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10, 0 }
-#define HDMI_VFRMT_1400x1050p60_4_3_TIMING { HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false, 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1680x1050p60_16_10_TIMING { HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false, 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10, 0 }
-#define HDMI_VFRMT_1600x1200p60_4_3_TIMING { HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false, 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
-#define HDMI_VFRMT_1920x1200p60_16_10_TIMING { HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false, 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10, 0 }
-#define HDMI_VFRMT_1366x768p60_16_10_TIMING { HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false, 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1280x800p60_16_10_TIMING { HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true, 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10, 0 }
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING { HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING { HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING { HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p50_16_9_TIMING { HDMI_VFRMT_3840x2160p50_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_3840x2160p60_16_9_TIMING { HDMI_VFRMT_3840x2160p60_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_16_9, 0 }
-#define HDMI_VFRMT_4096x2160p24_256_135_TIMING { HDMI_VFRMT_4096x2160p24_256_135, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_256_135, 0 }
-#define HDMI_VFRMT_4096x2160p25_256_135_TIMING { HDMI_VFRMT_4096x2160p25_256_135, 4096, 968, 88, 128, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_256_135, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_4096x2160p30_256_135_TIMING { HDMI_VFRMT_4096x2160p30_256_135, 4096, 88, 88, 128, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_256_135, 0 }
-#define HDMI_VFRMT_4096x2160p50_256_135_TIMING { HDMI_VFRMT_4096x2160p50_256_135, 4096, 968, 88, 128, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_256_135, 0 }
-#define HDMI_VFRMT_4096x2160p60_256_135_TIMING { HDMI_VFRMT_4096x2160p60_256_135, 4096, 88, 88, 128, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_256_135, 0 }
-#define HDMI_VFRMT_3840x2160p24_64_27_TIMING { HDMI_VFRMT_3840x2160p24_64_27, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_64_27, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p25_64_27_TIMING { HDMI_VFRMT_3840x2160p25_64_27, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_64_27, 0 }
-#define HDMI_VFRMT_3840x2160p30_64_27_TIMING { HDMI_VFRMT_3840x2160p30_64_27, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_64_27, 0 }
-#define HDMI_VFRMT_3840x2160p50_64_27_TIMING { HDMI_VFRMT_3840x2160p50_64_27, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_64_27, 0 }
-#define HDMI_VFRMT_3840x2160p60_64_27_TIMING { HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_64_27, 0 }
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MSM_HDMI_MODES_SET_TIMING(LUT,MODE) do { struct msm_hdmi_mode_timing_info mode = MODE ##_TIMING; LUT[MODE] = mode; } while(0)
-#define MSM_HDMI_MODES_INIT_TIMINGS(__lut) do { unsigned int i; for(i = 0; i < HDMI_VFRMT_MAX; i ++) { struct msm_hdmi_mode_timing_info mode = VFRMT_NOT_SUPPORTED(i); (__lut)[i] = mode; } \
-} while(0)
-#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut,__type) do { if(__type & MSM_HDMI_MODES_CEA) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_640x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p24_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p25_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p30_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p50_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p60_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p50_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p60_64_27); } if(__type & MSM_HDMI_MODES_XTND) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_4096x2160p24_16_9); } if(__type & MSM_HDMI_MODES_DVI) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1024x768p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x1024p60_5_4); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_2560x1600p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_800x600p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_848x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x960p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1360x768p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x900p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1400x1050p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1680x1050p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1600x1200p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1200p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1366x768p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x800p60_16_10); } \
-} while(0)
-#define MSM_HDMI_MODES_GET_DETAILS(mode,MODE) do { struct msm_hdmi_mode_timing_info info = MODE ##_TIMING; * mode = info; } while(0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#endif
-

diff --git a/k318/original-kernel-headers/linux/fips_status.h b/k318/original-kernel-headers/linux/fips_status.h
deleted file mode 100644
index 7daf27b..0000000
--- a/k318/original-kernel-headers/linux/fips_status.h
+++ /dev/null

@@ -1,33 +0,0 @@
-#ifndef _UAPI_FIPS_STATUS__H
-#define _UAPI_FIPS_STATUS__H
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-
-/**
-* fips_status: global FIPS140-2 status
-* @FIPS140_STATUS_NA:
-*					Not a FIPS140-2 compliant Build.
-*					The flag status won't
-*					change throughout
-*					the lifetime
-* @FIPS140_STATUS_PASS_CRYPTO:
-*					KAT self tests are passed.
-* @FIPS140_STATUS_QCRYPTO_ALLOWED:
-*					Integrity test is passed.
-* @FIPS140_STATUS_PASS:
-*					All tests are passed and build
-*					is in FIPS140-2 mode
-* @FIPS140_STATUS_FAIL:
-*					One of the test is failed.
-*					This will block all requests
-*					to crypto modules
-*/
-enum fips_status {
-		FIPS140_STATUS_NA				= 0,
-		FIPS140_STATUS_PASS_CRYPTO		= 1,
-		FIPS140_STATUS_QCRYPTO_ALLOWED	= 2,
-		FIPS140_STATUS_PASS				= 3,
-		FIPS140_STATUS_FAIL				= 0xFF
-};
-#endif /* _UAPI_FIPS_STATUS__H */

diff --git a/k318/original-kernel-headers/linux/ion.h b/k318/original-kernel-headers/linux/ion.h
deleted file mode 100644
index 6aa4956..0000000
--- a/k318/original-kernel-headers/linux/ion.h
+++ /dev/null

@@ -1,196 +0,0 @@
-/*
- * drivers/staging/android/uapi/ion.h
- *
- * Copyright (C) 2011 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef _UAPI_LINUX_ION_H
-#define _UAPI_LINUX_ION_H
-
-#include <linux/ioctl.h>
-#include <linux/types.h>
-
-typedef int ion_user_handle_t;
-
-/**
- * enum ion_heap_types - list of all possible types of heaps
- * @ION_HEAP_TYPE_SYSTEM:	 memory allocated via vmalloc
- * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
- * @ION_HEAP_TYPE_CARVEOUT:	 memory allocated from a prereserved
- *				 carveout heap, allocations are physically
- *				 contiguous
- * @ION_HEAP_TYPE_DMA:		 memory allocated via DMA API
- * @ION_NUM_HEAPS:		 helper for iterating over heaps, a bit mask
- *				 is used to identify the heaps, so only 32
- *				 total heap types are supported
- */
-enum ion_heap_type {
-	ION_HEAP_TYPE_SYSTEM,
-	ION_HEAP_TYPE_SYSTEM_CONTIG,
-	ION_HEAP_TYPE_CARVEOUT,
-	ION_HEAP_TYPE_CHUNK,
-	ION_HEAP_TYPE_DMA,
-	ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always
-				 are at the end of this enum */
-	ION_NUM_HEAPS = 16,
-};
-
-#define ION_HEAP_SYSTEM_MASK		(1 << ION_HEAP_TYPE_SYSTEM)
-#define ION_HEAP_SYSTEM_CONTIG_MASK	(1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
-#define ION_HEAP_CARVEOUT_MASK		(1 << ION_HEAP_TYPE_CARVEOUT)
-#define ION_HEAP_TYPE_DMA_MASK		(1 << ION_HEAP_TYPE_DMA)
-
-#define ION_NUM_HEAP_IDS		(sizeof(unsigned int) * 8)
-
-/**
- * allocation flags - the lower 16 bits are used by core ion, the upper 16
- * bits are reserved for use by the heaps themselves.
- */
-#define ION_FLAG_CACHED 1		/* mappings of this buffer should be
-					   cached, ion will do cache
-					   maintenance when the buffer is
-					   mapped for dma */
-#define ION_FLAG_CACHED_NEEDS_SYNC 2	/* mappings of this buffer will created
-					   at mmap time, if this is set
-					   caches must be managed manually */
-
-/**
- * DOC: Ion Userspace API
- *
- * create a client by opening /dev/ion
- * most operations handled via following ioctls
- *
- */
-
-/**
- * struct ion_allocation_data - metadata passed from userspace for allocations
- * @len:		size of the allocation
- * @align:		required alignment of the allocation
- * @heap_id_mask:	mask of heap ids to allocate from
- * @flags:		flags passed to heap
- * @handle:		pointer that will be populated with a cookie to use to
- *			refer to this allocation
- *
- * Provided by userspace as an argument to the ioctl
- */
-struct ion_allocation_data {
-	size_t len;
-	size_t align;
-	unsigned int heap_id_mask;
-	unsigned int flags;
-	ion_user_handle_t handle;
-};
-
-/**
- * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair
- * @handle:	a handle
- * @fd:		a file descriptor representing that handle
- *
- * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with
- * the handle returned from ion alloc, and the kernel returns the file
- * descriptor to share or map in the fd field.  For ION_IOC_IMPORT, userspace
- * provides the file descriptor and the kernel returns the handle.
- */
-struct ion_fd_data {
-	ion_user_handle_t handle;
-	int fd;
-};
-
-/**
- * struct ion_handle_data - a handle passed to/from the kernel
- * @handle:	a handle
- */
-struct ion_handle_data {
-	ion_user_handle_t handle;
-};
-
-/**
- * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl
- * @cmd:	the custom ioctl function to call
- * @arg:	additional data to pass to the custom ioctl, typically a user
- *		pointer to a predefined structure
- *
- * This works just like the regular cmd and arg fields of an ioctl.
- */
-struct ion_custom_data {
-	unsigned int cmd;
-	unsigned long arg;
-};
-
-#define ION_IOC_MAGIC		'I'
-
-/**
- * DOC: ION_IOC_ALLOC - allocate memory
- *
- * Takes an ion_allocation_data struct and returns it with the handle field
- * populated with the opaque handle for the allocation.
- */
-#define ION_IOC_ALLOC		_IOWR(ION_IOC_MAGIC, 0, \
-				      struct ion_allocation_data)
-
-/**
- * DOC: ION_IOC_FREE - free memory
- *
- * Takes an ion_handle_data struct and frees the handle.
- */
-#define ION_IOC_FREE		_IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
-
-/**
- * DOC: ION_IOC_MAP - get a file descriptor to mmap
- *
- * Takes an ion_fd_data struct with the handle field populated with a valid
- * opaque handle.  Returns the struct with the fd field set to a file
- * descriptor open in the current address space.  This file descriptor
- * can then be used as an argument to mmap.
- */
-#define ION_IOC_MAP		_IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
-
-/**
- * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
- *
- * Takes an ion_fd_data struct with the handle field populated with a valid
- * opaque handle.  Returns the struct with the fd field set to a file
- * descriptor open in the current address space.  This file descriptor
- * can then be passed to another process.  The corresponding opaque handle can
- * be retrieved via ION_IOC_IMPORT.
- */
-#define ION_IOC_SHARE		_IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
-
-/**
- * DOC: ION_IOC_IMPORT - imports a shared file descriptor
- *
- * Takes an ion_fd_data struct with the fd field populated with a valid file
- * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle
- * filed set to the corresponding opaque handle.
- */
-#define ION_IOC_IMPORT		_IOWR(ION_IOC_MAGIC, 5, struct ion_fd_data)
-
-/**
- * DOC: ION_IOC_SYNC - syncs a shared file descriptors to memory
- *
- * Deprecated in favor of using the dma_buf api's correctly (syncing
- * will happend automatically when the buffer is mapped to a device).
- * If necessary should be used after touching a cached buffer from the cpu,
- * this will make the buffer in memory coherent.
- */
-#define ION_IOC_SYNC		_IOWR(ION_IOC_MAGIC, 7, struct ion_fd_data)
-
-/**
- * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl
- *
- * Takes the argument of the architecture specific ioctl to call and
- * passes appropriate userdata for that ioctl
- */
-#define ION_IOC_CUSTOM		_IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
-
-#endif /* _UAPI_LINUX_ION_H */

diff --git a/k318/original-kernel-headers/linux/mfd/msm-adie-codec.h b/k318/original-kernel-headers/linux/mfd/msm-adie-codec.h
deleted file mode 100644
index ef41d9c..0000000
--- a/k318/original-kernel-headers/linux/mfd/msm-adie-codec.h
+++ /dev/null

@@ -1,146 +0,0 @@
-#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H
-#define __UAPI_MFD_MSM_ADIE_CODEC_H
-
-#include <linux/types.h>
-
-/* Value Represents a entry */
-#define ADIE_CODEC_ACTION_ENTRY       0x1
-/* Value representing a delay wait */
-#define ADIE_CODEC_ACTION_DELAY_WAIT      0x2
-/* Value representing a stage reached */
-#define ADIE_CODEC_ACTION_STAGE_REACHED   0x3
-
-/* This value is the state after the client sets the path */
-#define ADIE_CODEC_PATH_OFF                                        0x0050
-
-/* State to which client asks the drv to proceed to where it can
- * set up the clocks and 0-fill PCM buffers
- */
-#define ADIE_CODEC_DIGITAL_READY                                   0x0100
-
-/* State to which client asks the drv to proceed to where it can
- * start sending data after internal steady state delay
- */
-#define ADIE_CODEC_DIGITAL_ANALOG_READY                            0x1000
-
-
-/*  Client Asks adie to switch off the Analog portion of the
- *  the internal codec. After the use of this path
- */
-#define ADIE_CODEC_ANALOG_OFF                                      0x0750
-
-
-/* Client Asks adie to switch off the digital portion of the
- *  the internal codec. After switching off the analog portion.
- *
- *  0-fill PCM may or maynot be sent at this point
- *
- */
-#define ADIE_CODEC_DIGITAL_OFF                                     0x0600
-
-/* State to which client asks the drv to write the default values
- * to the registers */
-#define ADIE_CODEC_FLASH_IMAGE 					   0x0001
-
-/* Path type */
-#define ADIE_CODEC_RX 0
-#define ADIE_CODEC_TX 1
-#define ADIE_CODEC_LB 3
-#define ADIE_CODEC_MAX 4
-
-#define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
-
-#define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
-	do { \
-		((reg) = ((packed >> 16) & (0xff))); \
-		((mask) = ((packed >> 8) & (0xff))); \
-		((val) = ((packed) & (0xff))); \
-	} while (0);
-
-struct adie_codec_action_unit {
-	u32 type;
-	u32 action;
-};
-
-struct adie_codec_hwsetting_entry{
-	struct adie_codec_action_unit *actions;
-	u32 action_sz;
-	u32 freq_plan;
-	u32 osr;
-	/* u32  VolMask;
-	 * u32  SidetoneMask;
-	 */
-};
-
-struct adie_codec_dev_profile {
-	u32 path_type; /* RX or TX */
-	u32 setting_sz;
-	struct adie_codec_hwsetting_entry *settings;
-};
-
-struct adie_codec_register {
-	u8 reg;
-	u8 mask;
-	u8 val;
-};
-
-struct adie_codec_register_image {
-	struct adie_codec_register *regs;
-	u32 img_sz;
-};
-
-struct adie_codec_path;
-
-struct adie_codec_anc_data {
-	u32 size;
-	u32 writes[];
-};
-
-struct adie_codec_operations {
-	int	 codec_id;
-	int (*codec_open) (struct adie_codec_dev_profile *profile,
-				struct adie_codec_path **path_pptr);
-	int (*codec_close) (struct adie_codec_path *path_ptr);
-	int (*codec_setpath) (struct adie_codec_path *path_ptr,
-				u32 freq_plan, u32 osr);
-	int (*codec_proceed_stage) (struct adie_codec_path *path_ptr,
-					u32 state);
-	u32 (*codec_freq_supported) (struct adie_codec_dev_profile *profile,
-					u32 requested_freq);
-	int (*codec_enable_sidetone) (struct adie_codec_path *rx_path_ptr,
-					u32 enable);
-	int (*codec_enable_anc) (struct adie_codec_path *rx_path_ptr,
-		u32 enable, struct adie_codec_anc_data *calibration_writes);
-	int (*codec_set_device_digital_volume) (
-					struct adie_codec_path *path_ptr,
-					u32 num_channels,
-					u32 vol_percentage);
-
-	int (*codec_set_device_analog_volume) (struct adie_codec_path *path_ptr,
-						u32 num_channels,
-						u32 volume);
-	int (*codec_set_master_mode) (struct adie_codec_path *path_ptr,
-					u8 master);
-};
-
-int adie_codec_register_codec_operations(
-				const struct adie_codec_operations *codec_ops);
-int adie_codec_open(struct adie_codec_dev_profile *profile,
-	struct adie_codec_path **path_pptr);
-int adie_codec_setpath(struct adie_codec_path *path_ptr,
-	u32 freq_plan, u32 osr);
-int adie_codec_proceed_stage(struct adie_codec_path *path_ptr, u32 state);
-int adie_codec_close(struct adie_codec_path *path_ptr);
-u32 adie_codec_freq_supported(struct adie_codec_dev_profile *profile,
-							u32 requested_freq);
-int adie_codec_enable_sidetone(struct adie_codec_path *rx_path_ptr, u32 enable);
-int adie_codec_enable_anc(struct adie_codec_path *rx_path_ptr, u32 enable,
-	struct adie_codec_anc_data *calibration_writes);
-int adie_codec_set_device_digital_volume(struct adie_codec_path *path_ptr,
-		u32 num_channels, u32 vol_percentage /* in percentage */);
-
-int adie_codec_set_device_analog_volume(struct adie_codec_path *path_ptr,
-		u32 num_channels, u32 volume /* in percentage */);
-
-int adie_codec_set_master_mode(struct adie_codec_path *path_ptr, u8 master);
-#endif

diff --git a/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h b/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
deleted file mode 100644
index 63ab624..0000000
--- a/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
+++ /dev/null

@@ -1,1399 +0,0 @@
-#ifndef WCD9320_REGISTERS_H
-#define WCD9320_REGISTERS_H
-
-#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
-
-#define TAIKO_A_CHIP_CTL			WCD9XXX_A_CHIP_CTL
-#define TAIKO_A_CHIP_CTL__POR			WCD9XXX_A_CHIP_CTL__POR
-#define TAIKO_A_CHIP_STATUS			WCD9XXX_A_CHIP_STATUS
-#define TAIKO_A_CHIP_STATUS__POR		WCD9XXX_A_CHIP_STATUS__POR
-#define TAIKO_A_CHIP_ID_BYTE_0			WCD9XXX_A_CHIP_ID_BYTE_0
-#define TAIKO_A_CHIP_ID_BYTE_0__POR		WCD9XXX_A_CHIP_ID_BYTE_0__POR
-#define TAIKO_A_CHIP_ID_BYTE_1			WCD9XXX_A_CHIP_ID_BYTE_1
-#define TAIKO_A_CHIP_ID_BYTE_1__POR		WCD9XXX_A_CHIP_ID_BYTE_1__POR
-#define TAIKO_A_CHIP_ID_BYTE_2			WCD9XXX_A_CHIP_ID_BYTE_2
-#define TAIKO_A_CHIP_ID_BYTE_2__POR		WCD9XXX_A_CHIP_ID_BYTE_2__POR
-#define TAIKO_A_CHIP_ID_BYTE_3			WCD9XXX_A_CHIP_ID_BYTE_3
-#define TAIKO_A_CHIP_ID_BYTE_3__POR		WCD9XXX_A_CHIP_ID_BYTE_3__POR
-#define TAIKO_A_CHIP_VERSION			WCD9XXX_A_CHIP_VERSION
-#define TAIKO_A_CHIP_VERSION__POR		WCD9XXX_A_CHIP_VERSION__POR
-#define TAIKO_A_SB_VERSION			WCD9XXX_A_SB_VERSION
-#define TAIKO_A_SB_VERSION__POR			WCD9XXX_A_SB_VERSION__POR
-#define TAIKO_A_SLAVE_ID_1			WCD9XXX_A_SLAVE_ID_1
-#define TAIKO_A_SLAVE_ID_1__POR			WCD9XXX_A_SLAVE_ID_1__POR
-#define TAIKO_A_SLAVE_ID_2			WCD9XXX_A_SLAVE_ID_2
-#define TAIKO_A_SLAVE_ID_2__POR			WCD9XXX_A_SLAVE_ID_2__POR
-#define TAIKO_A_SLAVE_ID_3			WCD9XXX_A_SLAVE_ID_3
-#define TAIKO_A_SLAVE_ID_3__POR			WCD9XXX_A_SLAVE_ID_3__POR
-#define TAIKO_A_PIN_CTL_OE0			(0x010)
-#define TAIKO_A_PIN_CTL_OE0__POR				(0x00)
-#define TAIKO_A_PIN_CTL_OE1			(0x011)
-#define TAIKO_A_PIN_CTL_OE1__POR				(0x00)
-#define TAIKO_A_PIN_CTL_DATA0			(0x012)
-#define TAIKO_A_PIN_CTL_DATA0__POR				(0x00)
-#define TAIKO_A_PIN_CTL_DATA1			(0x013)
-#define TAIKO_A_PIN_CTL_DATA1__POR				(0x00)
-#define TAIKO_A_HDRIVE_GENERIC			(0x018)
-#define TAIKO_A_HDRIVE_GENERIC__POR				(0x00)
-#define TAIKO_A_HDRIVE_OVERRIDE			(0x019)
-#define TAIKO_A_HDRIVE_OVERRIDE__POR				(0x08)
-#define TAIKO_A_ANA_CSR_WAIT_STATE			(0x020)
-#define TAIKO_A_ANA_CSR_WAIT_STATE__POR				(0x44)
-#define TAIKO_A_PROCESS_MONITOR_CTL0			(0x040)
-#define TAIKO_A_PROCESS_MONITOR_CTL0__POR				(0x80)
-#define TAIKO_A_PROCESS_MONITOR_CTL1			(0x041)
-#define TAIKO_A_PROCESS_MONITOR_CTL1__POR				(0x00)
-#define TAIKO_A_PROCESS_MONITOR_CTL2			(0x042)
-#define TAIKO_A_PROCESS_MONITOR_CTL2__POR				(0x00)
-#define TAIKO_A_PROCESS_MONITOR_CTL3			(0x043)
-#define TAIKO_A_PROCESS_MONITOR_CTL3__POR				(0x01)
-#define TAIKO_A_QFUSE_CTL			(0x048)
-#define TAIKO_A_QFUSE_CTL__POR				(0x00)
-#define TAIKO_A_QFUSE_STATUS			(0x049)
-#define TAIKO_A_QFUSE_STATUS__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT0			(0x04A)
-#define TAIKO_A_QFUSE_DATA_OUT0__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT1			(0x04B)
-#define TAIKO_A_QFUSE_DATA_OUT1__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT2			(0x04C)
-#define TAIKO_A_QFUSE_DATA_OUT2__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT3			(0x04D)
-#define TAIKO_A_QFUSE_DATA_OUT3__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT4			(0x04E)
-#define TAIKO_A_QFUSE_DATA_OUT4__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT5			(0x04F)
-#define TAIKO_A_QFUSE_DATA_OUT5__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT6			(0x050)
-#define TAIKO_A_QFUSE_DATA_OUT6__POR				(0x00)
-#define TAIKO_A_QFUSE_DATA_OUT7			(0x051)
-#define TAIKO_A_QFUSE_DATA_OUT7__POR				(0x00)
-#define TAIKO_A_CDC_CTL				WCD9XXX_A_CDC_CTL
-#define TAIKO_A_CDC_CTL__POR			WCD9XXX_A_CDC_CTL__POR
-#define TAIKO_A_LEAKAGE_CTL			WCD9XXX_A_LEAKAGE_CTL
-#define TAIKO_A_LEAKAGE_CTL__POR		WCD9XXX_A_LEAKAGE_CTL__POR
-#define TAIKO_A_INTR_MODE			(0x090)
-#define TAIKO_A_INTR_MODE__POR				(0x00)
-#define TAIKO_A_INTR_MASK0			(0x094)
-#define TAIKO_A_INTR_MASK0__POR				(0xFF)
-#define TAIKO_A_INTR_MASK1			(0x095)
-#define TAIKO_A_INTR_MASK1__POR				(0xFF)
-#define TAIKO_A_INTR_MASK2			(0x096)
-#define TAIKO_A_INTR_MASK2__POR				(0x3F)
-#define TAIKO_A_INTR_MASK3			(0x097)
-#define TAIKO_A_INTR_MASK3__POR				(0x3F)
-#define TAIKO_A_INTR_STATUS0			(0x098)
-#define TAIKO_A_INTR_STATUS0__POR				(0x00)
-#define TAIKO_A_INTR_STATUS1			(0x099)
-#define TAIKO_A_INTR_STATUS1__POR				(0x00)
-#define TAIKO_A_INTR_STATUS2			(0x09A)
-#define TAIKO_A_INTR_STATUS2__POR				(0x00)
-#define TAIKO_A_INTR_STATUS3			(0x09B)
-#define TAIKO_A_INTR_STATUS3__POR				(0x00)
-#define TAIKO_A_INTR_CLEAR0			(0x09C)
-#define TAIKO_A_INTR_CLEAR0__POR				(0x00)
-#define TAIKO_A_INTR_CLEAR1			(0x09D)
-#define TAIKO_A_INTR_CLEAR1__POR				(0x00)
-#define TAIKO_A_INTR_CLEAR2			(0x09E)
-#define TAIKO_A_INTR_CLEAR2__POR				(0x00)
-#define TAIKO_A_INTR_CLEAR3			(0x09F)
-#define TAIKO_A_INTR_CLEAR3__POR				(0x00)
-#define TAIKO_A_INTR_LEVEL0			(0x0A0)
-#define TAIKO_A_INTR_LEVEL0__POR				(0x01)
-#define TAIKO_A_INTR_LEVEL1			(0x0A1)
-#define TAIKO_A_INTR_LEVEL1__POR				(0x00)
-#define TAIKO_A_INTR_LEVEL2			(0x0A2)
-#define TAIKO_A_INTR_LEVEL2__POR				(0x00)
-#define TAIKO_A_INTR_LEVEL3			(0x0A3)
-#define TAIKO_A_INTR_LEVEL3__POR				(0x00)
-#define TAIKO_A_INTR_TEST0			(0x0A4)
-#define TAIKO_A_INTR_TEST0__POR				(0x00)
-#define TAIKO_A_INTR_TEST1			(0x0A5)
-#define TAIKO_A_INTR_TEST1__POR				(0x00)
-#define TAIKO_A_INTR_TEST2			(0x0A6)
-#define TAIKO_A_INTR_TEST2__POR				(0x00)
-#define TAIKO_A_INTR_TEST3			(0x0A7)
-#define TAIKO_A_INTR_TEST3__POR				(0x00)
-#define TAIKO_A_INTR_SET0			(0x0A8)
-#define TAIKO_A_INTR_SET0__POR				(0x00)
-#define TAIKO_A_INTR_SET1			(0x0A9)
-#define TAIKO_A_INTR_SET1__POR				(0x00)
-#define TAIKO_A_INTR_SET2			(0x0AA)
-#define TAIKO_A_INTR_SET2__POR				(0x00)
-#define TAIKO_A_INTR_SET3			(0x0AB)
-#define TAIKO_A_INTR_SET3__POR				(0x00)
-#define TAIKO_A_INTR_DESTN0			(0x0AC)
-#define TAIKO_A_INTR_DESTN0__POR				(0x00)
-#define TAIKO_A_INTR_DESTN1			(0x0AD)
-#define TAIKO_A_INTR_DESTN1__POR				(0x00)
-#define TAIKO_A_INTR_DESTN2			(0x0AE)
-#define TAIKO_A_INTR_DESTN2__POR				(0x00)
-#define TAIKO_A_INTR_DESTN3			(0x0AF)
-#define TAIKO_A_INTR_DESTN3__POR				(0x00)
-#define TAIKO_A_CDC_TX_I2S_SCK_MODE			(0x0C0)
-#define TAIKO_A_CDC_TX_I2S_SCK_MODE__POR				(0x00)
-#define TAIKO_A_CDC_TX_I2S_WS_MODE			(0x0C1)
-#define TAIKO_A_CDC_TX_I2S_WS_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_DATA0_MODE			(0x0C4)
-#define TAIKO_A_CDC_DMIC_DATA0_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_CLK0_MODE			(0x0C5)
-#define TAIKO_A_CDC_DMIC_CLK0_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_DATA1_MODE			(0x0C6)
-#define TAIKO_A_CDC_DMIC_DATA1_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_CLK1_MODE			(0x0C7)
-#define TAIKO_A_CDC_DMIC_CLK1_MODE__POR				(0x00)
-#define TAIKO_A_CDC_RX_I2S_SCK_MODE			(0x0C8)
-#define TAIKO_A_CDC_RX_I2S_SCK_MODE__POR				(0x00)
-#define TAIKO_A_CDC_RX_I2S_WS_MODE			(0x0C9)
-#define TAIKO_A_CDC_RX_I2S_WS_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_DATA2_MODE			(0x0CA)
-#define TAIKO_A_CDC_DMIC_DATA2_MODE__POR				(0x00)
-#define TAIKO_A_CDC_DMIC_CLK2_MODE			(0x0CB)
-#define TAIKO_A_CDC_DMIC_CLK2_MODE__POR				(0x00)
-#define TAIKO_A_CDC_INTR1_MODE			(0x0CC)
-#define TAIKO_A_CDC_INTR1_MODE__POR				(0x00)
-#define TAIKO_A_CDC_SB_NRZ_SEL_MODE			(0x0CD)
-#define TAIKO_A_CDC_SB_NRZ_SEL_MODE__POR				(0x00)
-#define TAIKO_A_CDC_INTR2_MODE			(0x0CE)
-#define TAIKO_A_CDC_INTR2_MODE__POR				(0x00)
-#define TAIKO_A_CDC_RF_PA_ON_MODE			(0x0CF)
-#define TAIKO_A_CDC_RF_PA_ON_MODE__POR				(0x00)
-#define TAIKO_A_BIAS_REF_CTL			(0x100)
-#define TAIKO_A_BIAS_REF_CTL__POR				(0x1C)
-#define TAIKO_A_BIAS_CENTRAL_BG_CTL			(0x101)
-#define TAIKO_A_BIAS_CENTRAL_BG_CTL__POR				(0x50)
-#define TAIKO_A_BIAS_PRECHRG_CTL			(0x102)
-#define TAIKO_A_BIAS_PRECHRG_CTL__POR				(0x07)
-#define TAIKO_A_BIAS_CURR_CTL_1			(0x103)
-#define TAIKO_A_BIAS_CURR_CTL_1__POR				(0x52)
-#define TAIKO_A_BIAS_CURR_CTL_2			(0x104)
-#define TAIKO_A_BIAS_CURR_CTL_2__POR				(0x00)
-#define TAIKO_A_BIAS_OSC_BG_CTL			(0x105)
-#define TAIKO_A_BIAS_OSC_BG_CTL__POR				(0x16)
-#define TAIKO_A_CLK_BUFF_EN1			(0x108)
-#define TAIKO_A_CLK_BUFF_EN1__POR				(0x04)
-#define TAIKO_A_CLK_BUFF_EN2			(0x109)
-#define TAIKO_A_CLK_BUFF_EN2__POR				(0x02)
-#define TAIKO_A_LDO_H_MODE_1			(0x110)
-#define TAIKO_A_LDO_H_MODE_1__POR				(0x65)
-#define TAIKO_A_LDO_H_MODE_2			(0x111)
-#define TAIKO_A_LDO_H_MODE_2__POR				(0xA8)
-#define TAIKO_A_LDO_H_LOOP_CTL			(0x112)
-#define TAIKO_A_LDO_H_LOOP_CTL__POR				(0x6B)
-#define TAIKO_A_LDO_H_COMP_1			(0x113)
-#define TAIKO_A_LDO_H_COMP_1__POR				(0x84)
-#define TAIKO_A_LDO_H_COMP_2			(0x114)
-#define TAIKO_A_LDO_H_COMP_2__POR				(0xE0)
-#define TAIKO_A_LDO_H_BIAS_1			(0x115)
-#define TAIKO_A_LDO_H_BIAS_1__POR				(0x6D)
-#define TAIKO_A_LDO_H_BIAS_2			(0x116)
-#define TAIKO_A_LDO_H_BIAS_2__POR				(0xA5)
-#define TAIKO_A_LDO_H_BIAS_3			(0x117)
-#define TAIKO_A_LDO_H_BIAS_3__POR				(0x60)
-#define TAIKO_A_VBAT_CLK			(0x118)
-#define TAIKO_A_VBAT_CLK__POR				(0x03)
-#define TAIKO_A_VBAT_LOOP			(0x119)
-#define TAIKO_A_VBAT_LOOP__POR				(0x02)
-#define TAIKO_A_VBAT_REF			(0x11A)
-#define TAIKO_A_VBAT_REF__POR				(0x20)
-#define TAIKO_A_VBAT_ADC_TEST			(0x11B)
-#define TAIKO_A_VBAT_ADC_TEST__POR				(0x00)
-#define TAIKO_A_VBAT_FE			(0x11C)
-#define TAIKO_A_VBAT_FE__POR				(0x48)
-#define TAIKO_A_VBAT_BIAS_1			(0x11D)
-#define TAIKO_A_VBAT_BIAS_1__POR				(0x03)
-#define TAIKO_A_VBAT_BIAS_2			(0x11E)
-#define TAIKO_A_VBAT_BIAS_2__POR				(0x00)
-#define TAIKO_A_VBAT_ADC_DATA_MSB			(0x11F)
-#define TAIKO_A_VBAT_ADC_DATA_MSB__POR				(0x00)
-#define TAIKO_A_VBAT_ADC_DATA_LSB			(0x120)
-#define TAIKO_A_VBAT_ADC_DATA_LSB__POR				(0x00)
-#define TAIKO_A_MICB_CFILT_1_CTL			(0x128)
-#define TAIKO_A_MICB_CFILT_1_CTL__POR				(0x40)
-#define TAIKO_A_MICB_CFILT_1_VAL			(0x129)
-#define TAIKO_A_MICB_CFILT_1_VAL__POR				(0x80)
-#define TAIKO_A_MICB_CFILT_1_PRECHRG			(0x12A)
-#define TAIKO_A_MICB_CFILT_1_PRECHRG__POR				(0x38)
-#define TAIKO_A_MICB_1_CTL			(0x12B)
-#define TAIKO_A_MICB_1_CTL__POR				(0x16)
-#define TAIKO_A_MICB_1_INT_RBIAS			(0x12C)
-#define TAIKO_A_MICB_1_INT_RBIAS__POR				(0x24)
-#define TAIKO_A_MICB_1_MBHC			(0x12D)
-#define TAIKO_A_MICB_1_MBHC__POR				(0x01)
-#define TAIKO_A_MICB_CFILT_2_CTL			(0x12E)
-#define TAIKO_A_MICB_CFILT_2_CTL__POR				(0x40)
-#define TAIKO_A_MICB_CFILT_2_VAL			(0x12F)
-#define TAIKO_A_MICB_CFILT_2_VAL__POR				(0x80)
-#define TAIKO_A_MICB_CFILT_2_PRECHRG			(0x130)
-#define TAIKO_A_MICB_CFILT_2_PRECHRG__POR				(0x38)
-#define TAIKO_A_MICB_2_CTL			(0x131)
-#define TAIKO_A_MICB_2_CTL__POR				(0x16)
-#define TAIKO_A_MICB_2_INT_RBIAS			(0x132)
-#define TAIKO_A_MICB_2_INT_RBIAS__POR				(0x24)
-#define TAIKO_A_MICB_2_MBHC			(0x133)
-#define TAIKO_A_MICB_2_MBHC__POR				(0x02)
-#define TAIKO_A_MICB_CFILT_3_CTL			(0x134)
-#define TAIKO_A_MICB_CFILT_3_CTL__POR				(0x40)
-#define TAIKO_A_MICB_CFILT_3_VAL			(0x135)
-#define TAIKO_A_MICB_CFILT_3_VAL__POR				(0x80)
-#define TAIKO_A_MICB_CFILT_3_PRECHRG			(0x136)
-#define TAIKO_A_MICB_CFILT_3_PRECHRG__POR				(0x38)
-#define TAIKO_A_MICB_3_CTL			(0x137)
-#define TAIKO_A_MICB_3_CTL__POR				(0x16)
-#define TAIKO_A_MICB_3_INT_RBIAS			(0x138)
-#define TAIKO_A_MICB_3_INT_RBIAS__POR				(0x24)
-#define TAIKO_A_MICB_3_MBHC			(0x139)
-#define TAIKO_A_MICB_3_MBHC__POR				(0x00)
-#define TAIKO_A_MICB_4_CTL			(0x13D)
-#define TAIKO_A_MICB_4_CTL__POR				(0x16)
-#define TAIKO_A_MICB_4_INT_RBIAS			(0x13E)
-#define TAIKO_A_MICB_4_INT_RBIAS__POR				(0x24)
-#define TAIKO_A_MICB_4_MBHC			(0x13F)
-#define TAIKO_A_MICB_4_MBHC__POR				(0x01)
-#define TAIKO_A_MBHC_INSERT_DETECT			(0x14A)
-#define TAIKO_A_MBHC_INSERT_DETECT__POR				(0x00)
-#define TAIKO_A_MBHC_INSERT_DET_STATUS			(0x14B)
-#define TAIKO_A_MBHC_INSERT_DET_STATUS__POR				(0x00)
-#define TAIKO_A_TX_COM_BIAS			(0x14C)
-#define TAIKO_A_TX_COM_BIAS__POR				(0xF0)
-#define TAIKO_A_MBHC_SCALING_MUX_1			(0x14E)
-#define TAIKO_A_MBHC_SCALING_MUX_1__POR				(0x00)
-#define TAIKO_A_MBHC_SCALING_MUX_2			(0x14F)
-#define TAIKO_A_MBHC_SCALING_MUX_2__POR				(0x80)
-#define TAIKO_A_MAD_ANA_CTRL			(0x150)
-#define TAIKO_A_MAD_ANA_CTRL__POR				(0xF1)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_1			(0x151)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_1__POR				(0x00)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_2			(0x152)
-#define TAIKO_A_TX_SUP_SWITCH_CTRL_2__POR				(0x80)
-#define TAIKO_A_TX_1_2_EN			(0x153)
-#define TAIKO_A_TX_1_2_EN__POR				(0x00)
-#define TAIKO_A_TX_1_2_TEST_EN			(0x154)
-#define TAIKO_A_TX_1_2_TEST_EN__POR				(0xCC)
-#define TAIKO_A_TX_1_2_ADC_CH1			(0x155)
-#define TAIKO_A_TX_1_2_ADC_CH1__POR				(0x44)
-#define TAIKO_A_TX_1_2_ADC_CH2			(0x156)
-#define TAIKO_A_TX_1_2_ADC_CH2__POR				(0x44)
-#define TAIKO_A_TX_1_2_ATEST_REFCTRL			(0x157)
-#define TAIKO_A_TX_1_2_ATEST_REFCTRL__POR				(0x00)
-#define TAIKO_A_TX_1_2_TEST_CTL			(0x158)
-#define TAIKO_A_TX_1_2_TEST_CTL__POR				(0x38)
-#define TAIKO_A_TX_1_2_TEST_BLOCK_EN			(0x159)
-#define TAIKO_A_TX_1_2_TEST_BLOCK_EN__POR				(0xFC)
-#define TAIKO_A_TX_1_2_TXFE_CLKDIV			(0x15A)
-#define TAIKO_A_TX_1_2_TXFE_CLKDIV__POR				(0x55)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH1			(0x15B)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH1__POR				(0x00)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH2			(0x15C)
-#define TAIKO_A_TX_1_2_SAR_ERR_CH2__POR				(0x00)
-#define TAIKO_A_TX_3_4_EN			(0x15D)
-#define TAIKO_A_TX_3_4_EN__POR				(0x00)
-#define TAIKO_A_TX_3_4_TEST_EN			(0x15E)
-#define TAIKO_A_TX_3_4_TEST_EN__POR				(0xCC)
-#define TAIKO_A_TX_3_4_ADC_CH3			(0x15F)
-#define TAIKO_A_TX_3_4_ADC_CH3__POR				(0x44)
-#define TAIKO_A_TX_3_4_ADC_CH4			(0x160)
-#define TAIKO_A_TX_3_4_ADC_CH4__POR				(0x44)
-#define TAIKO_A_TX_3_4_ATEST_REFCTRL			(0x161)
-#define TAIKO_A_TX_3_4_ATEST_REFCTRL__POR				(0x00)
-#define TAIKO_A_TX_3_4_TEST_CTL			(0x162)
-#define TAIKO_A_TX_3_4_TEST_CTL__POR				(0x38)
-#define TAIKO_A_TX_3_4_TEST_BLOCK_EN			(0x163)
-#define TAIKO_A_TX_3_4_TEST_BLOCK_EN__POR				(0xFC)
-#define TAIKO_A_TX_3_4_TXFE_CKDIV			(0x164)
-#define TAIKO_A_TX_3_4_TXFE_CKDIV__POR				(0x55)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH3			(0x165)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH3__POR				(0x00)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH4			(0x166)
-#define TAIKO_A_TX_3_4_SAR_ERR_CH4__POR				(0x00)
-#define TAIKO_A_TX_5_6_EN			(0x167)
-#define TAIKO_A_TX_5_6_EN__POR				(0x11)
-#define TAIKO_A_TX_5_6_TEST_EN			(0x168)
-#define TAIKO_A_TX_5_6_TEST_EN__POR				(0xCC)
-#define TAIKO_A_TX_5_6_ADC_CH5			(0x169)
-#define TAIKO_A_TX_5_6_ADC_CH5__POR				(0x44)
-#define TAIKO_A_TX_5_6_ADC_CH6			(0x16A)
-#define TAIKO_A_TX_5_6_ADC_CH6__POR				(0x44)
-#define TAIKO_A_TX_5_6_ATEST_REFCTRL			(0x16B)
-#define TAIKO_A_TX_5_6_ATEST_REFCTRL__POR				(0x00)
-#define TAIKO_A_TX_5_6_TEST_CTL			(0x16C)
-#define TAIKO_A_TX_5_6_TEST_CTL__POR				(0x38)
-#define TAIKO_A_TX_5_6_TEST_BLOCK_EN			(0x16D)
-#define TAIKO_A_TX_5_6_TEST_BLOCK_EN__POR				(0xFC)
-#define TAIKO_A_TX_5_6_TXFE_CKDIV			(0x16E)
-#define TAIKO_A_TX_5_6_TXFE_CKDIV__POR				(0x55)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH5			(0x16F)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH5__POR				(0x00)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH6			(0x170)
-#define TAIKO_A_TX_5_6_SAR_ERR_CH6__POR				(0x00)
-#define TAIKO_A_TX_7_MBHC_EN			(0x171)
-#define TAIKO_A_TX_7_MBHC_EN__POR				(0x0C)
-#define TAIKO_A_TX_7_MBHC_ATEST_REFCTRL			(0x172)
-#define TAIKO_A_TX_7_MBHC_ATEST_REFCTRL__POR				(0x00)
-#define TAIKO_A_TX_7_MBHC_ADC			(0x173)
-#define TAIKO_A_TX_7_MBHC_ADC__POR				(0x44)
-#define TAIKO_A_TX_7_MBHC_TEST_CTL			(0x174)
-#define TAIKO_A_TX_7_MBHC_TEST_CTL__POR				(0x38)
-#define TAIKO_A_TX_7_MBHC_SAR_ERR			(0x175)
-#define TAIKO_A_TX_7_MBHC_SAR_ERR__POR				(0x00)
-#define TAIKO_A_TX_7_TXFE_CLKDIV			(0x176)
-#define TAIKO_A_TX_7_TXFE_CLKDIV__POR				(0x0B)
-#define TAIKO_A_BUCK_MODE_1			(0x181)
-#define TAIKO_A_BUCK_MODE_1__POR				(0x21)
-#define TAIKO_A_BUCK_MODE_2			(0x182)
-#define TAIKO_A_BUCK_MODE_2__POR				(0xFF)
-#define TAIKO_A_BUCK_MODE_3			(0x183)
-#define TAIKO_A_BUCK_MODE_3__POR				(0xCC)
-#define TAIKO_A_BUCK_MODE_4			(0x184)
-#define TAIKO_A_BUCK_MODE_4__POR				(0x3A)
-#define TAIKO_A_BUCK_MODE_5			(0x185)
-#define TAIKO_A_BUCK_MODE_5__POR				(0x00)
-#define TAIKO_A_BUCK_CTRL_VCL_1			(0x186)
-#define TAIKO_A_BUCK_CTRL_VCL_1__POR				(0x48)
-#define TAIKO_A_BUCK_CTRL_VCL_2			(0x187)
-#define TAIKO_A_BUCK_CTRL_VCL_2__POR				(0xA3)
-#define TAIKO_A_BUCK_CTRL_VCL_3			(0x188)
-#define TAIKO_A_BUCK_CTRL_VCL_3__POR				(0x82)
-#define TAIKO_A_BUCK_CTRL_CCL_1			(0x189)
-#define TAIKO_A_BUCK_CTRL_CCL_1__POR				(0xAB)
-#define TAIKO_A_BUCK_CTRL_CCL_2			(0x18A)
-#define TAIKO_A_BUCK_CTRL_CCL_2__POR				(0xDC)
-#define TAIKO_A_BUCK_CTRL_CCL_3			(0x18B)
-#define TAIKO_A_BUCK_CTRL_CCL_3__POR				(0x6A)
-#define TAIKO_A_BUCK_CTRL_CCL_4			(0x18C)
-#define TAIKO_A_BUCK_CTRL_CCL_4__POR				(0x58)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_1			(0x18D)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_1__POR				(0x50)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_2			(0x18E)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_2__POR				(0x64)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_3			(0x18F)
-#define TAIKO_A_BUCK_CTRL_PWM_DRVR_3__POR				(0x77)
-#define TAIKO_A_BUCK_TMUX_A_D			(0x190)
-#define TAIKO_A_BUCK_TMUX_A_D__POR				(0x00)
-#define TAIKO_A_NCP_BUCKREF			(0x191)
-#define TAIKO_A_NCP_BUCKREF__POR				(0x00)
-#define TAIKO_A_NCP_EN			(0x192)
-#define TAIKO_A_NCP_EN__POR				(0xFE)
-#define TAIKO_A_NCP_CLK			(0x193)
-#define TAIKO_A_NCP_CLK__POR				(0x94)
-#define TAIKO_A_NCP_STATIC			(0x194)
-#define TAIKO_A_NCP_STATIC__POR				(0x28)
-#define TAIKO_A_NCP_VTH_LOW			(0x195)
-#define TAIKO_A_NCP_VTH_LOW__POR				(0x88)
-#define TAIKO_A_NCP_VTH_HIGH			(0x196)
-#define TAIKO_A_NCP_VTH_HIGH__POR				(0xA0)
-#define TAIKO_A_NCP_ATEST			(0x197)
-#define TAIKO_A_NCP_ATEST__POR				(0x00)
-#define TAIKO_A_NCP_DTEST			(0x198)
-#define TAIKO_A_NCP_DTEST__POR				(0x00)
-#define TAIKO_A_NCP_DLY1			(0x199)
-#define TAIKO_A_NCP_DLY1__POR				(0x06)
-#define TAIKO_A_NCP_DLY2			(0x19A)
-#define TAIKO_A_NCP_DLY2__POR				(0x06)
-#define TAIKO_A_RX_AUX_SW_CTL			(0x19B)
-#define TAIKO_A_RX_AUX_SW_CTL__POR				(0x00)
-#define TAIKO_A_RX_PA_AUX_IN_CONN			(0x19C)
-#define TAIKO_A_RX_PA_AUX_IN_CONN__POR				(0x00)
-#define TAIKO_A_RX_COM_TIMER_DIV			(0x19E)
-#define TAIKO_A_RX_COM_TIMER_DIV__POR				(0xE8)
-#define TAIKO_A_RX_COM_OCP_CTL			(0x19F)
-#define TAIKO_A_RX_COM_OCP_CTL__POR				(0x1F)
-#define TAIKO_A_RX_COM_OCP_COUNT			(0x1A0)
-#define TAIKO_A_RX_COM_OCP_COUNT__POR				(0x77)
-#define TAIKO_A_RX_COM_DAC_CTL			(0x1A1)
-#define TAIKO_A_RX_COM_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_COM_BIAS			(0x1A2)
-#define TAIKO_A_RX_COM_BIAS__POR				(0x00)
-#define TAIKO_A_RX_HPH_AUTO_CHOP			(0x1A4)
-#define TAIKO_A_RX_HPH_AUTO_CHOP__POR				(0x38)
-#define TAIKO_A_RX_HPH_CHOP_CTL			(0x1A5)
-#define TAIKO_A_RX_HPH_CHOP_CTL__POR				(0xB4)
-#define TAIKO_A_RX_HPH_BIAS_PA			(0x1A6)
-#define TAIKO_A_RX_HPH_BIAS_PA__POR				(0xAA)
-#define TAIKO_A_RX_HPH_BIAS_LDO			(0x1A7)
-#define TAIKO_A_RX_HPH_BIAS_LDO__POR				(0x87)
-#define TAIKO_A_RX_HPH_BIAS_CNP			(0x1A8)
-#define TAIKO_A_RX_HPH_BIAS_CNP__POR				(0x8A)
-#define TAIKO_A_RX_HPH_BIAS_WG_OCP			(0x1A9)
-#define TAIKO_A_RX_HPH_BIAS_WG_OCP__POR				(0x2A)
-#define TAIKO_A_RX_HPH_OCP_CTL			(0x1AA)
-#define TAIKO_A_RX_HPH_OCP_CTL__POR				(0x68)
-#define TAIKO_A_RX_HPH_CNP_EN			(0x1AB)
-#define TAIKO_A_RX_HPH_CNP_EN__POR				(0x80)
-#define TAIKO_A_RX_HPH_CNP_WG_CTL			(0x1AC)
-#define TAIKO_A_RX_HPH_CNP_WG_CTL__POR				(0xDE)
-#define TAIKO_A_RX_HPH_CNP_WG_TIME			(0x1AD)
-#define TAIKO_A_RX_HPH_CNP_WG_TIME__POR				(0x2A)
-#define TAIKO_A_RX_HPH_L_GAIN			(0x1AE)
-#define TAIKO_A_RX_HPH_L_GAIN__POR				(0x00)
-#define TAIKO_A_RX_HPH_L_TEST			(0x1AF)
-#define TAIKO_A_RX_HPH_L_TEST__POR				(0x00)
-#define TAIKO_A_RX_HPH_L_PA_CTL			(0x1B0)
-#define TAIKO_A_RX_HPH_L_PA_CTL__POR				(0x40)
-#define TAIKO_A_RX_HPH_L_DAC_CTL			(0x1B1)
-#define TAIKO_A_RX_HPH_L_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_HPH_L_ATEST			(0x1B2)
-#define TAIKO_A_RX_HPH_L_ATEST__POR				(0x00)
-#define TAIKO_A_RX_HPH_L_STATUS			(0x1B3)
-#define TAIKO_A_RX_HPH_L_STATUS__POR				(0x00)
-#define TAIKO_A_RX_HPH_R_GAIN			(0x1B4)
-#define TAIKO_A_RX_HPH_R_GAIN__POR				(0x00)
-#define TAIKO_A_RX_HPH_R_TEST			(0x1B5)
-#define TAIKO_A_RX_HPH_R_TEST__POR				(0x00)
-#define TAIKO_A_RX_HPH_R_PA_CTL			(0x1B6)
-#define TAIKO_A_RX_HPH_R_PA_CTL__POR				(0x40)
-#define TAIKO_A_RX_HPH_R_DAC_CTL			(0x1B7)
-#define TAIKO_A_RX_HPH_R_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_HPH_R_ATEST			(0x1B8)
-#define TAIKO_A_RX_HPH_R_ATEST__POR				(0x00)
-#define TAIKO_A_RX_HPH_R_STATUS			(0x1B9)
-#define TAIKO_A_RX_HPH_R_STATUS__POR				(0x00)
-#define TAIKO_A_RX_EAR_BIAS_PA			(0x1BA)
-#define TAIKO_A_RX_EAR_BIAS_PA__POR				(0xA6)
-#define TAIKO_A_RX_EAR_BIAS_CMBUFF			(0x1BB)
-#define TAIKO_A_RX_EAR_BIAS_CMBUFF__POR				(0xA0)
-#define TAIKO_A_RX_EAR_EN			(0x1BC)
-#define TAIKO_A_RX_EAR_EN__POR				(0x00)
-#define TAIKO_A_RX_EAR_GAIN			(0x1BD)
-#define TAIKO_A_RX_EAR_GAIN__POR				(0x02)
-#define TAIKO_A_RX_EAR_CMBUFF			(0x1BE)
-#define TAIKO_A_RX_EAR_CMBUFF__POR				(0x04)
-#define TAIKO_A_RX_EAR_ICTL			(0x1BF)
-#define TAIKO_A_RX_EAR_ICTL__POR				(0x40)
-#define TAIKO_A_RX_EAR_CCOMP			(0x1C0)
-#define TAIKO_A_RX_EAR_CCOMP__POR				(0x08)
-#define TAIKO_A_RX_EAR_VCM			(0x1C1)
-#define TAIKO_A_RX_EAR_VCM__POR				(0x03)
-#define TAIKO_A_RX_EAR_CNP			(0x1C2)
-#define TAIKO_A_RX_EAR_CNP__POR				(0xF2)
-#define TAIKO_A_RX_EAR_DAC_CTL_ATEST			(0x1C3)
-#define TAIKO_A_RX_EAR_DAC_CTL_ATEST__POR				(0x00)
-#define TAIKO_A_RX_EAR_STATUS			(0x1C5)
-#define TAIKO_A_RX_EAR_STATUS__POR				(0x04)
-#define TAIKO_A_RX_LINE_BIAS_PA			(0x1C6)
-#define TAIKO_A_RX_LINE_BIAS_PA__POR				(0xA8)
-#define TAIKO_A_RX_BUCK_BIAS1			(0x1C7)
-#define TAIKO_A_RX_BUCK_BIAS1__POR				(0x42)
-#define TAIKO_A_RX_BUCK_BIAS2			(0x1C8)
-#define TAIKO_A_RX_BUCK_BIAS2__POR				(0x84)
-#define TAIKO_A_RX_LINE_COM			(0x1C9)
-#define TAIKO_A_RX_LINE_COM__POR				(0x80)
-#define TAIKO_A_RX_LINE_CNP_EN			(0x1CA)
-#define TAIKO_A_RX_LINE_CNP_EN__POR				(0x00)
-#define TAIKO_A_RX_LINE_CNP_WG_CTL			(0x1CB)
-#define TAIKO_A_RX_LINE_CNP_WG_CTL__POR				(0x00)
-#define TAIKO_A_RX_LINE_CNP_WG_TIME			(0x1CC)
-#define TAIKO_A_RX_LINE_CNP_WG_TIME__POR				(0x04)
-#define TAIKO_A_RX_LINE_1_GAIN			(0x1CD)
-#define TAIKO_A_RX_LINE_1_GAIN__POR				(0x00)
-#define TAIKO_A_RX_LINE_1_TEST			(0x1CE)
-#define TAIKO_A_RX_LINE_1_TEST__POR				(0x00)
-#define TAIKO_A_RX_LINE_1_DAC_CTL			(0x1CF)
-#define TAIKO_A_RX_LINE_1_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_LINE_1_STATUS			(0x1D0)
-#define TAIKO_A_RX_LINE_1_STATUS__POR				(0x00)
-#define TAIKO_A_RX_LINE_2_GAIN			(0x1D1)
-#define TAIKO_A_RX_LINE_2_GAIN__POR				(0x00)
-#define TAIKO_A_RX_LINE_2_TEST			(0x1D2)
-#define TAIKO_A_RX_LINE_2_TEST__POR				(0x00)
-#define TAIKO_A_RX_LINE_2_DAC_CTL			(0x1D3)
-#define TAIKO_A_RX_LINE_2_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_LINE_2_STATUS			(0x1D4)
-#define TAIKO_A_RX_LINE_2_STATUS__POR				(0x00)
-#define TAIKO_A_RX_LINE_3_GAIN			(0x1D5)
-#define TAIKO_A_RX_LINE_3_GAIN__POR				(0x00)
-#define TAIKO_A_RX_LINE_3_TEST			(0x1D6)
-#define TAIKO_A_RX_LINE_3_TEST__POR				(0x00)
-#define TAIKO_A_RX_LINE_3_DAC_CTL			(0x1D7)
-#define TAIKO_A_RX_LINE_3_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_LINE_3_STATUS			(0x1D8)
-#define TAIKO_A_RX_LINE_3_STATUS__POR				(0x00)
-#define TAIKO_A_RX_LINE_4_GAIN			(0x1D9)
-#define TAIKO_A_RX_LINE_4_GAIN__POR				(0x00)
-#define TAIKO_A_RX_LINE_4_TEST			(0x1DA)
-#define TAIKO_A_RX_LINE_4_TEST__POR				(0x00)
-#define TAIKO_A_RX_LINE_4_DAC_CTL			(0x1DB)
-#define TAIKO_A_RX_LINE_4_DAC_CTL__POR				(0x00)
-#define TAIKO_A_RX_LINE_4_STATUS			(0x1DC)
-#define TAIKO_A_RX_LINE_4_STATUS__POR				(0x00)
-#define TAIKO_A_RX_LINE_CNP_DBG			(0x1DD)
-#define TAIKO_A_RX_LINE_CNP_DBG__POR				(0x00)
-#define TAIKO_A_SPKR_DRV_EN			(0x1DF)
-#define TAIKO_A_SPKR_DRV_EN__POR				(0x6F)
-#define TAIKO_A_SPKR_DRV_GAIN			(0x1E0)
-#define TAIKO_A_SPKR_DRV_GAIN__POR				(0x00)
-#define TAIKO_A_SPKR_DRV_DAC_CTL			(0x1E1)
-#define TAIKO_A_SPKR_DRV_DAC_CTL__POR				(0x04)
-#define TAIKO_A_SPKR_DRV_OCP_CTL			(0x1E2)
-#define TAIKO_A_SPKR_DRV_OCP_CTL__POR				(0x98)
-#define TAIKO_A_SPKR_DRV_CLIP_DET			(0x1E3)
-#define TAIKO_A_SPKR_DRV_CLIP_DET__POR				(0x48)
-#define TAIKO_A_SPKR_DRV_IEC			(0x1E4)
-#define TAIKO_A_SPKR_DRV_IEC__POR				(0x20)
-#define TAIKO_A_SPKR_DRV_DBG_DAC			(0x1E5)
-#define TAIKO_A_SPKR_DRV_DBG_DAC__POR				(0x05)
-#define TAIKO_A_SPKR_DRV_DBG_PA			(0x1E6)
-#define TAIKO_A_SPKR_DRV_DBG_PA__POR				(0x18)
-#define TAIKO_A_SPKR_DRV_DBG_PWRSTG			(0x1E7)
-#define TAIKO_A_SPKR_DRV_DBG_PWRSTG__POR				(0x00)
-#define TAIKO_A_SPKR_DRV_BIAS_LDO			(0x1E8)
-#define TAIKO_A_SPKR_DRV_BIAS_LDO__POR				(0x45)
-#define TAIKO_A_SPKR_DRV_BIAS_INT			(0x1E9)
-#define TAIKO_A_SPKR_DRV_BIAS_INT__POR				(0xA5)
-#define TAIKO_A_SPKR_DRV_BIAS_PA			(0x1EA)
-#define TAIKO_A_SPKR_DRV_BIAS_PA__POR				(0x55)
-#define TAIKO_A_SPKR_DRV_STATUS_OCP			(0x1EB)
-#define TAIKO_A_SPKR_DRV_STATUS_OCP__POR				(0x00)
-#define TAIKO_A_SPKR_DRV_STATUS_PA			(0x1EC)
-#define TAIKO_A_SPKR_DRV_STATUS_PA__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_EN			(0x1ED)
-#define TAIKO_A_SPKR_PROT_EN__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_ADC_EN			(0x1EE)
-#define TAIKO_A_SPKR_PROT_ADC_EN__POR				(0x44)
-#define TAIKO_A_SPKR_PROT_ISENSE_BIAS			(0x1EF)
-#define TAIKO_A_SPKR_PROT_ISENSE_BIAS__POR				(0x44)
-#define TAIKO_A_SPKR_PROT_VSENSE_BIAS			(0x1F0)
-#define TAIKO_A_SPKR_PROT_VSENSE_BIAS__POR				(0x44)
-#define TAIKO_A_SPKR_PROT_ADC_ATEST_REFCTRL			(0x1F1)
-#define TAIKO_A_SPKR_PROT_ADC_ATEST_REFCTRL__POR			(0x00)
-#define TAIKO_A_SPKR_PROT_ADC_TEST_CTL			(0x1F2)
-#define TAIKO_A_SPKR_PROT_ADC_TEST_CTL__POR				(0x38)
-#define TAIKO_A_SPKR_PROT_TEST_BLOCK_EN			(0x1F3)
-#define TAIKO_A_SPKR_PROT_TEST_BLOCK_EN__POR				(0xFC)
-#define TAIKO_A_SPKR_PROT_ATEST			(0x1F4)
-#define TAIKO_A_SPKR_PROT_ATEST__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_V_SAR_ERR			(0x1F5)
-#define TAIKO_A_SPKR_PROT_V_SAR_ERR__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_I_SAR_ERR			(0x1F6)
-#define TAIKO_A_SPKR_PROT_I_SAR_ERR__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_LDO_CTRL			(0x1F7)
-#define TAIKO_A_SPKR_PROT_LDO_CTRL__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_ISENSE_CTRL			(0x1F8)
-#define TAIKO_A_SPKR_PROT_ISENSE_CTRL__POR				(0x00)
-#define TAIKO_A_SPKR_PROT_VSENSE_CTRL			(0x1F9)
-#define TAIKO_A_SPKR_PROT_VSENSE_CTRL__POR				(0x00)
-#define TAIKO_A_RC_OSC_FREQ			(0x1FA)
-#define TAIKO_A_RC_OSC_FREQ__POR				(0x46)
-#define TAIKO_A_RC_OSC_TEST			(0x1FB)
-#define TAIKO_A_RC_OSC_TEST__POR				(0x0A)
-#define TAIKO_A_RC_OSC_STATUS			(0x1FC)
-#define TAIKO_A_RC_OSC_STATUS__POR				(0x18)
-#define TAIKO_A_RC_OSC_TUNER			(0x1FD)
-#define TAIKO_A_RC_OSC_TUNER__POR				(0x00)
-#define TAIKO_A_MBHC_HPH			(0x1FE)
-#define TAIKO_A_MBHC_HPH__POR				(0x44)
-#define TAIKO_A_CDC_ANC1_B1_CTL			(0x200)
-#define TAIKO_A_CDC_ANC1_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_B1_CTL			(0x280)
-#define TAIKO_A_CDC_ANC2_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_SHIFT			(0x201)
-#define TAIKO_A_CDC_ANC1_SHIFT__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_SHIFT			(0x281)
-#define TAIKO_A_CDC_ANC2_SHIFT__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B1_CTL			(0x202)
-#define TAIKO_A_CDC_ANC1_IIR_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B1_CTL			(0x282)
-#define TAIKO_A_CDC_ANC2_IIR_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B2_CTL			(0x203)
-#define TAIKO_A_CDC_ANC1_IIR_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B2_CTL			(0x283)
-#define TAIKO_A_CDC_ANC2_IIR_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_IIR_B3_CTL			(0x204)
-#define TAIKO_A_CDC_ANC1_IIR_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_IIR_B3_CTL			(0x284)
-#define TAIKO_A_CDC_ANC2_IIR_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_LPF_B1_CTL			(0x206)
-#define TAIKO_A_CDC_ANC1_LPF_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_LPF_B1_CTL			(0x286)
-#define TAIKO_A_CDC_ANC2_LPF_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_LPF_B2_CTL			(0x207)
-#define TAIKO_A_CDC_ANC1_LPF_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_LPF_B2_CTL			(0x287)
-#define TAIKO_A_CDC_ANC2_LPF_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_SPARE			(0x209)
-#define TAIKO_A_CDC_ANC1_SPARE__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_SPARE			(0x289)
-#define TAIKO_A_CDC_ANC2_SPARE__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_SMLPF_CTL			(0x20A)
-#define TAIKO_A_CDC_ANC1_SMLPF_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_SMLPF_CTL			(0x28A)
-#define TAIKO_A_CDC_ANC2_SMLPF_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_DCFLT_CTL			(0x20B)
-#define TAIKO_A_CDC_ANC1_DCFLT_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_DCFLT_CTL			(0x28B)
-#define TAIKO_A_CDC_ANC2_DCFLT_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_GAIN_CTL			(0x20C)
-#define TAIKO_A_CDC_ANC1_GAIN_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_GAIN_CTL			(0x28C)
-#define TAIKO_A_CDC_ANC2_GAIN_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC1_B2_CTL			(0x20D)
-#define TAIKO_A_CDC_ANC1_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_ANC2_B2_CTL			(0x28D)
-#define TAIKO_A_CDC_ANC2_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_TIMER			(0x220)
-#define TAIKO_A_CDC_TX1_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_TIMER			(0x228)
-#define TAIKO_A_CDC_TX2_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_TIMER			(0x230)
-#define TAIKO_A_CDC_TX3_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_TIMER			(0x238)
-#define TAIKO_A_CDC_TX4_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_TIMER			(0x240)
-#define TAIKO_A_CDC_TX5_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_TIMER			(0x248)
-#define TAIKO_A_CDC_TX6_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_TIMER			(0x250)
-#define TAIKO_A_CDC_TX7_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_TIMER			(0x258)
-#define TAIKO_A_CDC_TX8_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_TIMER			(0x260)
-#define TAIKO_A_CDC_TX9_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_TIMER			(0x268)
-#define TAIKO_A_CDC_TX10_VOL_CTL_TIMER__POR				(0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_GAIN			(0x221)
-#define TAIKO_A_CDC_TX1_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_GAIN			(0x229)
-#define TAIKO_A_CDC_TX2_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_GAIN			(0x231)
-#define TAIKO_A_CDC_TX3_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_GAIN			(0x239)
-#define TAIKO_A_CDC_TX4_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_GAIN			(0x241)
-#define TAIKO_A_CDC_TX5_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_GAIN			(0x249)
-#define TAIKO_A_CDC_TX6_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_GAIN			(0x251)
-#define TAIKO_A_CDC_TX7_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_GAIN			(0x259)
-#define TAIKO_A_CDC_TX8_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_GAIN			(0x261)
-#define TAIKO_A_CDC_TX9_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_GAIN			(0x269)
-#define TAIKO_A_CDC_TX10_VOL_CTL_GAIN__POR				(0x00)
-#define TAIKO_A_CDC_TX1_VOL_CTL_CFG			(0x222)
-#define TAIKO_A_CDC_TX1_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX2_VOL_CTL_CFG			(0x22A)
-#define TAIKO_A_CDC_TX2_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX3_VOL_CTL_CFG			(0x232)
-#define TAIKO_A_CDC_TX3_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX4_VOL_CTL_CFG			(0x23A)
-#define TAIKO_A_CDC_TX4_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX5_VOL_CTL_CFG			(0x242)
-#define TAIKO_A_CDC_TX5_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX6_VOL_CTL_CFG			(0x24A)
-#define TAIKO_A_CDC_TX6_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX7_VOL_CTL_CFG			(0x252)
-#define TAIKO_A_CDC_TX7_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX8_VOL_CTL_CFG			(0x25A)
-#define TAIKO_A_CDC_TX8_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX9_VOL_CTL_CFG			(0x262)
-#define TAIKO_A_CDC_TX9_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX10_VOL_CTL_CFG			(0x26A)
-#define TAIKO_A_CDC_TX10_VOL_CTL_CFG__POR				(0x00)
-#define TAIKO_A_CDC_TX1_MUX_CTL			(0x223)
-#define TAIKO_A_CDC_TX1_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX2_MUX_CTL			(0x22B)
-#define TAIKO_A_CDC_TX2_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX3_MUX_CTL			(0x233)
-#define TAIKO_A_CDC_TX3_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX4_MUX_CTL			(0x23B)
-#define TAIKO_A_CDC_TX4_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX5_MUX_CTL			(0x243)
-#define TAIKO_A_CDC_TX5_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX6_MUX_CTL			(0x24B)
-#define TAIKO_A_CDC_TX6_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX7_MUX_CTL			(0x253)
-#define TAIKO_A_CDC_TX7_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX8_MUX_CTL			(0x25B)
-#define TAIKO_A_CDC_TX8_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX9_MUX_CTL			(0x263)
-#define TAIKO_A_CDC_TX9_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX10_MUX_CTL			(0x26B)
-#define TAIKO_A_CDC_TX10_MUX_CTL__POR				(0x08)
-#define TAIKO_A_CDC_TX1_CLK_FS_CTL			(0x224)
-#define TAIKO_A_CDC_TX1_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX2_CLK_FS_CTL			(0x22C)
-#define TAIKO_A_CDC_TX2_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX3_CLK_FS_CTL			(0x234)
-#define TAIKO_A_CDC_TX3_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX4_CLK_FS_CTL			(0x23C)
-#define TAIKO_A_CDC_TX4_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX5_CLK_FS_CTL			(0x244)
-#define TAIKO_A_CDC_TX5_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX6_CLK_FS_CTL			(0x24C)
-#define TAIKO_A_CDC_TX6_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX7_CLK_FS_CTL			(0x254)
-#define TAIKO_A_CDC_TX7_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX8_CLK_FS_CTL			(0x25C)
-#define TAIKO_A_CDC_TX8_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX9_CLK_FS_CTL			(0x264)
-#define TAIKO_A_CDC_TX9_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX10_CLK_FS_CTL			(0x26C)
-#define TAIKO_A_CDC_TX10_CLK_FS_CTL__POR				(0x03)
-#define TAIKO_A_CDC_TX1_DMIC_CTL			(0x225)
-#define TAIKO_A_CDC_TX1_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX2_DMIC_CTL			(0x22D)
-#define TAIKO_A_CDC_TX2_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX3_DMIC_CTL			(0x235)
-#define TAIKO_A_CDC_TX3_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX4_DMIC_CTL			(0x23D)
-#define TAIKO_A_CDC_TX4_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX5_DMIC_CTL			(0x245)
-#define TAIKO_A_CDC_TX5_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX6_DMIC_CTL			(0x24D)
-#define TAIKO_A_CDC_TX6_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX7_DMIC_CTL			(0x255)
-#define TAIKO_A_CDC_TX7_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX8_DMIC_CTL			(0x25D)
-#define TAIKO_A_CDC_TX8_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX9_DMIC_CTL			(0x265)
-#define TAIKO_A_CDC_TX9_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TX10_DMIC_CTL			(0x26D)
-#define TAIKO_A_CDC_TX10_DMIC_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B1_CTL			(0x278)
-#define TAIKO_A_CDC_DEBUG_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B2_CTL			(0x279)
-#define TAIKO_A_CDC_DEBUG_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B3_CTL			(0x27A)
-#define TAIKO_A_CDC_DEBUG_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B4_CTL			(0x27B)
-#define TAIKO_A_CDC_DEBUG_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B5_CTL			(0x27C)
-#define TAIKO_A_CDC_DEBUG_B5_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B6_CTL			(0x27D)
-#define TAIKO_A_CDC_DEBUG_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_DEBUG_B7_CTL			(0x27E)
-#define TAIKO_A_CDC_DEBUG_B7_CTL__POR				(0x00)
-#define TAIKO_A_CDC_SRC1_PDA_CFG			(0x2A0)
-#define TAIKO_A_CDC_SRC1_PDA_CFG__POR				(0x00)
-#define TAIKO_A_CDC_SRC2_PDA_CFG			(0x2A8)
-#define TAIKO_A_CDC_SRC2_PDA_CFG__POR				(0x00)
-#define TAIKO_A_CDC_SRC1_FS_CTL			(0x2A1)
-#define TAIKO_A_CDC_SRC1_FS_CTL__POR				(0x1B)
-#define TAIKO_A_CDC_SRC2_FS_CTL			(0x2A9)
-#define TAIKO_A_CDC_SRC2_FS_CTL__POR				(0x1B)
-#define TAIKO_A_CDC_RX1_B1_CTL			(0x2B0)
-#define TAIKO_A_CDC_RX1_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_B1_CTL			(0x2B8)
-#define TAIKO_A_CDC_RX2_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_B1_CTL			(0x2C0)
-#define TAIKO_A_CDC_RX3_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_B1_CTL			(0x2C8)
-#define TAIKO_A_CDC_RX4_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_B1_CTL			(0x2D0)
-#define TAIKO_A_CDC_RX5_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_B1_CTL			(0x2D8)
-#define TAIKO_A_CDC_RX6_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_B1_CTL			(0x2E0)
-#define TAIKO_A_CDC_RX7_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX1_B2_CTL			(0x2B1)
-#define TAIKO_A_CDC_RX1_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_B2_CTL			(0x2B9)
-#define TAIKO_A_CDC_RX2_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_B2_CTL			(0x2C1)
-#define TAIKO_A_CDC_RX3_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_B2_CTL			(0x2C9)
-#define TAIKO_A_CDC_RX4_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_B2_CTL			(0x2D1)
-#define TAIKO_A_CDC_RX5_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_B2_CTL			(0x2D9)
-#define TAIKO_A_CDC_RX6_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_B2_CTL			(0x2E1)
-#define TAIKO_A_CDC_RX7_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX1_B3_CTL			(0x2B2)
-#define TAIKO_A_CDC_RX1_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_B3_CTL			(0x2BA)
-#define TAIKO_A_CDC_RX2_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_B3_CTL			(0x2C2)
-#define TAIKO_A_CDC_RX3_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_B3_CTL			(0x2CA)
-#define TAIKO_A_CDC_RX4_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_B3_CTL			(0x2D2)
-#define TAIKO_A_CDC_RX5_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_B3_CTL			(0x2DA)
-#define TAIKO_A_CDC_RX6_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_B3_CTL			(0x2E2)
-#define TAIKO_A_CDC_RX7_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX1_B4_CTL			(0x2B3)
-#define TAIKO_A_CDC_RX1_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_B4_CTL			(0x2BB)
-#define TAIKO_A_CDC_RX2_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_B4_CTL			(0x2C3)
-#define TAIKO_A_CDC_RX3_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_B4_CTL			(0x2CB)
-#define TAIKO_A_CDC_RX4_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_B4_CTL			(0x2D3)
-#define TAIKO_A_CDC_RX5_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_B4_CTL			(0x2DB)
-#define TAIKO_A_CDC_RX6_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_B4_CTL			(0x2E3)
-#define TAIKO_A_CDC_RX7_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX1_B5_CTL			(0x2B4)
-#define TAIKO_A_CDC_RX1_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX2_B5_CTL			(0x2BC)
-#define TAIKO_A_CDC_RX2_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX3_B5_CTL			(0x2C4)
-#define TAIKO_A_CDC_RX3_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX4_B5_CTL			(0x2CC)
-#define TAIKO_A_CDC_RX4_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX5_B5_CTL			(0x2D4)
-#define TAIKO_A_CDC_RX5_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX6_B5_CTL			(0x2DC)
-#define TAIKO_A_CDC_RX6_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX7_B5_CTL			(0x2E4)
-#define TAIKO_A_CDC_RX7_B5_CTL__POR				(0x78)
-#define TAIKO_A_CDC_RX1_B6_CTL			(0x2B5)
-#define TAIKO_A_CDC_RX1_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX2_B6_CTL			(0x2BD)
-#define TAIKO_A_CDC_RX2_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX3_B6_CTL			(0x2C5)
-#define TAIKO_A_CDC_RX3_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX4_B6_CTL			(0x2CD)
-#define TAIKO_A_CDC_RX4_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX5_B6_CTL			(0x2D5)
-#define TAIKO_A_CDC_RX5_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX6_B6_CTL			(0x2DD)
-#define TAIKO_A_CDC_RX6_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX7_B6_CTL			(0x2E5)
-#define TAIKO_A_CDC_RX7_B6_CTL__POR				(0x80)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL			(0x2B6)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B1_CTL			(0x2BE)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B1_CTL			(0x2C6)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B1_CTL			(0x2CE)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B1_CTL			(0x2D6)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B1_CTL			(0x2DE)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B1_CTL			(0x2E6)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B2_CTL			(0x2B7)
-#define TAIKO_A_CDC_RX1_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B2_CTL			(0x2BF)
-#define TAIKO_A_CDC_RX2_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B2_CTL			(0x2C7)
-#define TAIKO_A_CDC_RX3_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B2_CTL			(0x2CF)
-#define TAIKO_A_CDC_RX4_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B2_CTL			(0x2D7)
-#define TAIKO_A_CDC_RX5_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B2_CTL			(0x2DF)
-#define TAIKO_A_CDC_RX6_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B2_CTL			(0x2E7)
-#define TAIKO_A_CDC_RX7_VOL_CTL_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_VBAT_CFG			(0x2E8)
-#define TAIKO_A_CDC_VBAT_CFG__POR				(0x1A)
-#define TAIKO_A_CDC_VBAT_ADC_CAL1			(0x2E9)
-#define TAIKO_A_CDC_VBAT_ADC_CAL1__POR				(0x00)
-#define TAIKO_A_CDC_VBAT_ADC_CAL2			(0x2EA)
-#define TAIKO_A_CDC_VBAT_ADC_CAL2__POR				(0x00)
-#define TAIKO_A_CDC_VBAT_ADC_CAL3			(0x2EB)
-#define TAIKO_A_CDC_VBAT_ADC_CAL3__POR				(0x04)
-#define TAIKO_A_CDC_VBAT_PK_EST1			(0x2EC)
-#define TAIKO_A_CDC_VBAT_PK_EST1__POR				(0xE0)
-#define TAIKO_A_CDC_VBAT_PK_EST2			(0x2ED)
-#define TAIKO_A_CDC_VBAT_PK_EST2__POR				(0x01)
-#define TAIKO_A_CDC_VBAT_PK_EST3			(0x2EE)
-#define TAIKO_A_CDC_VBAT_PK_EST3__POR				(0x40)
-#define TAIKO_A_CDC_VBAT_RF_PROC1			(0x2EF)
-#define TAIKO_A_CDC_VBAT_RF_PROC1__POR				(0x2A)
-#define TAIKO_A_CDC_VBAT_RF_PROC2			(0x2F0)
-#define TAIKO_A_CDC_VBAT_RF_PROC2__POR				(0x86)
-#define TAIKO_A_CDC_VBAT_TAC1			(0x2F1)
-#define TAIKO_A_CDC_VBAT_TAC1__POR				(0x70)
-#define TAIKO_A_CDC_VBAT_TAC2			(0x2F2)
-#define TAIKO_A_CDC_VBAT_TAC2__POR				(0x18)
-#define TAIKO_A_CDC_VBAT_TAC3			(0x2F3)
-#define TAIKO_A_CDC_VBAT_TAC3__POR				(0x18)
-#define TAIKO_A_CDC_VBAT_TAC4			(0x2F4)
-#define TAIKO_A_CDC_VBAT_TAC4__POR				(0x03)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD1			(0x2F5)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD1__POR				(0x01)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD2			(0x2F6)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD2__POR				(0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD3			(0x2F7)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD3__POR				(0x64)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD4			(0x2F8)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD4__POR				(0x01)
-#define TAIKO_A_CDC_VBAT_DEBUG1			(0x2F9)
-#define TAIKO_A_CDC_VBAT_DEBUG1__POR				(0x00)
-#define TAIKO_A_CDC_CLK_ANC_RESET_CTL			(0x300)
-#define TAIKO_A_CDC_CLK_ANC_RESET_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_RX_RESET_CTL			(0x301)
-#define TAIKO_A_CDC_CLK_RX_RESET_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_TX_RESET_B1_CTL			(0x302)
-#define TAIKO_A_CDC_CLK_TX_RESET_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_TX_RESET_B2_CTL			(0x303)
-#define TAIKO_A_CDC_CLK_TX_RESET_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_DMIC_B1_CTL			(0x304)
-#define TAIKO_A_CDC_CLK_DMIC_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_DMIC_B2_CTL			(0x305)
-#define TAIKO_A_CDC_CLK_DMIC_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_RX_I2S_CTL			(0x306)
-#define TAIKO_A_CDC_CLK_RX_I2S_CTL__POR				(0x03)
-#define TAIKO_A_CDC_CLK_TX_I2S_CTL			(0x307)
-#define TAIKO_A_CDC_CLK_TX_I2S_CTL__POR				(0x03)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B1_CTL			(0x308)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B2_CTL			(0x309)
-#define TAIKO_A_CDC_CLK_OTHR_RESET_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B1_CTL			(0x30A)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B2_CTL			(0x30B)
-#define TAIKO_A_CDC_CLK_TX_CLK_EN_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_OTHR_CTL			(0x30C)
-#define TAIKO_A_CDC_CLK_OTHR_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL			(0x30D)
-#define TAIKO_A_CDC_CLK_RDAC_CLK_EN_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_ANC_CLK_EN_CTL			(0x30E)
-#define TAIKO_A_CDC_CLK_ANC_CLK_EN_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_RX_B1_CTL			(0x30F)
-#define TAIKO_A_CDC_CLK_RX_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_RX_B2_CTL			(0x310)
-#define TAIKO_A_CDC_CLK_RX_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_MCLK_CTL			(0x311)
-#define TAIKO_A_CDC_CLK_MCLK_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_PDM_CTL			(0x312)
-#define TAIKO_A_CDC_CLK_PDM_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_SD_CTL			(0x313)
-#define TAIKO_A_CDC_CLK_SD_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLK_POWER_CTL			(0x314)
-#define TAIKO_A_CDC_CLK_POWER_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_B1_CTL			(0x320)
-#define TAIKO_A_CDC_CLSH_B1_CTL__POR				(0xE4)
-#define TAIKO_A_CDC_CLSH_B2_CTL			(0x321)
-#define TAIKO_A_CDC_CLSH_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_B3_CTL			(0x322)
-#define TAIKO_A_CDC_CLSH_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_BUCK_NCP_VARS			(0x323)
-#define TAIKO_A_CDC_CLSH_BUCK_NCP_VARS__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_IDLE_HPH_THSD			(0x324)
-#define TAIKO_A_CDC_CLSH_IDLE_HPH_THSD__POR				(0x12)
-#define TAIKO_A_CDC_CLSH_IDLE_EAR_THSD			(0x325)
-#define TAIKO_A_CDC_CLSH_IDLE_EAR_THSD__POR				(0x0C)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_HPH_THSD			(0x326)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR				(0x18)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_EAR_THSD			(0x327)
-#define TAIKO_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR				(0x23)
-#define TAIKO_A_CDC_CLSH_K_ADDR			(0x328)
-#define TAIKO_A_CDC_CLSH_K_ADDR__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_K_DATA			(0x329)
-#define TAIKO_A_CDC_CLSH_K_DATA__POR				(0xA4)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_L			(0x32A)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_L__POR				(0xD7)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_U			(0x32B)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_HPH_U__POR				(0x05)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_L			(0x32C)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_L__POR				(0x60)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_U			(0x32D)
-#define TAIKO_A_CDC_CLSH_I_PA_FACT_EAR_U__POR				(0x09)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_EAR			(0x32E)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_EAR__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_HPH			(0x32F)
-#define TAIKO_A_CDC_CLSH_V_PA_HD_HPH__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_EAR			(0x330)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_EAR__POR				(0x00)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_HPH			(0x331)
-#define TAIKO_A_CDC_CLSH_V_PA_MIN_HPH__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B1_CTL			(0x340)
-#define TAIKO_A_CDC_IIR1_GAIN_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B1_CTL			(0x350)
-#define TAIKO_A_CDC_IIR2_GAIN_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B2_CTL			(0x341)
-#define TAIKO_A_CDC_IIR1_GAIN_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B2_CTL			(0x351)
-#define TAIKO_A_CDC_IIR2_GAIN_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B3_CTL			(0x342)
-#define TAIKO_A_CDC_IIR1_GAIN_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B3_CTL			(0x352)
-#define TAIKO_A_CDC_IIR2_GAIN_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B4_CTL			(0x343)
-#define TAIKO_A_CDC_IIR1_GAIN_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B4_CTL			(0x353)
-#define TAIKO_A_CDC_IIR2_GAIN_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B5_CTL			(0x344)
-#define TAIKO_A_CDC_IIR1_GAIN_B5_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B5_CTL			(0x354)
-#define TAIKO_A_CDC_IIR2_GAIN_B5_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B6_CTL			(0x345)
-#define TAIKO_A_CDC_IIR1_GAIN_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B6_CTL			(0x355)
-#define TAIKO_A_CDC_IIR2_GAIN_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B7_CTL			(0x346)
-#define TAIKO_A_CDC_IIR1_GAIN_B7_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B7_CTL			(0x356)
-#define TAIKO_A_CDC_IIR2_GAIN_B7_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_GAIN_B8_CTL			(0x347)
-#define TAIKO_A_CDC_IIR1_GAIN_B8_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL			(0x357)
-#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_CTL			(0x348)
-#define TAIKO_A_CDC_IIR1_CTL__POR				(0x40)
-#define TAIKO_A_CDC_IIR2_CTL			(0x358)
-#define TAIKO_A_CDC_IIR2_CTL__POR				(0x40)
-#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL			(0x349)
-#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_GAIN_TIMER_CTL			(0x359)
-#define TAIKO_A_CDC_IIR2_GAIN_TIMER_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_COEF_B1_CTL			(0x34A)
-#define TAIKO_A_CDC_IIR1_COEF_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_COEF_B1_CTL			(0x35A)
-#define TAIKO_A_CDC_IIR2_COEF_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR1_COEF_B2_CTL			(0x34B)
-#define TAIKO_A_CDC_IIR1_COEF_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_IIR2_COEF_B2_CTL			(0x35B)
-#define TAIKO_A_CDC_IIR2_COEF_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_TOP_GAIN_UPDATE			(0x360)
-#define TAIKO_A_CDC_TOP_GAIN_UPDATE__POR				(0x00)
-#define TAIKO_A_CDC_COMP0_B1_CTL			(0x368)
-#define TAIKO_A_CDC_COMP0_B1_CTL__POR				(0x30)
-#define TAIKO_A_CDC_COMP1_B1_CTL			(0x370)
-#define TAIKO_A_CDC_COMP1_B1_CTL__POR				(0x30)
-#define TAIKO_A_CDC_COMP2_B1_CTL			(0x378)
-#define TAIKO_A_CDC_COMP2_B1_CTL__POR				(0x30)
-#define TAIKO_A_CDC_COMP0_B2_CTL			(0x369)
-#define TAIKO_A_CDC_COMP0_B2_CTL__POR				(0xB5)
-#define TAIKO_A_CDC_COMP1_B2_CTL			(0x371)
-#define TAIKO_A_CDC_COMP1_B2_CTL__POR				(0xB5)
-#define TAIKO_A_CDC_COMP2_B2_CTL			(0x379)
-#define TAIKO_A_CDC_COMP2_B2_CTL__POR				(0xB5)
-#define TAIKO_A_CDC_COMP0_B3_CTL			(0x36A)
-#define TAIKO_A_CDC_COMP0_B3_CTL__POR				(0x28)
-#define TAIKO_A_CDC_COMP1_B3_CTL			(0x372)
-#define TAIKO_A_CDC_COMP1_B3_CTL__POR				(0x28)
-#define TAIKO_A_CDC_COMP2_B3_CTL			(0x37A)
-#define TAIKO_A_CDC_COMP2_B3_CTL__POR				(0x28)
-#define TAIKO_A_CDC_COMP0_B4_CTL			(0x36B)
-#define TAIKO_A_CDC_COMP0_B4_CTL__POR				(0x3C)
-#define TAIKO_A_CDC_COMP1_B4_CTL			(0x373)
-#define TAIKO_A_CDC_COMP1_B4_CTL__POR				(0x3C)
-#define TAIKO_A_CDC_COMP2_B4_CTL			(0x37B)
-#define TAIKO_A_CDC_COMP2_B4_CTL__POR				(0x3C)
-#define TAIKO_A_CDC_COMP0_B5_CTL			(0x36C)
-#define TAIKO_A_CDC_COMP0_B5_CTL__POR				(0x1F)
-#define TAIKO_A_CDC_COMP1_B5_CTL			(0x374)
-#define TAIKO_A_CDC_COMP1_B5_CTL__POR				(0x1F)
-#define TAIKO_A_CDC_COMP2_B5_CTL			(0x37C)
-#define TAIKO_A_CDC_COMP2_B5_CTL__POR				(0x1F)
-#define TAIKO_A_CDC_COMP0_B6_CTL			(0x36D)
-#define TAIKO_A_CDC_COMP0_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_COMP1_B6_CTL			(0x375)
-#define TAIKO_A_CDC_COMP1_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_COMP2_B6_CTL			(0x37D)
-#define TAIKO_A_CDC_COMP2_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS			(0x36E)
-#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS__POR				(0x03)
-#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS			(0x376)
-#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS__POR				(0x03)
-#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS			(0x37E)
-#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS__POR				(0x03)
-#define TAIKO_A_CDC_COMP0_FS_CFG			(0x36F)
-#define TAIKO_A_CDC_COMP0_FS_CFG__POR				(0x03)
-#define TAIKO_A_CDC_COMP1_FS_CFG			(0x377)
-#define TAIKO_A_CDC_COMP1_FS_CFG__POR				(0x03)
-#define TAIKO_A_CDC_COMP2_FS_CFG			(0x37F)
-#define TAIKO_A_CDC_COMP2_FS_CFG__POR				(0x03)
-#define TAIKO_A_CDC_CONN_RX1_B1_CTL			(0x380)
-#define TAIKO_A_CDC_CONN_RX1_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX1_B2_CTL			(0x381)
-#define TAIKO_A_CDC_CONN_RX1_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX1_B3_CTL			(0x382)
-#define TAIKO_A_CDC_CONN_RX1_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX2_B1_CTL			(0x383)
-#define TAIKO_A_CDC_CONN_RX2_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX2_B2_CTL			(0x384)
-#define TAIKO_A_CDC_CONN_RX2_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX2_B3_CTL			(0x385)
-#define TAIKO_A_CDC_CONN_RX2_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX3_B1_CTL			(0x386)
-#define TAIKO_A_CDC_CONN_RX3_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX3_B2_CTL			(0x387)
-#define TAIKO_A_CDC_CONN_RX3_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX4_B1_CTL			(0x388)
-#define TAIKO_A_CDC_CONN_RX4_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX4_B2_CTL			(0x389)
-#define TAIKO_A_CDC_CONN_RX4_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX5_B1_CTL			(0x38A)
-#define TAIKO_A_CDC_CONN_RX5_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX5_B2_CTL			(0x38B)
-#define TAIKO_A_CDC_CONN_RX5_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX6_B1_CTL			(0x38C)
-#define TAIKO_A_CDC_CONN_RX6_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX6_B2_CTL			(0x38D)
-#define TAIKO_A_CDC_CONN_RX6_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX7_B1_CTL			(0x38E)
-#define TAIKO_A_CDC_CONN_RX7_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX7_B2_CTL			(0x38F)
-#define TAIKO_A_CDC_CONN_RX7_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX7_B3_CTL			(0x390)
-#define TAIKO_A_CDC_CONN_RX7_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_ANC_B1_CTL			(0x391)
-#define TAIKO_A_CDC_CONN_ANC_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_ANC_B2_CTL			(0x392)
-#define TAIKO_A_CDC_CONN_ANC_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_B1_CTL			(0x393)
-#define TAIKO_A_CDC_CONN_TX_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_B2_CTL			(0x394)
-#define TAIKO_A_CDC_CONN_TX_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_B3_CTL			(0x395)
-#define TAIKO_A_CDC_CONN_TX_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_B4_CTL			(0x396)
-#define TAIKO_A_CDC_CONN_TX_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B1_CTL			(0x397)
-#define TAIKO_A_CDC_CONN_EQ1_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B2_CTL			(0x398)
-#define TAIKO_A_CDC_CONN_EQ1_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B3_CTL			(0x399)
-#define TAIKO_A_CDC_CONN_EQ1_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ1_B4_CTL			(0x39A)
-#define TAIKO_A_CDC_CONN_EQ1_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B1_CTL			(0x39B)
-#define TAIKO_A_CDC_CONN_EQ2_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B2_CTL			(0x39C)
-#define TAIKO_A_CDC_CONN_EQ2_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B3_CTL			(0x39D)
-#define TAIKO_A_CDC_CONN_EQ2_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_EQ2_B4_CTL			(0x39E)
-#define TAIKO_A_CDC_CONN_EQ2_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_SRC1_B1_CTL			(0x39F)
-#define TAIKO_A_CDC_CONN_SRC1_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_SRC1_B2_CTL			(0x3A0)
-#define TAIKO_A_CDC_CONN_SRC1_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_SRC2_B1_CTL			(0x3A1)
-#define TAIKO_A_CDC_CONN_SRC2_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_SRC2_B2_CTL			(0x3A2)
-#define TAIKO_A_CDC_CONN_SRC2_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B1_CTL			(0x3A3)
-#define TAIKO_A_CDC_CONN_TX_SB_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B2_CTL			(0x3A4)
-#define TAIKO_A_CDC_CONN_TX_SB_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B3_CTL			(0x3A5)
-#define TAIKO_A_CDC_CONN_TX_SB_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B4_CTL			(0x3A6)
-#define TAIKO_A_CDC_CONN_TX_SB_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B5_CTL			(0x3A7)
-#define TAIKO_A_CDC_CONN_TX_SB_B5_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B6_CTL			(0x3A8)
-#define TAIKO_A_CDC_CONN_TX_SB_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B7_CTL			(0x3A9)
-#define TAIKO_A_CDC_CONN_TX_SB_B7_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B8_CTL			(0x3AA)
-#define TAIKO_A_CDC_CONN_TX_SB_B8_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B9_CTL			(0x3AB)
-#define TAIKO_A_CDC_CONN_TX_SB_B9_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B10_CTL			(0x3AC)
-#define TAIKO_A_CDC_CONN_TX_SB_B10_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_TX_SB_B11_CTL			(0x3AD)
-#define TAIKO_A_CDC_CONN_TX_SB_B11_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX_SB_B1_CTL			(0x3AE)
-#define TAIKO_A_CDC_CONN_RX_SB_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_RX_SB_B2_CTL			(0x3AF)
-#define TAIKO_A_CDC_CONN_RX_SB_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_CLSH_CTL			(0x3B0)
-#define TAIKO_A_CDC_CONN_CLSH_CTL__POR				(0x00)
-#define TAIKO_A_CDC_CONN_MISC			(0x3B1)
-#define TAIKO_A_CDC_CONN_MISC__POR				(0x01)
-#define TAIKO_A_CDC_CONN_MAD			(0x3B2)
-#define TAIKO_A_CDC_CONN_MAD__POR				(0x01)
-#define TAIKO_A_CDC_MBHC_EN_CTL			(0x3C0)
-#define TAIKO_A_CDC_MBHC_EN_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_FIR_B1_CFG			(0x3C1)
-#define TAIKO_A_CDC_MBHC_FIR_B1_CFG__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_FIR_B2_CFG			(0x3C2)
-#define TAIKO_A_CDC_MBHC_FIR_B2_CFG__POR				(0x06)
-#define TAIKO_A_CDC_MBHC_TIMER_B1_CTL			(0x3C3)
-#define TAIKO_A_CDC_MBHC_TIMER_B1_CTL__POR				(0x03)
-#define TAIKO_A_CDC_MBHC_TIMER_B2_CTL			(0x3C4)
-#define TAIKO_A_CDC_MBHC_TIMER_B2_CTL__POR				(0x09)
-#define TAIKO_A_CDC_MBHC_TIMER_B3_CTL			(0x3C5)
-#define TAIKO_A_CDC_MBHC_TIMER_B3_CTL__POR				(0x1E)
-#define TAIKO_A_CDC_MBHC_TIMER_B4_CTL			(0x3C6)
-#define TAIKO_A_CDC_MBHC_TIMER_B4_CTL__POR				(0x45)
-#define TAIKO_A_CDC_MBHC_TIMER_B5_CTL			(0x3C7)
-#define TAIKO_A_CDC_MBHC_TIMER_B5_CTL__POR				(0x04)
-#define TAIKO_A_CDC_MBHC_TIMER_B6_CTL			(0x3C8)
-#define TAIKO_A_CDC_MBHC_TIMER_B6_CTL__POR				(0x78)
-#define TAIKO_A_CDC_MBHC_B1_STATUS			(0x3C9)
-#define TAIKO_A_CDC_MBHC_B1_STATUS__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_B2_STATUS			(0x3CA)
-#define TAIKO_A_CDC_MBHC_B2_STATUS__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_B3_STATUS			(0x3CB)
-#define TAIKO_A_CDC_MBHC_B3_STATUS__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_B4_STATUS			(0x3CC)
-#define TAIKO_A_CDC_MBHC_B4_STATUS__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_B5_STATUS			(0x3CD)
-#define TAIKO_A_CDC_MBHC_B5_STATUS__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_B1_CTL			(0x3CE)
-#define TAIKO_A_CDC_MBHC_B1_CTL__POR				(0xC0)
-#define TAIKO_A_CDC_MBHC_B2_CTL			(0x3CF)
-#define TAIKO_A_CDC_MBHC_B2_CTL__POR				(0x5D)
-#define TAIKO_A_CDC_MBHC_VOLT_B1_CTL			(0x3D0)
-#define TAIKO_A_CDC_MBHC_VOLT_B1_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B2_CTL			(0x3D1)
-#define TAIKO_A_CDC_MBHC_VOLT_B2_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B3_CTL			(0x3D2)
-#define TAIKO_A_CDC_MBHC_VOLT_B3_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B4_CTL			(0x3D3)
-#define TAIKO_A_CDC_MBHC_VOLT_B4_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B5_CTL			(0x3D4)
-#define TAIKO_A_CDC_MBHC_VOLT_B5_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B6_CTL			(0x3D5)
-#define TAIKO_A_CDC_MBHC_VOLT_B6_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B7_CTL			(0x3D6)
-#define TAIKO_A_CDC_MBHC_VOLT_B7_CTL__POR				(0xFF)
-#define TAIKO_A_CDC_MBHC_VOLT_B8_CTL			(0x3D7)
-#define TAIKO_A_CDC_MBHC_VOLT_B8_CTL__POR				(0x07)
-#define TAIKO_A_CDC_MBHC_VOLT_B9_CTL			(0x3D8)
-#define TAIKO_A_CDC_MBHC_VOLT_B9_CTL__POR				(0xFF)
-#define TAIKO_A_CDC_MBHC_VOLT_B10_CTL			(0x3D9)
-#define TAIKO_A_CDC_MBHC_VOLT_B10_CTL__POR				(0x7F)
-#define TAIKO_A_CDC_MBHC_VOLT_B11_CTL			(0x3DA)
-#define TAIKO_A_CDC_MBHC_VOLT_B11_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_VOLT_B12_CTL			(0x3DB)
-#define TAIKO_A_CDC_MBHC_VOLT_B12_CTL__POR				(0x80)
-#define TAIKO_A_CDC_MBHC_CLK_CTL			(0x3DC)
-#define TAIKO_A_CDC_MBHC_CLK_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_INT_CTL			(0x3DD)
-#define TAIKO_A_CDC_MBHC_INT_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_DEBUG_CTL			(0x3DE)
-#define TAIKO_A_CDC_MBHC_DEBUG_CTL__POR				(0x00)
-#define TAIKO_A_CDC_MBHC_SPARE			(0x3DF)
-#define TAIKO_A_CDC_MBHC_SPARE__POR				(0x00)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_1			(0x3E0)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_1__POR				(0x00)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_2			(0x3E1)
-#define TAIKO_A_CDC_MAD_MAIN_CTL_2__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_1			(0x3E2)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_1__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_2			(0x3E3)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_2__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_3			(0x3E4)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_3__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_4			(0x3E5)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_4__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_5			(0x3E6)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_5__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_6			(0x3E7)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_6__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_7			(0x3E8)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_7__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_8			(0x3E9)
-#define TAIKO_A_CDC_MAD_AUDIO_CTL_8__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_PTR			(0x3EA)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_PTR__POR				(0x00)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_VAL			(0x3EB)
-#define TAIKO_A_CDC_MAD_AUDIO_IIR_CTL_VAL__POR				(0x40)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_1			(0x3EC)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_1__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_2			(0x3ED)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_2__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_3			(0x3EE)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_3__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_4			(0x3EF)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_4__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_5			(0x3F0)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_5__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_6			(0x3F1)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_6__POR				(0x00)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_7			(0x3F2)
-#define TAIKO_A_CDC_MAD_ULTR_CTL_7__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_1			(0x3F3)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_1__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_2			(0x3F4)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_2__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_3			(0x3F5)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_3__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_4			(0x3F6)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_4__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_5			(0x3F7)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_5__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_6			(0x3F8)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_6__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_7			(0x3F9)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_7__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_8			(0x3FA)
-#define TAIKO_A_CDC_MAD_BEACON_CTL_8__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_PTR			(0x3FB)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_PTR__POR				(0x00)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_VAL			(0x3FC)
-#define TAIKO_A_CDC_MAD_BEACON_IIR_CTL_VAL__POR				(0x00)
-
-/* Taiko v2+ registers */
-#define TAIKO_A_CDC_TX_1_GAIN			(0x153)
-#define TAIKO_A_CDC_TX_1_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_2_GAIN			(0x155)
-#define TAIKO_A_CDC_TX_2_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_1_2_ADC_IB		(0x156)
-#define TAIKO_A_CDC_TX_1_2_ADC_IB__POR			(0x44)
-#define TAIKO_A_CDC_TX_3_GAIN			(0x15D)
-#define TAIKO_A_CDC_TX_3_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_4_GAIN			(0x15F)
-#define TAIKO_A_CDC_TX_4_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_3_4_ADC_IB		(0x160)
-#define TAIKO_A_CDC_TX_3_4_ADC_IB__POR			(0x44)
-#define TAIKO_A_CDC_TX_5_GAIN			(0x167)
-#define TAIKO_A_CDC_TX_5_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_6_GAIN			(0x169)
-#define TAIKO_A_CDC_TX_6_GAIN__POR			(0x02)
-#define TAIKO_A_CDC_TX_5_6_ADC_IB		(0x16A)
-#define TAIKO_A_CDC_TX_5_6_ADC_IB__POR			(0x44)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL0		(0x270)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL0__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL1		(0x271)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL1__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL2		(0x272)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL2__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL3		(0x273)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL3__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL4		(0x274)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL4__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL5		(0x275)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL5__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL6		(0x276)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL6__POR		(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL7		(0x277)
-#define TAIKO_A_CDC_SPKR_CLIPDET_VAL7__POR		(0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD_MON		(0x2FA)
-#define TAIKO_A_CDC_VBAT_GAIN_UPD_MON__POR		(0x00)
-#define TAIKO_A_CDC_VBAT_GAIN_MON_VAL		(0x2FB)
-#define TAIKO_A_CDC_VBAT_GAIN_MON_VAL__POR		(0x00)
-#define TAIKO_A_CDC_PA_RAMP_B1_CTL		(0x361)
-#define TAIKO_A_CDC_PA_RAMP_B1_CTL__POR			(0x00)
-#define TAIKO_A_CDC_PA_RAMP_B2_CTL		(0x362)
-#define TAIKO_A_CDC_PA_RAMP_B2_CTL__POR			(0x00)
-#define TAIKO_A_CDC_PA_RAMP_B3_CTL		(0x363)
-#define TAIKO_A_CDC_PA_RAMP_B3_CTL__POR			(0x00)
-#define TAIKO_A_CDC_PA_RAMP_B4_CTL		(0x364)
-#define TAIKO_A_CDC_PA_RAMP_B4_CTL__POR			(0x00)
-#define TAIKO_A_CDC_SPKR_CLIPDET_B1_CTL		(0x365)
-#define TAIKO_A_CDC_SPKR_CLIPDET_B1_CTL__POR		(0x00)
-
-/* SLIMBUS Slave Registers */
-#define TAIKO_SLIM_PGD_PORT_INT_EN0                     (0x30)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_RX_0             (0x34)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_RX_1             (0x35)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_TX_0             (0x36)
-#define TAIKO_SLIM_PGD_PORT_INT_STATUS_TX_1             (0x37)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_RX_0                (0x38)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_RX_1                (0x39)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_TX_0                (0x3A)
-#define TAIKO_SLIM_PGD_PORT_INT_CLR_TX_1                (0x3B)
-#define TAIKO_SLIM_PGD_PORT_INT_RX_SOURCE0		(0x60)
-#define TAIKO_SLIM_PGD_PORT_INT_TX_SOURCE0		(0x70)
-
-/* Macros for Packing Register Writes into a U32 */
-#define TAIKO_PACKED_REG_SIZE sizeof(u32)
-
-#define TAIKO_CODEC_PACK_ENTRY(reg, mask, val) ((val & 0xff)|\
-	((mask & 0xff) << 8)|((reg & 0xffff) << 16))
-
-#define TAIKO_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
-	do { \
-		((reg) = ((packed >> 16) & (0xffff))); \
-		((mask) = ((packed >> 8) & (0xff))); \
-		((val) = ((packed) & (0xff))); \
-	} while (0);
-
-#endif

diff --git a/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
deleted file mode 100644
index 1dac14b..0000000
--- a/k318/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
+++ /dev/null

@@ -1,344 +0,0 @@
-#ifndef WCD9XXX_CODEC_DIGITAL_H
-
-#define WCD9XXX_CODEC_DIGITAL_H
-
-#define WCD9XXX_A_CHIP_CTL			(0x00)
-#define WCD9XXX_A_CHIP_CTL__POR			(0x00000000)
-#define WCD9XXX_A_CHIP_STATUS			(0x01)
-#define WCD9XXX_A_CHIP_STATUS__POR		(0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_0		(0x04)
-#define WCD9XXX_A_CHIP_ID_BYTE_0__POR		(0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_1		(0x05)
-#define WCD9XXX_A_CHIP_ID_BYTE_1__POR		(0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_2		(0x06)
-#define WCD9XXX_A_CHIP_ID_BYTE_2__POR		(0x00000000)
-#define WCD9XXX_A_CHIP_ID_BYTE_3		(0x07)
-#define WCD9XXX_A_CHIP_ID_BYTE_3__POR		(0x00000001)
-#define WCD9XXX_A_CHIP_VERSION			(0x08)
-#define WCD9XXX_A_CHIP_VERSION__POR		(0x00000020)
-#define WCD9XXX_A_SB_VERSION			(0x09)
-#define WCD9XXX_A_SB_VERSION__POR		(0x00000010)
-#define WCD9XXX_A_SLAVE_ID_1			(0x0C)
-#define WCD9XXX_A_SLAVE_ID_1__POR		(0x00000077)
-#define WCD9XXX_A_SLAVE_ID_2			(0x0D)
-#define WCD9XXX_A_SLAVE_ID_2__POR		(0x00000066)
-#define WCD9XXX_A_SLAVE_ID_3			(0x0E)
-#define WCD9XXX_A_SLAVE_ID_3__POR		(0x00000055)
-#define WCD9XXX_A_CDC_CTL			(0x80)
-#define WCD9XXX_A_CDC_CTL__POR			(0x00000000)
-#define WCD9XXX_A_LEAKAGE_CTL			(0x88)
-#define WCD9XXX_A_LEAKAGE_CTL__POR		(0x00000004)
-#define WCD9XXX_A_INTR_MODE			(0x90)
-#define WCD9XXX_A_INTR_MASK0			(0x94)
-#define WCD9XXX_A_INTR_STATUS0			(0x98)
-#define WCD9XXX_A_INTR_CLEAR0			(0x9C)
-#define WCD9XXX_A_INTR_LEVEL0			(0xA0)
-#define WCD9XXX_A_INTR_LEVEL1			(0xA1)
-#define WCD9XXX_A_INTR_LEVEL2			(0xA2)
-#define WCD9XXX_A_RX_HPH_CNP_EN			(0x1AB)
-#define WCD9XXX_A_RX_HPH_CNP_EN__POR		(0x80)
-#define WCD9XXX_A_RX_HPH_CNP_EN			(0x1AB)
-#define WCD9XXX_A_RX_HPH_CNP_EN__POR		(0x80)
-#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL		(0x101)
-#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL__POR	(0x50)
-#define WCD9XXX_A_CLK_BUFF_EN1			(0x108)
-#define WCD9XXX_A_CLK_BUFF_EN1__POR		(0x04)
-#define WCD9XXX_A_CLK_BUFF_EN2			(0x109)
-#define WCD9XXX_A_CLK_BUFF_EN2__POR		(0x02)
-#define WCD9XXX_A_RX_COM_BIAS			(0x1A2)
-#define WCD9XXX_A_RX_COM_BIAS__POR		(0x00)
-#define WCD9XXX_A_RC_OSC_FREQ			(0x1FA)
-#define WCD9XXX_A_RC_OSC_FREQ__POR		(0x46)
-#define WCD9XXX_A_BIAS_OSC_BG_CTL		(0x105)
-#define WCD9XXX_A_BIAS_OSC_BG_CTL__POR		(0x16)
-#define WCD9XXX_A_RC_OSC_TEST			(0x1FB)
-#define WCD9XXX_A_RC_OSC_TEST__POR		(0x0A)
-#define WCD9XXX_A_CDC_CLK_MCLK_CTL		(0x311)
-#define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR		(0x00)
-
-#define WCD9XXX_A_CDC_MBHC_EN_CTL		(0x3C0)
-#define WCD9XXX_A_CDC_MBHC_EN_CTL__POR		(0x00)
-#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG		(0x3C1)
-#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG		(0x3C2)
-#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG__POR	(0x06)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL		(0x3C3)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL__POR	(0x03)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL		(0x3C4)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL__POR	(0x09)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL		(0x3C5)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL__POR	(0x1E)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL		(0x3C6)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL__POR	(0x45)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL		(0x3C7)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL__POR	(0x04)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL		(0x3C8)
-#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL__POR	(0x78)
-#define WCD9XXX_A_CDC_MBHC_B1_STATUS		(0x3C9)
-#define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_B2_STATUS		(0x3CA)
-#define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_B3_STATUS		(0x3CB)
-#define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_B4_STATUS		(0x3CC)
-#define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_B5_STATUS		(0x3CD)
-#define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_B1_CTL		(0x3CE)
-#define WCD9XXX_A_CDC_MBHC_B1_CTL__POR		(0xC0)
-#define WCD9XXX_A_CDC_MBHC_B2_CTL		(0x3CF)
-#define WCD9XXX_A_CDC_MBHC_B2_CTL__POR		(0x5D)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL		(0x3D0)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL		(0x3D1)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL		(0x3D2)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL		(0x3D3)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL		(0x3D4)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL		(0x3D5)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL		(0x3D6)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL__POR	(0xFF)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL		(0x3D7)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL__POR	(0x07)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL		(0x3D8)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL__POR	(0xFF)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL		(0x3D9)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL__POR	(0x7F)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL		(0x3DA)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL		(0x3DB)
-#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL__POR	(0x80)
-#define WCD9XXX_A_CDC_MBHC_CLK_CTL		(0x3DC)
-#define WCD9XXX_A_CDC_MBHC_CLK_CTL__POR		(0x00)
-#define WCD9XXX_A_CDC_MBHC_INT_CTL		(0x3DD)
-#define WCD9XXX_A_CDC_MBHC_INT_CTL__POR		(0x00)
-#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL		(0x3DE)
-#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL__POR	(0x00)
-#define WCD9XXX_A_CDC_MBHC_SPARE		(0x3DF)
-#define WCD9XXX_A_CDC_MBHC_SPARE__POR		(0x00)
-#define WCD9XXX_A_MBHC_SCALING_MUX_1		(0x14E)
-#define WCD9XXX_A_MBHC_SCALING_MUX_1__POR	(0x00)
-#define WCD9XXX_A_RX_HPH_OCP_CTL		(0x1AA)
-#define WCD9XXX_A_RX_HPH_OCP_CTL__POR		(0x68)
-#define WCD9XXX_A_MICB_1_CTL			(0x12B)
-#define WCD9XXX_A_MICB_1_CTL__POR		(0x16)
-#define WCD9XXX_A_MICB_1_INT_RBIAS		(0x12C)
-#define WCD9XXX_A_MICB_1_INT_RBIAS__POR		(0x24)
-#define WCD9XXX_A_MICB_1_MBHC			(0x12D)
-#define WCD9XXX_A_MICB_1_MBHC__POR		(0x01)
-#define WCD9XXX_A_MICB_CFILT_2_CTL		(0x12E)
-#define WCD9XXX_A_MICB_CFILT_2_CTL__POR		(0x40)
-#define WCD9XXX_A_MICB_CFILT_2_VAL		(0x12F)
-#define WCD9XXX_A_MICB_CFILT_2_VAL__POR		(0x80)
-#define WCD9XXX_A_MICB_CFILT_2_PRECHRG		(0x130)
-#define WCD9XXX_A_MICB_CFILT_2_PRECHRG__POR	(0x38)
-#define WCD9XXX_A_MICB_2_CTL			(0x131)
-#define WCD9XXX_A_MICB_2_CTL__POR		(0x16)
-#define WCD9XXX_A_MICB_2_INT_RBIAS		(0x132)
-#define WCD9XXX_A_MICB_2_INT_RBIAS__POR		(0x24)
-#define WCD9XXX_A_MICB_2_MBHC			(0x133)
-#define WCD9XXX_A_MICB_2_MBHC__POR		(0x02)
-#define WCD9XXX_A_MICB_CFILT_3_CTL		(0x134)
-#define WCD9XXX_A_MICB_CFILT_3_CTL__POR		(0x40)
-#define WCD9XXX_A_MICB_CFILT_3_VAL		(0x135)
-#define WCD9XXX_A_MICB_CFILT_3_VAL__POR		(0x80)
-#define WCD9XXX_A_MICB_CFILT_3_PRECHRG		(0x136)
-#define WCD9XXX_A_MICB_CFILT_3_PRECHRG__POR	(0x38)
-#define WCD9XXX_A_MICB_3_CTL			(0x137)
-#define WCD9XXX_A_MICB_3_CTL__POR		(0x16)
-#define WCD9XXX_A_MICB_3_INT_RBIAS		(0x138)
-#define WCD9XXX_A_MICB_3_INT_RBIAS__POR		(0x24)
-#define WCD9XXX_A_MICB_3_MBHC			(0x139)
-#define WCD9XXX_A_MICB_3_MBHC__POR		(0x00)
-#define WCD9XXX_A_MICB_4_CTL			(0x13D)
-#define WCD9XXX_A_MICB_4_CTL__POR		(0x16)
-#define WCD9XXX_A_MICB_4_INT_RBIAS		(0x13E)
-#define WCD9XXX_A_MICB_4_INT_RBIAS__POR		(0x24)
-#define WCD9XXX_A_MICB_4_MBHC			(0x13F)
-#define WCD9XXX_A_MICB_4_MBHC__POR		(0x01)
-#define WCD9XXX_A_MICB_CFILT_1_VAL		(0x129)
-#define WCD9XXX_A_MICB_CFILT_1_VAL__POR		(0x80)
-#define WCD9XXX_A_RX_HPH_L_STATUS		(0x1B3)
-#define WCD9XXX_A_RX_HPH_L_STATUS__POR		(0x00)
-#define WCD9XXX_A_MBHC_HPH			(0x1FE)
-#define WCD9XXX_A_MBHC_HPH__POR			(0x44)
-#define WCD9XXX_A_RX_HPH_CNP_WG_TIME		(0x1AD)
-#define WCD9XXX_A_RX_HPH_CNP_WG_TIME__POR	(0x2A)
-#define WCD9XXX_A_RX_HPH_R_DAC_CTL		(0x1B7)
-#define WCD9XXX_A_RX_HPH_R_DAC_CTL__POR		(0x00)
-#define WCD9XXX_A_RX_HPH_L_DAC_CTL		(0x1B1)
-#define WCD9XXX_A_RX_HPH_L_DAC_CTL__POR		(0x00)
-#define WCD9XXX_A_TX_7_MBHC_EN			(0x171)
-#define WCD9XXX_A_TX_7_MBHC_EN__POR		(0x0C)
-#define WCD9XXX_A_PIN_CTL_OE0			(0x010)
-#define WCD9XXX_A_PIN_CTL_OE0__POR		(0x00)
-#define WCD9XXX_A_PIN_CTL_OE1			(0x011)
-#define WCD9XXX_A_PIN_CTL_OE1__POR		(0x00)
-#define WCD9XXX_A_MICB_CFILT_1_CTL		(0x128)
-#define WCD9XXX_A_LDO_H_MODE_1			(0x110)
-#define WCD9XXX_A_LDO_H_MODE_1__POR		(0x65)
-#define WCD9XXX_A_MICB_CFILT_1_CTL__POR		(0x40)
-#define WCD9XXX_A_TX_7_MBHC_TEST_CTL		(0x174)
-#define WCD9XXX_A_TX_7_MBHC_TEST_CTL__POR	(0x38)
-#define WCD9XXX_A_MBHC_SCALING_MUX_2		(0x14F)
-#define WCD9XXX_A_MBHC_SCALING_MUX_2__POR	(0x80)
-#define WCD9XXX_A_TX_COM_BIAS			(0x14C)
-#define WCD9XXX_A_TX_COM_BIAS__POR		(0xF0)
-
-#define WCD9XXX_A_MBHC_INSERT_DETECT		(0x14A) /* TAIKO and later */
-#define WCD9XXX_A_MBHC_INSERT_DETECT__POR	(0x00)
-#define WCD9XXX_A_MBHC_INSERT_DET_STATUS	(0x14B) /* TAIKO and later */
-#define WCD9XXX_A_MBHC_INSERT_DET_STATUS__POR	(0x00)
-#define WCD9XXX_A_MAD_ANA_CTRL			(0x150)
-#define WCD9XXX_A_MAD_ANA_CTRL__POR		(0xF1)
-
-
-#define WCD9XXX_A_CDC_CLK_OTHR_CTL			(0x30C)
-#define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR				(0x00)
-
-/* Class H related common registers */
-#define WCD9XXX_A_BUCK_MODE_1			(0x181)
-#define WCD9XXX_A_BUCK_MODE_1__POR				(0x21)
-#define WCD9XXX_A_BUCK_MODE_2			(0x182)
-#define WCD9XXX_A_BUCK_MODE_2__POR				(0xFF)
-#define WCD9XXX_A_BUCK_MODE_3			(0x183)
-#define WCD9XXX_A_BUCK_MODE_3__POR				(0xCC)
-#define WCD9XXX_A_BUCK_MODE_4			(0x184)
-#define WCD9XXX_A_BUCK_MODE_4__POR				(0x3A)
-#define WCD9XXX_A_BUCK_MODE_5			(0x185)
-#define WCD9XXX_A_BUCK_MODE_5__POR				(0x00)
-#define WCD9XXX_A_BUCK_CTRL_VCL_1			(0x186)
-#define WCD9XXX_A_BUCK_CTRL_VCL_1__POR				(0x48)
-#define WCD9XXX_A_BUCK_CTRL_VCL_2			(0x187)
-#define WCD9XXX_A_BUCK_CTRL_VCL_2__POR				(0xA3)
-#define WCD9XXX_A_BUCK_CTRL_VCL_3			(0x188)
-#define WCD9XXX_A_BUCK_CTRL_VCL_3__POR				(0x82)
-#define WCD9XXX_A_BUCK_CTRL_CCL_1			(0x189)
-#define WCD9XXX_A_BUCK_CTRL_CCL_1__POR				(0xAB)
-#define WCD9XXX_A_BUCK_CTRL_CCL_2			(0x18A)
-#define WCD9XXX_A_BUCK_CTRL_CCL_2__POR				(0xDC)
-#define WCD9XXX_A_BUCK_CTRL_CCL_3			(0x18B)
-#define WCD9XXX_A_BUCK_CTRL_CCL_3__POR				(0x6A)
-#define WCD9XXX_A_BUCK_CTRL_CCL_4			(0x18C)
-#define WCD9XXX_A_BUCK_CTRL_CCL_4__POR				(0x58)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1			(0x18D)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR				(0x50)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2			(0x18E)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR				(0x64)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3			(0x18F)
-#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR				(0x77)
-#define WCD9XXX_A_BUCK_TMUX_A_D			(0x190)
-#define WCD9XXX_A_BUCK_TMUX_A_D__POR				(0x00)
-#define WCD9XXX_A_NCP_EN			(0x192)
-#define WCD9XXX_A_NCP_EN__POR				(0xFE)
-#define WCD9XXX_A_NCP_STATIC			(0x194)
-#define WCD9XXX_A_NCP_STATIC__POR				(0x28)
-#define WCD9XXX_A_NCP_BUCKREF			(0x191)
-#define WCD9XXX_A_NCP_BUCKREF__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_B1_CTL			(0x320)
-#define WCD9XXX_A_CDC_CLSH_B1_CTL__POR				(0xE4)
-#define WCD9XXX_A_CDC_CLSH_B2_CTL			(0x321)
-#define WCD9XXX_A_CDC_CLSH_B2_CTL__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_B3_CTL			(0x322)
-#define WCD9XXX_A_CDC_CLSH_B3_CTL__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS			(0x323)
-#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR			(0x00)
-#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD			(0x324)
-#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR			(0x12)
-#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD			(0x325)
-#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR			(0x0C)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD			(0x326)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR		(0x18)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD			(0x327)
-#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR		(0x23)
-#define WCD9XXX_A_CDC_CLSH_K_ADDR			(0x328)
-#define WCD9XXX_A_CDC_CLSH_K_ADDR__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_K_DATA			(0x329)
-#define WCD9XXX_A_CDC_CLSH_K_DATA__POR				(0xA4)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L			(0x32A)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR				(0xD7)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U			(0x32B)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR				(0x05)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L			(0x32C)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR				(0x60)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U			(0x32D)
-#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR				(0x09)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR			(0x32E)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH			(0x32F)
-#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR			(0x330)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR				(0x00)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH			(0x331)
-#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR				(0x00)
-
-#define WCD9XXX_A_CDC_RX1_B6_CTL			(0x2B5)
-#define WCD9XXX_A_CDC_RX1_B6_CTL__POR				(0x80)
-#define WCD9XXX_A_CDC_RX2_B6_CTL			(0x2BD)
-#define WCD9XXX_A_CDC_RX2_B6_CTL__POR				(0x80)
-#define WCD9XXX_A_RX_HPH_L_GAIN				(0x1AE)
-#define WCD9XXX_A_RX_HPH_L_GAIN__POR				(0x00)
-#define WCD9XXX_A_RX_HPH_R_GAIN				(0x1B4)
-#define WCD9XXX_A_RX_HPH_R_GAIN__POR				(0x00)
-#define WCD9XXX_A_RX_HPH_CHOP_CTL			(0x1A5)
-#define WCD9XXX_A_RX_HPH_CHOP_CTL__POR				(0xB4)
-#define WCD9XXX_A_RX_HPH_BIAS_PA			(0x1A6)
-#define WCD9XXX_A_RX_HPH_BIAS_PA__POR				(0x7A)
-#define WCD9XXX_A_RX_HPH_L_TEST				(0x1AF)
-#define WCD9XXX_A_RX_HPH_L_TEST__POR				(0x00)
-#define WCD9XXX_A_RX_HPH_R_TEST				(0x1B5)
-#define WCD9XXX_A_RX_HPH_R_TEST__POR				(0x00)
-#define WCD9XXX_A_CDC_CLK_RX_B1_CTL			(0x30F)
-#define WCD9XXX_A_CDC_CLK_RX_B1_CTL__POR			(0x00)
-#define WCD9XXX_A_NCP_CLK				(0x193)
-#define WCD9XXX_A_NCP_CLK__POR					(0x94)
-#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP			(0x1A9)
-#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP__POR			(0x2A)
-#define WCD9XXX_A_RX_HPH_CNP_WG_CTL			(0x1AC)
-#define WCD9XXX_A_RX_HPH_CNP_WG_CTL__POR			(0xDE)
-#define WCD9XXX_A_RX_HPH_L_PA_CTL			(0x1B0)
-#define WCD9XXX_A_RX_HPH_L_PA_CTL__POR				(0x42)
-#define WCD9XXX_A_RX_HPH_R_PA_CTL			(0x1B6)
-#define WCD9XXX_A_RX_HPH_R_PA_CTL__POR				(0x42)
-#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL			(0x383)
-#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL__POR			(0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL			(0x361)
-#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL__POR			(0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL			(0x362)
-#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL__POR			(0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL			(0x363)
-#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL__POR			(0x00)
-#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL			(0x364)
-#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL__POR			(0x00)
-
-#define WCD9330_A_LEAKAGE_CTL				(0x03C)
-#define WCD9330_A_LEAKAGE_CTL__POR				(0x04)
-#define WCD9330_A_CDC_CTL				(0x034)
-#define WCD9330_A_CDC_CTL__POR					(0x00)
-
-/* Class-H registers for codecs from and above WCD9335 */
-#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0			(0xB42)
-#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0			(0xB56)
-#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0			(0xB6A)
-#define WCD9XXX_A_CDC_CLSH_K1_MSB			(0xC08)
-#define WCD9XXX_A_CDC_CLSH_K1_LSB			(0xC09)
-#define WCD9XXX_A_ANA_RX_SUPPLIES			(0x608)
-#define WCD9XXX_A_ANA_HPH				(0x609)
-#define WCD9XXX_A_CDC_CLSH_CRC				(0xC01)
-#define WCD9XXX_FLYBACK_EN				(0x6A4)
-#define WCD9XXX_RX_BIAS_FLYB_BUFF			(0x6C7)
-#define WCD9XXX_HPH_L_EN				(0x6D3)
-#define WCD9XXX_HPH_R_EN				(0x6D6)
-#define WCD9XXX_HPH_REFBUFF_UHQA_CTL			(0x6DD)
-#define WCD9XXX_CLASSH_CTRL_VCL_2                       (0x69B)
-#define WCD9XXX_CDC_CLSH_HPH_V_PA			(0xC04)
-#define WCD9XXX_CDC_RX0_RX_PATH_SEC0			(0xB49)
-#define WCD9XXX_CDC_RX1_RX_PATH_CTL			(0xB55)
-#define WCD9XXX_CDC_RX2_RX_PATH_CTL			(0xB69)
-#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL		(0xD41)
-#define WCD9XXX_CLASSH_CTRL_CCL_1                       (0x69C)
-#endif

diff --git a/k318/original-kernel-headers/linux/msm_audio.h b/k318/original-kernel-headers/linux/msm_audio.h
deleted file mode 100644
index 36b66c7..0000000
--- a/k318/original-kernel-headers/linux/msm_audio.h
+++ /dev/null

@@ -1,463 +0,0 @@
-/* include/linux/msm_audio.h
- *
- * Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef _UAPI_LINUX_MSM_AUDIO_H
-#define _UAPI_LINUX_MSM_AUDIO_H
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-
-/* PCM Audio */
-
-#define AUDIO_IOCTL_MAGIC 'a'
-
-#define AUDIO_START        _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned)
-#define AUDIO_STOP         _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned)
-#define AUDIO_FLUSH        _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned)
-#define AUDIO_GET_CONFIG   _IOR(AUDIO_IOCTL_MAGIC, 3, \
-		struct msm_audio_config)
-#define AUDIO_SET_CONFIG   _IOW(AUDIO_IOCTL_MAGIC, 4, \
-		struct msm_audio_config)
-#define AUDIO_GET_STATS    _IOR(AUDIO_IOCTL_MAGIC, 5, \
-		struct msm_audio_stats)
-#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned)
-#define AUDIO_SET_ADRC     _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned)
-#define AUDIO_SET_EQ       _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned)
-#define AUDIO_SET_RX_IIR   _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned)
-#define AUDIO_SET_VOLUME   _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned)
-#define AUDIO_PAUSE        _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned)
-#define AUDIO_PLAY_DTMF    _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned)
-#define AUDIO_GET_EVENT    _IOR(AUDIO_IOCTL_MAGIC, 13, \
-		struct msm_audio_event)
-#define AUDIO_ABORT_GET_EVENT _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned)
-#define AUDIO_REGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned)
-#define AUDIO_DEREGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 16, unsigned)
-#define AUDIO_ASYNC_WRITE _IOW(AUDIO_IOCTL_MAGIC, 17, \
-		struct msm_audio_aio_buf)
-#define AUDIO_ASYNC_READ _IOW(AUDIO_IOCTL_MAGIC, 18, \
-		struct msm_audio_aio_buf)
-#define AUDIO_SET_INCALL _IOW(AUDIO_IOCTL_MAGIC, 19, struct msm_voicerec_mode)
-#define AUDIO_GET_NUM_SND_DEVICE _IOR(AUDIO_IOCTL_MAGIC, 20, unsigned)
-#define AUDIO_GET_SND_DEVICES _IOWR(AUDIO_IOCTL_MAGIC, 21, \
-				struct msm_snd_device_list)
-#define AUDIO_ENABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 22, unsigned)
-#define AUDIO_DISABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 23, unsigned)
-#define AUDIO_ROUTE_STREAM _IOW(AUDIO_IOCTL_MAGIC, 24, \
-				struct msm_audio_route_config)
-#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned)
-#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned)
-#define AUDIO_SWITCH_DEVICE  _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned)
-#define AUDIO_SET_MUTE       _IOW(AUDIO_IOCTL_MAGIC, 33, unsigned)
-#define AUDIO_UPDATE_ACDB    _IOW(AUDIO_IOCTL_MAGIC, 34, unsigned)
-#define AUDIO_START_VOICE    _IOW(AUDIO_IOCTL_MAGIC, 35, unsigned)
-#define AUDIO_STOP_VOICE     _IOW(AUDIO_IOCTL_MAGIC, 36, unsigned)
-#define AUDIO_REINIT_ACDB    _IOW(AUDIO_IOCTL_MAGIC, 39, unsigned)
-#define AUDIO_OUTPORT_FLUSH  _IOW(AUDIO_IOCTL_MAGIC, 40, unsigned short)
-#define AUDIO_SET_ERR_THRESHOLD_VALUE _IOW(AUDIO_IOCTL_MAGIC, 41, \
-					unsigned short)
-#define AUDIO_GET_BITSTREAM_ERROR_INFO _IOR(AUDIO_IOCTL_MAGIC, 42, \
-			       struct msm_audio_bitstream_error_info)
-
-#define AUDIO_SET_SRS_TRUMEDIA_PARAM _IOW(AUDIO_IOCTL_MAGIC, 43, unsigned)
-
-/* Qualcomm extensions */
-#define AUDIO_SET_STREAM_CONFIG   _IOW(AUDIO_IOCTL_MAGIC, 80, \
-				struct msm_audio_stream_config)
-#define AUDIO_GET_STREAM_CONFIG   _IOR(AUDIO_IOCTL_MAGIC, 81, \
-				struct msm_audio_stream_config)
-#define AUDIO_GET_SESSION_ID _IOR(AUDIO_IOCTL_MAGIC, 82, unsigned short)
-#define AUDIO_GET_STREAM_INFO   _IOR(AUDIO_IOCTL_MAGIC, 83, \
-			       struct msm_audio_bitstream_info)
-#define AUDIO_SET_PAN       _IOW(AUDIO_IOCTL_MAGIC, 84, unsigned)
-#define AUDIO_SET_QCONCERT_PLUS       _IOW(AUDIO_IOCTL_MAGIC, 85, unsigned)
-#define AUDIO_SET_MBADRC       _IOW(AUDIO_IOCTL_MAGIC, 86, unsigned)
-#define AUDIO_SET_VOLUME_PATH   _IOW(AUDIO_IOCTL_MAGIC, 87, \
-				     struct msm_vol_info)
-#define AUDIO_SET_MAX_VOL_ALL _IOW(AUDIO_IOCTL_MAGIC, 88, unsigned)
-#define AUDIO_ENABLE_AUDPRE  _IOW(AUDIO_IOCTL_MAGIC, 89, unsigned)
-#define AUDIO_SET_AGC        _IOW(AUDIO_IOCTL_MAGIC, 90, unsigned)
-#define AUDIO_SET_NS         _IOW(AUDIO_IOCTL_MAGIC, 91, unsigned)
-#define AUDIO_SET_TX_IIR     _IOW(AUDIO_IOCTL_MAGIC, 92, unsigned)
-#define AUDIO_GET_BUF_CFG    _IOW(AUDIO_IOCTL_MAGIC, 93, \
-					struct msm_audio_buf_cfg)
-#define AUDIO_SET_BUF_CFG    _IOW(AUDIO_IOCTL_MAGIC, 94, \
-					struct msm_audio_buf_cfg)
-#define AUDIO_SET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 95,  \
-					struct msm_acdb_cmd_device)
-#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96,  \
-					struct msm_acdb_cmd_device)
-
-#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, \
-		struct msm_audio_ion_info)
-#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, \
-		struct msm_audio_ion_info)
-#define AUDIO_SET_EFFECTS_CONFIG   _IOW(AUDIO_IOCTL_MAGIC, 99, \
-				struct msm_hwacc_effects_config)
-#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, \
-				struct msm_hwacc_buf_cfg)
-#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, \
-				struct msm_hwacc_buf_avail)
-#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
-#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
-#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
-
-#define AUDIO_PM_AWAKE      _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned)
-#define AUDIO_PM_RELAX      _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned)
-
-#define	AUDIO_MAX_COMMON_IOCTL_NUM	107
-
-
-#define HANDSET_MIC			0x01
-#define HANDSET_SPKR			0x02
-#define HEADSET_MIC			0x03
-#define HEADSET_SPKR_MONO		0x04
-#define HEADSET_SPKR_STEREO		0x05
-#define SPKR_PHONE_MIC			0x06
-#define SPKR_PHONE_MONO			0x07
-#define SPKR_PHONE_STEREO		0x08
-#define BT_SCO_MIC			0x09
-#define BT_SCO_SPKR			0x0A
-#define BT_A2DP_SPKR			0x0B
-#define TTY_HEADSET_MIC			0x0C
-#define TTY_HEADSET_SPKR		0x0D
-
-/* Default devices are not supported in a */
-/* device switching context. Only supported */
-/* for stream devices. */
-/* DO NOT USE */
-#define DEFAULT_TX			0x0E
-#define DEFAULT_RX			0x0F
-
-#define BT_A2DP_TX			0x10
-
-#define HEADSET_MONO_PLUS_SPKR_MONO_RX         0x11
-#define HEADSET_MONO_PLUS_SPKR_STEREO_RX       0x12
-#define HEADSET_STEREO_PLUS_SPKR_MONO_RX       0x13
-#define HEADSET_STEREO_PLUS_SPKR_STEREO_RX     0x14
-
-#define I2S_RX				0x20
-#define I2S_TX				0x21
-
-#define ADRC_ENABLE		0x0001
-#define EQUALIZER_ENABLE	0x0002
-#define IIR_ENABLE		0x0004
-#define QCONCERT_PLUS_ENABLE	0x0008
-#define MBADRC_ENABLE		0x0010
-#define SRS_ENABLE		0x0020
-#define SRS_DISABLE	0x0040
-
-#define AGC_ENABLE		0x0001
-#define NS_ENABLE		0x0002
-#define TX_IIR_ENABLE		0x0004
-#define FLUENCE_ENABLE		0x0008
-
-#define VOC_REC_UPLINK		0x00
-#define VOC_REC_DOWNLINK	0x01
-#define VOC_REC_BOTH		0x02
-
-struct msm_audio_config {
-	uint32_t buffer_size;
-	uint32_t buffer_count;
-	uint32_t channel_count;
-	uint32_t sample_rate;
-	uint32_t type;
-	uint32_t meta_field;
-	uint32_t bits;
-	uint32_t unused[3];
-};
-
-struct msm_audio_stream_config {
-	uint32_t buffer_size;
-	uint32_t buffer_count;
-};
-
-struct msm_audio_buf_cfg{
-	uint32_t meta_info_enable;
-	uint32_t frames_per_buf;
-};
-
-struct msm_audio_stats {
-	uint32_t byte_count;
-	uint32_t sample_count;
-	uint32_t unused[2];
-};
-
-struct msm_audio_ion_info {
-	int fd;
-	void *vaddr;
-};
-
-struct msm_audio_pmem_info {
-	int fd;
-	void *vaddr;
-};
-
-struct msm_audio_aio_buf {
-	void *buf_addr;
-	uint32_t buf_len;
-	uint32_t data_len;
-	void *private_data;
-	unsigned short mfield_sz; /*only useful for data has meta field */
-};
-
-/* Audio routing */
-
-#define SND_IOCTL_MAGIC 's'
-
-#define SND_MUTE_UNMUTED 0
-#define SND_MUTE_MUTED   1
-
-struct msm_mute_info {
-	uint32_t mute;
-	uint32_t path;
-};
-
-struct msm_vol_info {
-	uint32_t vol;
-	uint32_t path;
-};
-
-struct msm_voicerec_mode {
-	uint32_t rec_mode;
-};
-
-struct msm_snd_device_config {
-	uint32_t device;
-	uint32_t ear_mute;
-	uint32_t mic_mute;
-};
-
-#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
-
-enum cad_device_path_type {
-	CAD_DEVICE_PATH_RX,	/*For Decoding session*/
-	CAD_DEVICE_PATH_TX,	/* For Encoding session*/
-	CAD_DEVICE_PATH_RX_TX, /* For Voice call */
-	CAD_DEVICE_PATH_LB,	/* For loopback (FM Analog)*/
-	CAD_DEVICE_PATH_MAX
-};
-
-struct cad_devices_type {
-	uint32_t rx_device;
-	uint32_t tx_device;
-	enum cad_device_path_type pathtype;
-};
-
-struct msm_cad_device_config {
-	struct cad_devices_type device;
-	uint32_t ear_mute;
-	uint32_t mic_mute;
-};
-
-#define CAD_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_cad_device_config *)
-
-#define SND_METHOD_VOICE 0
-#define SND_METHOD_MIDI 4
-
-struct msm_snd_volume_config {
-	uint32_t device;
-	uint32_t method;
-	uint32_t volume;
-};
-
-#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
-
-struct msm_cad_volume_config {
-	struct cad_devices_type device;
-	uint32_t method;
-	uint32_t volume;
-};
-
-#define CAD_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_cad_volume_config *)
-
-/* Returns the number of SND endpoints supported. */
-
-#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
-
-struct msm_snd_endpoint {
-	int id; /* input and output */
-	char name[64]; /* output only */
-};
-
-/* Takes an index between 0 and one less than the number returned by
- * SND_GET_NUM_ENDPOINTS, and returns the SND index and name of a
- * SND endpoint.  On input, the .id field contains the number of the
- * endpoint, and on exit it contains the SND index, while .name contains
- * the description of the endpoint.
- */
-
-#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
-
-
-#define SND_AVC_CTL _IOW(SND_IOCTL_MAGIC, 6, unsigned *)
-#define SND_AGC_CTL _IOW(SND_IOCTL_MAGIC, 7, unsigned *)
-
-/*return the number of CAD endpoints supported. */
-
-#define CAD_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
-
-struct msm_cad_endpoint {
-	int id; /* input and output */
-	char name[64]; /* output only */
-};
-
-/* Takes an index between 0 and one less than the number returned by
- * SND_GET_NUM_ENDPOINTS, and returns the CAD index and name of a
- * CAD endpoint.  On input, the .id field contains the number of the
- * endpoint, and on exit it contains the SND index, while .name contains
- * the description of the endpoint.
- */
-
-#define CAD_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_cad_endpoint *)
-
-struct msm_audio_pcm_config {
-	uint32_t pcm_feedback;	/* 0 - disable > 0 - enable */
-	uint32_t buffer_count;	/* Number of buffers to allocate */
-	uint32_t buffer_size;	/* Size of buffer for capturing of
-				   PCM samples */
-};
-
-#define AUDIO_EVENT_SUSPEND 0
-#define AUDIO_EVENT_RESUME 1
-#define AUDIO_EVENT_WRITE_DONE 2
-#define AUDIO_EVENT_READ_DONE   3
-#define AUDIO_EVENT_STREAM_INFO 4
-#define AUDIO_EVENT_BITSTREAM_ERROR_INFO 5
-
-#define AUDIO_CODEC_TYPE_MP3 0
-#define AUDIO_CODEC_TYPE_AAC 1
-
-struct msm_audio_bitstream_info {
-	uint32_t codec_type;
-	uint32_t chan_info;
-	uint32_t sample_rate;
-	uint32_t bit_stream_info;
-	uint32_t bit_rate;
-	uint32_t unused[3];
-};
-
-struct msm_audio_bitstream_error_info {
-	uint32_t dec_id;
-	uint32_t err_msg_indicator;
-	uint32_t err_type;
-};
-
-union msm_audio_event_payload {
-	struct msm_audio_aio_buf aio_buf;
-	struct msm_audio_bitstream_info stream_info;
-	struct msm_audio_bitstream_error_info error_info;
-	int reserved;
-};
-
-struct msm_audio_event {
-	int event_type;
-	int timeout_ms;
-	union msm_audio_event_payload event_payload;
-};
-
-#define MSM_SNDDEV_CAP_RX 0x1
-#define MSM_SNDDEV_CAP_TX 0x2
-#define MSM_SNDDEV_CAP_VOICE 0x4
-
-struct msm_snd_device_info {
-	uint32_t dev_id;
-	uint32_t dev_cap; /* bitmask describe capability of device */
-	char dev_name[64];
-};
-
-struct msm_snd_device_list {
-	uint32_t  num_dev; /* Indicate number of device info to be retrieved */
-	struct msm_snd_device_info *list;
-};
-
-struct msm_dtmf_config {
-	uint16_t path;
-	uint16_t dtmf_hi;
-	uint16_t dtmf_low;
-	uint16_t duration;
-	uint16_t tx_gain;
-	uint16_t rx_gain;
-	uint16_t mixing;
-};
-
-#define AUDIO_ROUTE_STREAM_VOICE_RX 0
-#define AUDIO_ROUTE_STREAM_VOICE_TX 1
-#define AUDIO_ROUTE_STREAM_PLAYBACK 2
-#define AUDIO_ROUTE_STREAM_REC      3
-
-struct msm_audio_route_config {
-	uint32_t stream_type;
-	uint32_t stream_id;
-	uint32_t dev_id;
-};
-
-#define AUDIO_MAX_EQ_BANDS 12
-
-struct msm_audio_eq_band {
-	uint16_t     band_idx; /* The band index, 0 .. 11 */
-	uint32_t     filter_type; /* Filter band type */
-	uint32_t     center_freq_hz; /* Filter band center frequency */
-	uint32_t     filter_gain; /* Filter band initial gain (dB) */
-			/* Range is +12 dB to -12 dB with 1dB increments. */
-	uint32_t     q_factor;
-} __attribute__ ((packed));
-
-struct msm_audio_eq_stream_config {
-	uint32_t	enable; /* Number of consequtive bands specified */
-	uint32_t	num_bands;
-	struct msm_audio_eq_band	eq_bands[AUDIO_MAX_EQ_BANDS];
-} __attribute__ ((packed));
-
-struct msm_acdb_cmd_device {
-	uint32_t     command_id;
-	uint32_t     device_id;
-	uint32_t     network_id;
-	uint32_t     sample_rate_id;      /* Actual sample rate value */
-	uint32_t     interface_id;        /* See interface id's above */
-	uint32_t     algorithm_block_id;  /* See enumerations above */
-	uint32_t     total_bytes;         /* Length in bytes used by buffer */
-	uint32_t     *phys_buf;           /* Physical Address of data */
-};
-
-struct msm_hwacc_data_config {
-	__u32 buf_size;
-	__u32 num_buf;
-	__u32 num_channels;
-	__u8 channel_map[8];
-	__u32 sample_rate;
-	__u32 bits_per_sample;
-};
-
-struct msm_hwacc_buf_cfg {
-	__u32 input_len;
-	__u32 output_len;
-};
-
-struct msm_hwacc_buf_avail {
-	__u32 input_num_avail;
-	__u32 output_num_avail;
-};
-
-struct msm_hwacc_effects_config {
-	struct msm_hwacc_data_config input;
-	struct msm_hwacc_data_config output;
-	struct msm_hwacc_buf_cfg buf_cfg;
-	__u32 meta_mode_enabled;
-	__u32 overwrite_topology;
-	__s32 topology;
-};
-
-#endif

diff --git a/k318/original-kernel-headers/linux/msm_audio_calibration.h b/k318/original-kernel-headers/linux/msm_audio_calibration.h
deleted file mode 100644
index 3c6ab13..0000000
--- a/k318/original-kernel-headers/linux/msm_audio_calibration.h
+++ /dev/null

@@ -1,692 +0,0 @@
-#ifndef _UAPI_MSM_AUDIO_CALIBRATION_H
-#define _UAPI_MSM_AUDIO_CALIBRATION_H
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-
-#define CAL_IOCTL_MAGIC 'a'
-
-#define AUDIO_ALLOCATE_CALIBRATION	_IOWR(CAL_IOCTL_MAGIC, \
-							200, void *)
-#define AUDIO_DEALLOCATE_CALIBRATION	_IOWR(CAL_IOCTL_MAGIC, \
-							201, void *)
-#define AUDIO_PREPARE_CALIBRATION	_IOWR(CAL_IOCTL_MAGIC, \
-							202, void *)
-#define AUDIO_SET_CALIBRATION		_IOWR(CAL_IOCTL_MAGIC, \
-							203, void *)
-#define AUDIO_GET_CALIBRATION		_IOWR(CAL_IOCTL_MAGIC, \
-							204, void *)
-#define AUDIO_POST_CALIBRATION		_IOWR(CAL_IOCTL_MAGIC, \
-							205, void *)
-
-/* For Real-Time Audio Calibration */
-#define AUDIO_GET_RTAC_ADM_INFO		_IOR(CAL_IOCTL_MAGIC, \
-							207, void *)
-#define AUDIO_GET_RTAC_VOICE_INFO	_IOR(CAL_IOCTL_MAGIC, \
-							208, void *)
-#define AUDIO_GET_RTAC_ADM_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							209, void *)
-#define AUDIO_SET_RTAC_ADM_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							210, void *)
-#define AUDIO_GET_RTAC_ASM_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							211, void *)
-#define AUDIO_SET_RTAC_ASM_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							212, void *)
-#define AUDIO_GET_RTAC_CVS_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							213, void *)
-#define AUDIO_SET_RTAC_CVS_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							214, void *)
-#define AUDIO_GET_RTAC_CVP_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							215, void *)
-#define AUDIO_SET_RTAC_CVP_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							216, void *)
-#define AUDIO_GET_RTAC_AFE_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							217, void *)
-#define AUDIO_SET_RTAC_AFE_CAL		_IOWR(CAL_IOCTL_MAGIC, \
-							218, void *)
-enum {
-	CVP_VOC_RX_TOPOLOGY_CAL_TYPE = 0,
-	CVP_VOC_TX_TOPOLOGY_CAL_TYPE,
-	CVP_VOCPROC_STATIC_CAL_TYPE,
-	CVP_VOCPROC_DYNAMIC_CAL_TYPE,
-	CVS_VOCSTRM_STATIC_CAL_TYPE,
-	CVP_VOCDEV_CFG_CAL_TYPE,
-	CVP_VOCPROC_STATIC_COL_CAL_TYPE,
-	CVP_VOCPROC_DYNAMIC_COL_CAL_TYPE,
-	CVS_VOCSTRM_STATIC_COL_CAL_TYPE,
-
-	ADM_TOPOLOGY_CAL_TYPE,
-	ADM_CUST_TOPOLOGY_CAL_TYPE,
-	ADM_AUDPROC_CAL_TYPE,
-	ADM_AUDVOL_CAL_TYPE,
-
-	ASM_TOPOLOGY_CAL_TYPE,
-	ASM_CUST_TOPOLOGY_CAL_TYPE,
-	ASM_AUDSTRM_CAL_TYPE,
-
-	AFE_COMMON_RX_CAL_TYPE,
-	AFE_COMMON_TX_CAL_TYPE,
-	AFE_ANC_CAL_TYPE,
-	AFE_AANC_CAL_TYPE,
-	AFE_FB_SPKR_PROT_CAL_TYPE,
-	AFE_HW_DELAY_CAL_TYPE,
-	AFE_SIDETONE_CAL_TYPE,
-	AFE_TOPOLOGY_CAL_TYPE,
-	AFE_CUST_TOPOLOGY_CAL_TYPE,
-
-	LSM_CUST_TOPOLOGY_CAL_TYPE,
-	LSM_TOPOLOGY_CAL_TYPE,
-	LSM_CAL_TYPE,
-
-	ADM_RTAC_INFO_CAL_TYPE,
-	VOICE_RTAC_INFO_CAL_TYPE,
-	ADM_RTAC_APR_CAL_TYPE,
-	ASM_RTAC_APR_CAL_TYPE,
-	VOICE_RTAC_APR_CAL_TYPE,
-
-	MAD_CAL_TYPE,
-	ULP_AFE_CAL_TYPE,
-	ULP_LSM_CAL_TYPE,
-
-	DTS_EAGLE_CAL_TYPE,
-	AUDIO_CORE_METAINFO_CAL_TYPE,
-	SRS_TRUMEDIA_CAL_TYPE,
-
-	CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
-	ADM_RTAC_AUDVOL_CAL_TYPE,
-
-	ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
-	AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
-	AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
-	MAX_CAL_TYPES,
-};
-
-#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
-#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
-
-enum {
-	VERSION_0_0,
-};
-
-enum {
-	PER_VOCODER_CAL_BIT_MASK = 0x10000,
-};
-
-#define MAX_IOCTL_CMD_SIZE	512
-
-/* common structures */
-
-struct audio_cal_header {
-	int32_t		data_size;
-	int32_t		version;
-	int32_t		cal_type;
-	int32_t		cal_type_size;
-};
-
-struct audio_cal_type_header {
-	int32_t		version;
-	int32_t		buffer_number;
-};
-
-struct audio_cal_data {
-	/* Size of cal data at mem_handle allocation or at vaddr */
-	int32_t		cal_size;
-	/* If mem_handle if shared memory is used*/
-	int32_t		mem_handle;
-	/* size of virtual memory if shared memory not used */
-};
-
-
-/* AUDIO_ALLOCATE_CALIBRATION */
-struct audio_cal_type_alloc {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-};
-
-struct audio_cal_alloc {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_alloc	cal_type;
-};
-
-
-/* AUDIO_DEALLOCATE_CALIBRATION */
-struct audio_cal_type_dealloc {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-};
-
-struct audio_cal_dealloc {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_dealloc	cal_type;
-};
-
-
-/* AUDIO_PREPARE_CALIBRATION */
-struct audio_cal_type_prepare {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-};
-
-struct audio_cal_prepare {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_prepare	cal_type;
-};
-
-
-/* AUDIO_POST_CALIBRATION */
-struct audio_cal_type_post {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-};
-
-struct audio_cal_post {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_post	cal_type;
-};
-
-/*AUDIO_CORE_META_INFO */
-
-struct audio_cal_info_metainfo {
-	uint32_t nKey;
-};
-
-/* Cal info types */
-enum {
-	RX_DEVICE,
-	TX_DEVICE,
-	MAX_PATH_TYPE
-};
-
-struct audio_cal_info_adm_top {
-	int32_t		topology;
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		app_type;
-	int32_t		sample_rate;
-};
-
-struct audio_cal_info_audproc {
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		app_type;
-	int32_t		sample_rate;
-};
-
-struct audio_cal_info_audvol {
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		app_type;
-	int32_t		vol_index;
-};
-
-struct audio_cal_info_afe {
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		sample_rate;
-};
-
-struct audio_cal_info_afe_top {
-	int32_t		topology;
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		sample_rate;
-};
-
-struct audio_cal_info_asm_top {
-	int32_t		topology;
-	int32_t		app_type;
-};
-
-struct audio_cal_info_audstrm {
-	int32_t		app_type;
-};
-
-struct audio_cal_info_aanc {
-	int32_t		acdb_id;
-};
-
-#define MAX_HW_DELAY_ENTRIES	25
-
-struct audio_cal_hw_delay_entry {
-	uint32_t sample_rate;
-	uint32_t delay_usec;
-};
-
-struct audio_cal_hw_delay_data {
-	uint32_t				num_entries;
-	struct audio_cal_hw_delay_entry		entry[MAX_HW_DELAY_ENTRIES];
-};
-
-struct audio_cal_info_hw_delay {
-	int32_t					acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t					path;
-	int32_t					property_type;
-	struct audio_cal_hw_delay_data		data;
-};
-
-enum msm_spkr_prot_states {
-	MSM_SPKR_PROT_CALIBRATED,
-	MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
-	MSM_SPKR_PROT_DISABLED,
-	MSM_SPKR_PROT_NOT_CALIBRATED,
-	MSM_SPKR_PROT_PRE_CALIBRATED,
-	MSM_SPKR_PROT_IN_FTM_MODE
-};
-#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
-
-enum msm_spkr_count {
-	SP_V2_SPKR_1,
-	SP_V2_SPKR_2,
-	SP_V2_NUM_MAX_SPKRS
-};
-
-struct audio_cal_info_spk_prot_cfg {
-	int32_t		r0[SP_V2_NUM_MAX_SPKRS];
-	int32_t		t0[SP_V2_NUM_MAX_SPKRS];
-	uint32_t	quick_calib_flag;
-	uint32_t	mode;
-	/*
-	 * 0 - Start spk prot
-	 * 1 - Start calib
-	 * 2 - Disable spk prot
-	 */
-};
-
-struct audio_cal_info_sp_th_vi_ftm_cfg {
-	uint32_t	wait_time[SP_V2_NUM_MAX_SPKRS];
-	uint32_t	ftm_time[SP_V2_NUM_MAX_SPKRS];
-	uint32_t	mode;
-	/*
-	 * 0 - normal running mode
-	 * 1 - Calibration
-	 * 2 - FTM mode
-	 */
-};
-
-struct audio_cal_info_sp_ex_vi_ftm_cfg {
-	uint32_t	wait_time[SP_V2_NUM_MAX_SPKRS];
-	uint32_t	ftm_time[SP_V2_NUM_MAX_SPKRS];
-	uint32_t	mode;
-	/*
-	 * 0 - normal running mode
-	 * 2 - FTM mode
-	 */
-};
-
-struct audio_cal_info_sp_ex_vi_param {
-	int32_t		freq_q20[SP_V2_NUM_MAX_SPKRS];
-	int32_t		resis_q24[SP_V2_NUM_MAX_SPKRS];
-	int32_t		qmct_q24[SP_V2_NUM_MAX_SPKRS];
-	int32_t		status[SP_V2_NUM_MAX_SPKRS];
-};
-
-struct audio_cal_info_sp_th_vi_param {
-	int32_t		r_dc_q24[SP_V2_NUM_MAX_SPKRS];
-	int32_t		temp_q22[SP_V2_NUM_MAX_SPKRS];
-	int32_t		status[SP_V2_NUM_MAX_SPKRS];
-};
-
-struct audio_cal_info_msm_spk_prot_status {
-	int32_t		r0[SP_V2_NUM_MAX_SPKRS];
-	int32_t		status;
-};
-
-struct audio_cal_info_sidetone {
-	uint16_t	enable;
-	uint16_t	gain;
-	int32_t		tx_acdb_id;
-	int32_t		rx_acdb_id;
-	int32_t		mid;
-	int32_t		pid;
-};
-
-struct audio_cal_info_lsm_top {
-	int32_t		topology;
-	int32_t		acdb_id;
-	int32_t		app_type;
-};
-
-
-struct audio_cal_info_lsm {
-	int32_t		acdb_id;
-	/* RX_DEVICE or TX_DEVICE */
-	int32_t		path;
-	int32_t		app_type;
-};
-
-struct audio_cal_info_voc_top {
-	int32_t		topology;
-	int32_t		acdb_id;
-};
-
-struct audio_cal_info_vocproc {
-	int32_t		tx_acdb_id;
-	int32_t		rx_acdb_id;
-	int32_t		tx_sample_rate;
-	int32_t		rx_sample_rate;
-};
-
-enum {
-	DEFAULT_FEATURE_SET,
-	VOL_BOOST_FEATURE_SET,
-};
-
-struct audio_cal_info_vocvol {
-	int32_t		tx_acdb_id;
-	int32_t		rx_acdb_id;
-	/* DEFUALT_ or VOL_BOOST_FEATURE_SET */
-	int32_t		feature_set;
-};
-
-struct audio_cal_info_vocdev_cfg {
-	int32_t		tx_acdb_id;
-	int32_t		rx_acdb_id;
-};
-
-#define MAX_VOICE_COLUMNS	20
-
-union audio_cal_col_na {
-	uint8_t		val8;
-	uint16_t	val16;
-	uint32_t	val32;
-	uint64_t	val64;
-} __packed;
-
-struct audio_cal_col {
-	uint32_t		id;
-	uint32_t		type;
-	union audio_cal_col_na	na_value;
-} __packed;
-
-struct audio_cal_col_data {
-	uint32_t		num_columns;
-	struct audio_cal_col	column[MAX_VOICE_COLUMNS];
-} __packed;
-
-struct audio_cal_info_voc_col {
-	int32_t				table_id;
-	int32_t				tx_acdb_id;
-	int32_t				rx_acdb_id;
-	struct audio_cal_col_data	data;
-};
-
-/* AUDIO_SET_CALIBRATION & */
-struct audio_cal_type_basic {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-};
-
-struct audio_cal_basic {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_basic	cal_type;
-};
-
-struct audio_cal_type_adm_top {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_adm_top	cal_info;
-};
-
-struct audio_cal_adm_top {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_adm_top	cal_type;
-};
-
-struct audio_cal_type_metainfo {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_metainfo	cal_info;
-};
-
-struct audio_core_metainfo {
-	struct audio_cal_header	  hdr;
-	struct audio_cal_type_metainfo cal_type;
-};
-
-struct audio_cal_type_audproc {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_audproc	cal_info;
-};
-
-struct audio_cal_audproc {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_audproc	cal_type;
-};
-
-struct audio_cal_type_audvol {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_audvol	cal_info;
-};
-
-struct audio_cal_audvol {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_audvol	cal_type;
-};
-
-struct audio_cal_type_asm_top {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_asm_top	cal_info;
-};
-
-struct audio_cal_asm_top {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_asm_top	cal_type;
-};
-
-struct audio_cal_type_audstrm {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_audstrm	cal_info;
-};
-
-struct audio_cal_audstrm {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_audstrm	cal_type;
-};
-
-struct audio_cal_type_afe {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_afe	cal_info;
-};
-
-struct audio_cal_afe {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_afe	cal_type;
-};
-
-struct audio_cal_type_afe_top {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_afe_top	cal_info;
-};
-
-struct audio_cal_afe_top {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_afe_top	cal_type;
-};
-
-struct audio_cal_type_aanc {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_aanc	cal_info;
-};
-
-struct audio_cal_aanc {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_aanc	cal_type;
-};
-
-struct audio_cal_type_fb_spk_prot_cfg {
-	struct audio_cal_type_header		cal_hdr;
-	struct audio_cal_data			cal_data;
-	struct audio_cal_info_spk_prot_cfg	cal_info;
-};
-
-struct audio_cal_fb_spk_prot_cfg {
-	struct audio_cal_header			hdr;
-	struct audio_cal_type_fb_spk_prot_cfg	cal_type;
-};
-
-struct audio_cal_type_sp_th_vi_ftm_cfg {
-	struct audio_cal_type_header		cal_hdr;
-	struct audio_cal_data			cal_data;
-	struct audio_cal_info_sp_th_vi_ftm_cfg	cal_info;
-};
-
-struct audio_cal_sp_th_vi_ftm_cfg {
-	struct audio_cal_header			hdr;
-	struct audio_cal_type_sp_th_vi_ftm_cfg	cal_type;
-};
-
-struct audio_cal_type_sp_ex_vi_ftm_cfg {
-	struct audio_cal_type_header		cal_hdr;
-	struct audio_cal_data			cal_data;
-	struct audio_cal_info_sp_ex_vi_ftm_cfg	cal_info;
-};
-
-struct audio_cal_sp_ex_vi_ftm_cfg {
-	struct audio_cal_header			hdr;
-	struct audio_cal_type_sp_ex_vi_ftm_cfg	cal_type;
-};
-struct audio_cal_type_hw_delay {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_hw_delay	cal_info;
-};
-
-struct audio_cal_hw_delay {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_hw_delay	cal_type;
-};
-
-struct audio_cal_type_sidetone {
-	struct audio_cal_type_header		cal_hdr;
-	struct audio_cal_data			cal_data;
-	struct audio_cal_info_sidetone		cal_info;
-};
-
-struct audio_cal_sidetone {
-	struct audio_cal_header			hdr;
-	struct audio_cal_type_sidetone		cal_type;
-};
-
-struct audio_cal_type_lsm_top {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_lsm_top	cal_info;
-};
-
-struct audio_cal_lsm_top {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_lsm_top	cal_type;
-};
-
-struct audio_cal_type_lsm {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_lsm	cal_info;
-};
-
-struct audio_cal_lsm {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_lsm	cal_type;
-};
-
-struct audio_cal_type_voc_top {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_voc_top	cal_info;
-};
-
-struct audio_cal_voc_top {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_voc_top	cal_type;
-};
-
-struct audio_cal_type_vocproc {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_vocproc	cal_info;
-};
-
-struct audio_cal_vocproc {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_vocproc	cal_type;
-};
-
-struct audio_cal_type_vocvol {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_vocvol	cal_info;
-};
-
-struct audio_cal_vocvol {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_vocvol	cal_type;
-};
-
-struct audio_cal_type_vocdev_cfg {
-	struct audio_cal_type_header		cal_hdr;
-	struct audio_cal_data			cal_data;
-	struct audio_cal_info_vocdev_cfg	cal_info;
-};
-
-struct audio_cal_vocdev_cfg {
-	struct audio_cal_header			hdr;
-	struct audio_cal_type_vocdev_cfg	cal_type;
-};
-
-struct audio_cal_type_voc_col {
-	struct audio_cal_type_header	cal_hdr;
-	struct audio_cal_data		cal_data;
-	struct audio_cal_info_voc_col	cal_info;
-};
-
-struct audio_cal_voc_col {
-	struct audio_cal_header		hdr;
-	struct audio_cal_type_voc_col	cal_type;
-};
-
-/* AUDIO_GET_CALIBRATION */
-struct audio_cal_type_fb_spk_prot_status {
-	struct audio_cal_type_header			cal_hdr;
-	struct audio_cal_data				cal_data;
-	struct audio_cal_info_msm_spk_prot_status	cal_info;
-};
-
-struct audio_cal_fb_spk_prot_status {
-	struct audio_cal_header				hdr;
-	struct audio_cal_type_fb_spk_prot_status	cal_type;
-};
-
-struct audio_cal_type_sp_th_vi_param {
-	struct audio_cal_type_header			cal_hdr;
-	struct audio_cal_data				cal_data;
-	struct audio_cal_info_sp_th_vi_param		cal_info;
-};
-
-struct audio_cal_sp_th_vi_param {
-	struct audio_cal_header				hdr;
-	struct audio_cal_type_sp_th_vi_param		cal_type;
-};
-struct audio_cal_type_sp_ex_vi_param {
-	struct audio_cal_type_header			cal_hdr;
-	struct audio_cal_data				cal_data;
-	struct audio_cal_info_sp_ex_vi_param		cal_info;
-};
-
-struct audio_cal_sp_ex_vi_param {
-	struct audio_cal_header				hdr;
-	struct audio_cal_type_sp_ex_vi_param		cal_type;
-};
-#endif /* _UAPI_MSM_AUDIO_CALIBRATION_H */

diff --git a/k318/original-kernel-headers/linux/msm_dsps.h b/k318/original-kernel-headers/linux/msm_dsps.h
deleted file mode 100644
index a21927d..0000000
--- a/k318/original-kernel-headers/linux/msm_dsps.h
+++ /dev/null

@@ -1,16 +0,0 @@
-#ifndef _UAPI_DSPS_H_
-#define _UAPI_DSPS_H_
-
-#include <linux/ioctl.h>
-
-#define DSPS_IOCTL_MAGIC 'd'
-
-#define DSPS_IOCTL_ON	_IO(DSPS_IOCTL_MAGIC, 1)
-#define DSPS_IOCTL_OFF	_IO(DSPS_IOCTL_MAGIC, 2)
-
-#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int*)
-#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int*)
-
-#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5)
-
-#endif	/* _UAPI_DSPS_H_ */

diff --git a/k318/original-kernel-headers/linux/msm_ion.h b/k318/original-kernel-headers/linux/msm_ion.h
deleted file mode 100644
index 681e015..0000000
--- a/k318/original-kernel-headers/linux/msm_ion.h
+++ /dev/null

@@ -1,200 +0,0 @@
-#ifndef _UAPI_MSM_ION_H
-#define _UAPI_MSM_ION_H
-
-#include "ion.h"
-
-enum msm_ion_heap_types {
-	ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
-	ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
-	ION_HEAP_TYPE_SYSTEM_SECURE,
-	ION_HEAP_TYPE_HYP_CMA,
-	/*
-	 * if you add a heap type here you should also add it to
-	 * heap_types_info[] in msm_ion.c
-	 */
-};
-
-/**
- * These are the only ids that should be used for Ion heap ids.
- * The ids listed are the order in which allocation will be attempted
- * if specified. Don't swap the order of heap ids unless you know what
- * you are doing!
- * Id's are spaced by purpose to allow new Id's to be inserted in-between (for
- * possible fallbacks)
- */
-
-enum ion_heap_ids {
-	INVALID_HEAP_ID = -1,
-	ION_CP_MM_HEAP_ID = 8,
-	ION_SECURE_HEAP_ID = 9,
-	ION_SECURE_DISPLAY_HEAP_ID = 10,
-	ION_CP_MFC_HEAP_ID = 12,
-	ION_CP_WB_HEAP_ID = 16, /* 8660 only */
-	ION_CAMERA_HEAP_ID = 20, /* 8660 only */
-	ION_SYSTEM_CONTIG_HEAP_ID = 21,
-	ION_ADSP_HEAP_ID = 22,
-	ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */
-	ION_SF_HEAP_ID = 24,
-	ION_SYSTEM_HEAP_ID = 25,
-	ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */
-	ION_QSECOM_HEAP_ID = 27,
-	ION_AUDIO_HEAP_ID = 28,
-
-	ION_MM_FIRMWARE_HEAP_ID = 29,
-
-	ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */
-};
-
-/*
- * The IOMMU heap is deprecated! Here are some aliases for backwards
- * compatibility:
- */
-#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
-#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
-
-enum ion_fixed_position {
-	NOT_FIXED,
-	FIXED_LOW,
-	FIXED_MIDDLE,
-	FIXED_HIGH,
-};
-
-enum cp_mem_usage {
-	VIDEO_BITSTREAM = 0x1,
-	VIDEO_PIXEL = 0x2,
-	VIDEO_NONPIXEL = 0x3,
-	DISPLAY_SECURE_CP_USAGE = 0x4,
-	CAMERA_SECURE_CP_USAGE = 0x5,
-	MAX_USAGE = 0x6,
-	UNKNOWN = 0x7FFFFFFF,
-};
-
-/**
- * Flags to be used when allocating from the secure heap for
- * content protection
- */
-#define ION_FLAG_CP_TOUCH (1 << 17)
-#define ION_FLAG_CP_BITSTREAM (1 << 18)
-#define ION_FLAG_CP_PIXEL  (1 << 19)
-#define ION_FLAG_CP_NON_PIXEL (1 << 20)
-#define ION_FLAG_CP_CAMERA (1 << 21)
-#define ION_FLAG_CP_HLOS (1 << 22)
-#define ION_FLAG_CP_HLOS_FREE (1 << 23)
-#define ION_FLAG_CP_SEC_DISPLAY (1 << 25)
-#define ION_FLAG_CP_APP (1 << 26)
-
-/**
- * Flag to allow non continguous allocation of memory from secure
- * heap
- */
-#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
-
-/**
- * Flag to use when allocating to indicate that a heap is secure.
- */
-#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
-
-/**
- * Flag for clients to force contiguous memort allocation
- *
- * Use of this flag is carefully monitored!
- */
-#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
-
-/*
- * Used in conjunction with heap which pool memory to force an allocation
- * to come from the page allocator directly instead of from the pool allocation
- */
-#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
-
-/**
-* Deprecated! Please use the corresponding ION_FLAG_*
-*/
-#define ION_SECURE ION_FLAG_SECURE
-#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
-
-/**
- * Macro should be used with ion_heap_ids defined above.
- */
-#define ION_HEAP(bit) (1 << (bit))
-
-#define ION_ADSP_HEAP_NAME	"adsp"
-#define ION_SYSTEM_HEAP_NAME	"system"
-#define ION_VMALLOC_HEAP_NAME	ION_SYSTEM_HEAP_NAME
-#define ION_KMALLOC_HEAP_NAME	"kmalloc"
-#define ION_AUDIO_HEAP_NAME	"audio"
-#define ION_SF_HEAP_NAME	"sf"
-#define ION_MM_HEAP_NAME	"mm"
-#define ION_CAMERA_HEAP_NAME	"camera_preview"
-#define ION_IOMMU_HEAP_NAME	"iommu"
-#define ION_MFC_HEAP_NAME	"mfc"
-#define ION_WB_HEAP_NAME	"wb"
-#define ION_MM_FIRMWARE_HEAP_NAME	"mm_fw"
-#define ION_PIL1_HEAP_NAME  "pil_1"
-#define ION_PIL2_HEAP_NAME  "pil_2"
-#define ION_QSECOM_HEAP_NAME	"qsecom"
-#define ION_SECURE_HEAP_NAME	"secure_heap"
-#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
-
-#define ION_SET_CACHED(__cache)		(__cache | ION_FLAG_CACHED)
-#define ION_SET_UNCACHED(__cache)	(__cache & ~ION_FLAG_CACHED)
-
-#define ION_IS_CACHED(__flags)	((__flags) & ION_FLAG_CACHED)
-
-/* struct ion_flush_data - data passed to ion for flushing caches
- *
- * @handle:	handle with data to flush
- * @fd:		fd to flush
- * @vaddr:	userspace virtual address mapped with mmap
- * @offset:	offset into the handle to flush
- * @length:	length of handle to flush
- *
- * Performs cache operations on the handle. If p is the start address
- * of the handle, p + offset through p + offset + length will have
- * the cache operations performed
- */
-struct ion_flush_data {
-	ion_user_handle_t handle;
-	int fd;
-	void *vaddr;
-	unsigned int offset;
-	unsigned int length;
-};
-
-
-struct ion_prefetch_data {
-	int heap_id;
-	unsigned long len;
-};
-
-#define ION_IOC_MSM_MAGIC 'M'
-
-/**
- * DOC: ION_IOC_CLEAN_CACHES - clean the caches
- *
- * Clean the caches of the handle specified.
- */
-#define ION_IOC_CLEAN_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 0, \
-						struct ion_flush_data)
-/**
- * DOC: ION_IOC_INV_CACHES - invalidate the caches
- *
- * Invalidate the caches of the handle specified.
- */
-#define ION_IOC_INV_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 1, \
-						struct ion_flush_data)
-/**
- * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches
- *
- * Clean and invalidate the caches of the handle specified.
- */
-#define ION_IOC_CLEAN_INV_CACHES	_IOWR(ION_IOC_MSM_MAGIC, 2, \
-						struct ion_flush_data)
-
-#define ION_IOC_PREFETCH		_IOWR(ION_IOC_MSM_MAGIC, 3, \
-						struct ion_prefetch_data)
-
-#define ION_IOC_DRAIN			_IOWR(ION_IOC_MSM_MAGIC, 4, \
-						struct ion_prefetch_data)
-
-#endif

diff --git a/k318/original-kernel-headers/linux/msm_mdp.h b/k318/original-kernel-headers/linux/msm_mdp.h
deleted file mode 100644
index 9f13b94..0000000
--- a/k318/original-kernel-headers/linux/msm_mdp.h
+++ /dev/null

@@ -1,1373 +0,0 @@
-#ifndef _UAPI_MSM_MDP_H_
-#define _UAPI_MSM_MDP_H_
-
-#include <linux/types.h>
-#include <linux/fb.h>
-
-#define MSMFB_IOCTL_MAGIC 'm'
-#define MSMFB_GRP_DISP          _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
-#define MSMFB_BLIT              _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
-#define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
-#define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
-#define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
-#define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
-#define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
-/* new ioctls's for set/get ccs matrix */
-#define MSMFB_GET_CCS_MATRIX  _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
-#define MSMFB_SET_CCS_MATRIX  _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
-#define MSMFB_OVERLAY_SET       _IOWR(MSMFB_IOCTL_MAGIC, 135, \
-						struct mdp_overlay)
-#define MSMFB_OVERLAY_UNSET     _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
-
-#define MSMFB_OVERLAY_PLAY      _IOW(MSMFB_IOCTL_MAGIC, 137, \
-						struct msmfb_overlay_data)
-#define MSMFB_OVERLAY_QUEUE	MSMFB_OVERLAY_PLAY
-
-#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \
-					struct mdp_page_protection)
-#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \
-					struct mdp_page_protection)
-#define MSMFB_OVERLAY_GET      _IOR(MSMFB_IOCTL_MAGIC, 140, \
-						struct mdp_overlay)
-#define MSMFB_OVERLAY_PLAY_ENABLE     _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
-#define MSMFB_OVERLAY_BLT       _IOWR(MSMFB_IOCTL_MAGIC, 142, \
-						struct msmfb_overlay_blt)
-#define MSMFB_OVERLAY_BLT_OFFSET     _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
-#define MSMFB_HISTOGRAM_START	_IOR(MSMFB_IOCTL_MAGIC, 144, \
-						struct mdp_histogram_start_req)
-#define MSMFB_HISTOGRAM_STOP	_IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
-#define MSMFB_NOTIFY_UPDATE	_IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
-
-#define MSMFB_OVERLAY_3D       _IOWR(MSMFB_IOCTL_MAGIC, 147, \
-						struct msmfb_overlay_3d)
-
-#define MSMFB_MIXER_INFO       _IOWR(MSMFB_IOCTL_MAGIC, 148, \
-						struct msmfb_mixer_info_req)
-#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
-						struct msmfb_overlay_data)
-#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
-#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
-#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
-#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \
-						struct msmfb_data)
-#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \
-						struct msmfb_data)
-#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
-#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
-#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
-#define MSMFB_VSYNC_CTRL  _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
-#define MSMFB_BUFFER_SYNC  _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
-#define MSMFB_OVERLAY_COMMIT      _IO(MSMFB_IOCTL_MAGIC, 163)
-#define MSMFB_DISPLAY_COMMIT      _IOW(MSMFB_IOCTL_MAGIC, 164, \
-						struct mdp_display_commit)
-#define MSMFB_METADATA_SET  _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
-#define MSMFB_METADATA_GET  _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
-#define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \
-						unsigned int)
-#define MSMFB_ASYNC_BLIT              _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
-#define MSMFB_OVERLAY_PREPARE		_IOWR(MSMFB_IOCTL_MAGIC, 169, \
-						struct mdp_overlay_list)
-#define MSMFB_LPM_ENABLE	_IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int)
-#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, \
-					      struct mdp_pp_feature_version)
-
-#define FB_TYPE_3D_PANEL 0x10101010
-#define MDP_IMGTYPE2_START 0x10000
-#define MSMFB_DRIVER_VERSION	0xF9E8D701
-
-/* HW Revisions for different MDSS targets */
-#define MDSS_GET_MAJOR(rev)		((rev) >> 28)
-#define MDSS_GET_MINOR(rev)		(((rev) >> 16) & 0xFFF)
-#define MDSS_GET_STEP(rev)		((rev) & 0xFFFF)
-#define MDSS_GET_MAJOR_MINOR(rev)	((rev) >> 16)
-
-#define IS_MDSS_MAJOR_MINOR_SAME(rev1, rev2)	\
-	(MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
-
-#define MDSS_MDP_REV(major, minor, step)	\
-	((((major) & 0x000F) << 28) |		\
-	 (((minor) & 0x0FFF) << 16) |		\
-	 ((step)   & 0xFFFF))
-
-#define MDSS_MDP_HW_REV_100	MDSS_MDP_REV(1, 0, 0) /* 8974 v1.0 */
-#define MDSS_MDP_HW_REV_101	MDSS_MDP_REV(1, 1, 0) /* 8x26 v1.0 */
-#define MDSS_MDP_HW_REV_101_1	MDSS_MDP_REV(1, 1, 1) /* 8x26 v2.0, 8926 v1.0 */
-#define MDSS_MDP_HW_REV_101_2	MDSS_MDP_REV(1, 1, 2) /* 8926 v2.0 */
-#define MDSS_MDP_HW_REV_102	MDSS_MDP_REV(1, 2, 0) /* 8974 v2.0 */
-#define MDSS_MDP_HW_REV_102_1	MDSS_MDP_REV(1, 2, 1) /* 8974 v3.0 (Pro) */
-#define MDSS_MDP_HW_REV_103	MDSS_MDP_REV(1, 3, 0) /* 8084 v1.0 */
-#define MDSS_MDP_HW_REV_103_1	MDSS_MDP_REV(1, 3, 1) /* 8084 v1.1 */
-#define MDSS_MDP_HW_REV_105	MDSS_MDP_REV(1, 5, 0) /* 8994 v1.0 */
-#define MDSS_MDP_HW_REV_106	MDSS_MDP_REV(1, 6, 0) /* 8916 v1.0 */
-#define MDSS_MDP_HW_REV_107	MDSS_MDP_REV(1, 7, 0) /* 8996 v1 */
-#define MDSS_MDP_HW_REV_107_1	MDSS_MDP_REV(1, 7, 1) /* 8996 v2 */
-#define MDSS_MDP_HW_REV_107_2	MDSS_MDP_REV(1, 7, 2) /* 8996 v3 */
-#define MDSS_MDP_HW_REV_108	MDSS_MDP_REV(1, 8, 0) /* 8939 v1.0 */
-#define MDSS_MDP_HW_REV_109	MDSS_MDP_REV(1, 9, 0) /* 8994 v2.0 */
-#define MDSS_MDP_HW_REV_110	MDSS_MDP_REV(1, 10, 0) /* 8992 v1.0 */
-#define MDSS_MDP_HW_REV_200	MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */
-#define MDSS_MDP_HW_REV_112	MDSS_MDP_REV(1, 12, 0) /* 8952 v1.0 */
-#define MDSS_MDP_HW_REV_114	MDSS_MDP_REV(1, 14, 0) /* 8937 v1.0 */
-#define MDSS_MDP_HW_REV_115	MDSS_MDP_REV(1, 15, 0) /* msmgold */
-#define MDSS_MDP_HW_REV_116	MDSS_MDP_REV(1, 16, 0) /* msmtitanium */
-
-enum {
-	NOTIFY_UPDATE_INIT,
-	NOTIFY_UPDATE_DEINIT,
-	NOTIFY_UPDATE_START,
-	NOTIFY_UPDATE_STOP,
-	NOTIFY_UPDATE_POWER_OFF,
-};
-
-enum {
-	NOTIFY_TYPE_NO_UPDATE,
-	NOTIFY_TYPE_SUSPEND,
-	NOTIFY_TYPE_UPDATE,
-	NOTIFY_TYPE_BL_UPDATE,
-	NOTIFY_TYPE_BL_AD_ATTEN_UPDATE,
-};
-
-enum {
-	MDP_RGB_565,      /* RGB 565 planer */
-	MDP_XRGB_8888,    /* RGB 888 padded */
-	MDP_Y_CBCR_H2V2,  /* Y and CbCr, pseudo planer w/ Cb is in MSB */
-	MDP_Y_CBCR_H2V2_ADRENO,
-	MDP_ARGB_8888,    /* ARGB 888 */
-	MDP_RGB_888,      /* RGB 888 planer */
-	MDP_Y_CRCB_H2V2,  /* Y and CrCb, pseudo planer w/ Cr is in MSB */
-	MDP_YCRYCB_H2V1,  /* YCrYCb interleave */
-	MDP_CBYCRY_H2V1,  /* CbYCrY interleave */
-	MDP_Y_CRCB_H2V1,  /* Y and CrCb, pseduo planer w/ Cr is in MSB */
-	MDP_Y_CBCR_H2V1,   /* Y and CrCb, pseduo planer w/ Cr is in MSB */
-	MDP_Y_CRCB_H1V2,
-	MDP_Y_CBCR_H1V2,
-	MDP_RGBA_8888,    /* ARGB 888 */
-	MDP_BGRA_8888,	  /* ABGR 888 */
-	MDP_RGBX_8888,	  /* RGBX 888 */
-	MDP_Y_CRCB_H2V2_TILE,  /* Y and CrCb, pseudo planer tile */
-	MDP_Y_CBCR_H2V2_TILE,  /* Y and CbCr, pseudo planer tile */
-	MDP_Y_CR_CB_H2V2,  /* Y, Cr and Cb, planar */
-	MDP_Y_CR_CB_GH2V2,  /* Y, Cr and Cb, planar aligned to Android YV12 */
-	MDP_Y_CB_CR_H2V2,  /* Y, Cb and Cr, planar */
-	MDP_Y_CRCB_H1V1,  /* Y and CrCb, pseduo planer w/ Cr is in MSB */
-	MDP_Y_CBCR_H1V1,  /* Y and CbCr, pseduo planer w/ Cb is in MSB */
-	MDP_YCRCB_H1V1,   /* YCrCb interleave */
-	MDP_YCBCR_H1V1,   /* YCbCr interleave */
-	MDP_BGR_565,      /* BGR 565 planer */
-	MDP_BGR_888,      /* BGR 888 */
-	MDP_Y_CBCR_H2V2_VENUS,
-	MDP_BGRX_8888,   /* BGRX 8888 */
-	MDP_RGBA_8888_TILE,	  /* RGBA 8888 in tile format */
-	MDP_ARGB_8888_TILE,	  /* ARGB 8888 in tile format */
-	MDP_ABGR_8888_TILE,	  /* ABGR 8888 in tile format */
-	MDP_BGRA_8888_TILE,	  /* BGRA 8888 in tile format */
-	MDP_RGBX_8888_TILE,	  /* RGBX 8888 in tile format */
-	MDP_XRGB_8888_TILE,	  /* XRGB 8888 in tile format */
-	MDP_XBGR_8888_TILE,	  /* XBGR 8888 in tile format */
-	MDP_BGRX_8888_TILE,	  /* BGRX 8888 in tile format */
-	MDP_YCBYCR_H2V1,  /* YCbYCr interleave */
-	MDP_RGB_565_TILE,	  /* RGB 565 in tile format */
-	MDP_BGR_565_TILE,	  /* BGR 565 in tile format */
-	MDP_ARGB_1555,	/*ARGB 1555*/
-	MDP_RGBA_5551,	/*RGBA 5551*/
-	MDP_ARGB_4444,	/*ARGB 4444*/
-	MDP_RGBA_4444,	/*RGBA 4444*/
-	MDP_RGB_565_UBWC,
-	MDP_RGBA_8888_UBWC,
-	MDP_Y_CBCR_H2V2_UBWC,
-	MDP_RGBX_8888_UBWC,
-	MDP_Y_CRCB_H2V2_VENUS,
-	MDP_IMGTYPE_LIMIT,
-	MDP_RGB_BORDERFILL,	/* border fill pipe */
-	MDP_FB_FORMAT = MDP_IMGTYPE2_START,    /* framebuffer format */
-	MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */
-};
-
-enum {
-	PMEM_IMG,
-	FB_IMG,
-};
-
-enum {
-	HSIC_HUE = 0,
-	HSIC_SAT,
-	HSIC_INT,
-	HSIC_CON,
-	NUM_HSIC_PARAM,
-};
-
-enum mdss_mdp_max_bw_mode {
-	MDSS_MAX_BW_LIMIT_DEFAULT = 0x1,
-	MDSS_MAX_BW_LIMIT_CAMERA = 0x2,
-	MDSS_MAX_BW_LIMIT_HFLIP = 0x4,
-	MDSS_MAX_BW_LIMIT_VFLIP = 0x8,
-};
-
-#define MDSS_MDP_ROT_ONLY		0x80
-#define MDSS_MDP_RIGHT_MIXER		0x100
-#define MDSS_MDP_DUAL_PIPE		0x200
-
-/* mdp_blit_req flag values */
-#define MDP_ROT_NOP 0
-#define MDP_FLIP_LR 0x1
-#define MDP_FLIP_UD 0x2
-#define MDP_ROT_90 0x4
-#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
-#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
-#define MDP_DITHER 0x8
-#define MDP_BLUR 0x10
-#define MDP_BLEND_FG_PREMULT 0x20000
-#define MDP_IS_FG 0x40000
-#define MDP_SOLID_FILL 0x00000020
-#define MDP_VPU_PIPE 0x00000040
-#define MDP_DEINTERLACE 0x80000000
-#define MDP_SHARPENING  0x40000000
-#define MDP_NO_DMA_BARRIER_START	0x20000000
-#define MDP_NO_DMA_BARRIER_END		0x10000000
-#define MDP_NO_BLIT			0x08000000
-#define MDP_BLIT_WITH_DMA_BARRIERS	0x000
-#define MDP_BLIT_WITH_NO_DMA_BARRIERS    \
-	(MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
-#define MDP_BLIT_SRC_GEM                0x04000000
-#define MDP_BLIT_DST_GEM                0x02000000
-#define MDP_BLIT_NON_CACHED		0x01000000
-#define MDP_OV_PIPE_SHARE		0x00800000
-#define MDP_DEINTERLACE_ODD		0x00400000
-#define MDP_OV_PLAY_NOWAIT		0x00200000
-#define MDP_SOURCE_ROTATED_90		0x00100000
-#define MDP_OVERLAY_PP_CFG_EN		0x00080000
-#define MDP_BACKEND_COMPOSITION		0x00040000
-#define MDP_BORDERFILL_SUPPORTED	0x00010000
-#define MDP_SECURE_OVERLAY_SESSION      0x00008000
-#define MDP_SECURE_DISPLAY_OVERLAY_SESSION	0x00002000
-#define MDP_OV_PIPE_FORCE_DMA		0x00004000
-#define MDP_MEMORY_ID_TYPE_FB		0x00001000
-#define MDP_BWC_EN			0x00000400
-#define MDP_DECIMATION_EN		0x00000800
-#define MDP_SMP_FORCE_ALLOC		0x00200000
-#define MDP_TRANSP_NOP 0xffffffff
-#define MDP_ALPHA_NOP 0xff
-
-#define MDP_FB_PAGE_PROTECTION_NONCACHED         (0)
-#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE      (1)
-#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
-#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE    (3)
-#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE  (4)
-/* Sentinel: Don't use! */
-#define MDP_FB_PAGE_PROTECTION_INVALID           (5)
-/* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */
-#define MDP_NUM_FB_PAGE_PROTECTION_VALUES        (5)
-
-struct mdp_rect {
-	uint32_t x;
-	uint32_t y;
-	uint32_t w;
-	uint32_t h;
-};
-
-struct mdp_img {
-	uint32_t width;
-	uint32_t height;
-	uint32_t format;
-	uint32_t offset;
-	int memory_id;		/* the file descriptor */
-	uint32_t priv;
-};
-
-struct mult_factor {
-	uint32_t numer;
-	uint32_t denom;
-};
-
-/*
- * {3x3} + {3} ccs matrix
- */
-
-#define MDP_CCS_RGB2YUV 	0
-#define MDP_CCS_YUV2RGB 	1
-
-#define MDP_CCS_SIZE	9
-#define MDP_BV_SIZE	3
-
-struct mdp_ccs {
-	int direction;			/* MDP_CCS_RGB2YUV or YUV2RGB */
-	uint16_t ccs[MDP_CCS_SIZE];	/* 3x3 color coefficients */
-	uint16_t bv[MDP_BV_SIZE];	/* 1x3 bias vector */
-};
-
-struct mdp_csc {
-	int id;
-	uint32_t csc_mv[9];
-	uint32_t csc_pre_bv[3];
-	uint32_t csc_post_bv[3];
-	uint32_t csc_pre_lv[6];
-	uint32_t csc_post_lv[6];
-};
-
-/* The version of the mdp_blit_req structure so that
- * user applications can selectively decide which functionality
- * to include
- */
-
-#define MDP_BLIT_REQ_VERSION 3
-
-struct color {
-	uint32_t r;
-	uint32_t g;
-	uint32_t b;
-	uint32_t alpha;
-};
-
-struct mdp_blit_req {
-	struct mdp_img src;
-	struct mdp_img dst;
-	struct mdp_rect src_rect;
-	struct mdp_rect dst_rect;
-	struct color const_color;
-	uint32_t alpha;
-	uint32_t transp_mask;
-	uint32_t flags;
-	int sharpening_strength;  /* -127 <--> 127, default 64 */
-	uint8_t color_space;
-	uint32_t fps;
-};
-
-struct mdp_blit_req_list {
-	uint32_t count;
-	struct mdp_blit_req req[];
-};
-
-#define MSMFB_DATA_VERSION 2
-
-struct msmfb_data {
-	uint32_t offset;
-	int memory_id;
-	int id;
-	uint32_t flags;
-	uint32_t priv;
-	uint32_t iova;
-};
-
-#define MSMFB_NEW_REQUEST -1
-
-struct msmfb_overlay_data {
-	uint32_t id;
-	struct msmfb_data data;
-	uint32_t version_key;
-	struct msmfb_data plane1_data;
-	struct msmfb_data plane2_data;
-	struct msmfb_data dst_data;
-};
-
-struct msmfb_img {
-	uint32_t width;
-	uint32_t height;
-	uint32_t format;
-};
-
-#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
-struct msmfb_writeback_data {
-	struct msmfb_data buf_info;
-	struct msmfb_img img;
-};
-
-#define MDP_PP_OPS_ENABLE 0x1
-#define MDP_PP_OPS_READ 0x2
-#define MDP_PP_OPS_WRITE 0x4
-#define MDP_PP_OPS_DISABLE 0x8
-#define MDP_PP_IGC_FLAG_ROM0	0x10
-#define MDP_PP_IGC_FLAG_ROM1	0x20
-
-
-#define MDSS_PP_DSPP_CFG	0x000
-#define MDSS_PP_SSPP_CFG	0x100
-#define MDSS_PP_LM_CFG	0x200
-#define MDSS_PP_WB_CFG	0x300
-
-#define MDSS_PP_ARG_MASK	0x3C00
-#define MDSS_PP_ARG_NUM		4
-#define MDSS_PP_ARG_SHIFT	10
-#define MDSS_PP_LOCATION_MASK	0x0300
-#define MDSS_PP_LOGICAL_MASK	0x00FF
-
-#define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
-#define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
-#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
-#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
-
-
-struct mdp_qseed_cfg {
-	uint32_t table_num;
-	uint32_t ops;
-	uint32_t len;
-	uint32_t *data;
-};
-
-struct mdp_sharp_cfg {
-	uint32_t flags;
-	uint32_t strength;
-	uint32_t edge_thr;
-	uint32_t smooth_thr;
-	uint32_t noise_thr;
-};
-
-struct mdp_qseed_cfg_data {
-	uint32_t block;
-	struct mdp_qseed_cfg qseed_data;
-};
-
-#define MDP_OVERLAY_PP_CSC_CFG         0x1
-#define MDP_OVERLAY_PP_QSEED_CFG       0x2
-#define MDP_OVERLAY_PP_PA_CFG          0x4
-#define MDP_OVERLAY_PP_IGC_CFG         0x8
-#define MDP_OVERLAY_PP_SHARP_CFG       0x10
-#define MDP_OVERLAY_PP_HIST_CFG        0x20
-#define MDP_OVERLAY_PP_HIST_LUT_CFG    0x40
-#define MDP_OVERLAY_PP_PA_V2_CFG       0x80
-#define MDP_OVERLAY_PP_PCC_CFG	       0x100
-
-#define MDP_CSC_FLAG_ENABLE	0x1
-#define MDP_CSC_FLAG_YUV_IN	0x2
-#define MDP_CSC_FLAG_YUV_OUT	0x4
-
-#define MDP_CSC_MATRIX_COEFF_SIZE	9
-#define MDP_CSC_CLAMP_SIZE		6
-#define MDP_CSC_BIAS_SIZE		3
-
-struct mdp_csc_cfg {
-	/* flags for enable CSC, toggling RGB,YUV input/output */
-	uint32_t flags;
-	uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE];
-	uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE];
-	uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE];
-	uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE];
-	uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE];
-};
-
-struct mdp_csc_cfg_data {
-	uint32_t block;
-	struct mdp_csc_cfg csc_data;
-};
-
-struct mdp_pa_cfg {
-	uint32_t flags;
-	uint32_t hue_adj;
-	uint32_t sat_adj;
-	uint32_t val_adj;
-	uint32_t cont_adj;
-};
-
-struct mdp_pa_mem_col_cfg {
-	uint32_t color_adjust_p0;
-	uint32_t color_adjust_p1;
-	uint32_t hue_region;
-	uint32_t sat_region;
-	uint32_t val_region;
-};
-
-#define MDP_SIX_ZONE_LUT_SIZE		384
-
-/* PA Write/Read extension flags */
-#define MDP_PP_PA_HUE_ENABLE		0x10
-#define MDP_PP_PA_SAT_ENABLE		0x20
-#define MDP_PP_PA_VAL_ENABLE		0x40
-#define MDP_PP_PA_CONT_ENABLE		0x80
-#define MDP_PP_PA_SIX_ZONE_ENABLE	0x100
-#define MDP_PP_PA_SKIN_ENABLE		0x200
-#define MDP_PP_PA_SKY_ENABLE		0x400
-#define MDP_PP_PA_FOL_ENABLE		0x800
-
-/* PA masks */
-/* Masks used in PA v1_7 only */
-#define MDP_PP_PA_MEM_PROT_HUE_EN	0x1
-#define MDP_PP_PA_MEM_PROT_SAT_EN	0x2
-#define MDP_PP_PA_MEM_PROT_VAL_EN	0x4
-#define MDP_PP_PA_MEM_PROT_CONT_EN	0x8
-#define MDP_PP_PA_MEM_PROT_SIX_EN	0x10
-#define MDP_PP_PA_MEM_PROT_BLEND_EN	0x20
-/* Masks used in all PAv2 versions */
-#define MDP_PP_PA_HUE_MASK		0x1000
-#define MDP_PP_PA_SAT_MASK		0x2000
-#define MDP_PP_PA_VAL_MASK		0x4000
-#define MDP_PP_PA_CONT_MASK		0x8000
-#define MDP_PP_PA_SIX_ZONE_HUE_MASK	0x10000
-#define MDP_PP_PA_SIX_ZONE_SAT_MASK	0x20000
-#define MDP_PP_PA_SIX_ZONE_VAL_MASK	0x40000
-#define MDP_PP_PA_MEM_COL_SKIN_MASK	0x80000
-#define MDP_PP_PA_MEM_COL_SKY_MASK	0x100000
-#define MDP_PP_PA_MEM_COL_FOL_MASK	0x200000
-#define MDP_PP_PA_MEM_PROTECT_EN	0x400000
-#define MDP_PP_PA_SAT_ZERO_EXP_EN	0x800000
-
-/* Flags for setting PA saturation and value hold */
-#define MDP_PP_PA_LEFT_HOLD		0x1
-#define MDP_PP_PA_RIGHT_HOLD		0x2
-
-struct mdp_pa_v2_data {
-	/* Mask bits for PA features */
-	uint32_t flags;
-	uint32_t global_hue_adj;
-	uint32_t global_sat_adj;
-	uint32_t global_val_adj;
-	uint32_t global_cont_adj;
-	struct mdp_pa_mem_col_cfg skin_cfg;
-	struct mdp_pa_mem_col_cfg sky_cfg;
-	struct mdp_pa_mem_col_cfg fol_cfg;
-	uint32_t six_zone_len;
-	uint32_t six_zone_thresh;
-	uint32_t *six_zone_curve_p0;
-	uint32_t *six_zone_curve_p1;
-};
-
-struct mdp_pa_mem_col_data_v1_7 {
-	uint32_t color_adjust_p0;
-	uint32_t color_adjust_p1;
-	uint32_t color_adjust_p2;
-	uint32_t blend_gain;
-	uint8_t sat_hold;
-	uint8_t val_hold;
-	uint32_t hue_region;
-	uint32_t sat_region;
-	uint32_t val_region;
-};
-
-struct mdp_pa_data_v1_7 {
-	uint32_t mode;
-	uint32_t global_hue_adj;
-	uint32_t global_sat_adj;
-	uint32_t global_val_adj;
-	uint32_t global_cont_adj;
-	struct mdp_pa_mem_col_data_v1_7 skin_cfg;
-	struct mdp_pa_mem_col_data_v1_7 sky_cfg;
-	struct mdp_pa_mem_col_data_v1_7 fol_cfg;
-	uint32_t six_zone_thresh;
-	uint32_t six_zone_adj_p0;
-	uint32_t six_zone_adj_p1;
-	uint8_t six_zone_sat_hold;
-	uint8_t six_zone_val_hold;
-	uint32_t six_zone_len;
-	uint32_t *six_zone_curve_p0;
-	uint32_t *six_zone_curve_p1;
-};
-
-
-struct mdp_pa_v2_cfg_data {
-	uint32_t version;
-	uint32_t block;
-	uint32_t flags;
-	struct mdp_pa_v2_data pa_v2_data;
-	void *cfg_payload;
-};
-
-
-enum {
-	mdp_igc_rec601 = 1,
-	mdp_igc_rec709,
-	mdp_igc_srgb,
-	mdp_igc_custom,
-	mdp_igc_rec_max,
-};
-
-struct mdp_igc_lut_data {
-	uint32_t block;
-	uint32_t version;
-	uint32_t len, ops;
-	uint32_t *c0_c1_data;
-	uint32_t *c2_data;
-	void *cfg_payload;
-};
-
-struct mdp_igc_lut_data_v1_7 {
-	uint32_t table_fmt;
-	uint32_t len;
-	uint32_t *c0_c1_data;
-	uint32_t *c2_data;
-};
-
-struct mdp_histogram_cfg {
-	uint32_t ops;
-	uint32_t block;
-	uint8_t frame_cnt;
-	uint8_t bit_mask;
-	uint16_t num_bins;
-};
-
-struct mdp_hist_lut_data_v1_7 {
-	uint32_t len;
-	uint32_t *data;
-};
-
-struct mdp_hist_lut_data {
-	uint32_t block;
-	uint32_t version;
-	uint32_t hist_lut_first;
-	uint32_t ops;
-	uint32_t len;
-	uint32_t *data;
-	void *cfg_payload;
-};
-
-struct mdp_pcc_coeff {
-	uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
-};
-
-struct mdp_pcc_coeff_v1_7 {
-	uint32_t c, r, g, b, rg, gb, rb, rgb;
-};
-
-struct mdp_pcc_data_v1_7 {
-	struct mdp_pcc_coeff_v1_7 r, g, b;
-};
-
-struct mdp_pcc_cfg_data {
-	uint32_t version;
-	uint32_t block;
-	uint32_t ops;
-	struct mdp_pcc_coeff r, g, b;
-	void *cfg_payload;
-};
-
-enum {
-	mdp_lut_igc,
-	mdp_lut_pgc,
-	mdp_lut_hist,
-	mdp_lut_rgb,
-	mdp_lut_max,
-};
-struct mdp_overlay_pp_params {
-	uint32_t config_ops;
-	struct mdp_csc_cfg csc_cfg;
-	struct mdp_qseed_cfg qseed_cfg[2];
-	struct mdp_pa_cfg pa_cfg;
-	struct mdp_pa_v2_data pa_v2_cfg;
-	struct mdp_igc_lut_data igc_cfg;
-	struct mdp_sharp_cfg sharp_cfg;
-	struct mdp_histogram_cfg hist_cfg;
-	struct mdp_hist_lut_data hist_lut_cfg;
-	/* PAv2 cfg data for PA 2.x versions */
-	struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
-	struct mdp_pcc_cfg_data pcc_cfg_data;
-};
-
-/**
- * enum mdss_mdp_blend_op - Different blend operations set by userspace
- *
- * @BLEND_OP_NOT_DEFINED:    No blend operation defined for the layer.
- * @BLEND_OP_OPAQUE:         Apply a constant blend operation. The layer
- *                           would appear opaque in case fg plane alpha is
- *                           0xff.
- * @BLEND_OP_PREMULTIPLIED:  Apply source over blend rule. Layer already has
- *                           alpha pre-multiplication done. If fg plane alpha
- *                           is less than 0xff, apply modulation as well. This
- *                           operation is intended on layers having alpha
- *                           channel.
- * @BLEND_OP_COVERAGE:       Apply source over blend rule. Layer is not alpha
- *                           pre-multiplied. Apply pre-multiplication. If fg
- *                           plane alpha is less than 0xff, apply modulation as
- *                           well.
- * @BLEND_OP_MAX:            Used to track maximum blend operation possible by
- *                           mdp.
- */
-enum mdss_mdp_blend_op {
-	BLEND_OP_NOT_DEFINED = 0,
-	BLEND_OP_OPAQUE,
-	BLEND_OP_PREMULTIPLIED,
-	BLEND_OP_COVERAGE,
-	BLEND_OP_MAX,
-};
-
-#define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
-#define MAX_PLANES	4
-struct mdp_scale_data {
-	uint8_t enable_pxl_ext;
-
-	int init_phase_x[MAX_PLANES];
-	int phase_step_x[MAX_PLANES];
-	int init_phase_y[MAX_PLANES];
-	int phase_step_y[MAX_PLANES];
-
-	int num_ext_pxls_left[MAX_PLANES];
-	int num_ext_pxls_right[MAX_PLANES];
-	int num_ext_pxls_top[MAX_PLANES];
-	int num_ext_pxls_btm[MAX_PLANES];
-
-	int left_ftch[MAX_PLANES];
-	int left_rpt[MAX_PLANES];
-	int right_ftch[MAX_PLANES];
-	int right_rpt[MAX_PLANES];
-
-	int top_rpt[MAX_PLANES];
-	int btm_rpt[MAX_PLANES];
-	int top_ftch[MAX_PLANES];
-	int btm_ftch[MAX_PLANES];
-
-	uint32_t roi_w[MAX_PLANES];
-};
-
-/**
- * enum mdp_overlay_pipe_type - Different pipe type set by userspace
- *
- * @PIPE_TYPE_AUTO:    Not specified, pipe will be selected according to flags.
- * @PIPE_TYPE_VIG:     VIG pipe.
- * @PIPE_TYPE_RGB:     RGB pipe.
- * @PIPE_TYPE_DMA:     DMA pipe.
- * @PIPE_TYPE_CURSOR:  CURSOR pipe.
- * @PIPE_TYPE_MAX:     Used to track maximum number of pipe type.
- */
-enum mdp_overlay_pipe_type {
-	PIPE_TYPE_AUTO = 0,
-	PIPE_TYPE_VIG,
-	PIPE_TYPE_RGB,
-	PIPE_TYPE_DMA,
-	PIPE_TYPE_CURSOR,
-	PIPE_TYPE_MAX,
-};
-
-/**
- * struct mdp_overlay - overlay surface structure
- * @src:	Source image information (width, height, format).
- * @src_rect:	Source crop rectangle, portion of image that will be fetched.
- *		This should always be within boundaries of source image.
- * @dst_rect:	Destination rectangle, the position and size of image on screen.
- *		This should always be within panel boundaries.
- * @z_order:	Blending stage to occupy in display, if multiple layers are
- *		present, highest z_order usually means the top most visible
- *		layer. The range acceptable is from 0-3 to support blending
- *		up to 4 layers.
- * @is_fg:	This flag is used to disable blending of any layers with z_order
- *		less than this overlay. It means that any layers with z_order
- *		less than this layer will not be blended and will be replaced
- *		by the background border color.
- * @alpha:	Used to set plane opacity. The range can be from 0-255, where
- *		0 means completely transparent and 255 means fully opaque.
- * @transp_mask: Color used as color key for transparency. Any pixel in fetched
- *		image matching this color will be transparent when blending.
- *		The color should be in same format as the source image format.
- * @flags:	This is used to customize operation of overlay. See MDP flags
- *		for more information.
- * @pipe_type:  Used to specify the type of overlay pipe.
- * @user_data:	DEPRECATED* Used to store user application specific information.
- * @bg_color:	Solid color used to fill the overlay surface when no source
- *		buffer is provided.
- * @horz_deci:	Horizontal decimation value, this indicates the amount of pixels
- *		dropped for each pixel that is fetched from a line. The value
- *		given should be power of two of decimation amount.
- *		0: no decimation
- *		1: decimate by 2 (drop 1 pixel for each pixel fetched)
- *		2: decimate by 4 (drop 3 pixels for each pixel fetched)
- *		3: decimate by 8 (drop 7 pixels for each pixel fetched)
- *		4: decimate by 16 (drop 15 pixels for each pixel fetched)
- * @vert_deci:	Vertical decimation value, this indicates the amount of lines
- *		dropped for each line that is fetched from overlay. The value
- *		given should be power of two of decimation amount.
- *		0: no decimation
- *		1: decimation by 2 (drop 1 line for each line fetched)
- *		2: decimation by 4 (drop 3 lines for each line fetched)
- *		3: decimation by 8 (drop 7 lines for each line fetched)
- *		4: decimation by 16 (drop 15 lines for each line fetched)
- * @overlay_pp_cfg: Overlay post processing configuration, for more information
- *		see struct mdp_overlay_pp_params.
- * @priority:	Priority is returned by the driver when overlay is set for the
- *		first time. It indicates the priority of the underlying pipe
- *		serving the overlay. This priority can be used by user-space
- *		in source split when pipes are re-used and shuffled around to
- *		reduce fallbacks.
- */
-struct mdp_overlay {
-	struct msmfb_img src;
-	struct mdp_rect src_rect;
-	struct mdp_rect dst_rect;
-	uint32_t z_order;	/* stage number */
-	uint32_t is_fg;		/* control alpha & transp */
-	uint32_t alpha;
-	uint32_t blend_op;
-	uint32_t transp_mask;
-	uint32_t flags;
-	uint32_t pipe_type;
-	uint32_t id;
-	uint8_t priority;
-	uint32_t user_data[6];
-	uint32_t bg_color;
-	uint8_t horz_deci;
-	uint8_t vert_deci;
-	struct mdp_overlay_pp_params overlay_pp_cfg;
-	struct mdp_scale_data scale;
-	uint8_t color_space;
-	uint32_t frame_rate;
-};
-
-struct msmfb_overlay_3d {
-	uint32_t is_3d;
-	uint32_t width;
-	uint32_t height;
-};
-
-
-struct msmfb_overlay_blt {
-	uint32_t enable;
-	uint32_t offset;
-	uint32_t width;
-	uint32_t height;
-	uint32_t bpp;
-};
-
-struct mdp_histogram {
-	uint32_t frame_cnt;
-	uint32_t bin_cnt;
-	uint32_t *r;
-	uint32_t *g;
-	uint32_t *b;
-};
-
-#define MISR_CRC_BATCH_SIZE 32
-enum {
-	DISPLAY_MISR_EDP,
-	DISPLAY_MISR_DSI0,
-	DISPLAY_MISR_DSI1,
-	DISPLAY_MISR_HDMI,
-	DISPLAY_MISR_LCDC,
-	DISPLAY_MISR_MDP,
-	DISPLAY_MISR_ATV,
-	DISPLAY_MISR_DSI_CMD,
-	DISPLAY_MISR_MAX
-};
-
-enum {
-	MISR_OP_NONE,
-	MISR_OP_SFM,
-	MISR_OP_MFM,
-	MISR_OP_BM,
-	MISR_OP_MAX
-};
-
-struct mdp_misr {
-	uint32_t block_id;
-	uint32_t frame_count;
-	uint32_t crc_op_mode;
-	uint32_t crc_value[MISR_CRC_BATCH_SIZE];
-};
-
-/*
-
-	mdp_block_type defines the identifiers for pipes in MDP 4.3 and up
-
-	MDP_BLOCK_RESERVED is provided for backward compatibility and is
-	deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used
-	instead.
-
-	MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses,
-	same for others.
-
-*/
-
-enum {
-	MDP_BLOCK_RESERVED = 0,
-	MDP_BLOCK_OVERLAY_0,
-	MDP_BLOCK_OVERLAY_1,
-	MDP_BLOCK_VG_1,
-	MDP_BLOCK_VG_2,
-	MDP_BLOCK_RGB_1,
-	MDP_BLOCK_RGB_2,
-	MDP_BLOCK_DMA_P,
-	MDP_BLOCK_DMA_S,
-	MDP_BLOCK_DMA_E,
-	MDP_BLOCK_OVERLAY_2,
-	MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
-	MDP_LOGICAL_BLOCK_DISP_1,
-	MDP_LOGICAL_BLOCK_DISP_2,
-	MDP_BLOCK_MAX,
-};
-
-/*
- * mdp_histogram_start_req is used to provide the parameters for
- * histogram start request
- */
-
-struct mdp_histogram_start_req {
-	uint32_t block;
-	uint8_t frame_cnt;
-	uint8_t bit_mask;
-	uint16_t num_bins;
-};
-
-/*
- * mdp_histogram_data is used to return the histogram data, once
- * the histogram is done/stopped/cance
- */
-
-struct mdp_histogram_data {
-	uint32_t block;
-	uint32_t bin_cnt;
-	uint32_t *c0;
-	uint32_t *c1;
-	uint32_t *c2;
-	uint32_t *extra_info;
-};
-
-
-#define GC_LUT_ENTRIES_V1_7	512
-
-struct mdp_ar_gc_lut_data {
-	uint32_t x_start;
-	uint32_t slope;
-	uint32_t offset;
-};
-
-struct mdp_pgc_lut_data {
-	uint32_t version;
-	uint32_t block;
-	uint32_t flags;
-	uint8_t num_r_stages;
-	uint8_t num_g_stages;
-	uint8_t num_b_stages;
-	struct mdp_ar_gc_lut_data *r_data;
-	struct mdp_ar_gc_lut_data *g_data;
-	struct mdp_ar_gc_lut_data *b_data;
-	void *cfg_payload;
-};
-
-#define PGC_LUT_ENTRIES 1024
-struct mdp_pgc_lut_data_v1_7 {
-	uint32_t  len;
-	uint32_t  *c0_data;
-	uint32_t  *c1_data;
-	uint32_t  *c2_data;
-};
-
-/*
- * mdp_rgb_lut_data is used to provide parameters for configuring the
- * generic RGB lut in case of gamma correction or other LUT updation usecases
- */
-struct mdp_rgb_lut_data {
-	uint32_t flags;
-	uint32_t lut_type;
-	struct fb_cmap cmap;
-};
-
-enum {
-	mdp_rgb_lut_gc,
-	mdp_rgb_lut_hist,
-};
-
-struct mdp_lut_cfg_data {
-	uint32_t lut_type;
-	union {
-		struct mdp_igc_lut_data igc_lut_data;
-		struct mdp_pgc_lut_data pgc_lut_data;
-		struct mdp_hist_lut_data hist_lut_data;
-		struct mdp_rgb_lut_data rgb_lut_data;
-	} data;
-};
-
-struct mdp_bl_scale_data {
-	uint32_t min_lvl;
-	uint32_t scale;
-};
-
-struct mdp_pa_cfg_data {
-	uint32_t block;
-	struct mdp_pa_cfg pa_data;
-};
-
-struct mdp_dither_data_v1_7 {
-	uint32_t g_y_depth;
-	uint32_t r_cr_depth;
-	uint32_t b_cb_depth;
-};
-
-struct mdp_dither_cfg_data {
-	uint32_t version;
-	uint32_t block;
-	uint32_t flags;
-	uint32_t mode;
-	uint32_t g_y_depth;
-	uint32_t r_cr_depth;
-	uint32_t b_cb_depth;
-	void *cfg_payload;
-};
-
-#define MDP_GAMUT_TABLE_NUM		8
-#define MDP_GAMUT_TABLE_NUM_V1_7	4
-#define MDP_GAMUT_SCALE_OFF_TABLE_NUM	3
-#define MDP_GAMUT_TABLE_V1_7_SZ 1229
-#define MDP_GAMUT_SCALE_OFF_SZ 16
-#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32
-
-struct mdp_gamut_cfg_data {
-	uint32_t block;
-	uint32_t flags;
-	uint32_t version;
-	/* v1 version specific params */
-	uint32_t gamut_first;
-	uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
-	uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
-	uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
-	uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
-	/* params for newer versions of gamut */
-	void *cfg_payload;
-};
-
-enum {
-	mdp_gamut_fine_mode = 0x1,
-	mdp_gamut_coarse_mode,
-};
-
-struct mdp_gamut_data_v1_7 {
-	uint32_t mode;
-	uint32_t map_en;
-	uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7];
-	uint32_t *c0_data[MDP_GAMUT_TABLE_NUM_V1_7];
-	uint32_t *c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7];
-	uint32_t  tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
-	uint32_t  *scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
-};
-
-struct mdp_calib_config_data {
-	uint32_t ops;
-	uint32_t addr;
-	uint32_t data;
-};
-
-struct mdp_calib_config_buffer {
-	uint32_t ops;
-	uint32_t size;
-	uint32_t *buffer;
-};
-
-struct mdp_calib_dcm_state {
-	uint32_t ops;
-	uint32_t dcm_state;
-};
-
-enum {
-	DCM_UNINIT,
-	DCM_UNBLANK,
-	DCM_ENTER,
-	DCM_EXIT,
-	DCM_BLANK,
-	DTM_ENTER,
-	DTM_EXIT,
-};
-
-#define MDSS_PP_SPLIT_LEFT_ONLY		0x10000000
-#define MDSS_PP_SPLIT_RIGHT_ONLY	0x20000000
-#define MDSS_PP_SPLIT_MASK		0x30000000
-
-#define MDSS_MAX_BL_BRIGHTNESS 255
-#define AD_BL_LIN_LEN 256
-#define AD_BL_ATT_LUT_LEN 33
-
-#define MDSS_AD_MODE_AUTO_BL	0x0
-#define MDSS_AD_MODE_AUTO_STR	0x1
-#define MDSS_AD_MODE_TARG_STR	0x3
-#define MDSS_AD_MODE_MAN_STR	0x7
-#define MDSS_AD_MODE_CALIB	0xF
-
-#define MDP_PP_AD_INIT	0x10
-#define MDP_PP_AD_CFG	0x20
-
-struct mdss_ad_init {
-	uint32_t asym_lut[33];
-	uint32_t color_corr_lut[33];
-	uint8_t i_control[2];
-	uint16_t black_lvl;
-	uint16_t white_lvl;
-	uint8_t var;
-	uint8_t limit_ampl;
-	uint8_t i_dither;
-	uint8_t slope_max;
-	uint8_t slope_min;
-	uint8_t dither_ctl;
-	uint8_t format;
-	uint8_t auto_size;
-	uint16_t frame_w;
-	uint16_t frame_h;
-	uint8_t logo_v;
-	uint8_t logo_h;
-	uint32_t alpha;
-	uint32_t alpha_base;
-	uint32_t al_thresh;
-	uint32_t bl_lin_len;
-	uint32_t bl_att_len;
-	uint32_t *bl_lin;
-	uint32_t *bl_lin_inv;
-	uint32_t *bl_att_lut;
-};
-
-#define MDSS_AD_BL_CTRL_MODE_EN 1
-#define MDSS_AD_BL_CTRL_MODE_DIS 0
-struct mdss_ad_cfg {
-	uint32_t mode;
-	uint32_t al_calib_lut[33];
-	uint16_t backlight_min;
-	uint16_t backlight_max;
-	uint16_t backlight_scale;
-	uint16_t amb_light_min;
-	uint16_t filter[2];
-	uint16_t calib[4];
-	uint8_t strength_limit;
-	uint8_t t_filter_recursion;
-	uint16_t stab_itr;
-	uint32_t bl_ctrl_mode;
-};
-
-/* ops uses standard MDP_PP_* flags */
-struct mdss_ad_init_cfg {
-	uint32_t ops;
-	union {
-		struct mdss_ad_init init;
-		struct mdss_ad_cfg cfg;
-	} params;
-};
-
-/* mode uses MDSS_AD_MODE_* flags */
-struct mdss_ad_input {
-	uint32_t mode;
-	union {
-		uint32_t amb_light;
-		uint32_t strength;
-		uint32_t calib_bl;
-	} in;
-	uint32_t output;
-};
-
-#define MDSS_CALIB_MODE_BL	0x1
-struct mdss_calib_cfg {
-	uint32_t ops;
-	uint32_t calib_mask;
-};
-
-enum {
-	mdp_op_pcc_cfg,
-	mdp_op_csc_cfg,
-	mdp_op_lut_cfg,
-	mdp_op_qseed_cfg,
-	mdp_bl_scale_cfg,
-	mdp_op_pa_cfg,
-	mdp_op_pa_v2_cfg,
-	mdp_op_dither_cfg,
-	mdp_op_gamut_cfg,
-	mdp_op_calib_cfg,
-	mdp_op_ad_cfg,
-	mdp_op_ad_input,
-	mdp_op_calib_mode,
-	mdp_op_calib_buffer,
-	mdp_op_calib_dcm_state,
-	mdp_op_max,
-};
-
-enum {
-	WB_FORMAT_NV12,
-	WB_FORMAT_RGB_565,
-	WB_FORMAT_RGB_888,
-	WB_FORMAT_xRGB_8888,
-	WB_FORMAT_ARGB_8888,
-	WB_FORMAT_BGRA_8888,
-	WB_FORMAT_BGRX_8888,
-	WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */
-};
-
-struct msmfb_mdp_pp {
-	uint32_t op;
-	union {
-		struct mdp_pcc_cfg_data pcc_cfg_data;
-		struct mdp_csc_cfg_data csc_cfg_data;
-		struct mdp_lut_cfg_data lut_cfg_data;
-		struct mdp_qseed_cfg_data qseed_cfg_data;
-		struct mdp_bl_scale_data bl_scale_data;
-		struct mdp_pa_cfg_data pa_cfg_data;
-		struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
-		struct mdp_dither_cfg_data dither_cfg_data;
-		struct mdp_gamut_cfg_data gamut_cfg_data;
-		struct mdp_calib_config_data calib_cfg;
-		struct mdss_ad_init_cfg ad_init_cfg;
-		struct mdss_calib_cfg mdss_calib_cfg;
-		struct mdss_ad_input ad_input;
-		struct mdp_calib_config_buffer calib_buffer;
-		struct mdp_calib_dcm_state calib_dcm;
-	} data;
-};
-
-#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
-enum {
-	metadata_op_none,
-	metadata_op_base_blend,
-	metadata_op_frame_rate,
-	metadata_op_vic,
-	metadata_op_wb_format,
-	metadata_op_wb_secure,
-	metadata_op_get_caps,
-	metadata_op_crc,
-	metadata_op_get_ion_fd,
-	metadata_op_max
-};
-
-struct mdp_blend_cfg {
-	uint32_t is_premultiplied;
-};
-
-struct mdp_mixer_cfg {
-	uint32_t writeback_format;
-	uint32_t alpha;
-};
-
-struct mdss_hw_caps {
-	uint32_t mdp_rev;
-	uint8_t rgb_pipes;
-	uint8_t vig_pipes;
-	uint8_t dma_pipes;
-	uint8_t max_smp_cnt;
-	uint8_t smp_per_pipe;
-	uint32_t features;
-};
-
-struct msmfb_metadata {
-	uint32_t op;
-	uint32_t flags;
-	union {
-		struct mdp_misr misr_request;
-		struct mdp_blend_cfg blend_cfg;
-		struct mdp_mixer_cfg mixer_cfg;
-		uint32_t panel_frame_rate;
-		uint32_t video_info_code;
-		struct mdss_hw_caps caps;
-		uint8_t secure_en;
-		int fbmem_ionfd;
-	} data;
-};
-
-#define MDP_MAX_FENCE_FD	32
-#define MDP_BUF_SYNC_FLAG_WAIT	1
-#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE	0x10
-
-struct mdp_buf_sync {
-	uint32_t flags;
-	uint32_t acq_fen_fd_cnt;
-	uint32_t session_id;
-	int *acq_fen_fd;
-	int *rel_fen_fd;
-	int *retire_fen_fd;
-};
-
-struct mdp_async_blit_req_list {
-	struct mdp_buf_sync sync;
-	uint32_t count;
-	struct mdp_blit_req req[];
-};
-
-#define MDP_DISPLAY_COMMIT_OVERLAY	1
-
-struct mdp_display_commit {
-	uint32_t flags;
-	uint32_t wait_for_finish;
-	struct fb_var_screeninfo var;
-	/*
-	 * user needs to follow guidelines as per below rules
-	 * 1. source split is enabled: l_roi = roi and r_roi = 0
-	 * 2. source split is disabled:
-	 *	2.1 split display: l_roi = l_roi and r_roi = r_roi
-	 *	2.2 non split display: l_roi = roi and r_roi = 0
-	 */
-	struct mdp_rect l_roi;
-	struct mdp_rect r_roi;
-};
-
-/**
- * struct mdp_overlay_list - argument for ioctl MSMFB_OVERLAY_PREPARE
- * @num_overlays:	Number of overlay layers as part of the frame.
- * @overlay_list:	Pointer to a list of overlay structures identifying
- *			the layers as part of the frame
- * @flags:		Flags can be used to extend behavior.
- * @processed_overlays:	Output parameter indicating how many pipes were
- *			successful. If there are no errors this number should
- *			match num_overlays. Otherwise it will indicate the last
- *			successful index for overlay that couldn't be set.
- */
-struct mdp_overlay_list {
-	uint32_t num_overlays;
-	struct mdp_overlay **overlay_list;
-	uint32_t flags;
-	uint32_t processed_overlays;
-};
-
-struct mdp_page_protection {
-	uint32_t page_protection;
-};
-
-
-struct mdp_mixer_info {
-	int pndx;
-	int pnum;
-	int ptype;
-	int mixer_num;
-	int z_order;
-};
-
-#define MAX_PIPE_PER_MIXER  7
-
-struct msmfb_mixer_info_req {
-	int mixer_num;
-	int cnt;
-	struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
-};
-
-enum {
-	DISPLAY_SUBSYSTEM_ID,
-	ROTATOR_SUBSYSTEM_ID,
-};
-
-enum {
-	MDP_IOMMU_DOMAIN_CP,
-	MDP_IOMMU_DOMAIN_NS,
-};
-
-enum {
-	MDP_WRITEBACK_MIRROR_OFF,
-	MDP_WRITEBACK_MIRROR_ON,
-	MDP_WRITEBACK_MIRROR_PAUSE,
-	MDP_WRITEBACK_MIRROR_RESUME,
-};
-
-enum mdp_color_space {
-	MDP_CSC_ITU_R_601,
-	MDP_CSC_ITU_R_601_FR,
-	MDP_CSC_ITU_R_709,
-};
-
-enum {
-	mdp_igc_v1_7 = 1,
-	mdp_igc_vmax,
-	mdp_hist_lut_v1_7,
-	mdp_hist_lut_vmax,
-	mdp_pgc_v1_7,
-	mdp_pgc_vmax,
-	mdp_dither_v1_7,
-	mdp_dither_vmax,
-	mdp_gamut_v1_7,
-	mdp_gamut_vmax,
-	mdp_pa_v1_7,
-	mdp_pa_vmax,
-	mdp_pcc_v1_7,
-	mdp_pcc_vmax,
-	mdp_pp_legacy,
-};
-
-/* PP Features */
-enum {
-	IGC = 1,
-	PCC,
-	GC,
-	PA,
-	GAMUT,
-	DITHER,
-	QSEED,
-	HIST_LUT,
-	HIST,
-	PP_FEATURE_MAX,
-};
-
-struct mdp_pp_feature_version {
-	uint32_t pp_feature;
-	uint32_t version_info;
-};
-#endif /*_UAPI_MSM_MDP_H_*/

diff --git a/k318/original-kernel-headers/linux/msm_rmnet.h b/k318/original-kernel-headers/linux/msm_rmnet.h
deleted file mode 100644
index 4892602..0000000
--- a/k318/original-kernel-headers/linux/msm_rmnet.h
+++ /dev/null

@@ -1,156 +0,0 @@
-#ifndef _UAPI_MSM_RMNET_H_
-#define _UAPI_MSM_RMNET_H_
-
-/* Bitmap macros for RmNET driver operation mode. */
-#define RMNET_MODE_NONE     (0x00)
-#define RMNET_MODE_LLP_ETH  (0x01)
-#define RMNET_MODE_LLP_IP   (0x02)
-#define RMNET_MODE_QOS      (0x04)
-#define RMNET_MODE_MASK     (RMNET_MODE_LLP_ETH | \
-			     RMNET_MODE_LLP_IP  | \
-			     RMNET_MODE_QOS)
-
-#define RMNET_IS_MODE_QOS(mode)  \
-	((mode & RMNET_MODE_QOS) == RMNET_MODE_QOS)
-#define RMNET_IS_MODE_IP(mode)   \
-	((mode & RMNET_MODE_LLP_IP) == RMNET_MODE_LLP_IP)
-
-/* IOCTL command enum
- * Values chosen to not conflict with other drivers in the ecosystem */
-enum rmnet_ioctl_cmds_e {
-	RMNET_IOCTL_SET_LLP_ETHERNET = 0x000089F1, /* Set Ethernet protocol  */
-	RMNET_IOCTL_SET_LLP_IP       = 0x000089F2, /* Set RAWIP protocol     */
-	RMNET_IOCTL_GET_LLP          = 0x000089F3, /* Get link protocol      */
-	RMNET_IOCTL_SET_QOS_ENABLE   = 0x000089F4, /* Set QoS header enabled */
-	RMNET_IOCTL_SET_QOS_DISABLE  = 0x000089F5, /* Set QoS header disabled*/
-	RMNET_IOCTL_GET_QOS          = 0x000089F6, /* Get QoS header state   */
-	RMNET_IOCTL_GET_OPMODE       = 0x000089F7, /* Get operation mode     */
-	RMNET_IOCTL_OPEN             = 0x000089F8, /* Open transport port    */
-	RMNET_IOCTL_CLOSE            = 0x000089F9, /* Close transport port   */
-	RMNET_IOCTL_FLOW_ENABLE      = 0x000089FA, /* Flow enable            */
-	RMNET_IOCTL_FLOW_DISABLE     = 0x000089FB, /* Flow disable           */
-	RMNET_IOCTL_FLOW_SET_HNDL    = 0x000089FC, /* Set flow handle        */
-	RMNET_IOCTL_EXTENDED         = 0x000089FD, /* Extended IOCTLs        */
-	RMNET_IOCTL_MAX
-};
-
-enum rmnet_ioctl_extended_cmds_e {
-/* RmNet Data Required IOCTLs */
-	RMNET_IOCTL_GET_SUPPORTED_FEATURES     = 0x0000,   /* Get features    */
-	RMNET_IOCTL_SET_MRU                    = 0x0001,   /* Set MRU         */
-	RMNET_IOCTL_GET_MRU                    = 0x0002,   /* Get MRU         */
-	RMNET_IOCTL_GET_EPID                   = 0x0003,   /* Get endpoint ID */
-	RMNET_IOCTL_GET_DRIVER_NAME            = 0x0004,   /* Get driver name */
-	RMNET_IOCTL_ADD_MUX_CHANNEL            = 0x0005,   /* Add MUX ID      */
-	RMNET_IOCTL_SET_EGRESS_DATA_FORMAT     = 0x0006,   /* Set EDF         */
-	RMNET_IOCTL_SET_INGRESS_DATA_FORMAT    = 0x0007,   /* Set IDF         */
-	RMNET_IOCTL_SET_AGGREGATION_COUNT      = 0x0008,   /* Set agg count   */
-	RMNET_IOCTL_GET_AGGREGATION_COUNT      = 0x0009,   /* Get agg count   */
-	RMNET_IOCTL_SET_AGGREGATION_SIZE       = 0x000A,   /* Set agg size    */
-	RMNET_IOCTL_GET_AGGREGATION_SIZE       = 0x000B,   /* Get agg size    */
-	RMNET_IOCTL_FLOW_CONTROL               = 0x000C,   /* Do flow control */
-	RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL   = 0x000D,   /* For legacy use  */
-	RMNET_IOCTL_GET_HWSW_MAP               = 0x000E,   /* Get HW/SW map   */
-	RMNET_IOCTL_SET_RX_HEADROOM            = 0x000F,   /* RX Headroom     */
-	RMNET_IOCTL_GET_EP_PAIR                = 0x0010,   /* Endpoint pair   */
-	RMNET_IOCTL_SET_QOS_VERSION            = 0x0011,   /* 8/6 byte QoS hdr*/
-	RMNET_IOCTL_GET_QOS_VERSION            = 0x0012,   /* 8/6 byte QoS hdr*/
-	RMNET_IOCTL_GET_SUPPORTED_QOS_MODES    = 0x0013,   /* Get QoS modes   */
-	RMNET_IOCTL_SET_SLEEP_STATE            = 0x0014,   /* Set sleep state */
-	RMNET_IOCTL_SET_XLAT_DEV_INFO          = 0x0015,   /* xlat dev name   */
-	RMNET_IOCTL_DEREGISTER_DEV             = 0x0016,   /* Dereg a net dev */
-	RMNET_IOCTL_GET_SG_SUPPORT             = 0x0017,   /* Query sg support*/
-	RMNET_IOCTL_EXTENDED_MAX               = 0x0018
-};
-
-/* Return values for the RMNET_IOCTL_GET_SUPPORTED_FEATURES IOCTL */
-#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL              (1<<0)
-#define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT          (1<<1)
-#define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT         (1<<2)
-#define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT           (1<<3)
-#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT           (1<<4)
-#define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE            (1<<5)
-#define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE            (1<<6)
-#define RMNET_IOCTL_FEAT_FLOW_CONTROL                    (1<<7)
-#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL        (1<<8)
-#define RMNET_IOCTL_FEAT_GET_HWSW_MAP                    (1<<9)
-
-/* Input values for the RMNET_IOCTL_SET_EGRESS_DATA_FORMAT IOCTL  */
-#define RMNET_IOCTL_EGRESS_FORMAT_MAP                  (1<<1)
-#define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION          (1<<2)
-#define RMNET_IOCTL_EGRESS_FORMAT_MUXING               (1<<3)
-#define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM             (1<<4)
-
-/* Input values for the RMNET_IOCTL_SET_INGRESS_DATA_FORMAT IOCTL */
-#define RMNET_IOCTL_INGRESS_FORMAT_MAP                 (1<<1)
-#define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION       (1<<2)
-#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING            (1<<3)
-#define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM            (1<<4)
-#define RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA            (1<<5)
-
-/* User space may not have this defined. */
-#ifndef IFNAMSIZ
-#define IFNAMSIZ 16
-#endif
-
-struct rmnet_ioctl_extended_s {
-	uint32_t   extended_ioctl;
-	union {
-		uint32_t data; /* Generic data field for most extended IOCTLs */
-
-		/* Return values for
-		 *    RMNET_IOCTL_GET_DRIVER_NAME
-		 *    RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL */
-		int8_t if_name[IFNAMSIZ];
-
-		/* Input values for the RMNET_IOCTL_ADD_MUX_CHANNEL IOCTL */
-		struct {
-			uint32_t  mux_id;
-			int8_t    vchannel_name[IFNAMSIZ];
-		} rmnet_mux_val;
-
-		/* Input values for the RMNET_IOCTL_FLOW_CONTROL IOCTL */
-		struct {
-			uint8_t   flow_mode;
-			uint8_t   mux_id;
-		} flow_control_prop;
-
-		/* Return values for RMNET_IOCTL_GET_EP_PAIR */
-		struct {
-			uint32_t   consumer_pipe_num;
-			uint32_t   producer_pipe_num;
-		} ipa_ep_pair;
-
-		struct {
-			uint32_t __data; /* Placeholder for legacy data*/
-			uint32_t agg_size;
-			uint32_t agg_count;
-		} ingress_format;
-	} u;
-};
-
-struct rmnet_ioctl_data_s {
-	union {
-		uint32_t	operation_mode;
-		uint32_t	tcm_handle;
-	} u;
-};
-
-#define RMNET_IOCTL_QOS_MODE_6   (1<<0)
-#define RMNET_IOCTL_QOS_MODE_8   (1<<1)
-
-/* QMI QoS header definition */
-#define QMI_QOS_HDR_S  __attribute((__packed__)) qmi_qos_hdr_s
-struct QMI_QOS_HDR_S {
-	unsigned char    version;
-	unsigned char    flags;
-	uint32_t         flow_id;
-};
-
-/* QMI QoS 8-byte header. */
-struct qmi_qos_hdr8_s {
-	struct QMI_QOS_HDR_S   hdr;
-	uint8_t                reserved[2];
-} __attribute((__packed__));
-
-#endif /* _UAPI_MSM_RMNET_H_ */

diff --git a/k318/original-kernel-headers/linux/msm_rotator.h b/k318/original-kernel-headers/linux/msm_rotator.h
deleted file mode 100644
index 16b2490..0000000
--- a/k318/original-kernel-headers/linux/msm_rotator.h
+++ /dev/null

@@ -1,62 +0,0 @@
-#ifndef _UAPI__MSM_ROTATOR_H__
-#define _UAPI__MSM_ROTATOR_H__
-
-#include <linux/types.h>
-#include <linux/msm_mdp.h>
-
-#define MSM_ROTATOR_IOCTL_MAGIC 'R'
-
-#define MSM_ROTATOR_IOCTL_START   \
-		_IOWR(MSM_ROTATOR_IOCTL_MAGIC, 1, struct msm_rotator_img_info)
-#define MSM_ROTATOR_IOCTL_ROTATE   \
-		_IOW(MSM_ROTATOR_IOCTL_MAGIC, 2, struct msm_rotator_data_info)
-#define MSM_ROTATOR_IOCTL_FINISH   \
-		_IOW(MSM_ROTATOR_IOCTL_MAGIC, 3, int)
-
-#define ROTATOR_VERSION_01	0xA5B4C301
-
-enum rotator_clk_type {
-	ROTATOR_CORE_CLK,
-	ROTATOR_PCLK,
-	ROTATOR_IMEM_CLK
-};
-
-struct msm_rotator_img_info {
-	unsigned int session_id;
-	struct msmfb_img  src;
-	struct msmfb_img  dst;
-	struct mdp_rect src_rect;
-	unsigned int    dst_x;
-	unsigned int    dst_y;
-	unsigned char   rotations;
-	int enable;
-	unsigned int	downscale_ratio;
-	unsigned int secure;
-};
-
-struct msm_rotator_data_info {
-	int session_id;
-	struct msmfb_data src;
-	struct msmfb_data dst;
-	unsigned int version_key;
-	struct msmfb_data src_chroma;
-	struct msmfb_data dst_chroma;
-};
-
-struct msm_rot_clocks {
-	const char *clk_name;
-	enum rotator_clk_type clk_type;
-	unsigned int clk_rate;
-};
-
-struct msm_rotator_platform_data {
-	unsigned int number_of_clocks;
-	unsigned int hardware_version_number;
-	struct msm_rot_clocks *rotator_clks;
-#ifdef CONFIG_MSM_BUS_SCALING
-	struct msm_bus_scale_pdata *bus_scale_table;
-#endif
-	char rot_iommu_split_domain;
-};
-#endif
-

diff --git a/k318/original-kernel-headers/linux/msm_thermal_ioctl.h b/k318/original-kernel-headers/linux/msm_thermal_ioctl.h
deleted file mode 100644
index 6797d39..0000000
--- a/k318/original-kernel-headers/linux/msm_thermal_ioctl.h
+++ /dev/null

@@ -1,97 +0,0 @@
-#ifndef _MSM_THERMAL_IOCTL_H
-#define _MSM_THERMAL_IOCTL_H
-
-#include <linux/ioctl.h>
-
-#define MSM_THERMAL_IOCTL_NAME "msm_thermal_query"
-#define MSM_IOCTL_FREQ_SIZE 16
-
-struct __attribute__((__packed__)) cpu_freq_arg {
-	uint32_t cpu_num;
-	uint32_t freq_req;
-};
-
-struct __attribute__((__packed__)) clock_plan_arg {
-	uint32_t cluster_num;
-	/*
-	** A value of zero for freq_table_len, will fetch the length of the
-	** cluster frequency table. A non-zero value will fetch the frequency
-	** table contents.
-	*/
-	uint32_t freq_table_len;
-	/*
-	** For clusters with frequency table length greater than
-	** MSM_IOCTL_FREQ_SIZE, the frequency table is fetched from kernel
-	** in multiple sets or iterations. The set_idx variable,
-	** indicates, which set/part of frequency table the user is requesting.
-	** The set index value starts from zero. A set index value of 'Z',
-	** will fetch MSM_IOCTL_FREQ_SIZE or maximum available number of
-	** frequency values (if it is less than MSM_IOCTL_FREQ_SIZE)
-	** from the frequency table, starting from the index
-	** (Z * MSM_IOCTL_FREQ_SIZE).
-	** For example, in a device supporting 19 different frequencies, a set
-	** index value of 0 will fetch the first 16 (MSM_IOCTL_FREQ_SIZE)
-	** frequencies starting from the index 0 and a set value of 1 will fetch
-	** the remaining 3 frequencies starting from the index 16.
-	** A successful get, will populate the freq_table_len with the
-	** number of frequency table entries fetched.
-	*/
-	uint32_t set_idx;
-	unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
-};
-
-struct __attribute__((__packed__)) voltage_plan_arg {
-	uint32_t cluster_num;
-	uint32_t voltage_table_len;
-	uint32_t set_idx;
-	uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
-};
-
-struct __attribute__((__packed__)) msm_thermal_ioctl {
-	uint32_t size;
-	union {
-		struct cpu_freq_arg cpu_freq;
-		struct clock_plan_arg clock_freq;
-		struct voltage_plan_arg voltage;
-	};
-};
-
-enum {
-	/*Set CPU Frequency*/
-	MSM_SET_CPU_MAX_FREQ = 0x00,
-	MSM_SET_CPU_MIN_FREQ = 0x01,
-	/*Set cluster frequency*/
-	MSM_SET_CLUSTER_MAX_FREQ = 0x02,
-	MSM_SET_CLUSTER_MIN_FREQ = 0x03,
-	/*Get cluster frequency plan*/
-	MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
-	/*Get cluster voltage plan */
-	MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
-	MSM_CMD_MAX_NR,
-};
-
-#define MSM_THERMAL_MAGIC_NUM 0xCA /*Unique magic number*/
-
-#define MSM_THERMAL_SET_CPU_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
-		MSM_SET_CPU_MAX_FREQ, struct msm_thermal_ioctl)
-
-#define MSM_THERMAL_SET_CPU_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
-		MSM_SET_CPU_MIN_FREQ, struct msm_thermal_ioctl)
-
-#define MSM_THERMAL_SET_CLUSTER_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
-		MSM_SET_CLUSTER_MAX_FREQ, struct msm_thermal_ioctl)
-
-#define MSM_THERMAL_SET_CLUSTER_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
-		MSM_SET_CLUSTER_MIN_FREQ, struct msm_thermal_ioctl)
-
-#define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
-		MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
-
-#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
-		MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
-#ifdef __KERNEL__
-extern int msm_thermal_ioctl_init(void);
-extern void msm_thermal_ioctl_cleanup(void);
-#endif
-
-#endif

diff --git a/k318/original-kernel-headers/linux/qcedev.h b/k318/original-kernel-headers/linux/qcedev.h
deleted file mode 100644
index 655d848..0000000
--- a/k318/original-kernel-headers/linux/qcedev.h
+++ /dev/null

@@ -1,259 +0,0 @@
-#ifndef _UAPI_QCEDEV__H
-#define _UAPI_QCEDEV__H
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-#include "fips_status.h"
-
-#define QCEDEV_MAX_SHA_BLOCK_SIZE	64
-#define QCEDEV_MAX_BEARER	31
-#define QCEDEV_MAX_KEY_SIZE	64
-#define QCEDEV_MAX_IV_SIZE	32
-
-#define QCEDEV_MAX_BUFFERS      16
-#define QCEDEV_MAX_SHA_DIGEST	32
-
-#define QCEDEV_USE_PMEM		1
-#define QCEDEV_NO_PMEM		0
-
-#define QCEDEV_AES_KEY_128	16
-#define QCEDEV_AES_KEY_192	24
-#define QCEDEV_AES_KEY_256	32
-/**
-*qcedev_oper_enum: Operation types
-* @QCEDEV_OPER_ENC:		Encrypt
-* @QCEDEV_OPER_DEC:		Decrypt
-* @QCEDEV_OPER_ENC_NO_KEY:	Encrypt. Do not need key to be specified by
-*				user. Key already set by an external processor.
-* @QCEDEV_OPER_DEC_NO_KEY:	Decrypt. Do not need the key to be specified by
-*				user. Key already set by an external processor.
-*/
-enum qcedev_oper_enum {
-	QCEDEV_OPER_DEC		= 0,
-	QCEDEV_OPER_ENC		= 1,
-	QCEDEV_OPER_DEC_NO_KEY	= 2,
-	QCEDEV_OPER_ENC_NO_KEY	= 3,
-	QCEDEV_OPER_LAST
-};
-
-/**
-*qcedev_oper_enum: Cipher algorithm types
-* @QCEDEV_ALG_DES:		DES
-* @QCEDEV_ALG_3DES:		3DES
-* @QCEDEV_ALG_AES:		AES
-*/
-enum qcedev_cipher_alg_enum {
-	QCEDEV_ALG_DES		= 0,
-	QCEDEV_ALG_3DES		= 1,
-	QCEDEV_ALG_AES		= 2,
-	QCEDEV_ALG_LAST
-};
-
-/**
-*qcedev_cipher_mode_enum : AES mode
-* @QCEDEV_AES_MODE_CBC:		CBC
-* @QCEDEV_AES_MODE_ECB:		ECB
-* @QCEDEV_AES_MODE_CTR:		CTR
-* @QCEDEV_AES_MODE_XTS:		XTS
-* @QCEDEV_AES_MODE_CCM:		CCM
-* @QCEDEV_DES_MODE_CBC:		CBC
-* @QCEDEV_DES_MODE_ECB:		ECB
-*/
-enum qcedev_cipher_mode_enum {
-	QCEDEV_AES_MODE_CBC	= 0,
-	QCEDEV_AES_MODE_ECB	= 1,
-	QCEDEV_AES_MODE_CTR	= 2,
-	QCEDEV_AES_MODE_XTS	= 3,
-	QCEDEV_AES_MODE_CCM	= 4,
-	QCEDEV_DES_MODE_CBC	= 5,
-	QCEDEV_DES_MODE_ECB	= 6,
-	QCEDEV_AES_DES_MODE_LAST
-};
-
-/**
-*enum qcedev_sha_alg_enum : Secure Hashing Algorithm
-* @QCEDEV_ALG_SHA1:		Digest returned: 20 bytes (160 bits)
-* @QCEDEV_ALG_SHA256:		Digest returned: 32 bytes (256 bit)
-* @QCEDEV_ALG_SHA1_HMAC:	HMAC returned 20 bytes (160 bits)
-* @QCEDEV_ALG_SHA256_HMAC:	HMAC returned 32 bytes (256 bit)
-* @QCEDEV_ALG_AES_CMAC:		Configurable MAC size
-*/
-enum qcedev_sha_alg_enum {
-	QCEDEV_ALG_SHA1		= 0,
-	QCEDEV_ALG_SHA256	= 1,
-	QCEDEV_ALG_SHA1_HMAC	= 2,
-	QCEDEV_ALG_SHA256_HMAC	= 3,
-	QCEDEV_ALG_AES_CMAC	= 4,
-	QCEDEV_ALG_SHA_ALG_LAST
-};
-
-/**
-* struct buf_info - Buffer information
-* @offset:			Offset from the base address of the buffer
-*				(Used when buffer is allocated using PMEM)
-* @vaddr:			Virtual buffer address pointer
-* @len:				Size of the buffer
-*/
-struct	buf_info {
-	union {
-		uint32_t	offset;
-		uint8_t		*vaddr;
-	};
-	uint32_t	len;
-};
-
-/**
-* struct qcedev_vbuf_info - Source and destination Buffer information
-* @src:				Array of buf_info for input/source
-* @dst:				Array of buf_info for output/destination
-*/
-struct	qcedev_vbuf_info {
-	struct buf_info	src[QCEDEV_MAX_BUFFERS];
-	struct buf_info	dst[QCEDEV_MAX_BUFFERS];
-};
-
-/**
-* struct qcedev_pmem_info - Stores PMEM buffer information
-* @fd_src:			Handle to /dev/adsp_pmem used to allocate
-*				memory for input/src buffer
-* @src:				Array of buf_info for input/source
-* @fd_dst:			Handle to /dev/adsp_pmem used to allocate
-*				memory for output/dst buffer
-* @dst:				Array of buf_info for output/destination
-* @pmem_src_offset:		The offset from input/src buffer
-*				(allocated by PMEM)
-*/
-struct	qcedev_pmem_info {
-	int		fd_src;
-	struct buf_info	src[QCEDEV_MAX_BUFFERS];
-	int		fd_dst;
-	struct buf_info	dst[QCEDEV_MAX_BUFFERS];
-};
-
-/**
-* struct qcedev_cipher_op_req - Holds the ciphering request information
-* @use_pmem (IN):	Flag to indicate if buffer source is PMEM
-*			QCEDEV_USE_PMEM/QCEDEV_NO_PMEM
-* @pmem (IN):		Stores PMEM buffer information.
-*			Refer struct qcedev_pmem_info
-* @vbuf (IN/OUT):	Stores Source and destination Buffer information
-*			Refer to struct qcedev_vbuf_info
-* @data_len (IN):	Total Length of input/src and output/dst in bytes
-* @in_place_op (IN):	Indicates whether the operation is inplace where
-*			source == destination
-*			When using PMEM allocated memory, must set this to 1
-* @enckey (IN):		128 bits of confidentiality key
-*			enckey[0] bit 127-120, enckey[1] bit 119-112,..
-*			enckey[15] bit 7-0
-* @encklen (IN):	Length of the encryption key(set to 128  bits/16
-*			bytes in the driver)
-* @iv (IN/OUT):		Initialisation vector data
-*			This is updated by the driver, incremented by
-*			number of blocks encrypted/decrypted.
-* @ivlen (IN):		Length of the IV
-* @byteoffset (IN):	Offset in the Cipher BLOCK (applicable and to be set
-*			for AES-128 CTR mode only)
-* @alg (IN):		Type of ciphering algorithm: AES/DES/3DES
-* @mode (IN):		Mode use when using AES algorithm: ECB/CBC/CTR
-*			Apllicabel when using AES algorithm only
-* @op (IN):		Type of operation: QCEDEV_OPER_DEC/QCEDEV_OPER_ENC or
-*			QCEDEV_OPER_ENC_NO_KEY/QCEDEV_OPER_DEC_NO_KEY
-*
-*If use_pmem is set to 0, the driver assumes that memory was not allocated
-* via PMEM, and kernel will need to allocate memory and copy data from user
-* space buffer (data_src/dta_dst) and process accordingly and copy data back
-* to the user space buffer
-*
-* If use_pmem is set to 1, the driver assumes that memory was allocated via
-* PMEM.
-* The kernel driver will use the fd_src to determine the kernel virtual address
-* base that maps to the user space virtual address base for the  buffer
-* allocated in user space.
-* The final input/src and output/dst buffer pointer will be determined
-* by adding the offsets to the kernel virtual addr.
-*
-* If use of hardware key is supported in the target, user can configure the
-* key paramters (encklen, enckey) to use the hardware key.
-* In order to use the hardware key, set encklen to 0 and set the enckey
-* data array to 0.
-*/
-struct	qcedev_cipher_op_req {
-	uint8_t				use_pmem;
-	union {
-		struct qcedev_pmem_info	pmem;
-		struct qcedev_vbuf_info	vbuf;
-	};
-	uint32_t			entries;
-	uint32_t			data_len;
-	uint8_t				in_place_op;
-	uint8_t				enckey[QCEDEV_MAX_KEY_SIZE];
-	uint32_t			encklen;
-	uint8_t				iv[QCEDEV_MAX_IV_SIZE];
-	uint32_t			ivlen;
-	uint32_t			byteoffset;
-	enum qcedev_cipher_alg_enum	alg;
-	enum qcedev_cipher_mode_enum	mode;
-	enum qcedev_oper_enum		op;
-};
-
-/**
-* struct qcedev_sha_op_req - Holds the hashing request information
-* @data (IN):			Array of pointers to the data to be hashed
-* @entries (IN):		Number of buf_info entries in the data array
-* @data_len (IN):		Length of data to be hashed
-* @digest (IN/OUT):		Returns the hashed data information
-* @diglen (OUT):		Size of the hashed/digest data
-* @authkey (IN):		Pointer to authentication key for HMAC
-* @authklen (IN):		Size of the authentication key
-* @alg (IN):			Secure Hash algorithm
-*/
-struct	qcedev_sha_op_req {
-	struct buf_info			data[QCEDEV_MAX_BUFFERS];
-	uint32_t			entries;
-	uint32_t			data_len;
-	uint8_t				digest[QCEDEV_MAX_SHA_DIGEST];
-	uint32_t			diglen;
-	uint8_t				*authkey;
-	uint32_t			authklen;
-	enum qcedev_sha_alg_enum	alg;
-};
-
-/**
-* struct qfips_verify_t - Holds data for FIPS Integrity test
-* @kernel_size  (IN):		Size of kernel Image
-* @kernel       (IN):		pointer to buffer containing the kernel Image
-*/
-struct qfips_verify_t {
-	unsigned kernel_size;
-	void *kernel;
-};
-
-struct file;
-extern long qcedev_ioctl(struct file *file,
-			unsigned cmd, unsigned long arg);
-
-#define QCEDEV_IOC_MAGIC	0x87
-
-#define QCEDEV_IOCTL_ENC_REQ		\
-	_IOWR(QCEDEV_IOC_MAGIC, 1, struct qcedev_cipher_op_req)
-#define QCEDEV_IOCTL_DEC_REQ		\
-	_IOWR(QCEDEV_IOC_MAGIC, 2, struct qcedev_cipher_op_req)
-#define QCEDEV_IOCTL_SHA_INIT_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 3, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_UPDATE_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 4, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_SHA_FINAL_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 5, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_GET_SHA_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 6, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_LOCK_CE	\
-	_IO(QCEDEV_IOC_MAGIC, 7)
-#define QCEDEV_IOCTL_UNLOCK_CE	\
-	_IO(QCEDEV_IOC_MAGIC, 8)
-#define QCEDEV_IOCTL_GET_CMAC_REQ	\
-	_IOWR(QCEDEV_IOC_MAGIC, 9, struct qcedev_sha_op_req)
-#define QCEDEV_IOCTL_UPDATE_FIPS_STATUS		\
-	_IOWR(QCEDEV_IOC_MAGIC, 10, enum fips_status)
-#define QCEDEV_IOCTL_QUERY_FIPS_STATUS	\
-	_IOR(QCEDEV_IOC_MAGIC, 11, enum fips_status)
-#endif /* _UAPI_QCEDEV__H */

diff --git a/k318/original-kernel-headers/linux/rmnet_data.h b/k318/original-kernel-headers/linux/rmnet_data.h
deleted file mode 100644
index 8cfe027..0000000
--- a/k318/original-kernel-headers/linux/rmnet_data.h
+++ /dev/null

@@ -1,253 +0,0 @@
- /*
- * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * RMNET Data configuration specification
- */
-
-#ifndef _RMNET_DATA_H_
-#define _RMNET_DATA_H_
-
-/* ***************** Constants ********************************************** */
-#define RMNET_LOCAL_LOGICAL_ENDPOINT -1
-
-#define RMNET_EGRESS_FORMAT__RESERVED__         (1<<0)
-#define RMNET_EGRESS_FORMAT_MAP                 (1<<1)
-#define RMNET_EGRESS_FORMAT_AGGREGATION         (1<<2)
-#define RMNET_EGRESS_FORMAT_MUXING              (1<<3)
-#define RMNET_EGRESS_FORMAT_MAP_CKSUMV3         (1<<4)
-#define RMNET_EGRESS_FORMAT_MAP_CKSUMV4         (1<<5)
-
-#define RMNET_INGRESS_FIX_ETHERNET              (1<<0)
-#define RMNET_INGRESS_FORMAT_MAP                (1<<1)
-#define RMNET_INGRESS_FORMAT_DEAGGREGATION      (1<<2)
-#define RMNET_INGRESS_FORMAT_DEMUXING           (1<<3)
-#define RMNET_INGRESS_FORMAT_MAP_COMMANDS       (1<<4)
-#define RMNET_INGRESS_FORMAT_MAP_CKSUMV3        (1<<5)
-#define RMNET_INGRESS_FORMAT_MAP_CKSUMV4        (1<<6)
-
-/* ***************** Netlink API ******************************************** */
-#define RMNET_NETLINK_PROTO 31
-#define RMNET_MAX_STR_LEN  16
-#define RMNET_NL_DATA_MAX_LEN 64
-
-#define RMNET_NETLINK_MSG_COMMAND    0
-#define RMNET_NETLINK_MSG_RETURNCODE 1
-#define RMNET_NETLINK_MSG_RETURNDATA 2
-
-struct rmnet_nl_msg_s {
-	uint16_t reserved;
-	uint16_t message_type;
-	uint16_t reserved2:14;
-	uint16_t crd:2;
-	union {
-		uint16_t arg_length;
-		uint16_t return_code;
-	};
-	union {
-		uint8_t data[RMNET_NL_DATA_MAX_LEN];
-		struct {
-			uint8_t  dev[RMNET_MAX_STR_LEN];
-			uint32_t flags;
-			uint16_t agg_size;
-			uint16_t agg_count;
-			uint8_t  tail_spacing;
-		} data_format;
-		struct {
-			uint8_t dev[RMNET_MAX_STR_LEN];
-			int32_t ep_id;
-			uint8_t operating_mode;
-			uint8_t next_dev[RMNET_MAX_STR_LEN];
-		} local_ep_config;
-		struct {
-			uint32_t id;
-			uint8_t  vnd_name[RMNET_MAX_STR_LEN];
-		} vnd;
-		struct {
-			uint32_t id;
-			uint32_t map_flow_id;
-			uint32_t tc_flow_id;
-		} flow_control;
-	};
-};
-
-enum rmnet_netlink_message_types_e {
-	/*
-	 * RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE - Register RMNET data driver
-	 *                                          on a particular device.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE,
-
-	/*
-	 * RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE - Unregister RMNET data
-	 *                                            driver on a particular
-	 *                                            device.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE,
-
-	/*
-	 * RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED - Get if RMNET data
-	 *                                            driver is registered on a
-	 *                                            particular device.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: 1 if registered, 0 if not
-	 */
-	RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED,
-
-	/*
-	 * RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT - Sets the egress data
-	 *                                             format for a particular
-	 *                                             link.
-	 * Args: uint32_t egress_flags
-	 *       char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT,
-
-	/*
-	 * RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT - Gets the egress data
-	 *                                             format for a particular
-	 *                                             link.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: 4-bytes data: uint32_t egress_flags
-	 */
-	RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT,
-
-	/*
-	 * RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT - Sets the ingress data
-	 *                                              format for a particular
-	 *                                              link.
-	 * Args: uint32_t ingress_flags
-	 *       char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT,
-
-	/*
-	 * RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT - Gets the ingress data
-	 *                                              format for a particular
-	 *                                              link.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 * Returns: 4-bytes data: uint32_t ingress_flags
-	 */
-	RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT,
-
-	/*
-	 * RMNET_NETLINK_SET_LOGICAL_EP_CONFIG - Sets the logical endpoint
-	 *                                       configuration for a particular
-	 *                                       link.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 *     int32_t logical_ep_id, valid values are -1 through 31
-	 *     uint8_t rmnet_mode: one of none, vnd, bridged
-	 *     char[] egress_dev_name: Egress device if operating in bridge mode
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_SET_LOGICAL_EP_CONFIG,
-
-	/*
-	 * RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG - Un-sets the logical endpoint
-	 *                                       configuration for a particular
-	 *                                       link.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 *       int32_t logical_ep_id, valid values are -1 through 31
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG,
-
-	/*
-	 * RMNET_NETLINK_GET_LOGICAL_EP_CONFIG - Gets the logical endpoint
-	 *                                       configuration for a particular
-	 *                                       link.
-	 * Args: char[] dev_name: Null terminated ASCII string, max length: 15
-	 *        int32_t logical_ep_id, valid values are -1 through 31
-	 * Returns: uint8_t rmnet_mode: one of none, vnd, bridged
-	 * char[] egress_dev_name: Egress device
-	 */
-	RMNET_NETLINK_GET_LOGICAL_EP_CONFIG,
-
-	/*
-	 * RMNET_NETLINK_NEW_VND - Creates a new virtual network device node
-	 * Args: int32_t node number
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_NEW_VND,
-
-	/*
-	 * RMNET_NETLINK_NEW_VND_WITH_PREFIX - Creates a new virtual network
-	 *                                     device node with the specified
-	 *                                     prefix for the device name
-	 * Args: int32_t node number
-	 *       char[] vnd_name - Use as prefix
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_NEW_VND_WITH_PREFIX,
-
-	/*
-	 * RMNET_NETLINK_GET_VND_NAME - Gets the string name of a VND from ID
-	 * Args: int32_t node number
-	 * Returns: char[] vnd_name
-	 */
-	RMNET_NETLINK_GET_VND_NAME,
-
-	/*
-	 * RMNET_NETLINK_FREE_VND - Removes virtual network device node
-	 * Args: int32_t node number
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_FREE_VND,
-
-	/*
-	 * RMNET_NETLINK_ADD_VND_TC_FLOW - Add flow control handle on VND
-	 * Args: int32_t node number
-	 *       uint32_t MAP Flow Handle
-	 *       uint32_t TC Flow Handle
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_ADD_VND_TC_FLOW,
-
-	/*
-	 * RMNET_NETLINK_DEL_VND_TC_FLOW - Removes flow control handle on VND
-	 * Args: int32_t node number
-	 *       uint32_t MAP Flow Handle
-	 * Returns: status code
-	 */
-	RMNET_NETLINK_DEL_VND_TC_FLOW
-};
-
-enum rmnet_config_endpoint_modes_e {
-	/* Pass the frame up the stack with no modifications to skb->dev      */
-	RMNET_EPMODE_NONE,
-	/* Replace skb->dev to a virtual rmnet device and pass up the stack   */
-	RMNET_EPMODE_VND,
-	/* Pass the frame directly to another device with dev_queue_xmit().   */
-	RMNET_EPMODE_BRIDGE,
-	/* Must be the last item in the list                                  */
-	RMNET_EPMODE_LENGTH
-};
-
-enum rmnet_config_return_codes_e {
-	RMNET_CONFIG_OK,
-	RMNET_CONFIG_UNKNOWN_MESSAGE,
-	RMNET_CONFIG_UNKNOWN_ERROR,
-	RMNET_CONFIG_NOMEM,
-	RMNET_CONFIG_DEVICE_IN_USE,
-	RMNET_CONFIG_INVALID_REQUEST,
-	RMNET_CONFIG_NO_SUCH_DEVICE,
-	RMNET_CONFIG_BAD_ARGUMENTS,
-	RMNET_CONFIG_BAD_EGRESS_DEVICE,
-	RMNET_CONFIG_TC_HANDLE_FULL
-};
-
-#endif /* _RMNET_DATA_H_ */

diff --git a/k318/original-kernel-headers/linux/sockios.h b/k318/original-kernel-headers/linux/sockios.h
deleted file mode 100644
index 623e9aa..0000000
--- a/k318/original-kernel-headers/linux/sockios.h
+++ /dev/null

@@ -1,150 +0,0 @@
-/*
- * INET		An implementation of the TCP/IP protocol suite for the LINUX
- *		operating system.  INET is implemented using the  BSD Socket
- *		interface as the means of communication with the user level.
- *
- *		Definitions of the socket-level I/O control calls.
- *
- * Version:	@(#)sockios.h	1.0.2	03/09/93
- *
- * Authors:	Ross Biro
- *		Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
- *
- *		This program is free software; you can redistribute it and/or
- *		modify it under the terms of the GNU General Public License
- *		as published by the Free Software Foundation; either version
- *		2 of the License, or (at your option) any later version.
- */
-#ifndef _LINUX_SOCKIOS_H
-#define _LINUX_SOCKIOS_H
-
-#include <asm/sockios.h>
-
-/* Linux-specific socket ioctls */
-#define SIOCINQ		FIONREAD
-#define SIOCOUTQ	TIOCOUTQ        /* output queue size (not sent + not acked) */
-
-/* Routing table calls. */
-#define SIOCADDRT	0x890B		/* add routing table entry	*/
-#define SIOCDELRT	0x890C		/* delete routing table entry	*/
-#define SIOCRTMSG	0x890D		/* call to routing system	*/
-
-/* Socket configuration controls. */
-#define SIOCGIFNAME	0x8910		/* get iface name		*/
-#define SIOCSIFLINK	0x8911		/* set iface channel		*/
-#define SIOCGIFCONF	0x8912		/* get iface list		*/
-#define SIOCGIFFLAGS	0x8913		/* get flags			*/
-#define SIOCSIFFLAGS	0x8914		/* set flags			*/
-#define SIOCGIFADDR	0x8915		/* get PA address		*/
-#define SIOCSIFADDR	0x8916		/* set PA address		*/
-#define SIOCGIFDSTADDR	0x8917		/* get remote PA address	*/
-#define SIOCSIFDSTADDR	0x8918		/* set remote PA address	*/
-#define SIOCGIFBRDADDR	0x8919		/* get broadcast PA address	*/
-#define SIOCSIFBRDADDR	0x891a		/* set broadcast PA address	*/
-#define SIOCGIFNETMASK	0x891b		/* get network PA mask		*/
-#define SIOCSIFNETMASK	0x891c		/* set network PA mask		*/
-#define SIOCGIFMETRIC	0x891d		/* get metric			*/
-#define SIOCSIFMETRIC	0x891e		/* set metric			*/
-#define SIOCGIFMEM	0x891f		/* get memory address (BSD)	*/
-#define SIOCSIFMEM	0x8920		/* set memory address (BSD)	*/
-#define SIOCGIFMTU	0x8921		/* get MTU size			*/
-#define SIOCSIFMTU	0x8922		/* set MTU size			*/
-#define SIOCSIFNAME	0x8923		/* set interface name */
-#define	SIOCSIFHWADDR	0x8924		/* set hardware address 	*/
-#define SIOCGIFENCAP	0x8925		/* get/set encapsulations       */
-#define SIOCSIFENCAP	0x8926		
-#define SIOCGIFHWADDR	0x8927		/* Get hardware address		*/
-#define SIOCGIFSLAVE	0x8929		/* Driver slaving support	*/
-#define SIOCSIFSLAVE	0x8930
-#define SIOCADDMULTI	0x8931		/* Multicast address lists	*/
-#define SIOCDELMULTI	0x8932
-#define SIOCGIFINDEX	0x8933		/* name -> if_index mapping	*/
-#define SIOGIFINDEX	SIOCGIFINDEX	/* misprint compatibility :-)	*/
-#define SIOCSIFPFLAGS	0x8934		/* set/get extended flags set	*/
-#define SIOCGIFPFLAGS	0x8935
-#define SIOCDIFADDR	0x8936		/* delete PA address		*/
-#define	SIOCSIFHWBROADCAST	0x8937	/* set hardware broadcast addr	*/
-#define SIOCGIFCOUNT	0x8938		/* get number of devices */
-#define SIOCKILLADDR	0x8939		/* kill sockets with this local addr */
-
-#define SIOCGIFBR	0x8940		/* Bridging support		*/
-#define SIOCSIFBR	0x8941		/* Set bridging options 	*/
-
-#define SIOCGIFTXQLEN	0x8942		/* Get the tx queue length	*/
-#define SIOCSIFTXQLEN	0x8943		/* Set the tx queue length 	*/
-
-/* SIOCGIFDIVERT was:	0x8944		Frame diversion support */
-/* SIOCSIFDIVERT was:	0x8945		Set frame diversion options */
-
-#define SIOCETHTOOL	0x8946		/* Ethtool interface		*/
-
-#define SIOCGMIIPHY	0x8947		/* Get address of MII PHY in use. */
-#define SIOCGMIIREG	0x8948		/* Read MII PHY register.	*/
-#define SIOCSMIIREG	0x8949		/* Write MII PHY register.	*/
-
-#define SIOCWANDEV	0x894A		/* get/set netdev parameters	*/
-
-#define SIOCOUTQNSD	0x894B		/* output queue size (not sent only) */
-
-/* ARP cache control calls. */
-		    /*  0x8950 - 0x8952  * obsolete calls, don't re-use */
-#define SIOCDARP	0x8953		/* delete ARP table entry	*/
-#define SIOCGARP	0x8954		/* get ARP table entry		*/
-#define SIOCSARP	0x8955		/* set ARP table entry		*/
-
-/* RARP cache control calls. */
-#define SIOCDRARP	0x8960		/* delete RARP table entry	*/
-#define SIOCGRARP	0x8961		/* get RARP table entry		*/
-#define SIOCSRARP	0x8962		/* set RARP table entry		*/
-
-/* Driver configuration calls */
-
-#define SIOCGIFMAP	0x8970		/* Get device parameters	*/
-#define SIOCSIFMAP	0x8971		/* Set device parameters	*/
-
-/* DLCI configuration calls */
-
-#define SIOCADDDLCI	0x8980		/* Create new DLCI device	*/
-#define SIOCDELDLCI	0x8981		/* Delete DLCI device		*/
-
-#define SIOCGIFVLAN	0x8982		/* 802.1Q VLAN support		*/
-#define SIOCSIFVLAN	0x8983		/* Set 802.1Q VLAN options 	*/
-
-/* bonding calls */
-
-#define SIOCBONDENSLAVE	0x8990		/* enslave a device to the bond */
-#define SIOCBONDRELEASE 0x8991		/* release a slave from the bond*/
-#define SIOCBONDSETHWADDR      0x8992	/* set the hw addr of the bond  */
-#define SIOCBONDSLAVEINFOQUERY 0x8993   /* rtn info about slave state   */
-#define SIOCBONDINFOQUERY      0x8994	/* rtn info about bond state    */
-#define SIOCBONDCHANGEACTIVE   0x8995   /* update to a new active slave */
-			
-/* bridge calls */
-#define SIOCBRADDBR     0x89a0		/* create new bridge device     */
-#define SIOCBRDELBR     0x89a1		/* remove bridge device         */
-#define SIOCBRADDIF	0x89a2		/* add interface to bridge      */
-#define SIOCBRDELIF	0x89a3		/* remove interface from bridge */
-
-/* hardware time stamping: parameters in linux/net_tstamp.h */
-#define SIOCSHWTSTAMP	0x89b0		/* set and get config		*/
-#define SIOCGHWTSTAMP	0x89b1		/* get config			*/
-
-/* Device private ioctl calls */
-
-/*
- *	These 16 ioctls are available to devices via the do_ioctl() device
- *	vector. Each device should include this file and redefine these names
- *	as their own. Because these are device dependent it is a good idea
- *	_NOT_ to issue them to random objects and hope.
- *
- *	THESE IOCTLS ARE _DEPRECATED_ AND WILL DISAPPEAR IN 2.5.X -DaveM
- */
- 
-#define SIOCDEVPRIVATE	0x89F0	/* to 89FF */
-
-/*
- *	These 16 ioctl calls are protocol private
- */
- 
-#define SIOCPROTOPRIVATE 0x89E0 /* to 89EF */
-#endif	/* _LINUX_SOCKIOS_H */

diff --git a/k318/original-kernel-headers/sound/asound.h b/k318/original-kernel-headers/sound/asound.h
deleted file mode 100644
index fe40f8e..0000000
--- a/k318/original-kernel-headers/sound/asound.h
+++ /dev/null

@@ -1,986 +0,0 @@
-/*
- *  Advanced Linux Sound Architecture - ALSA - Driver
- *  Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
- *                             Abramo Bagnara <abramo@alsa-project.org>
- *
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
- *
- */
-
-#ifndef _UAPI__SOUND_ASOUND_H
-#define _UAPI__SOUND_ASOUND_H
-
-#include <linux/types.h>
-
-
-/*
- *  protocol version
- */
-
-#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
-#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
-#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
-#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
-#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
-	(SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
-	 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
-	   SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
-
-/****************************************************************************
- *                                                                          *
- *        Digital audio interface					    *
- *                                                                          *
- ****************************************************************************/
-
-struct snd_aes_iec958 {
-	unsigned char status[24];	/* AES/IEC958 channel status bits */
-	unsigned char subcode[147];	/* AES/IEC958 subcode bits */
-	unsigned char pad;		/* nothing */
-	unsigned char dig_subframe[4];	/* AES/IEC958 subframe bits */
-};
-
-/****************************************************************************
- *                                                                          *
- *        CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort		    *
- *                                                                          *
- ****************************************************************************/
-
-struct snd_cea_861_aud_if {
-	unsigned char db1_ct_cc; /* coding type and channel count */
-	unsigned char db2_sf_ss; /* sample frequency and size */
-	unsigned char db3; /* not used, all zeros */
-	unsigned char db4_ca; /* channel allocation code */
-	unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
-};
-
-/****************************************************************************
- *                                                                          *
- *      Section for driver hardware dependent interface - /dev/snd/hw?      *
- *                                                                          *
- ****************************************************************************/
-
-#define SNDRV_HWDEP_VERSION		SNDRV_PROTOCOL_VERSION(1, 0, 1)
-
-enum {
-	SNDRV_HWDEP_IFACE_OPL2 = 0,
-	SNDRV_HWDEP_IFACE_OPL3,
-	SNDRV_HWDEP_IFACE_OPL4,
-	SNDRV_HWDEP_IFACE_SB16CSP,	/* Creative Signal Processor */
-	SNDRV_HWDEP_IFACE_EMU10K1,	/* FX8010 processor in EMU10K1 chip */
-	SNDRV_HWDEP_IFACE_YSS225,	/* Yamaha FX processor */
-	SNDRV_HWDEP_IFACE_ICS2115,	/* Wavetable synth */
-	SNDRV_HWDEP_IFACE_SSCAPE,	/* Ensoniq SoundScape ISA card (MC68EC000) */
-	SNDRV_HWDEP_IFACE_VX,		/* Digigram VX cards */
-	SNDRV_HWDEP_IFACE_MIXART,	/* Digigram miXart cards */
-	SNDRV_HWDEP_IFACE_USX2Y,	/* Tascam US122, US224 & US428 usb */
-	SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */	
-	SNDRV_HWDEP_IFACE_BLUETOOTH,	/* Bluetooth audio */
-	SNDRV_HWDEP_IFACE_USX2Y_PCM,	/* Tascam US122, US224 & US428 rawusb pcm */
-	SNDRV_HWDEP_IFACE_PCXHR,	/* Digigram PCXHR */
-	SNDRV_HWDEP_IFACE_SB_RC,	/* SB Extigy/Audigy2NX remote control */
-	SNDRV_HWDEP_IFACE_HDA,		/* HD-audio */
-	SNDRV_HWDEP_IFACE_USB_STREAM,	/* direct access to usb stream */
-	SNDRV_HWDEP_IFACE_FW_DICE,	/* TC DICE FireWire device */
-	SNDRV_HWDEP_IFACE_FW_FIREWORKS,	/* Echo Audio Fireworks based device */
-	SNDRV_HWDEP_IFACE_FW_BEBOB,	/* BridgeCo BeBoB based device */
-	SNDRV_HWDEP_IFACE_AUDIO_BE,	/* Backend Audio Control */
-	SNDRV_HWDEP_IFACE_AUDIO_CODEC,  /* codec Audio Control */
-
-	/* Don't forget to change the following: */
-	SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_AUDIO_CODEC
-};
-
-struct snd_hwdep_info {
-	unsigned int device;		/* WR: device number */
-	int card;			/* R: card number */
-	unsigned char id[64];		/* ID (user selectable) */
-	unsigned char name[80];		/* hwdep name */
-	int iface;			/* hwdep interface */
-	unsigned char reserved[64];	/* reserved for future */
-};
-
-/* generic DSP loader */
-struct snd_hwdep_dsp_status {
-	unsigned int version;		/* R: driver-specific version */
-	unsigned char id[32];		/* R: driver-specific ID string */
-	unsigned int num_dsps;		/* R: number of DSP images to transfer */
-	unsigned int dsp_loaded;	/* R: bit flags indicating the loaded DSPs */
-	unsigned int chip_ready;	/* R: 1 = initialization finished */
-	unsigned char reserved[16];	/* reserved for future use */
-};
-
-struct snd_hwdep_dsp_image {
-	unsigned int index;		/* W: DSP index */
-	unsigned char name[64];		/* W: ID (e.g. file name) */
-	unsigned char __user *image;	/* W: binary image */
-	size_t length;			/* W: size of image in bytes */
-	unsigned long driver_data;	/* W: driver-specific data */
-};
-
-#define SNDRV_HWDEP_IOCTL_PVERSION	_IOR ('H', 0x00, int)
-#define SNDRV_HWDEP_IOCTL_INFO		_IOR ('H', 0x01, struct snd_hwdep_info)
-#define SNDRV_HWDEP_IOCTL_DSP_STATUS	_IOR('H', 0x02, struct snd_hwdep_dsp_status)
-#define SNDRV_HWDEP_IOCTL_DSP_LOAD	_IOW('H', 0x03, struct snd_hwdep_dsp_image)
-
-/*****************************************************************************
- *                                                                           *
- *             Digital Audio (PCM) interface - /dev/snd/pcm??                *
- *                                                                           *
- *****************************************************************************/
-
-#define SNDRV_PCM_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 12)
-
-typedef unsigned long snd_pcm_uframes_t;
-typedef signed long snd_pcm_sframes_t;
-
-enum {
-	SNDRV_PCM_CLASS_GENERIC = 0,	/* standard mono or stereo device */
-	SNDRV_PCM_CLASS_MULTI,		/* multichannel device */
-	SNDRV_PCM_CLASS_MODEM,		/* software modem class */
-	SNDRV_PCM_CLASS_DIGITIZER,	/* digitizer class */
-	/* Don't forget to change the following: */
-	SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
-};
-
-enum {
-	SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
-	SNDRV_PCM_SUBCLASS_MULTI_MIX,	/* multichannel subdevices are mixed together */
-	/* Don't forget to change the following: */
-	SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
-};
-
-enum {
-	SNDRV_PCM_STREAM_PLAYBACK = 0,
-	SNDRV_PCM_STREAM_CAPTURE,
-	SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
-};
-
-typedef int __bitwise snd_pcm_access_t;
-#define	SNDRV_PCM_ACCESS_MMAP_INTERLEAVED	((__force snd_pcm_access_t) 0) /* interleaved mmap */
-#define	SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED	((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
-#define	SNDRV_PCM_ACCESS_MMAP_COMPLEX		((__force snd_pcm_access_t) 2) /* complex mmap */
-#define	SNDRV_PCM_ACCESS_RW_INTERLEAVED		((__force snd_pcm_access_t) 3) /* readi/writei */
-#define	SNDRV_PCM_ACCESS_RW_NONINTERLEAVED	((__force snd_pcm_access_t) 4) /* readn/writen */
-#define	SNDRV_PCM_ACCESS_LAST		SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
-
-typedef int __bitwise snd_pcm_format_t;
-#define	SNDRV_PCM_FORMAT_S8	((__force snd_pcm_format_t) 0)
-#define	SNDRV_PCM_FORMAT_U8	((__force snd_pcm_format_t) 1)
-#define	SNDRV_PCM_FORMAT_S16_LE	((__force snd_pcm_format_t) 2)
-#define	SNDRV_PCM_FORMAT_S16_BE	((__force snd_pcm_format_t) 3)
-#define	SNDRV_PCM_FORMAT_U16_LE	((__force snd_pcm_format_t) 4)
-#define	SNDRV_PCM_FORMAT_U16_BE	((__force snd_pcm_format_t) 5)
-#define	SNDRV_PCM_FORMAT_S24_LE	((__force snd_pcm_format_t) 6) /* low three bytes */
-#define	SNDRV_PCM_FORMAT_S24_BE	((__force snd_pcm_format_t) 7) /* low three bytes */
-#define	SNDRV_PCM_FORMAT_U24_LE	((__force snd_pcm_format_t) 8) /* low three bytes */
-#define	SNDRV_PCM_FORMAT_U24_BE	((__force snd_pcm_format_t) 9) /* low three bytes */
-#define	SNDRV_PCM_FORMAT_S32_LE	((__force snd_pcm_format_t) 10)
-#define	SNDRV_PCM_FORMAT_S32_BE	((__force snd_pcm_format_t) 11)
-#define	SNDRV_PCM_FORMAT_U32_LE	((__force snd_pcm_format_t) 12)
-#define	SNDRV_PCM_FORMAT_U32_BE	((__force snd_pcm_format_t) 13)
-#define	SNDRV_PCM_FORMAT_FLOAT_LE	((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
-#define	SNDRV_PCM_FORMAT_FLOAT_BE	((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
-#define	SNDRV_PCM_FORMAT_FLOAT64_LE	((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
-#define	SNDRV_PCM_FORMAT_FLOAT64_BE	((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
-#define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
-#define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
-#define	SNDRV_PCM_FORMAT_MU_LAW		((__force snd_pcm_format_t) 20)
-#define	SNDRV_PCM_FORMAT_A_LAW		((__force snd_pcm_format_t) 21)
-#define	SNDRV_PCM_FORMAT_IMA_ADPCM	((__force snd_pcm_format_t) 22)
-#define	SNDRV_PCM_FORMAT_MPEG		((__force snd_pcm_format_t) 23)
-#define	SNDRV_PCM_FORMAT_GSM		((__force snd_pcm_format_t) 24)
-#define	SNDRV_PCM_FORMAT_SPECIAL	((__force snd_pcm_format_t) 31)
-#define	SNDRV_PCM_FORMAT_S24_3LE	((__force snd_pcm_format_t) 32)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_S24_3BE	((__force snd_pcm_format_t) 33)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U24_3LE	((__force snd_pcm_format_t) 34)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U24_3BE	((__force snd_pcm_format_t) 35)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_S20_3LE	((__force snd_pcm_format_t) 36)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_S20_3BE	((__force snd_pcm_format_t) 37)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U20_3LE	((__force snd_pcm_format_t) 38)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U20_3BE	((__force snd_pcm_format_t) 39)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_S18_3LE	((__force snd_pcm_format_t) 40)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_S18_3BE	((__force snd_pcm_format_t) 41)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U18_3LE	((__force snd_pcm_format_t) 42)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_U18_3BE	((__force snd_pcm_format_t) 43)	/* in three bytes */
-#define	SNDRV_PCM_FORMAT_G723_24	((__force snd_pcm_format_t) 44) /* 8 samples in 3 bytes */
-#define	SNDRV_PCM_FORMAT_G723_24_1B	((__force snd_pcm_format_t) 45) /* 1 sample in 1 byte */
-#define	SNDRV_PCM_FORMAT_G723_40	((__force snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */
-#define	SNDRV_PCM_FORMAT_G723_40_1B	((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
-#define	SNDRV_PCM_FORMAT_DSD_U8		((__force snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */
-#define	SNDRV_PCM_FORMAT_DSD_U16_LE	((__force snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */
-#define	SNDRV_PCM_FORMAT_DSD_U32_LE	((__force snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */
-#define	SNDRV_PCM_FORMAT_DSD_U16_BE	((__force snd_pcm_format_t) 51) /* DSD, 2-byte samples DSD (x16), big endian */
-#define	SNDRV_PCM_FORMAT_DSD_U32_BE	((__force snd_pcm_format_t) 52) /* DSD, 4-byte samples DSD (x32), big endian */
-#define	SNDRV_PCM_FORMAT_LAST		SNDRV_PCM_FORMAT_DSD_U32_BE
-
-#ifdef SNDRV_LITTLE_ENDIAN
-#define	SNDRV_PCM_FORMAT_S16		SNDRV_PCM_FORMAT_S16_LE
-#define	SNDRV_PCM_FORMAT_U16		SNDRV_PCM_FORMAT_U16_LE
-#define	SNDRV_PCM_FORMAT_S24		SNDRV_PCM_FORMAT_S24_LE
-#define	SNDRV_PCM_FORMAT_U24		SNDRV_PCM_FORMAT_U24_LE
-#define	SNDRV_PCM_FORMAT_S32		SNDRV_PCM_FORMAT_S32_LE
-#define	SNDRV_PCM_FORMAT_U32		SNDRV_PCM_FORMAT_U32_LE
-#define	SNDRV_PCM_FORMAT_FLOAT		SNDRV_PCM_FORMAT_FLOAT_LE
-#define	SNDRV_PCM_FORMAT_FLOAT64	SNDRV_PCM_FORMAT_FLOAT64_LE
-#define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
-#endif
-#ifdef SNDRV_BIG_ENDIAN
-#define	SNDRV_PCM_FORMAT_S16		SNDRV_PCM_FORMAT_S16_BE
-#define	SNDRV_PCM_FORMAT_U16		SNDRV_PCM_FORMAT_U16_BE
-#define	SNDRV_PCM_FORMAT_S24		SNDRV_PCM_FORMAT_S24_BE
-#define	SNDRV_PCM_FORMAT_U24		SNDRV_PCM_FORMAT_U24_BE
-#define	SNDRV_PCM_FORMAT_S32		SNDRV_PCM_FORMAT_S32_BE
-#define	SNDRV_PCM_FORMAT_U32		SNDRV_PCM_FORMAT_U32_BE
-#define	SNDRV_PCM_FORMAT_FLOAT		SNDRV_PCM_FORMAT_FLOAT_BE
-#define	SNDRV_PCM_FORMAT_FLOAT64	SNDRV_PCM_FORMAT_FLOAT64_BE
-#define	SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
-#endif
-
-typedef int __bitwise snd_pcm_subformat_t;
-#define	SNDRV_PCM_SUBFORMAT_STD		((__force snd_pcm_subformat_t) 0)
-#define	SNDRV_PCM_SUBFORMAT_LAST	SNDRV_PCM_SUBFORMAT_STD
-
-#define SNDRV_PCM_INFO_MMAP		0x00000001	/* hardware supports mmap */
-#define SNDRV_PCM_INFO_MMAP_VALID	0x00000002	/* period data are valid during transfer */
-#define SNDRV_PCM_INFO_DOUBLE		0x00000004	/* Double buffering needed for PCM start/stop */
-#define SNDRV_PCM_INFO_BATCH		0x00000010	/* double buffering */
-#define SNDRV_PCM_INFO_INTERLEAVED	0x00000100	/* channels are interleaved */
-#define SNDRV_PCM_INFO_NONINTERLEAVED	0x00000200	/* channels are not interleaved */
-#define SNDRV_PCM_INFO_COMPLEX		0x00000400	/* complex frame organization (mmap only) */
-#define SNDRV_PCM_INFO_BLOCK_TRANSFER	0x00010000	/* hardware transfer block of samples */
-#define SNDRV_PCM_INFO_OVERRANGE	0x00020000	/* hardware supports ADC (capture) overrange detection */
-#define SNDRV_PCM_INFO_RESUME		0x00040000	/* hardware supports stream resume after suspend */
-#define SNDRV_PCM_INFO_PAUSE		0x00080000	/* pause ioctl is supported */
-#define SNDRV_PCM_INFO_HALF_DUPLEX	0x00100000	/* only half duplex */
-#define SNDRV_PCM_INFO_JOINT_DUPLEX	0x00200000	/* playback and capture stream are somewhat correlated */
-#define SNDRV_PCM_INFO_SYNC_START	0x00400000	/* pcm support some kind of sync go */
-#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP	0x00800000	/* period wakeup can be disabled */
-#define SNDRV_PCM_INFO_HAS_WALL_CLOCK   0x01000000      /* has audio wall clock for audio/system time sync */
-#define SNDRV_PCM_INFO_FIFO_IN_FRAMES	0x80000000	/* internal kernel flag - FIFO size is in frames */
-
-typedef int __bitwise snd_pcm_state_t;
-#define	SNDRV_PCM_STATE_OPEN		((__force snd_pcm_state_t) 0) /* stream is open */
-#define	SNDRV_PCM_STATE_SETUP		((__force snd_pcm_state_t) 1) /* stream has a setup */
-#define	SNDRV_PCM_STATE_PREPARED	((__force snd_pcm_state_t) 2) /* stream is ready to start */
-#define	SNDRV_PCM_STATE_RUNNING		((__force snd_pcm_state_t) 3) /* stream is running */
-#define	SNDRV_PCM_STATE_XRUN		((__force snd_pcm_state_t) 4) /* stream reached an xrun */
-#define	SNDRV_PCM_STATE_DRAINING	((__force snd_pcm_state_t) 5) /* stream is draining */
-#define	SNDRV_PCM_STATE_PAUSED		((__force snd_pcm_state_t) 6) /* stream is paused */
-#define	SNDRV_PCM_STATE_SUSPENDED	((__force snd_pcm_state_t) 7) /* hardware is suspended */
-#define	SNDRV_PCM_STATE_DISCONNECTED	((__force snd_pcm_state_t) 8) /* hardware is disconnected */
-#define	SNDRV_PCM_STATE_LAST		SNDRV_PCM_STATE_DISCONNECTED
-
-enum {
-	SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
-	SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
-	SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
-};
-
-union snd_pcm_sync_id {
-	unsigned char id[16];
-	unsigned short id16[8];
-	unsigned int id32[4];
-};
-
-struct snd_pcm_info {
-	unsigned int device;		/* RO/WR (control): device number */
-	unsigned int subdevice;		/* RO/WR (control): subdevice number */
-	int stream;			/* RO/WR (control): stream direction */
-	int card;			/* R: card number */
-	unsigned char id[64];		/* ID (user selectable) */
-	unsigned char name[80];		/* name of this device */
-	unsigned char subname[32];	/* subdevice name */
-	int dev_class;			/* SNDRV_PCM_CLASS_* */
-	int dev_subclass;		/* SNDRV_PCM_SUBCLASS_* */
-	unsigned int subdevices_count;
-	unsigned int subdevices_avail;
-	union snd_pcm_sync_id sync;	/* hardware synchronization ID */
-	unsigned char reserved[64];	/* reserved for future... */
-};
-
-typedef int snd_pcm_hw_param_t;
-#define	SNDRV_PCM_HW_PARAM_ACCESS	0	/* Access type */
-#define	SNDRV_PCM_HW_PARAM_FORMAT	1	/* Format */
-#define	SNDRV_PCM_HW_PARAM_SUBFORMAT	2	/* Subformat */
-#define	SNDRV_PCM_HW_PARAM_FIRST_MASK	SNDRV_PCM_HW_PARAM_ACCESS
-#define	SNDRV_PCM_HW_PARAM_LAST_MASK	SNDRV_PCM_HW_PARAM_SUBFORMAT
-
-#define	SNDRV_PCM_HW_PARAM_SAMPLE_BITS	8	/* Bits per sample */
-#define	SNDRV_PCM_HW_PARAM_FRAME_BITS	9	/* Bits per frame */
-#define	SNDRV_PCM_HW_PARAM_CHANNELS	10	/* Channels */
-#define	SNDRV_PCM_HW_PARAM_RATE		11	/* Approx rate */
-#define	SNDRV_PCM_HW_PARAM_PERIOD_TIME	12	/* Approx distance between
-						 * interrupts in us
-						 */
-#define	SNDRV_PCM_HW_PARAM_PERIOD_SIZE	13	/* Approx frames between
-						 * interrupts
-						 */
-#define	SNDRV_PCM_HW_PARAM_PERIOD_BYTES	14	/* Approx bytes between
-						 * interrupts
-						 */
-#define	SNDRV_PCM_HW_PARAM_PERIODS	15	/* Approx interrupts per
-						 * buffer
-						 */
-#define	SNDRV_PCM_HW_PARAM_BUFFER_TIME	16	/* Approx duration of buffer
-						 * in us
-						 */
-#define	SNDRV_PCM_HW_PARAM_BUFFER_SIZE	17	/* Size of buffer in frames */
-#define	SNDRV_PCM_HW_PARAM_BUFFER_BYTES	18	/* Size of buffer in bytes */
-#define	SNDRV_PCM_HW_PARAM_TICK_TIME	19	/* Approx tick duration in us */
-#define	SNDRV_PCM_HW_PARAM_FIRST_INTERVAL	SNDRV_PCM_HW_PARAM_SAMPLE_BITS
-#define	SNDRV_PCM_HW_PARAM_LAST_INTERVAL	SNDRV_PCM_HW_PARAM_TICK_TIME
-
-#define SNDRV_PCM_HW_PARAMS_NORESAMPLE	(1<<0)	/* avoid rate resampling */
-#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER	(1<<1)	/* export buffer */
-#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP	(1<<2)	/* disable period wakeups */
-
-struct snd_interval {
-	unsigned int min, max;
-	unsigned int openmin:1,
-		     openmax:1,
-		     integer:1,
-		     empty:1;
-};
-
-#define SNDRV_MASK_MAX	256
-
-struct snd_mask {
-	__u32 bits[(SNDRV_MASK_MAX+31)/32];
-};
-
-struct snd_pcm_hw_params {
-	unsigned int flags;
-	struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - 
-			       SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
-	struct snd_mask mres[5];	/* reserved masks */
-	struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
-				        SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
-	struct snd_interval ires[9];	/* reserved intervals */
-	unsigned int rmask;		/* W: requested masks */
-	unsigned int cmask;		/* R: changed masks */
-	unsigned int info;		/* R: Info flags for returned setup */
-	unsigned int msbits;		/* R: used most significant bits */
-	unsigned int rate_num;		/* R: rate numerator */
-	unsigned int rate_den;		/* R: rate denominator */
-	snd_pcm_uframes_t fifo_size;	/* R: chip FIFO size in frames */
-	unsigned char reserved[64];	/* reserved for future */
-};
-
-enum {
-	SNDRV_PCM_TSTAMP_NONE = 0,
-	SNDRV_PCM_TSTAMP_ENABLE,
-	SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
-};
-
-struct snd_pcm_sw_params {
-	int tstamp_mode;			/* timestamp mode */
-	unsigned int period_step;
-	unsigned int sleep_min;			/* min ticks to sleep */
-	snd_pcm_uframes_t avail_min;		/* min avail frames for wakeup */
-	snd_pcm_uframes_t xfer_align;		/* obsolete: xfer size need to be a multiple */
-	snd_pcm_uframes_t start_threshold;	/* min hw_avail frames for automatic start */
-	snd_pcm_uframes_t stop_threshold;	/* min avail frames for automatic stop */
-	snd_pcm_uframes_t silence_threshold;	/* min distance from noise for silence filling */
-	snd_pcm_uframes_t silence_size;		/* silence block size */
-	snd_pcm_uframes_t boundary;		/* pointers wrap point */
-	unsigned int proto;			/* protocol version */
-	unsigned int tstamp_type;		/* timestamp type (req. proto >= 2.0.12) */
-	unsigned char reserved[56];		/* reserved for future */
-};
-
-struct snd_pcm_channel_info {
-	unsigned int channel;
-	__kernel_off_t offset;		/* mmap offset */
-	unsigned int first;		/* offset to first sample in bits */
-	unsigned int step;		/* samples distance in bits */
-};
-
-struct snd_pcm_status {
-	snd_pcm_state_t state;		/* stream state */
-	struct timespec trigger_tstamp;	/* time when stream was started/stopped/paused */
-	struct timespec tstamp;		/* reference timestamp */
-	snd_pcm_uframes_t appl_ptr;	/* appl ptr */
-	snd_pcm_uframes_t hw_ptr;	/* hw ptr */
-	snd_pcm_sframes_t delay;	/* current delay in frames */
-	snd_pcm_uframes_t avail;	/* number of frames available */
-	snd_pcm_uframes_t avail_max;	/* max frames available on hw since last status */
-	snd_pcm_uframes_t overrange;	/* count of ADC (capture) overrange detections from last status */
-	snd_pcm_state_t suspended_state; /* suspended stream state */
-	__u32 reserved_alignment;	/* must be filled with zero */
-	struct timespec audio_tstamp;	/* from sample counter or wall clock */
-	unsigned char reserved[56-sizeof(struct timespec)]; /* must be filled with zero */
-};
-
-struct snd_pcm_mmap_status {
-	snd_pcm_state_t state;		/* RO: state - SNDRV_PCM_STATE_XXXX */
-	int pad1;			/* Needed for 64 bit alignment */
-	snd_pcm_uframes_t hw_ptr;	/* RO: hw ptr (0...boundary-1) */
-	struct timespec tstamp;		/* Timestamp */
-	snd_pcm_state_t suspended_state; /* RO: suspended stream state */
-	struct timespec audio_tstamp;	/* from sample counter or wall clock */
-};
-
-struct snd_pcm_mmap_control {
-	snd_pcm_uframes_t appl_ptr;	/* RW: appl ptr (0...boundary-1) */
-	snd_pcm_uframes_t avail_min;	/* RW: min available frames for wakeup */
-};
-
-#define SNDRV_PCM_SYNC_PTR_HWSYNC	(1<<0)	/* execute hwsync */
-#define SNDRV_PCM_SYNC_PTR_APPL		(1<<1)	/* get appl_ptr from driver (r/w op) */
-#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN	(1<<2)	/* get avail_min from driver */
-
-struct snd_pcm_sync_ptr {
-	unsigned int flags;
-	union {
-		struct snd_pcm_mmap_status status;
-		unsigned char reserved[64];
-	} s;
-	union {
-		struct snd_pcm_mmap_control control;
-		unsigned char reserved[64];
-	} c;
-};
-
-struct snd_xferi {
-	snd_pcm_sframes_t result;
-	void __user *buf;
-	snd_pcm_uframes_t frames;
-};
-
-struct snd_xfern {
-	snd_pcm_sframes_t result;
-	void __user * __user *bufs;
-	snd_pcm_uframes_t frames;
-};
-
-enum {
-	SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,	/* gettimeofday equivalent */
-	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,	/* posix_clock_monotonic equivalent */
-	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,    /* monotonic_raw (no NTP) */
-	SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
-};
-
-/* channel positions */
-enum {
-	SNDRV_CHMAP_UNKNOWN = 0,
-	SNDRV_CHMAP_NA,		/* N/A, silent */
-	SNDRV_CHMAP_MONO,	/* mono stream */
-	/* this follows the alsa-lib mixer channel value + 3 */
-	SNDRV_CHMAP_FL,		/* front left */
-	SNDRV_CHMAP_FR,		/* front right */
-	SNDRV_CHMAP_RL,		/* rear left */
-	SNDRV_CHMAP_RR,		/* rear right */
-	SNDRV_CHMAP_FC,		/* front center */
-	SNDRV_CHMAP_LFE,	/* LFE */
-	SNDRV_CHMAP_SL,		/* side left */
-	SNDRV_CHMAP_SR,		/* side right */
-	SNDRV_CHMAP_RC,		/* rear center */
-	/* new definitions */
-	SNDRV_CHMAP_FLC,	/* front left center */
-	SNDRV_CHMAP_FRC,	/* front right center */
-	SNDRV_CHMAP_RLC,	/* rear left center */
-	SNDRV_CHMAP_RRC,	/* rear right center */
-	SNDRV_CHMAP_FLW,	/* front left wide */
-	SNDRV_CHMAP_FRW,	/* front right wide */
-	SNDRV_CHMAP_FLH,	/* front left high */
-	SNDRV_CHMAP_FCH,	/* front center high */
-	SNDRV_CHMAP_FRH,	/* front right high */
-	SNDRV_CHMAP_TC,		/* top center */
-	SNDRV_CHMAP_TFL,	/* top front left */
-	SNDRV_CHMAP_TFR,	/* top front right */
-	SNDRV_CHMAP_TFC,	/* top front center */
-	SNDRV_CHMAP_TRL,	/* top rear left */
-	SNDRV_CHMAP_TRR,	/* top rear right */
-	SNDRV_CHMAP_TRC,	/* top rear center */
-	/* new definitions for UAC2 */
-	SNDRV_CHMAP_TFLC,	/* top front left center */
-	SNDRV_CHMAP_TFRC,	/* top front right center */
-	SNDRV_CHMAP_TSL,	/* top side left */
-	SNDRV_CHMAP_TSR,	/* top side right */
-	SNDRV_CHMAP_LLFE,	/* left LFE */
-	SNDRV_CHMAP_RLFE,	/* right LFE */
-	SNDRV_CHMAP_BC,		/* bottom center */
-	SNDRV_CHMAP_BLC,	/* bottom left center */
-	SNDRV_CHMAP_BRC,	/* bottom right center */
-	SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
-};
-
-#define SNDRV_CHMAP_POSITION_MASK	0xffff
-#define SNDRV_CHMAP_PHASE_INVERSE	(0x01 << 16)
-#define SNDRV_CHMAP_DRIVER_SPEC		(0x02 << 16)
-
-#define SNDRV_PCM_IOCTL_PVERSION	_IOR('A', 0x00, int)
-#define SNDRV_PCM_IOCTL_INFO		_IOR('A', 0x01, struct snd_pcm_info)
-#define SNDRV_PCM_IOCTL_TSTAMP		_IOW('A', 0x02, int)
-#define SNDRV_PCM_IOCTL_TTSTAMP		_IOW('A', 0x03, int)
-#define SNDRV_PCM_IOCTL_HW_REFINE	_IOWR('A', 0x10, struct snd_pcm_hw_params)
-#define SNDRV_PCM_IOCTL_HW_PARAMS	_IOWR('A', 0x11, struct snd_pcm_hw_params)
-#define SNDRV_PCM_IOCTL_HW_FREE		_IO('A', 0x12)
-#define SNDRV_PCM_IOCTL_SW_PARAMS	_IOWR('A', 0x13, struct snd_pcm_sw_params)
-#define SNDRV_PCM_IOCTL_STATUS		_IOR('A', 0x20, struct snd_pcm_status)
-#define SNDRV_PCM_IOCTL_DELAY		_IOR('A', 0x21, snd_pcm_sframes_t)
-#define SNDRV_PCM_IOCTL_HWSYNC		_IO('A', 0x22)
-#define SNDRV_PCM_IOCTL_SYNC_PTR	_IOWR('A', 0x23, struct snd_pcm_sync_ptr)
-#define SNDRV_PCM_IOCTL_CHANNEL_INFO	_IOR('A', 0x32, struct snd_pcm_channel_info)
-#define SNDRV_PCM_IOCTL_PREPARE		_IO('A', 0x40)
-#define SNDRV_PCM_IOCTL_RESET		_IO('A', 0x41)
-#define SNDRV_PCM_IOCTL_START		_IO('A', 0x42)
-#define SNDRV_PCM_IOCTL_DROP		_IO('A', 0x43)
-#define SNDRV_PCM_IOCTL_DRAIN		_IO('A', 0x44)
-#define SNDRV_PCM_IOCTL_PAUSE		_IOW('A', 0x45, int)
-#define SNDRV_PCM_IOCTL_REWIND		_IOW('A', 0x46, snd_pcm_uframes_t)
-#define SNDRV_PCM_IOCTL_RESUME		_IO('A', 0x47)
-#define SNDRV_PCM_IOCTL_XRUN		_IO('A', 0x48)
-#define SNDRV_PCM_IOCTL_FORWARD		_IOW('A', 0x49, snd_pcm_uframes_t)
-#define SNDRV_PCM_IOCTL_WRITEI_FRAMES	_IOW('A', 0x50, struct snd_xferi)
-#define SNDRV_PCM_IOCTL_READI_FRAMES	_IOR('A', 0x51, struct snd_xferi)
-#define SNDRV_PCM_IOCTL_WRITEN_FRAMES	_IOW('A', 0x52, struct snd_xfern)
-#define SNDRV_PCM_IOCTL_READN_FRAMES	_IOR('A', 0x53, struct snd_xfern)
-#define SNDRV_PCM_IOCTL_LINK		_IOW('A', 0x60, int)
-#define SNDRV_PCM_IOCTL_UNLINK		_IO('A', 0x61)
-
-/*****************************************************************************
- *                                                                           *
- *                            MIDI v1.0 interface                            *
- *                                                                           *
- *****************************************************************************/
-
-/*
- *  Raw MIDI section - /dev/snd/midi??
- */
-
-#define SNDRV_RAWMIDI_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 0)
-
-enum {
-	SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
-	SNDRV_RAWMIDI_STREAM_INPUT,
-	SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
-};
-
-#define SNDRV_RAWMIDI_INFO_OUTPUT		0x00000001
-#define SNDRV_RAWMIDI_INFO_INPUT		0x00000002
-#define SNDRV_RAWMIDI_INFO_DUPLEX		0x00000004
-
-struct snd_rawmidi_info {
-	unsigned int device;		/* RO/WR (control): device number */
-	unsigned int subdevice;		/* RO/WR (control): subdevice number */
-	int stream;			/* WR: stream */
-	int card;			/* R: card number */
-	unsigned int flags;		/* SNDRV_RAWMIDI_INFO_XXXX */
-	unsigned char id[64];		/* ID (user selectable) */
-	unsigned char name[80];		/* name of device */
-	unsigned char subname[32];	/* name of active or selected subdevice */
-	unsigned int subdevices_count;
-	unsigned int subdevices_avail;
-	unsigned char reserved[64];	/* reserved for future use */
-};
-
-struct snd_rawmidi_params {
-	int stream;
-	size_t buffer_size;		/* queue size in bytes */
-	size_t avail_min;		/* minimum avail bytes for wakeup */
-	unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
-	unsigned char reserved[16];	/* reserved for future use */
-};
-
-struct snd_rawmidi_status {
-	int stream;
-	struct timespec tstamp;		/* Timestamp */
-	size_t avail;			/* available bytes */
-	size_t xruns;			/* count of overruns since last status (in bytes) */
-	unsigned char reserved[16];	/* reserved for future use */
-};
-
-#define SNDRV_RAWMIDI_IOCTL_PVERSION	_IOR('W', 0x00, int)
-#define SNDRV_RAWMIDI_IOCTL_INFO	_IOR('W', 0x01, struct snd_rawmidi_info)
-#define SNDRV_RAWMIDI_IOCTL_PARAMS	_IOWR('W', 0x10, struct snd_rawmidi_params)
-#define SNDRV_RAWMIDI_IOCTL_STATUS	_IOWR('W', 0x20, struct snd_rawmidi_status)
-#define SNDRV_RAWMIDI_IOCTL_DROP	_IOW('W', 0x30, int)
-#define SNDRV_RAWMIDI_IOCTL_DRAIN	_IOW('W', 0x31, int)
-
-/*
- *  Timer section - /dev/snd/timer
- */
-
-#define SNDRV_TIMER_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 6)
-
-enum {
-	SNDRV_TIMER_CLASS_NONE = -1,
-	SNDRV_TIMER_CLASS_SLAVE = 0,
-	SNDRV_TIMER_CLASS_GLOBAL,
-	SNDRV_TIMER_CLASS_CARD,
-	SNDRV_TIMER_CLASS_PCM,
-	SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
-};
-
-/* slave timer classes */
-enum {
-	SNDRV_TIMER_SCLASS_NONE = 0,
-	SNDRV_TIMER_SCLASS_APPLICATION,
-	SNDRV_TIMER_SCLASS_SEQUENCER,		/* alias */
-	SNDRV_TIMER_SCLASS_OSS_SEQUENCER,	/* alias */
-	SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
-};
-
-/* global timers (device member) */
-#define SNDRV_TIMER_GLOBAL_SYSTEM	0
-#define SNDRV_TIMER_GLOBAL_RTC		1
-#define SNDRV_TIMER_GLOBAL_HPET		2
-#define SNDRV_TIMER_GLOBAL_HRTIMER	3
-
-/* info flags */
-#define SNDRV_TIMER_FLG_SLAVE		(1<<0)	/* cannot be controlled */
-
-struct snd_timer_id {
-	int dev_class;
-	int dev_sclass;
-	int card;
-	int device;
-	int subdevice;
-};
-
-struct snd_timer_ginfo {
-	struct snd_timer_id tid;	/* requested timer ID */
-	unsigned int flags;		/* timer flags - SNDRV_TIMER_FLG_* */
-	int card;			/* card number */
-	unsigned char id[64];		/* timer identification */
-	unsigned char name[80];		/* timer name */
-	unsigned long reserved0;	/* reserved for future use */
-	unsigned long resolution;	/* average period resolution in ns */
-	unsigned long resolution_min;	/* minimal period resolution in ns */
-	unsigned long resolution_max;	/* maximal period resolution in ns */
-	unsigned int clients;		/* active timer clients */
-	unsigned char reserved[32];
-};
-
-struct snd_timer_gparams {
-	struct snd_timer_id tid;	/* requested timer ID */
-	unsigned long period_num;	/* requested precise period duration (in seconds) - numerator */
-	unsigned long period_den;	/* requested precise period duration (in seconds) - denominator */
-	unsigned char reserved[32];
-};
-
-struct snd_timer_gstatus {
-	struct snd_timer_id tid;	/* requested timer ID */
-	unsigned long resolution;	/* current period resolution in ns */
-	unsigned long resolution_num;	/* precise current period resolution (in seconds) - numerator */
-	unsigned long resolution_den;	/* precise current period resolution (in seconds) - denominator */
-	unsigned char reserved[32];
-};
-
-struct snd_timer_select {
-	struct snd_timer_id id;	/* bind to timer ID */
-	unsigned char reserved[32];	/* reserved */
-};
-
-struct snd_timer_info {
-	unsigned int flags;		/* timer flags - SNDRV_TIMER_FLG_* */
-	int card;			/* card number */
-	unsigned char id[64];		/* timer identificator */
-	unsigned char name[80];		/* timer name */
-	unsigned long reserved0;	/* reserved for future use */
-	unsigned long resolution;	/* average period resolution in ns */
-	unsigned char reserved[64];	/* reserved */
-};
-
-#define SNDRV_TIMER_PSFLG_AUTO		(1<<0)	/* auto start, otherwise one-shot */
-#define SNDRV_TIMER_PSFLG_EXCLUSIVE	(1<<1)	/* exclusive use, precise start/stop/pause/continue */
-#define SNDRV_TIMER_PSFLG_EARLY_EVENT	(1<<2)	/* write early event to the poll queue */
-
-struct snd_timer_params {
-	unsigned int flags;		/* flags - SNDRV_MIXER_PSFLG_* */
-	unsigned int ticks;		/* requested resolution in ticks */
-	unsigned int queue_size;	/* total size of queue (32-1024) */
-	unsigned int reserved0;		/* reserved, was: failure locations */
-	unsigned int filter;		/* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
-	unsigned char reserved[60];	/* reserved */
-};
-
-struct snd_timer_status {
-	struct timespec tstamp;		/* Timestamp - last update */
-	unsigned int resolution;	/* current period resolution in ns */
-	unsigned int lost;		/* counter of master tick lost */
-	unsigned int overrun;		/* count of read queue overruns */
-	unsigned int queue;		/* used queue size */
-	unsigned char reserved[64];	/* reserved */
-};
-
-#define SNDRV_TIMER_IOCTL_PVERSION	_IOR('T', 0x00, int)
-#define SNDRV_TIMER_IOCTL_NEXT_DEVICE	_IOWR('T', 0x01, struct snd_timer_id)
-#define SNDRV_TIMER_IOCTL_TREAD		_IOW('T', 0x02, int)
-#define SNDRV_TIMER_IOCTL_GINFO		_IOWR('T', 0x03, struct snd_timer_ginfo)
-#define SNDRV_TIMER_IOCTL_GPARAMS	_IOW('T', 0x04, struct snd_timer_gparams)
-#define SNDRV_TIMER_IOCTL_GSTATUS	_IOWR('T', 0x05, struct snd_timer_gstatus)
-#define SNDRV_TIMER_IOCTL_SELECT	_IOW('T', 0x10, struct snd_timer_select)
-#define SNDRV_TIMER_IOCTL_INFO		_IOR('T', 0x11, struct snd_timer_info)
-#define SNDRV_TIMER_IOCTL_PARAMS	_IOW('T', 0x12, struct snd_timer_params)
-#define SNDRV_TIMER_IOCTL_STATUS	_IOR('T', 0x14, struct snd_timer_status)
-/* The following four ioctls are changed since 1.0.9 due to confliction */
-#define SNDRV_TIMER_IOCTL_START		_IO('T', 0xa0)
-#define SNDRV_TIMER_IOCTL_STOP		_IO('T', 0xa1)
-#define SNDRV_TIMER_IOCTL_CONTINUE	_IO('T', 0xa2)
-#define SNDRV_TIMER_IOCTL_PAUSE		_IO('T', 0xa3)
-
-struct snd_timer_read {
-	unsigned int resolution;
-	unsigned int ticks;
-};
-
-enum {
-	SNDRV_TIMER_EVENT_RESOLUTION = 0,	/* val = resolution in ns */
-	SNDRV_TIMER_EVENT_TICK,			/* val = ticks */
-	SNDRV_TIMER_EVENT_START,		/* val = resolution in ns */
-	SNDRV_TIMER_EVENT_STOP,			/* val = 0 */
-	SNDRV_TIMER_EVENT_CONTINUE,		/* val = resolution in ns */
-	SNDRV_TIMER_EVENT_PAUSE,		/* val = 0 */
-	SNDRV_TIMER_EVENT_EARLY,		/* val = 0, early event */
-	SNDRV_TIMER_EVENT_SUSPEND,		/* val = 0 */
-	SNDRV_TIMER_EVENT_RESUME,		/* val = resolution in ns */
-	/* master timer events for slave timer instances */
-	SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
-	SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
-	SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
-	SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
-	SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
-	SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
-};
-
-struct snd_timer_tread {
-	int event;
-	struct timespec tstamp;
-	unsigned int val;
-};
-
-/****************************************************************************
- *                                                                          *
- *        Section for driver control interface - /dev/snd/control?          *
- *                                                                          *
- ****************************************************************************/
-
-#define SNDRV_CTL_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 7)
-
-struct snd_ctl_card_info {
-	int card;			/* card number */
-	int pad;			/* reserved for future (was type) */
-	unsigned char id[16];		/* ID of card (user selectable) */
-	unsigned char driver[16];	/* Driver name */
-	unsigned char name[32];		/* Short name of soundcard */
-	unsigned char longname[80];	/* name + info text about soundcard */
-	unsigned char reserved_[16];	/* reserved for future (was ID of mixer) */
-	unsigned char mixername[80];	/* visual mixer identification */
-	unsigned char components[128];	/* card components / fine identification, delimited with one space (AC97 etc..) */
-};
-
-typedef int __bitwise snd_ctl_elem_type_t;
-#define	SNDRV_CTL_ELEM_TYPE_NONE	((__force snd_ctl_elem_type_t) 0) /* invalid */
-#define	SNDRV_CTL_ELEM_TYPE_BOOLEAN	((__force snd_ctl_elem_type_t) 1) /* boolean type */
-#define	SNDRV_CTL_ELEM_TYPE_INTEGER	((__force snd_ctl_elem_type_t) 2) /* integer type */
-#define	SNDRV_CTL_ELEM_TYPE_ENUMERATED	((__force snd_ctl_elem_type_t) 3) /* enumerated type */
-#define	SNDRV_CTL_ELEM_TYPE_BYTES	((__force snd_ctl_elem_type_t) 4) /* byte array */
-#define	SNDRV_CTL_ELEM_TYPE_IEC958	((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
-#define	SNDRV_CTL_ELEM_TYPE_INTEGER64	((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
-#define	SNDRV_CTL_ELEM_TYPE_LAST	SNDRV_CTL_ELEM_TYPE_INTEGER64
-
-typedef int __bitwise snd_ctl_elem_iface_t;
-#define	SNDRV_CTL_ELEM_IFACE_CARD	((__force snd_ctl_elem_iface_t) 0) /* global control */
-#define	SNDRV_CTL_ELEM_IFACE_HWDEP	((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
-#define	SNDRV_CTL_ELEM_IFACE_MIXER	((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
-#define	SNDRV_CTL_ELEM_IFACE_PCM	((__force snd_ctl_elem_iface_t) 3) /* PCM device */
-#define	SNDRV_CTL_ELEM_IFACE_RAWMIDI	((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
-#define	SNDRV_CTL_ELEM_IFACE_TIMER	((__force snd_ctl_elem_iface_t) 5) /* timer device */
-#define	SNDRV_CTL_ELEM_IFACE_SEQUENCER	((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
-#define	SNDRV_CTL_ELEM_IFACE_LAST	SNDRV_CTL_ELEM_IFACE_SEQUENCER
-
-#define SNDRV_CTL_ELEM_ACCESS_READ		(1<<0)
-#define SNDRV_CTL_ELEM_ACCESS_WRITE		(1<<1)
-#define SNDRV_CTL_ELEM_ACCESS_READWRITE		(SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
-#define SNDRV_CTL_ELEM_ACCESS_VOLATILE		(1<<2)	/* control value may be changed without a notification */
-#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP		(1<<3)	/* when was control changed */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_READ		(1<<4)	/* TLV read is possible */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE		(1<<5)	/* TLV write is possible */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE	(SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND	(1<<6)	/* TLV command is possible */
-#define SNDRV_CTL_ELEM_ACCESS_INACTIVE		(1<<8)	/* control does actually nothing, but may be updated */
-#define SNDRV_CTL_ELEM_ACCESS_LOCK		(1<<9)	/* write lock */
-#define SNDRV_CTL_ELEM_ACCESS_OWNER		(1<<10)	/* write lock owner */
-#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK	(1<<28)	/* kernel use a TLV callback */ 
-#define SNDRV_CTL_ELEM_ACCESS_USER		(1<<29) /* user space element */
-/* bits 30 and 31 are obsoleted (for indirect access) */
-
-/* for further details see the ACPI and PCI power management specification */
-#define SNDRV_CTL_POWER_D0		0x0000	/* full On */
-#define SNDRV_CTL_POWER_D1		0x0100	/* partial On */
-#define SNDRV_CTL_POWER_D2		0x0200	/* partial On */
-#define SNDRV_CTL_POWER_D3		0x0300	/* Off */
-#define SNDRV_CTL_POWER_D3hot		(SNDRV_CTL_POWER_D3|0x0000)	/* Off, with power */
-#define SNDRV_CTL_POWER_D3cold		(SNDRV_CTL_POWER_D3|0x0001)	/* Off, without power */
-
-#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN	44
-
-struct snd_ctl_elem_id {
-	unsigned int numid;		/* numeric identifier, zero = invalid */
-	snd_ctl_elem_iface_t iface;	/* interface identifier */
-	unsigned int device;		/* device/client number */
-	unsigned int subdevice;		/* subdevice (substream) number */
-	unsigned char name[44];		/* ASCII name of item */
-	unsigned int index;		/* index of item */
-};
-
-struct snd_ctl_elem_list {
-	unsigned int offset;		/* W: first element ID to get */
-	unsigned int space;		/* W: count of element IDs to get */
-	unsigned int used;		/* R: count of element IDs set */
-	unsigned int count;		/* R: count of all elements */
-	struct snd_ctl_elem_id __user *pids; /* R: IDs */
-	unsigned char reserved[50];
-};
-
-struct snd_ctl_elem_info {
-	struct snd_ctl_elem_id id;	/* W: element ID */
-	snd_ctl_elem_type_t type;	/* R: value type - SNDRV_CTL_ELEM_TYPE_* */
-	unsigned int access;		/* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
-	unsigned int count;		/* count of values */
-	__kernel_pid_t owner;		/* owner's PID of this control */
-	union {
-		struct {
-			long min;		/* R: minimum value */
-			long max;		/* R: maximum value */
-			long step;		/* R: step (0 variable) */
-		} integer;
-		struct {
-			long long min;		/* R: minimum value */
-			long long max;		/* R: maximum value */
-			long long step;		/* R: step (0 variable) */
-		} integer64;
-		struct {
-			unsigned int items;	/* R: number of items */
-			unsigned int item;	/* W: item number */
-			char name[64];		/* R: value name */
-			__u64 names_ptr;	/* W: names list (ELEM_ADD only) */
-			unsigned int names_length;
-		} enumerated;
-		unsigned char reserved[128];
-	} value;
-	union {
-		unsigned short d[4];		/* dimensions */
-		unsigned short *d_ptr;		/* indirect - obsoleted */
-	} dimen;
-	unsigned char reserved[64-4*sizeof(unsigned short)];
-};
-
-struct snd_ctl_elem_value {
-	struct snd_ctl_elem_id id;	/* W: element ID */
-	unsigned int indirect: 1;	/* W: indirect access - obsoleted */
-	union {
-		union {
-			long value[128];
-			long *value_ptr;	/* obsoleted */
-		} integer;
-		union {
-			long long value[64];
-			long long *value_ptr;	/* obsoleted */
-		} integer64;
-		union {
-			unsigned int item[128];
-			unsigned int *item_ptr;	/* obsoleted */
-		} enumerated;
-		union {
-			unsigned char data[512];
-			unsigned char *data_ptr;	/* obsoleted */
-		} bytes;
-		struct snd_aes_iec958 iec958;
-	} value;		/* RO */
-	struct timespec tstamp;
-	unsigned char reserved[128-sizeof(struct timespec)];
-};
-
-struct snd_ctl_tlv {
-	unsigned int numid;	/* control element numeric identification */
-	unsigned int length;	/* in bytes aligned to 4 */
-	unsigned int tlv[0];	/* first TLV */
-};
-
-#define SNDRV_CTL_IOCTL_PVERSION	_IOR('U', 0x00, int)
-#define SNDRV_CTL_IOCTL_CARD_INFO	_IOR('U', 0x01, struct snd_ctl_card_info)
-#define SNDRV_CTL_IOCTL_ELEM_LIST	_IOWR('U', 0x10, struct snd_ctl_elem_list)
-#define SNDRV_CTL_IOCTL_ELEM_INFO	_IOWR('U', 0x11, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_READ	_IOWR('U', 0x12, struct snd_ctl_elem_value)
-#define SNDRV_CTL_IOCTL_ELEM_WRITE	_IOWR('U', 0x13, struct snd_ctl_elem_value)
-#define SNDRV_CTL_IOCTL_ELEM_LOCK	_IOW('U', 0x14, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_ELEM_UNLOCK	_IOW('U', 0x15, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
-#define SNDRV_CTL_IOCTL_ELEM_ADD	_IOWR('U', 0x17, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_REPLACE	_IOWR('U', 0x18, struct snd_ctl_elem_info)
-#define SNDRV_CTL_IOCTL_ELEM_REMOVE	_IOWR('U', 0x19, struct snd_ctl_elem_id)
-#define SNDRV_CTL_IOCTL_TLV_READ	_IOWR('U', 0x1a, struct snd_ctl_tlv)
-#define SNDRV_CTL_IOCTL_TLV_WRITE	_IOWR('U', 0x1b, struct snd_ctl_tlv)
-#define SNDRV_CTL_IOCTL_TLV_COMMAND	_IOWR('U', 0x1c, struct snd_ctl_tlv)
-#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
-#define SNDRV_CTL_IOCTL_HWDEP_INFO	_IOR('U', 0x21, struct snd_hwdep_info)
-#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE	_IOR('U', 0x30, int)
-#define SNDRV_CTL_IOCTL_PCM_INFO	_IOWR('U', 0x31, struct snd_pcm_info)
-#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
-#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
-#define SNDRV_CTL_IOCTL_RAWMIDI_INFO	_IOWR('U', 0x41, struct snd_rawmidi_info)
-#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
-#define SNDRV_CTL_IOCTL_POWER		_IOWR('U', 0xd0, int)
-#define SNDRV_CTL_IOCTL_POWER_STATE	_IOR('U', 0xd1, int)
-
-/*
- *  Read interface.
- */
-
-enum sndrv_ctl_event_type {
-	SNDRV_CTL_EVENT_ELEM = 0,
-	SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
-};
-
-#define SNDRV_CTL_EVENT_MASK_VALUE	(1<<0)	/* element value was changed */
-#define SNDRV_CTL_EVENT_MASK_INFO	(1<<1)	/* element info was changed */
-#define SNDRV_CTL_EVENT_MASK_ADD	(1<<2)	/* element was added */
-#define SNDRV_CTL_EVENT_MASK_TLV	(1<<3)	/* element TLV tree was changed */
-#define SNDRV_CTL_EVENT_MASK_REMOVE	(~0U)	/* element was removed */
-
-struct snd_ctl_event {
-	int type;	/* event type - SNDRV_CTL_EVENT_* */
-	union {
-		struct {
-			unsigned int mask;
-			struct snd_ctl_elem_id id;
-		} elem;
-		unsigned char data8[60];
-	} data;
-};
-
-/*
- *  Control names
- */
-
-#define SNDRV_CTL_NAME_NONE				""
-#define SNDRV_CTL_NAME_PLAYBACK				"Playback "
-#define SNDRV_CTL_NAME_CAPTURE				"Capture "
-
-#define SNDRV_CTL_NAME_IEC958_NONE			""
-#define SNDRV_CTL_NAME_IEC958_SWITCH			"Switch"
-#define SNDRV_CTL_NAME_IEC958_VOLUME			"Volume"
-#define SNDRV_CTL_NAME_IEC958_DEFAULT			"Default"
-#define SNDRV_CTL_NAME_IEC958_MASK			"Mask"
-#define SNDRV_CTL_NAME_IEC958_CON_MASK			"Con Mask"
-#define SNDRV_CTL_NAME_IEC958_PRO_MASK			"Pro Mask"
-#define SNDRV_CTL_NAME_IEC958_PCM_STREAM		"PCM Stream"
-#define SNDRV_CTL_NAME_IEC958(expl,direction,what)	"IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
-
-#endif /* _UAPI__SOUND_ASOUND_H */

diff --git a/k318/original-kernel-headers/sound/audio_effects.h b/k318/original-kernel-headers/sound/audio_effects.h
deleted file mode 100644
index 6565acf..0000000
--- a/k318/original-kernel-headers/sound/audio_effects.h
+++ /dev/null

@@ -1,375 +0,0 @@
-/*
- * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _AUDIO_EFFECTS_H
-#define _AUDIO_EFFECTS_H
-
-/** AUDIO EFFECTS **/
-
-
-/* CONFIG GET/SET */
-#define CONFIG_CACHE			0
-#define CONFIG_SET			1
-#define CONFIG_GET			2
-
-/* CONFIG HEADER */
-/*
-
-	MODULE_ID,
-	DEVICE,
-	NUM_COMMANDS,
-	COMMAND_ID_1,
-	CONFIG_CACHE/SET/GET,
-	OFFSET_1,
-	LENGTH_1,
-	VALUES_1,
-	...,
-	...,
-	COMMAND_ID_2,
-	CONFIG_CACHE/SET/GET,
-	OFFSET_2,
-	LENGTH_2,
-	VALUES_2,
-	...,
-	...,
-	COMMAND_ID_3,
-	...
-*/
-
-
-/* CONFIG PARAM IDs */
-#define VIRTUALIZER_MODULE		0x00001000
-#define VIRTUALIZER_ENABLE		0x00001001
-#define VIRTUALIZER_STRENGTH		0x00001002
-#define VIRTUALIZER_OUT_TYPE		0x00001003
-#define VIRTUALIZER_GAIN_ADJUST		0x00001004
-#define VIRTUALIZER_ENABLE_PARAM_LEN		1
-#define VIRTUALIZER_STRENGTH_PARAM_LEN		1
-#define VIRTUALIZER_OUT_TYPE_PARAM_LEN		1
-#define VIRTUALIZER_GAIN_ADJUST_PARAM_LEN	1
-
-#define REVERB_MODULE			0x00002000
-#define REVERB_ENABLE			0x00002001
-#define REVERB_MODE			0x00002002
-#define REVERB_PRESET			0x00002003
-#define REVERB_WET_MIX			0x00002004
-#define REVERB_GAIN_ADJUST		0x00002005
-#define REVERB_ROOM_LEVEL		0x00002006
-#define REVERB_ROOM_HF_LEVEL		0x00002007
-#define REVERB_DECAY_TIME		0x00002008
-#define REVERB_DECAY_HF_RATIO		0x00002009
-#define REVERB_REFLECTIONS_LEVEL	0x0000200a
-#define REVERB_REFLECTIONS_DELAY	0x0000200b
-#define REVERB_LEVEL			0x0000200c
-#define REVERB_DELAY			0x0000200d
-#define REVERB_DIFFUSION		0x0000200e
-#define REVERB_DENSITY			0x0000200f
-#define REVERB_ENABLE_PARAM_LEN			1
-#define REVERB_MODE_PARAM_LEN			1
-#define REVERB_PRESET_PARAM_LEN			1
-#define REVERB_WET_MIX_PARAM_LEN		1
-#define REVERB_GAIN_ADJUST_PARAM_LEN		1
-#define REVERB_ROOM_LEVEL_PARAM_LEN		1
-#define REVERB_ROOM_HF_LEVEL_PARAM_LEN		1
-#define REVERB_DECAY_TIME_PARAM_LEN		1
-#define REVERB_DECAY_HF_RATIO_PARAM_LEN		1
-#define REVERB_REFLECTIONS_LEVEL_PARAM_LEN	1
-#define REVERB_REFLECTIONS_DELAY_PARAM_LEN	1
-#define REVERB_LEVEL_PARAM_LEN			1
-#define REVERB_DELAY_PARAM_LEN			1
-#define REVERB_DIFFUSION_PARAM_LEN		1
-#define REVERB_DENSITY_PARAM_LEN		1
-
-#define BASS_BOOST_MODULE		0x00003000
-#define BASS_BOOST_ENABLE		0x00003001
-#define BASS_BOOST_MODE			0x00003002
-#define BASS_BOOST_STRENGTH		0x00003003
-#define BASS_BOOST_ENABLE_PARAM_LEN		1
-#define BASS_BOOST_MODE_PARAM_LEN		1
-#define BASS_BOOST_STRENGTH_PARAM_LEN		1
-
-#define EQ_MODULE			0x00004000
-#define EQ_ENABLE			0x00004001
-#define EQ_CONFIG			0x00004002
-#define EQ_NUM_BANDS			0x00004003
-#define EQ_BAND_LEVELS			0x00004004
-#define EQ_BAND_LEVEL_RANGE		0x00004005
-#define EQ_BAND_FREQS			0x00004006
-#define EQ_SINGLE_BAND_FREQ_RANGE	0x00004007
-#define EQ_SINGLE_BAND_FREQ		0x00004008
-#define EQ_BAND_INDEX			0x00004009
-#define EQ_PRESET_ID			0x0000400a
-#define EQ_NUM_PRESETS			0x0000400b
-#define EQ_PRESET_NAME			0x0000400c
-#define EQ_ENABLE_PARAM_LEN			1
-#define EQ_CONFIG_PARAM_LEN			3
-#define EQ_CONFIG_PER_BAND_PARAM_LEN		5
-#define EQ_NUM_BANDS_PARAM_LEN			1
-#define EQ_BAND_LEVELS_PARAM_LEN		13
-#define EQ_BAND_LEVEL_RANGE_PARAM_LEN		2
-#define EQ_BAND_FREQS_PARAM_LEN			13
-#define EQ_SINGLE_BAND_FREQ_RANGE_PARAM_LEN	2
-#define EQ_SINGLE_BAND_FREQ_PARAM_LEN		1
-#define EQ_BAND_INDEX_PARAM_LEN			1
-#define EQ_PRESET_ID_PARAM_LEN			1
-#define EQ_NUM_PRESETS_PARAM_LEN		1
-#define EQ_PRESET_NAME_PARAM_LEN		32
-
-#define EQ_TYPE_NONE	0
-#define EQ_BASS_BOOST	1
-#define EQ_BASS_CUT	2
-#define EQ_TREBLE_BOOST	3
-#define EQ_TREBLE_CUT	4
-#define EQ_BAND_BOOST	5
-#define EQ_BAND_CUT	6
-
-#define SOFT_VOLUME_MODULE		0x00006000
-#define SOFT_VOLUME_ENABLE		0x00006001
-#define SOFT_VOLUME_GAIN_2CH		0x00006002
-#define SOFT_VOLUME_GAIN_MASTER		0x00006003
-#define SOFT_VOLUME_ENABLE_PARAM_LEN		1
-#define SOFT_VOLUME_GAIN_2CH_PARAM_LEN		2
-#define SOFT_VOLUME_GAIN_MASTER_PARAM_LEN	1
-
-#define SOFT_VOLUME2_MODULE		0x00007000
-#define SOFT_VOLUME2_ENABLE		0x00007001
-#define SOFT_VOLUME2_GAIN_2CH		0x00007002
-#define SOFT_VOLUME2_GAIN_MASTER	0x00007003
-#define SOFT_VOLUME2_ENABLE_PARAM_LEN		SOFT_VOLUME_ENABLE_PARAM_LEN
-#define SOFT_VOLUME2_GAIN_2CH_PARAM_LEN		SOFT_VOLUME_GAIN_2CH_PARAM_LEN
-#define SOFT_VOLUME2_GAIN_MASTER_PARAM_LEN	\
-					SOFT_VOLUME_GAIN_MASTER_PARAM_LEN
-
-#define PBE_CONF_MODULE_ID	0x00010C2A
-#define PBE_CONF_PARAM_ID	0x00010C49
-
-#define PBE_MODULE		0x00008000
-#define PBE_ENABLE		0x00008001
-#define PBE_CONFIG		0x00008002
-#define PBE_ENABLE_PARAM_LEN		1
-#define PBE_CONFIG_PARAM_LEN		28
-
-#define COMMAND_PAYLOAD_LEN	3
-#define COMMAND_PAYLOAD_SZ	(COMMAND_PAYLOAD_LEN * sizeof(uint32_t))
-#define MAX_INBAND_PARAM_SZ	4096
-#define Q27_UNITY		(1 << 27)
-#define Q8_UNITY		(1 << 8)
-#define CUSTOM_OPENSL_PRESET	18
-
-#define VIRTUALIZER_ENABLE_PARAM_SZ	\
-			(VIRTUALIZER_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define VIRTUALIZER_STRENGTH_PARAM_SZ	\
-			(VIRTUALIZER_STRENGTH_PARAM_LEN*sizeof(uint32_t))
-#define VIRTUALIZER_OUT_TYPE_PARAM_SZ	\
-			(VIRTUALIZER_OUT_TYPE_PARAM_LEN*sizeof(uint32_t))
-#define VIRTUALIZER_GAIN_ADJUST_PARAM_SZ	\
-			(VIRTUALIZER_GAIN_ADJUST_PARAM_LEN*sizeof(uint32_t))
-struct virtualizer_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	uint32_t strength;
-	uint32_t out_type;
-	int32_t gain_adjust;
-};
-
-#define NUM_OSL_REVERB_PRESETS_SUPPORTED	6
-#define REVERB_ENABLE_PARAM_SZ		\
-			(REVERB_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_MODE_PARAM_SZ		\
-			(REVERB_MODE_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_PRESET_PARAM_SZ		\
-			(REVERB_PRESET_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_WET_MIX_PARAM_SZ		\
-			(REVERB_WET_MIX_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_GAIN_ADJUST_PARAM_SZ	\
-			(REVERB_GAIN_ADJUST_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_ROOM_LEVEL_PARAM_SZ	\
-			(REVERB_ROOM_LEVEL_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_ROOM_HF_LEVEL_PARAM_SZ	\
-			(REVERB_ROOM_HF_LEVEL_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_DECAY_TIME_PARAM_SZ	\
-			(REVERB_DECAY_TIME_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_DECAY_HF_RATIO_PARAM_SZ	\
-			(REVERB_DECAY_HF_RATIO_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_REFLECTIONS_LEVEL_PARAM_SZ	\
-			(REVERB_REFLECTIONS_LEVEL_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_REFLECTIONS_DELAY_PARAM_SZ	\
-			(REVERB_REFLECTIONS_DELAY_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_LEVEL_PARAM_SZ		\
-			(REVERB_LEVEL_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_DELAY_PARAM_SZ		\
-			(REVERB_DELAY_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_DIFFUSION_PARAM_SZ	\
-			(REVERB_DIFFUSION_PARAM_LEN*sizeof(uint32_t))
-#define REVERB_DENSITY_PARAM_SZ		\
-			(REVERB_DENSITY_PARAM_LEN*sizeof(uint32_t))
-struct reverb_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	uint32_t mode;
-	uint32_t preset;
-	uint32_t wet_mix;
-	int32_t  gain_adjust;
-	int32_t  room_level;
-	int32_t  room_hf_level;
-	uint32_t decay_time;
-	uint32_t decay_hf_ratio;
-	int32_t  reflections_level;
-	uint32_t reflections_delay;
-	int32_t  level;
-	uint32_t delay;
-	uint32_t diffusion;
-	uint32_t density;
-};
-
-#define BASS_BOOST_ENABLE_PARAM_SZ	\
-			(BASS_BOOST_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define BASS_BOOST_MODE_PARAM_SZ	\
-			(BASS_BOOST_MODE_PARAM_LEN*sizeof(uint32_t))
-#define BASS_BOOST_STRENGTH_PARAM_SZ	\
-			(BASS_BOOST_STRENGTH_PARAM_LEN*sizeof(uint32_t))
-struct bass_boost_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	uint32_t mode;
-	uint32_t strength;
-};
-
-
-#define MAX_EQ_BANDS 12
-#define MAX_OSL_EQ_BANDS 5
-#define EQ_ENABLE_PARAM_SZ			\
-			(EQ_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define EQ_CONFIG_PARAM_SZ			\
-			(EQ_CONFIG_PARAM_LEN*sizeof(uint32_t))
-#define EQ_CONFIG_PER_BAND_PARAM_SZ		\
-			(EQ_CONFIG_PER_BAND_PARAM_LEN*sizeof(uint32_t))
-#define EQ_CONFIG_PARAM_MAX_LEN			(EQ_CONFIG_PARAM_LEN+\
-			MAX_EQ_BANDS*EQ_CONFIG_PER_BAND_PARAM_LEN)
-#define EQ_CONFIG_PARAM_MAX_SZ			\
-			(EQ_CONFIG_PARAM_MAX_LEN*sizeof(uint32_t))
-#define EQ_NUM_BANDS_PARAM_SZ			\
-			(EQ_NUM_BANDS_PARAM_LEN*sizeof(uint32_t))
-#define EQ_BAND_LEVELS_PARAM_SZ			\
-			(EQ_BAND_LEVELS_PARAM_LEN*sizeof(uint32_t))
-#define EQ_BAND_LEVEL_RANGE_PARAM_SZ		\
-			(EQ_BAND_LEVEL_RANGE_PARAM_LEN*sizeof(uint32_t))
-#define EQ_BAND_FREQS_PARAM_SZ			\
-			(EQ_BAND_FREQS_PARAM_LEN*sizeof(uint32_t))
-#define EQ_SINGLE_BAND_FREQ_RANGE_PARAM_SZ	\
-			(EQ_SINGLE_BAND_FREQ_RANGE_PARAM_LEN*sizeof(uint32_t))
-#define EQ_SINGLE_BAND_FREQ_PARAM_SZ		\
-			(EQ_SINGLE_BAND_FREQ_PARAM_LEN*sizeof(uint32_t))
-#define EQ_BAND_INDEX_PARAM_SZ			\
-			(EQ_BAND_INDEX_PARAM_LEN*sizeof(uint32_t))
-#define EQ_PRESET_ID_PARAM_SZ			\
-			(EQ_PRESET_ID_PARAM_LEN*sizeof(uint32_t))
-#define EQ_NUM_PRESETS_PARAM_SZ			\
-			(EQ_NUM_PRESETS_PARAM_LEN*sizeof(uint8_t))
-struct eq_config_t {
-	int32_t eq_pregain;
-	int32_t preset_id;
-	uint32_t num_bands;
-};
-struct eq_per_band_config_t {
-	int32_t band_idx;
-	uint32_t filter_type;
-	uint32_t freq_millihertz;
-	int32_t  gain_millibels;
-	uint32_t quality_factor;
-};
-struct eq_per_band_freq_range_t {
-	uint32_t band_index;
-	uint32_t min_freq_millihertz;
-	uint32_t max_freq_millihertz;
-};
-
-struct eq_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	struct eq_config_t config;
-	struct eq_per_band_config_t per_band_cfg[MAX_EQ_BANDS];
-	struct eq_per_band_freq_range_t per_band_freq_range[MAX_EQ_BANDS];
-	uint32_t band_index;
-	uint32_t freq_millihertz;
-};
-
-#define PBE_ENABLE_PARAM_SZ	\
-			(PBE_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define PBE_CONFIG_PARAM_SZ	\
-			(PBE_CONFIG_PARAM_LEN*sizeof(uint16_t))
-struct pbe_config_t {
-	int16_t  real_bass_mix;
-	int16_t  bass_color_control;
-	uint16_t main_chain_delay;
-	uint16_t xover_filter_order;
-	uint16_t bandpass_filter_order;
-	int16_t  drc_delay;
-	uint16_t rms_tav;
-	int16_t exp_threshold;
-	uint16_t exp_slope;
-	int16_t comp_threshold;
-	uint16_t comp_slope;
-	uint16_t makeup_gain;
-	uint32_t comp_attack;
-	uint32_t comp_release;
-	uint32_t exp_attack;
-	uint32_t exp_release;
-	int16_t limiter_bass_threshold;
-	int16_t limiter_high_threshold;
-	int16_t limiter_bass_makeup_gain;
-	int16_t limiter_high_makeup_gain;
-	int16_t limiter_bass_gc;
-	int16_t limiter_high_gc;
-	int16_t  limiter_delay;
-	uint16_t reserved;
-	/* place holder for filter coeffs to be followed */
-	int32_t p1LowPassCoeffs[5*2];
-	int32_t p1HighPassCoeffs[5*2];
-	int32_t p1BandPassCoeffs[5*3];
-	int32_t p1BassShelfCoeffs[5];
-	int32_t p1TrebleShelfCoeffs[5];
-} __packed;
-
-struct pbe_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	uint32_t cfg_len;
-	struct pbe_config_t config;
-};
-
-#define SOFT_VOLUME_ENABLE_PARAM_SZ		\
-			(SOFT_VOLUME_ENABLE_PARAM_LEN*sizeof(uint32_t))
-#define SOFT_VOLUME_GAIN_MASTER_PARAM_SZ	\
-			(SOFT_VOLUME_GAIN_MASTER_PARAM_LEN*sizeof(uint32_t))
-#define SOFT_VOLUME_GAIN_2CH_PARAM_SZ		\
-			(SOFT_VOLUME_GAIN_2CH_PARAM_LEN*sizeof(uint16_t))
-struct soft_volume_params {
-	uint32_t device;
-	uint32_t enable_flag;
-	uint32_t master_gain;
-	uint32_t left_gain;
-	uint32_t right_gain;
-};
-
-struct msm_nt_eff_all_config {
-	struct bass_boost_params bass_boost;
-	struct pbe_params pbe;
-	struct virtualizer_params virtualizer;
-	struct reverb_params reverb;
-	struct eq_params equalizer;
-	struct soft_volume_params saplus_vol;
-	struct soft_volume_params topo_switch_vol;
-};
-
-#endif /*_MSM_AUDIO_EFFECTS_H*/

diff --git a/k318/original-kernel-headers/sound/compress_offload.h b/k318/original-kernel-headers/sound/compress_offload.h
deleted file mode 100644
index 161f4aa..0000000
--- a/k318/original-kernel-headers/sound/compress_offload.h
+++ /dev/null

@@ -1,209 +0,0 @@
-/*
- *  compress_offload.h - compress offload header definations
- *
- *  Copyright (C) 2011 Intel Corporation
- *  Authors:	Vinod Koul <vinod.koul@linux.intel.com>
- *		Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
- *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
- *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- */
-#ifndef __COMPRESS_OFFLOAD_H
-#define __COMPRESS_OFFLOAD_H
-
-#include <linux/types.h>
-#include <sound/asound.h>
-#include <sound/compress_params.h>
-
-
-#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 2)
-/**
- * struct snd_compressed_buffer: compressed buffer
- * @fragment_size: size of buffer fragment in bytes
- * @fragments: number of such fragments
- */
-struct snd_compressed_buffer {
-	__u32 fragment_size;
-	__u32 fragments;
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_compr_params: compressed stream params
- * @buffer: buffer description
- * @codec: codec parameters
- * @no_wake_mode: dont wake on fragment elapsed
- */
-struct snd_compr_params {
-	struct snd_compressed_buffer buffer;
-	struct snd_codec codec;
-	__u8 no_wake_mode;
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_compr_tstamp: timestamp descriptor
- * @byte_offset: Byte offset in ring buffer to DSP
- * @copied_total: Total number of bytes copied from/to ring buffer to/by DSP
- * @pcm_frames: Frames decoded or encoded by DSP. This field will evolve by
- *	large steps and should only be used to monitor encoding/decoding
- *	progress. It shall not be used for timing estimates.
- * @pcm_io_frames: Frames rendered or received by DSP into a mixer or an audio
- * output/input. This field should be used for A/V sync or time estimates.
- * @sampling_rate: sampling rate of audio
- */
-struct snd_compr_tstamp {
-	__u32 byte_offset;
-	__u64 copied_total;
-	__u32 pcm_frames;
-	__u32 pcm_io_frames;
-	__u32 sampling_rate;
-	uint64_t timestamp;
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_compr_avail: avail descriptor
- * @avail: Number of bytes available in ring buffer for writing/reading
- * @tstamp: timestamp infomation
- */
-struct snd_compr_avail {
-	__u64 avail;
-	struct snd_compr_tstamp tstamp;
-} __attribute__((packed, aligned(4)));
-
-enum snd_compr_direction {
-	SND_COMPRESS_PLAYBACK = 0,
-	SND_COMPRESS_CAPTURE
-};
-
-/**
- * struct snd_compr_caps: caps descriptor
- * @codecs: pointer to array of codecs
- * @direction: direction supported. Of type snd_compr_direction
- * @min_fragment_size: minimum fragment supported by DSP
- * @max_fragment_size: maximum fragment supported by DSP
- * @min_fragments: min fragments supported by DSP
- * @max_fragments: max fragments supported by DSP
- * @num_codecs: number of codecs supported
- * @reserved: reserved field
- */
-struct snd_compr_caps {
-	__u32 num_codecs;
-	__u32 direction;
-	__u32 min_fragment_size;
-	__u32 max_fragment_size;
-	__u32 min_fragments;
-	__u32 max_fragments;
-	__u32 codecs[MAX_NUM_CODECS];
-	__u32 reserved[11];
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_compr_codec_caps: query capability of codec
- * @codec: codec for which capability is queried
- * @num_descriptors: number of codec descriptors
- * @descriptor: array of codec capability descriptor
- */
-struct snd_compr_codec_caps {
-	__u32 codec;
-	__u32 num_descriptors;
-	struct snd_codec_desc descriptor[MAX_NUM_CODEC_DESCRIPTORS];
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_compr_audio_info: compressed input audio information
- * @frame_size: legth of the encoded frame with valid data
- * @reserved: reserved for furture use
- */
-struct snd_compr_audio_info {
-	uint32_t frame_size;
-	uint32_t reserved[15];
-} __attribute__((packed, aligned(4)));
-
-/**
- * @SNDRV_COMPRESS_ENCODER_PADDING: no of samples appended by the encoder at the
- * end of the track
- * @SNDRV_COMPRESS_ENCODER_DELAY: no of samples inserted by the encoder at the
- * beginning of the track
- */
-enum {
-	SNDRV_COMPRESS_ENCODER_PADDING = 1,
-	SNDRV_COMPRESS_ENCODER_DELAY = 2,
-	SNDRV_COMPRESS_MIN_BLK_SIZE = 3,
-	SNDRV_COMPRESS_MAX_BLK_SIZE = 4,
-};
-
-/**
- * struct snd_compr_metadata: compressed stream metadata
- * @key: key id
- * @value: key value
- */
-struct snd_compr_metadata {
-	 __u32 key;
-	 __u32 value[8];
-} __attribute__((packed, aligned(4)));
-
-/**
- * compress path ioctl definitions
- * SNDRV_COMPRESS_GET_CAPS: Query capability of DSP
- * SNDRV_COMPRESS_GET_CODEC_CAPS: Query capability of a codec
- * SNDRV_COMPRESS_SET_PARAMS: Set codec and stream parameters
- * Note: only codec params can be changed runtime and stream params cant be
- * SNDRV_COMPRESS_GET_PARAMS: Query codec params
- * SNDRV_COMPRESS_TSTAMP: get the current timestamp value
- * SNDRV_COMPRESS_AVAIL: get the current buffer avail value.
- * This also queries the tstamp properties
- * SNDRV_COMPRESS_PAUSE: Pause the running stream
- * SNDRV_COMPRESS_RESUME: resume a paused stream
- * SNDRV_COMPRESS_START: Start a stream
- * SNDRV_COMPRESS_STOP: stop a running stream, discarding ring buffer content
- * and the buffers currently with DSP
- * SNDRV_COMPRESS_DRAIN: Play till end of buffers and stop after that
- * SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM: send codec specific data for the next
- * track in gapless
- * SNDRV_COMPRESS_IOCTL_VERSION: Query the API version
- */
-#define SNDRV_COMPRESS_IOCTL_VERSION	_IOR('C', 0x00, int)
-#define SNDRV_COMPRESS_GET_CAPS		_IOWR('C', 0x10, struct snd_compr_caps)
-#define SNDRV_COMPRESS_GET_CODEC_CAPS	_IOWR('C', 0x11,\
-						struct snd_compr_codec_caps)
-#define SNDRV_COMPRESS_SET_PARAMS	_IOW('C', 0x12, struct snd_compr_params)
-#define SNDRV_COMPRESS_GET_PARAMS	_IOR('C', 0x13, struct snd_codec)
-#define SNDRV_COMPRESS_SET_METADATA	_IOW('C', 0x14,\
-						 struct snd_compr_metadata)
-#define SNDRV_COMPRESS_GET_METADATA	_IOWR('C', 0x15,\
-						 struct snd_compr_metadata)
-#define SNDRV_COMPRESS_TSTAMP		_IOR('C', 0x20, struct snd_compr_tstamp)
-#define SNDRV_COMPRESS_AVAIL		_IOR('C', 0x21, struct snd_compr_avail)
-#define SNDRV_COMPRESS_PAUSE		_IO('C', 0x30)
-#define SNDRV_COMPRESS_RESUME		_IO('C', 0x31)
-#define SNDRV_COMPRESS_START		_IO('C', 0x32)
-#define SNDRV_COMPRESS_STOP		_IO('C', 0x33)
-#define SNDRV_COMPRESS_DRAIN		_IO('C', 0x34)
-#define SNDRV_COMPRESS_NEXT_TRACK	_IO('C', 0x35)
-#define SNDRV_COMPRESS_PARTIAL_DRAIN	_IO('C', 0x36)
-#define SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM\
-					_IOW('C', 0x80, union snd_codec_options)
-/*
- * TODO
- * 1. add mmap support
- *
- */
-#define SND_COMPR_TRIGGER_DRAIN 7 /*FIXME move this to pcm.h */
-#define SND_COMPR_TRIGGER_NEXT_TRACK 8
-#define SND_COMPR_TRIGGER_PARTIAL_DRAIN 9
-
-#define SNDRV_COMPRESS_METADATA_MODE          _IOW('C', 0x99, bool)
-#endif

diff --git a/k318/original-kernel-headers/sound/compress_params.h b/k318/original-kernel-headers/sound/compress_params.h
deleted file mode 100644
index eae29f3..0000000
--- a/k318/original-kernel-headers/sound/compress_params.h
+++ /dev/null

@@ -1,485 +0,0 @@
-/*
- *  compress_params.h - codec types and parameters for compressed data
- *  streaming interface
- *
- *  Copyright (C) 2011 Intel Corporation
- *  Authors:	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
- *              Vinod Koul <vinod.koul@linux.intel.com>
- *
- *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; version 2 of the License.
- *
- *  This program is distributed in the hope that it will be useful, but
- *  WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *  General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
- *
- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- *
- * The definitions in this file are derived from the OpenMAX AL version 1.1
- * and OpenMAX IL v 1.1.2 header files which contain the copyright notice below.
- *
- * Copyright (c) 2007-2010 The Khronos Group Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and/or associated documentation files (the
- * "Materials "), to deal in the Materials without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Materials, and to
- * permit persons to whom the Materials are furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Materials.
- *
- * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
- * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
- *
- */
-#ifndef __SND_COMPRESS_PARAMS_H
-#define __SND_COMPRESS_PARAMS_H
-
-#include <linux/types.h>
-
-#define SND_DEC_DDP_MAX_PARAMS 18
-
-/* AUDIO CODECS SUPPORTED */
-#define MAX_NUM_CODECS 32
-#define MAX_NUM_CODEC_DESCRIPTORS 32
-#define MAX_NUM_BITRATES 32
-#define MAX_NUM_SAMPLE_RATES 32
-
-/* compressed TX */
-#define MAX_NUM_FRAMES_PER_BUFFER 1
-#define COMPRESSED_META_DATA_MODE 0x10
-#define META_DATA_LEN_BYTES 36
-#define Q6_AC3_DECODER	0x00010BF6
-#define Q6_EAC3_DECODER 0x00010C3C
-#define Q6_DTS		0x00010D88
-#define Q6_DTS_LBR	0x00010DBB
-
-/* Codecs are listed linearly to allow for extensibility */
-#define SND_AUDIOCODEC_PCM                   ((__u32) 0x00000001)
-#define SND_AUDIOCODEC_MP3                   ((__u32) 0x00000002)
-#define SND_AUDIOCODEC_AMR                   ((__u32) 0x00000003)
-#define SND_AUDIOCODEC_AMRWB                 ((__u32) 0x00000004)
-#define SND_AUDIOCODEC_AMRWBPLUS             ((__u32) 0x00000005)
-#define SND_AUDIOCODEC_AAC                   ((__u32) 0x00000006)
-#define SND_AUDIOCODEC_WMA                   ((__u32) 0x00000007)
-#define SND_AUDIOCODEC_REAL                  ((__u32) 0x00000008)
-#define SND_AUDIOCODEC_VORBIS                ((__u32) 0x00000009)
-#define SND_AUDIOCODEC_FLAC                  ((__u32) 0x0000000A)
-#define SND_AUDIOCODEC_IEC61937              ((__u32) 0x0000000B)
-#define SND_AUDIOCODEC_G723_1                ((__u32) 0x0000000C)
-#define SND_AUDIOCODEC_G729                  ((__u32) 0x0000000D)
-#define SND_AUDIOCODEC_DTS_PASS_THROUGH      ((__u32) 0x0000000E)
-#define SND_AUDIOCODEC_DTS_LBR               ((__u32) 0x0000000F)
-#define SND_AUDIOCODEC_DTS_TRANSCODE_LOOPBACK ((__u32) 0x00000010)
-#define SND_AUDIOCODEC_PASS_THROUGH          ((__u32) 0x00000011)
-#define SND_AUDIOCODEC_MP2                   ((__u32) 0x00000012)
-#define SND_AUDIOCODEC_DTS_LBR_PASS_THROUGH  ((__u32) 0x00000013)
-#define SND_AUDIOCODEC_AC3                   ((__u32) 0x00000014)
-#define SND_AUDIOCODEC_AC3_PASS_THROUGH      ((__u32) 0x00000015)
-#define SND_AUDIOCODEC_WMA_PRO               ((__u32) 0x00000016)
-#define SND_AUDIOCODEC_DTS             	     ((__u32) 0x00000017)
-#define SND_AUDIOCODEC_EAC3                  ((__u32) 0x00000018)
-#define SND_AUDIOCODEC_ALAC                  ((__u32) 0x00000019)
-#define SND_AUDIOCODEC_APE                   ((__u32) 0x00000020)
-#define SND_AUDIOCODEC_MAX                   SND_AUDIOCODEC_APE
-/*
- * Profile and modes are listed with bit masks. This allows for a
- * more compact representation of fields that will not evolve
- * (in contrast to the list of codecs)
- */
-
-#define SND_AUDIOPROFILE_PCM                 ((__u32) 0x00000001)
-
-/* MP3 modes are only useful for encoders */
-#define SND_AUDIOCHANMODE_MP3_MONO           ((__u32) 0x00000001)
-#define SND_AUDIOCHANMODE_MP3_STEREO         ((__u32) 0x00000002)
-#define SND_AUDIOCHANMODE_MP3_JOINTSTEREO    ((__u32) 0x00000004)
-#define SND_AUDIOCHANMODE_MP3_DUAL           ((__u32) 0x00000008)
-
-#define SND_AUDIOPROFILE_AMR                 ((__u32) 0x00000001)
-
-/* AMR modes are only useful for encoders */
-#define SND_AUDIOMODE_AMR_DTX_OFF            ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AMR_VAD1               ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AMR_VAD2               ((__u32) 0x00000004)
-
-#define SND_AUDIOSTREAMFORMAT_UNDEFINED	     ((__u32) 0x00000000)
-#define SND_AUDIOSTREAMFORMAT_CONFORMANCE    ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_IF1            ((__u32) 0x00000002)
-#define SND_AUDIOSTREAMFORMAT_IF2            ((__u32) 0x00000004)
-#define SND_AUDIOSTREAMFORMAT_FSF            ((__u32) 0x00000008)
-#define SND_AUDIOSTREAMFORMAT_RTPPAYLOAD     ((__u32) 0x00000010)
-#define SND_AUDIOSTREAMFORMAT_ITU            ((__u32) 0x00000020)
-
-#define SND_AUDIOPROFILE_AMRWB               ((__u32) 0x00000001)
-
-/* AMRWB modes are only useful for encoders */
-#define SND_AUDIOMODE_AMRWB_DTX_OFF          ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AMRWB_VAD1             ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AMRWB_VAD2             ((__u32) 0x00000004)
-
-#define SND_AUDIOPROFILE_AMRWBPLUS           ((__u32) 0x00000001)
-
-#define SND_AUDIOPROFILE_AAC                 ((__u32) 0x00000001)
-
-/* AAC modes are required for encoders and decoders */
-#define SND_AUDIOMODE_AAC_MAIN               ((__u32) 0x00000001)
-#define SND_AUDIOMODE_AAC_LC                 ((__u32) 0x00000002)
-#define SND_AUDIOMODE_AAC_SSR                ((__u32) 0x00000004)
-#define SND_AUDIOMODE_AAC_LTP                ((__u32) 0x00000008)
-#define SND_AUDIOMODE_AAC_HE                 ((__u32) 0x00000010)
-#define SND_AUDIOMODE_AAC_SCALABLE           ((__u32) 0x00000020)
-#define SND_AUDIOMODE_AAC_ERLC               ((__u32) 0x00000040)
-#define SND_AUDIOMODE_AAC_LD                 ((__u32) 0x00000080)
-#define SND_AUDIOMODE_AAC_HE_PS              ((__u32) 0x00000100)
-#define SND_AUDIOMODE_AAC_HE_MPS             ((__u32) 0x00000200)
-
-/* AAC formats are required for encoders and decoders */
-#define SND_AUDIOSTREAMFORMAT_MP2ADTS        ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_MP4ADTS        ((__u32) 0x00000002)
-#define SND_AUDIOSTREAMFORMAT_MP4LOAS        ((__u32) 0x00000004)
-#define SND_AUDIOSTREAMFORMAT_MP4LATM        ((__u32) 0x00000008)
-#define SND_AUDIOSTREAMFORMAT_ADIF           ((__u32) 0x00000010)
-#define SND_AUDIOSTREAMFORMAT_MP4FF          ((__u32) 0x00000020)
-#define SND_AUDIOSTREAMFORMAT_RAW            ((__u32) 0x00000040)
-
-#define SND_AUDIOPROFILE_WMA7                ((__u32) 0x00000001)
-#define SND_AUDIOPROFILE_WMA8                ((__u32) 0x00000002)
-#define SND_AUDIOPROFILE_WMA9                ((__u32) 0x00000004)
-#define SND_AUDIOPROFILE_WMA10               ((__u32) 0x00000008)
-
-#define SND_AUDIOMODE_WMA_LEVEL1             ((__u32) 0x00000001)
-#define SND_AUDIOMODE_WMA_LEVEL2             ((__u32) 0x00000002)
-#define SND_AUDIOMODE_WMA_LEVEL3             ((__u32) 0x00000004)
-#define SND_AUDIOMODE_WMA_LEVEL4             ((__u32) 0x00000008)
-#define SND_AUDIOMODE_WMAPRO_LEVELM0         ((__u32) 0x00000010)
-#define SND_AUDIOMODE_WMAPRO_LEVELM1         ((__u32) 0x00000020)
-#define SND_AUDIOMODE_WMAPRO_LEVELM2         ((__u32) 0x00000040)
-#define SND_AUDIOMODE_WMAPRO_LEVELM3         ((__u32) 0x00000080)
-
-#define SND_AUDIOSTREAMFORMAT_WMA_ASF        ((__u32) 0x00000001)
-/*
- * Some implementations strip the ASF header and only send ASF packets
- * to the DSP
- */
-#define SND_AUDIOSTREAMFORMAT_WMA_NOASF_HDR  ((__u32) 0x00000002)
-
-#define SND_AUDIOPROFILE_REALAUDIO           ((__u32) 0x00000001)
-
-#define SND_AUDIOMODE_REALAUDIO_G2           ((__u32) 0x00000001)
-#define SND_AUDIOMODE_REALAUDIO_8            ((__u32) 0x00000002)
-#define SND_AUDIOMODE_REALAUDIO_10           ((__u32) 0x00000004)
-#define SND_AUDIOMODE_REALAUDIO_SURROUND     ((__u32) 0x00000008)
-
-#define SND_AUDIOPROFILE_VORBIS              ((__u32) 0x00000001)
-
-#define SND_AUDIOMODE_VORBIS                 ((__u32) 0x00000001)
-
-#define SND_AUDIOPROFILE_FLAC                ((__u32) 0x00000001)
-
-/*
- * Define quality levels for FLAC encoders, from LEVEL0 (fast)
- * to LEVEL8 (best)
- */
-#define SND_AUDIOMODE_FLAC_LEVEL0            ((__u32) 0x00000001)
-#define SND_AUDIOMODE_FLAC_LEVEL1            ((__u32) 0x00000002)
-#define SND_AUDIOMODE_FLAC_LEVEL2            ((__u32) 0x00000004)
-#define SND_AUDIOMODE_FLAC_LEVEL3            ((__u32) 0x00000008)
-#define SND_AUDIOMODE_FLAC_LEVEL4            ((__u32) 0x00000010)
-#define SND_AUDIOMODE_FLAC_LEVEL5            ((__u32) 0x00000020)
-#define SND_AUDIOMODE_FLAC_LEVEL6            ((__u32) 0x00000040)
-#define SND_AUDIOMODE_FLAC_LEVEL7            ((__u32) 0x00000080)
-#define SND_AUDIOMODE_FLAC_LEVEL8            ((__u32) 0x00000100)
-
-#define SND_AUDIOSTREAMFORMAT_FLAC           ((__u32) 0x00000001)
-#define SND_AUDIOSTREAMFORMAT_FLAC_OGG       ((__u32) 0x00000002)
-
-/* IEC61937 payloads without CUVP and preambles */
-#define SND_AUDIOPROFILE_IEC61937            ((__u32) 0x00000001)
-/* IEC61937 with S/PDIF preambles+CUVP bits in 32-bit containers */
-#define SND_AUDIOPROFILE_IEC61937_SPDIF      ((__u32) 0x00000002)
-
-/*
- * IEC modes are mandatory for decoders. Format autodetection
- * will only happen on the DSP side with mode 0. The PCM mode should
- * not be used, the PCM codec should be used instead.
- */
-#define SND_AUDIOMODE_IEC_REF_STREAM_HEADER  ((__u32) 0x00000000)
-#define SND_AUDIOMODE_IEC_LPCM		     ((__u32) 0x00000001)
-#define SND_AUDIOMODE_IEC_AC3		     ((__u32) 0x00000002)
-#define SND_AUDIOMODE_IEC_MPEG1		     ((__u32) 0x00000004)
-#define SND_AUDIOMODE_IEC_MP3		     ((__u32) 0x00000008)
-#define SND_AUDIOMODE_IEC_MPEG2		     ((__u32) 0x00000010)
-#define SND_AUDIOMODE_IEC_AACLC		     ((__u32) 0x00000020)
-#define SND_AUDIOMODE_IEC_DTS		     ((__u32) 0x00000040)
-#define SND_AUDIOMODE_IEC_ATRAC		     ((__u32) 0x00000080)
-#define SND_AUDIOMODE_IEC_SACD		     ((__u32) 0x00000100)
-#define SND_AUDIOMODE_IEC_EAC3		     ((__u32) 0x00000200)
-#define SND_AUDIOMODE_IEC_DTS_HD	     ((__u32) 0x00000400)
-#define SND_AUDIOMODE_IEC_MLP		     ((__u32) 0x00000800)
-#define SND_AUDIOMODE_IEC_DST		     ((__u32) 0x00001000)
-#define SND_AUDIOMODE_IEC_WMAPRO	     ((__u32) 0x00002000)
-#define SND_AUDIOMODE_IEC_REF_CXT            ((__u32) 0x00004000)
-#define SND_AUDIOMODE_IEC_HE_AAC	     ((__u32) 0x00008000)
-#define SND_AUDIOMODE_IEC_HE_AAC2	     ((__u32) 0x00010000)
-#define SND_AUDIOMODE_IEC_MPEG_SURROUND	     ((__u32) 0x00020000)
-
-#define SND_AUDIOPROFILE_G723_1              ((__u32) 0x00000001)
-
-#define SND_AUDIOMODE_G723_1_ANNEX_A         ((__u32) 0x00000001)
-#define SND_AUDIOMODE_G723_1_ANNEX_B         ((__u32) 0x00000002)
-#define SND_AUDIOMODE_G723_1_ANNEX_C         ((__u32) 0x00000004)
-
-#define SND_AUDIOPROFILE_G729                ((__u32) 0x00000001)
-
-#define SND_AUDIOMODE_G729_ANNEX_A           ((__u32) 0x00000001)
-#define SND_AUDIOMODE_G729_ANNEX_B           ((__u32) 0x00000002)
-
-/* <FIXME: multichannel encoders aren't supported for now. Would need
-   an additional definition of channel arrangement> */
-
-/* VBR/CBR definitions */
-#define SND_RATECONTROLMODE_CONSTANTBITRATE  ((__u32) 0x00000001)
-#define SND_RATECONTROLMODE_VARIABLEBITRATE  ((__u32) 0x00000002)
-
-/* Encoder options */
-
-struct snd_enc_wma {
-	__u32 super_block_align; /* WMA Type-specific data */
-	__u32 bits_per_sample;
-	__u32 channelmask;
-	__u32 encodeopt;
-	__u32 encodeopt1;
-	__u32 encodeopt2;
-	__u32 avg_bit_rate;
-};
-
-
-/**
- * struct snd_enc_vorbis
- * @quality: Sets encoding quality to n, between -1 (low) and 10 (high).
- * In the default mode of operation, the quality level is 3.
- * Normal quality range is 0 - 10.
- * @managed: Boolean. Set  bitrate  management  mode. This turns off the
- * normal VBR encoding, but allows hard or soft bitrate constraints to be
- * enforced by the encoder. This mode can be slower, and may also be
- * lower quality. It is primarily useful for streaming.
- * @max_bit_rate: Enabled only if managed is TRUE
- * @min_bit_rate: Enabled only if managed is TRUE
- * @downmix: Boolean. Downmix input from stereo to mono (has no effect on
- * non-stereo streams). Useful for lower-bitrate encoding.
- *
- * These options were extracted from the OpenMAX IL spec and Gstreamer vorbisenc
- * properties
- *
- * For best quality users should specify VBR mode and set quality levels.
- */
-
-struct snd_enc_vorbis {
-	__s32 quality;
-	__u32 managed;
-	__u32 max_bit_rate;
-	__u32 min_bit_rate;
-	__u32 downmix;
-} __attribute__((packed, aligned(4)));
-
-
-/**
- * struct snd_enc_real
- * @quant_bits: number of coupling quantization bits in the stream
- * @start_region: coupling start region in the stream
- * @num_regions: number of regions value
- *
- * These options were extracted from the OpenMAX IL spec
- */
-
-struct snd_enc_real {
-	__u32 quant_bits;
-	__u32 start_region;
-	__u32 num_regions;
-} __attribute__((packed, aligned(4)));
-
-/**
- * struct snd_enc_flac
- * @num: serial number, valid only for OGG formats
- *	needs to be set by application
- * @gain: Add replay gain tags
- *
- * These options were extracted from the FLAC online documentation
- * at http://flac.sourceforge.net/documentation_tools_flac.html
- *
- * To make the API simpler, it is assumed that the user will select quality
- * profiles. Additional options that affect encoding quality and speed can
- * be added at a later stage if needed.
- *
- * By default the Subset format is used by encoders.
- *
- * TAGS such as pictures, etc, cannot be handled by an offloaded encoder and are
- * not supported in this API.
- */
-
-struct snd_enc_flac {
-	__u32 num;
-	__u32 gain;
-} __attribute__((packed, aligned(4)));
-
-struct snd_enc_generic {
-	__u32 bw;	/* encoder bandwidth */
-	__s32 reserved[15];
-} __attribute__((packed, aligned(4)));
-
-struct snd_dec_ddp {
-	__u32 params_length;
-	__u32 params_id[SND_DEC_DDP_MAX_PARAMS];
-	__u32 params_value[SND_DEC_DDP_MAX_PARAMS];
-} __attribute__((packed, aligned(4)));
-
-struct snd_dec_flac {
-	__u16 sample_size;
-	__u16 min_blk_size;
-	__u16 max_blk_size;
-	__u16 min_frame_size;
-	__u16 max_frame_size;
-} __attribute__((packed, aligned(4)));
-
-struct snd_dec_vorbis {
-	__u32 bit_stream_fmt;
-};
-
-struct snd_dec_alac {
-	__u32 frame_length;
-	__u8 compatible_version;
-	__u8 bit_depth;
-	__u8 pb;
-	__u8 mb;
-	__u8 kb;
-	__u8 num_channels;
-	__u16 max_run;
-	__u32 max_frame_bytes;
-	__u32 avg_bit_rate;
-	__u32 sample_rate;
-	__u32 channel_layout_tag;
-};
-
-struct snd_dec_ape {
-	__u16 compatible_version;
-	__u16 compression_level;
-	__u32 format_flags;
-	__u32 blocks_per_frame;
-	__u32 final_frame_blocks;
-	__u32 total_frames;
-	__u16 bits_per_sample;
-	__u16 num_channels;
-	__u32 sample_rate;
-	__u32 seek_table_present;
-};
-
-union snd_codec_options {
-	struct snd_enc_wma wma;
-	struct snd_enc_vorbis vorbis;
-	struct snd_enc_real real;
-	struct snd_enc_flac flac;
-	struct snd_enc_generic generic;
-	struct snd_dec_ddp ddp;
-	struct snd_dec_flac flac_dec;
-	struct snd_dec_vorbis vorbis_dec;
-	struct snd_dec_alac alac;
-	struct snd_dec_ape ape;
-} __attribute__((packed, aligned(4)));
-
-/** struct snd_codec_desc - description of codec capabilities
- * @max_ch: Maximum number of audio channels
- * @sample_rates: Sampling rates in Hz, use values like 48000 for this
- * @num_sample_rates: Number of valid values in sample_rates array
- * @bit_rate: Indexed array containing supported bit rates
- * @num_bitrates: Number of valid values in bit_rate array
- * @rate_control: value is specified by SND_RATECONTROLMODE defines.
- * @profiles: Supported profiles. See SND_AUDIOPROFILE defines.
- * @modes: Supported modes. See SND_AUDIOMODE defines
- * @formats: Supported formats. See SND_AUDIOSTREAMFORMAT defines
- * @min_buffer: Minimum buffer size handled by codec implementation
- * @reserved: reserved for future use
- *
- * This structure provides a scalar value for profiles, modes and stream
- * format fields.
- * If an implementation supports multiple combinations, they will be listed as
- * codecs with different descriptors, for example there would be 2 descriptors
- * for AAC-RAW and AAC-ADTS.
- * This entails some redundancy but makes it easier to avoid invalid
- * configurations.
- *
- */
-
-struct snd_codec_desc {
-	__u32 max_ch;
-	__u32 sample_rates[MAX_NUM_SAMPLE_RATES];
-	__u32 num_sample_rates;
-	__u32 bit_rate[MAX_NUM_BITRATES];
-	__u32 num_bitrates;
-	__u32 rate_control;
-	__u32 profiles;
-	__u32 modes;
-	__u32 formats;
-	__u32 min_buffer;
-	__u32 reserved[15];
-} __attribute__((packed, aligned(4)));
-
-/** struct snd_codec
- * @id: Identifies the supported audio encoder/decoder.
- *		See SND_AUDIOCODEC macros.
- * @ch_in: Number of input audio channels
- * @ch_out: Number of output channels. In case of contradiction between
- *		this field and the channelMode field, the channelMode field
- *		overrides.
- * @sample_rate: Audio sample rate of input data in Hz, use values like 48000
- *		for this.
- * @bit_rate: Bitrate of encoded data. May be ignored by decoders
- * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines.
- *               Encoders may rely on profiles for quality levels.
- *		 May be ignored by decoders.
- * @profile: Mandatory for encoders, can be mandatory for specific
- *		decoders as well. See SND_AUDIOPROFILE defines.
- * @level: Supported level (Only used by WMA at the moment)
- * @ch_mode: Channel mode for encoder. See SND_AUDIOCHANMODE defines
- * @format: Format of encoded bistream. Mandatory when defined.
- *		See SND_AUDIOSTREAMFORMAT defines.
- * @align: Block alignment in bytes of an audio sample.
- *		Only required for PCM or IEC formats.
- * @options: encoder-specific settings
- * @reserved: reserved for future use
- */
-
-struct snd_codec {
-	__u32 id;
-	__u32 ch_in;
-	__u32 ch_out;
-	__u32 sample_rate;
-	__u32 bit_rate;
-	__u32 rate_control;
-	__u32 profile;
-	__u32 level;
-	__u32 ch_mode;
-	__u32 format;
-	__u32 align;
-	__u32 compr_passthr;
-	union snd_codec_options options;
-	__u32 reserved[3];
-} __attribute__((packed, aligned(4)));
-
-#endif

diff --git a/k318/original-kernel-headers/sound/lsm_params.h b/k318/original-kernel-headers/sound/lsm_params.h
deleted file mode 100644
index eafdc11..0000000
--- a/k318/original-kernel-headers/sound/lsm_params.h
+++ /dev/null

@@ -1,175 +0,0 @@
-#ifndef _UAPI_LSM_PARAMS_H__
-#define _UAPI_LSM_PARAMS_H__
-
-#include <linux/types.h>
-#include <sound/asound.h>
-
-#define SNDRV_LSM_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0)
-
-#define LSM_OUT_FORMAT_PCM (0)
-#define LSM_OUT_FORMAT_ADPCM (1 << 0)
-
-#define LSM_OUT_DATA_RAW (0)
-#define LSM_OUT_DATA_PACKED (1)
-
-#define LSM_OUT_DATA_EVENTS_DISABLED (0)
-#define LSM_OUT_DATA_EVENTS_ENABLED (1)
-
-#define LSM_OUT_TRANSFER_MODE_RT (0)
-#define LSM_OUT_TRANSFER_MODE_FTRT (1)
-
-enum lsm_app_id {
-	LSM_VOICE_WAKEUP_APP_ID = 1,
-	LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
-};
-
-enum lsm_detection_mode {
-	LSM_MODE_KEYWORD_ONLY_DETECTION = 1,
-	LSM_MODE_USER_KEYWORD_DETECTION
-};
-
-enum lsm_vw_status {
-	LSM_VOICE_WAKEUP_STATUS_RUNNING = 1,
-	LSM_VOICE_WAKEUP_STATUS_DETECTED,
-	LSM_VOICE_WAKEUP_STATUS_END_SPEECH,
-	LSM_VOICE_WAKEUP_STATUS_REJECTED
-};
-
-enum LSM_PARAM_TYPE {
-	LSM_ENDPOINT_DETECT_THRESHOLD = 0,
-	LSM_OPERATION_MODE,
-	LSM_GAIN,
-	LSM_MIN_CONFIDENCE_LEVELS,
-	LSM_REG_SND_MODEL,
-	LSM_DEREG_SND_MODEL,
-	LSM_CUSTOM_PARAMS,
-	/* driver ioctl will parse only so many params */
-	LSM_PARAMS_MAX,
-};
-
-/*
- * Data for LSM_ENDPOINT_DETECT_THRESHOLD param_type
- * @epd_begin: Begin threshold
- * @epd_end: End threshold
- */
-struct snd_lsm_ep_det_thres {
-	__u32 epd_begin;
-	__u32 epd_end;
-};
-
-/*
- * Data for LSM_OPERATION_MODE param_type
- * @mode: The detection mode to be used
- * @detect_failure: Setting to enable failure detections.
- */
-struct snd_lsm_detect_mode {
-	enum lsm_detection_mode mode;
-	bool detect_failure;
-};
-
-/*
- * Data for LSM_GAIN param_type
- * @gain: The gain to be applied on LSM
- */
-struct snd_lsm_gain {
-	__u16 gain;
-};
-
-
-struct snd_lsm_sound_model_v2 {
-	__u8 __user *data;
-	__u8 *confidence_level;
-	__u32 data_size;
-	enum lsm_detection_mode detection_mode;
-	__u8 num_confidence_levels;
-	bool detect_failure;
-};
-
-struct snd_lsm_session_data {
-	enum lsm_app_id app_id;
-};
-
-struct snd_lsm_event_status {
-	__u16 status;
-	__u16 payload_size;
-	__u8 payload[0];
-};
-
-struct snd_lsm_detection_params {
-	__u8 *conf_level;
-	enum lsm_detection_mode detect_mode;
-	__u8 num_confidence_levels;
-	bool detect_failure;
-};
-
-/*
- * Param info for each parameter type
- * @module_id: Module to which parameter is to be set
- * @param_id: Parameter that is to be set
- * @param_size: size (in number of bytes) for the data
- *		in param_data.
- *		For confidence levels, this is num_conf_levels
- *		For REG_SND_MODEL, this is size of sound model
- *		For CUSTOM_PARAMS, this is size of the entire blob of data
- * @param_data: Data for the parameter.
- *		For some param_types this is a structure defined, ex: LSM_GAIN
- *		For CONFIDENCE_LEVELS, this is array of confidence levels
- *		For REG_SND_MODEL, this is the sound model data
- *		For CUSTOM_PARAMS, this is the blob of custom data.
- */
-struct lsm_params_info {
-	__u32 module_id;
-	__u32 param_id;
-	__u32 param_size;
-	__u8 __user *param_data;
-	enum LSM_PARAM_TYPE param_type;
-};
-
-/*
- * Data passed to the SET_PARAM_V2 IOCTL
- * @num_params: Number of params that are to be set
- *		should not be greater than LSM_PARAMS_MAX
- * @params: Points to an array of lsm_params_info
- *	    Each entry points to one parameter to set
- * @data_size: size (in bytes) for params
- *	       should be equal to
- *	       num_params * sizeof(struct lsm_parms_info)
- */
-struct snd_lsm_module_params {
-	__u8 __user *params;
-	__u32 num_params;
-	__u32 data_size;
-};
-
-/*
- * Data passed to LSM_OUT_FORMAT_CFG IOCTL
- * @format: The media format enum
- * @packing: indicates the packing method used for data path
- * @events: indicates whether data path events need to be enabled
- * @transfer_mode: indicates whether FTRT mode or RT mode.
- */
-struct snd_lsm_output_format_cfg {
-	__u8 format;
-	__u8 packing;
-	__u8 events;
-	__u8 mode;
-};
-
-#define SNDRV_LSM_DEREG_SND_MODEL _IOW('U', 0x01, int)
-#define SNDRV_LSM_EVENT_STATUS	_IOW('U', 0x02, struct snd_lsm_event_status)
-#define SNDRV_LSM_ABORT_EVENT	_IOW('U', 0x03, int)
-#define SNDRV_LSM_START		_IOW('U', 0x04, int)
-#define SNDRV_LSM_STOP		_IOW('U', 0x05, int)
-#define SNDRV_LSM_SET_SESSION_DATA _IOW('U', 0x06, struct snd_lsm_session_data)
-#define SNDRV_LSM_REG_SND_MODEL_V2 _IOW('U', 0x07,\
-					struct snd_lsm_sound_model_v2)
-#define SNDRV_LSM_LAB_CONTROL	_IOW('U', 0x08, uint32_t)
-#define SNDRV_LSM_STOP_LAB	_IO('U', 0x09)
-#define SNDRV_LSM_SET_PARAMS	_IOW('U', 0x0A, \
-					struct snd_lsm_detection_params)
-#define SNDRV_LSM_SET_MODULE_PARAMS	_IOW('U', 0x0B, \
-					struct snd_lsm_module_params)
-#define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, \
-				      struct snd_lsm_output_format_cfg)
-
-#endif

diff --git a/k318/original-kernel-headers/sound/msmcal-hwdep.h b/k318/original-kernel-headers/sound/msmcal-hwdep.h
deleted file mode 100644
index 2a29482..0000000
--- a/k318/original-kernel-headers/sound/msmcal-hwdep.h
+++ /dev/null

@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef _CALIB_HWDEP_H
-#define _CALIB_HWDEP_H
-
-#define WCD9XXX_CODEC_HWDEP_NODE    1000
-enum wcd_cal_type {
-	WCD9XXX_MIN_CAL,
-	WCD9XXX_ANC_CAL = WCD9XXX_MIN_CAL,
-	WCD9XXX_MAD_CAL,
-	WCD9XXX_MBHC_CAL,
-	WCD9XXX_VBAT_CAL,
-	WCD9XXX_MAX_CAL,
-};
-
-struct wcdcal_ioctl_buffer {
-	__u32 size;
-	__u8 __user *buffer;
-	enum wcd_cal_type cal_type;
-};
-
-#define SNDRV_CTL_IOCTL_HWDEP_CAL_TYPE \
-	_IOW('U', 0x1, struct wcdcal_ioctl_buffer)
-
-#endif /*_CALIB_HWDEP_H*/

diff --git a/k318/original-kernel-headers/sound/voice_params.h b/k318/original-kernel-headers/sound/voice_params.h
deleted file mode 100644
index 43e3b9d..0000000
--- a/k318/original-kernel-headers/sound/voice_params.h
+++ /dev/null

@@ -1,14 +0,0 @@
-#ifndef __VOICE_PARAMS_H__
-#define __VOICE_PARAMS_H__
-
-#include <linux/types.h>
-#include <sound/asound.h>
-
-enum voice_lch_mode {
-	VOICE_LCH_START = 1,
-	VOICE_LCH_STOP
-};
-
-#define SNDRV_VOICE_IOCTL_LCH _IOW('U', 0x00, enum voice_lch_mode)
-
-#endif

diff --git a/k318/original-kernel-headers/sound/voice_svc.h b/k318/original-kernel-headers/sound/voice_svc.h
deleted file mode 100644
index 035053f..0000000
--- a/k318/original-kernel-headers/sound/voice_svc.h
+++ /dev/null

@@ -1,47 +0,0 @@
-#ifndef __VOICE_SVC_H__
-#define __VOICE_SVC_H__
-
-#include <linux/types.h>
-#include <linux/ioctl.h>
-
-#define VOICE_SVC_DRIVER_NAME "voice_svc"
-
-#define VOICE_SVC_MVM_STR "MVM"
-#define VOICE_SVC_CVS_STR "CVS"
-#define MAX_APR_SERVICE_NAME_LEN  64
-
-#define MSG_REGISTER 0x1
-#define MSG_REQUEST  0x2
-#define MSG_RESPONSE 0x3
-
-struct voice_svc_write_msg {
-	__u32 msg_type;
-	__u8 payload[0];
-};
-
-struct voice_svc_register {
-	char svc_name[MAX_APR_SERVICE_NAME_LEN];
-	__u32 src_port;
-	__u8 reg_flag;
-};
-
-struct voice_svc_cmd_response {
-	__u32 src_port;
-	__u32 dest_port;
-	__u32 token;
-	__u32 opcode;
-	__u32 payload_size;
-	__u8 payload[0];
-};
-
-struct voice_svc_cmd_request {
-	char svc_name[MAX_APR_SERVICE_NAME_LEN];
-	__u32 src_port;
-	__u32 dest_port;
-	__u32 token;
-	__u32 opcode;
-	__u32 payload_size;
-	__u8 payload[0];
-};
-
-#endif

diff --git a/k318/original-kernel-headers/video/msm_hdmi_modes.h b/k318/original-kernel-headers/video/msm_hdmi_modes.h
deleted file mode 100644
index 2200485..0000000
--- a/k318/original-kernel-headers/video/msm_hdmi_modes.h
+++ /dev/null

@@ -1,559 +0,0 @@
-#ifndef _UAPI_MSM_HDMI_MODES_H__
-#define _UAPI_MSM_HDMI_MODES_H__
-#include <linux/types.h>
-#include <linux/errno.h>
-
-#define MSM_HDMI_RGB_888_24BPP_FORMAT       BIT(0)
-#define MSM_HDMI_YUV_420_12BPP_FORMAT       BIT(1)
-
-enum aspect_ratio {
-	HDMI_RES_AR_INVALID,
-	HDMI_RES_AR_4_3,
-	HDMI_RES_AR_5_4,
-	HDMI_RES_AR_16_9,
-	HDMI_RES_AR_16_10,
-	HDMI_RES_AR_64_27,
-	HDMI_RES_AR_256_135,
-	HDMI_RES_AR_MAX,
-};
-
-enum msm_hdmi_s3d_mode {
-	HDMI_S3D_NONE,
-	HDMI_S3D_SIDE_BY_SIDE,
-	HDMI_S3D_TOP_AND_BOTTOM,
-	HDMI_S3D_FRAME_PACKING,
-	HDMI_S3D_MAX,
-};
-
-struct msm_hdmi_mode_timing_info {
-	uint32_t	video_format;
-	uint32_t	active_h;
-	uint32_t	front_porch_h;
-	uint32_t	pulse_width_h;
-	uint32_t	back_porch_h;
-	uint32_t	active_low_h;
-	uint32_t	active_v;
-	uint32_t	front_porch_v;
-	uint32_t	pulse_width_v;
-	uint32_t	back_porch_v;
-	uint32_t	active_low_v;
-	/* Must divide by 1000 to get the actual frequency in MHZ */
-	uint32_t	pixel_freq;
-	/* Must divide by 1000 to get the actual frequency in HZ */
-	uint32_t	refresh_rate;
-	uint32_t	interlaced;
-	uint32_t	supported;
-	enum aspect_ratio ar;
-	/* Flags indicating support for specific pixel formats */
-	uint32_t        pixel_formats;
-};
-
-#define MSM_HDMI_INIT_RES_PAGE          1
-
-#define MSM_HDMI_MODES_CEA		(1 << 0)
-#define MSM_HDMI_MODES_XTND		(1 << 1)
-#define MSM_HDMI_MODES_DVI		(1 << 2)
-#define MSM_HDMI_MODES_ALL		(MSM_HDMI_MODES_CEA |\
-					 MSM_HDMI_MODES_XTND |\
-					 MSM_HDMI_MODES_DVI)
-
-/* all video formats defined by CEA 861D */
-#define HDMI_VFRMT_UNKNOWN		0
-#define HDMI_VFRMT_640x480p60_4_3	1
-#define HDMI_VFRMT_720x480p60_4_3	2
-#define HDMI_VFRMT_720x480p60_16_9	3
-#define HDMI_VFRMT_1280x720p60_16_9	4
-#define HDMI_VFRMT_1920x1080i60_16_9	5
-#define HDMI_VFRMT_720x480i60_4_3	6
-#define HDMI_VFRMT_1440x480i60_4_3	HDMI_VFRMT_720x480i60_4_3
-#define HDMI_VFRMT_720x480i60_16_9	7
-#define HDMI_VFRMT_1440x480i60_16_9	HDMI_VFRMT_720x480i60_16_9
-#define HDMI_VFRMT_720x240p60_4_3	8
-#define HDMI_VFRMT_1440x240p60_4_3	HDMI_VFRMT_720x240p60_4_3
-#define HDMI_VFRMT_720x240p60_16_9	9
-#define HDMI_VFRMT_1440x240p60_16_9	HDMI_VFRMT_720x240p60_16_9
-#define HDMI_VFRMT_2880x480i60_4_3	10
-#define HDMI_VFRMT_2880x480i60_16_9	11
-#define HDMI_VFRMT_2880x240p60_4_3	12
-#define HDMI_VFRMT_2880x240p60_16_9	13
-#define HDMI_VFRMT_1440x480p60_4_3	14
-#define HDMI_VFRMT_1440x480p60_16_9	15
-#define HDMI_VFRMT_1920x1080p60_16_9	16
-#define HDMI_VFRMT_720x576p50_4_3	17
-#define HDMI_VFRMT_720x576p50_16_9	18
-#define HDMI_VFRMT_1280x720p50_16_9	19
-#define HDMI_VFRMT_1920x1080i50_16_9	20
-#define HDMI_VFRMT_720x576i50_4_3	21
-#define HDMI_VFRMT_1440x576i50_4_3	HDMI_VFRMT_720x576i50_4_3
-#define HDMI_VFRMT_720x576i50_16_9	22
-#define HDMI_VFRMT_1440x576i50_16_9	HDMI_VFRMT_720x576i50_16_9
-#define HDMI_VFRMT_720x288p50_4_3	23
-#define HDMI_VFRMT_1440x288p50_4_3	HDMI_VFRMT_720x288p50_4_3
-#define HDMI_VFRMT_720x288p50_16_9	24
-#define HDMI_VFRMT_1440x288p50_16_9	HDMI_VFRMT_720x288p50_16_9
-#define HDMI_VFRMT_2880x576i50_4_3	25
-#define HDMI_VFRMT_2880x576i50_16_9	26
-#define HDMI_VFRMT_2880x288p50_4_3	27
-#define HDMI_VFRMT_2880x288p50_16_9	28
-#define HDMI_VFRMT_1440x576p50_4_3	29
-#define HDMI_VFRMT_1440x576p50_16_9	30
-#define HDMI_VFRMT_1920x1080p50_16_9	31
-#define HDMI_VFRMT_1920x1080p24_16_9	32
-#define HDMI_VFRMT_1920x1080p25_16_9	33
-#define HDMI_VFRMT_1920x1080p30_16_9	34
-#define HDMI_VFRMT_2880x480p60_4_3	35
-#define HDMI_VFRMT_2880x480p60_16_9	36
-#define HDMI_VFRMT_2880x576p50_4_3	37
-#define HDMI_VFRMT_2880x576p50_16_9	38
-#define HDMI_VFRMT_1920x1250i50_16_9	39
-#define HDMI_VFRMT_1920x1080i100_16_9	40
-#define HDMI_VFRMT_1280x720p100_16_9	41
-#define HDMI_VFRMT_720x576p100_4_3	42
-#define HDMI_VFRMT_720x576p100_16_9	43
-#define HDMI_VFRMT_720x576i100_4_3	44
-#define HDMI_VFRMT_1440x576i100_4_3	HDMI_VFRMT_720x576i100_4_3
-#define HDMI_VFRMT_720x576i100_16_9	45
-#define HDMI_VFRMT_1440x576i100_16_9	HDMI_VFRMT_720x576i100_16_9
-#define HDMI_VFRMT_1920x1080i120_16_9	46
-#define HDMI_VFRMT_1280x720p120_16_9	47
-#define HDMI_VFRMT_720x480p120_4_3	48
-#define HDMI_VFRMT_720x480p120_16_9	49
-#define HDMI_VFRMT_720x480i120_4_3	50
-#define HDMI_VFRMT_1440x480i120_4_3	HDMI_VFRMT_720x480i120_4_3
-#define HDMI_VFRMT_720x480i120_16_9	51
-#define HDMI_VFRMT_1440x480i120_16_9	HDMI_VFRMT_720x480i120_16_9
-#define HDMI_VFRMT_720x576p200_4_3	52
-#define HDMI_VFRMT_720x576p200_16_9	53
-#define HDMI_VFRMT_720x576i200_4_3	54
-#define HDMI_VFRMT_1440x576i200_4_3	HDMI_VFRMT_720x576i200_4_3
-#define HDMI_VFRMT_720x576i200_16_9	55
-#define HDMI_VFRMT_1440x576i200_16_9	HDMI_VFRMT_720x576i200_16_9
-#define HDMI_VFRMT_720x480p240_4_3	56
-#define HDMI_VFRMT_720x480p240_16_9	57
-#define HDMI_VFRMT_720x480i240_4_3	58
-#define HDMI_VFRMT_1440x480i240_4_3	HDMI_VFRMT_720x480i240_4_3
-#define HDMI_VFRMT_720x480i240_16_9	59
-#define HDMI_VFRMT_1440x480i240_16_9	HDMI_VFRMT_720x480i240_16_9
-#define HDMI_VFRMT_1280x720p24_16_9	60
-#define HDMI_VFRMT_1280x720p25_16_9	61
-#define HDMI_VFRMT_1280x720p30_16_9	62
-#define HDMI_VFRMT_1920x1080p120_16_9	63
-#define HDMI_VFRMT_1920x1080p100_16_9	64
-#define HDMI_VFRMT_1280x720p24_64_27    65
-#define HDMI_VFRMT_1280x720p25_64_27    66
-#define HDMI_VFRMT_1280x720p30_64_27    67
-#define HDMI_VFRMT_1280x720p50_64_27    68
-#define HDMI_VFRMT_1280x720p60_64_27    69
-#define HDMI_VFRMT_1280x720p100_64_27   70
-#define HDMI_VFRMT_1280x720p120_64_27   71
-#define HDMI_VFRMT_1920x1080p24_64_27   72
-#define HDMI_VFRMT_1920x1080p25_64_27   73
-#define HDMI_VFRMT_1920x1080p30_64_27   74
-#define HDMI_VFRMT_1920x1080p50_64_27   75
-#define HDMI_VFRMT_1920x1080p60_64_27   76
-#define HDMI_VFRMT_1920x1080p100_64_27  77
-#define HDMI_VFRMT_1920x1080p120_64_27  78
-#define HDMI_VFRMT_1680x720p24_64_27    79
-#define HDMI_VFRMT_1680x720p25_64_27    80
-#define HDMI_VFRMT_1680x720p30_64_27    81
-#define HDMI_VFRMT_1680x720p50_64_27    82
-#define HDMI_VFRMT_1680x720p60_64_27    83
-#define HDMI_VFRMT_1680x720p100_64_27   84
-#define HDMI_VFRMT_1680x720p120_64_27   85
-#define HDMI_VFRMT_2560x1080p24_64_27   86
-#define HDMI_VFRMT_2560x1080p25_64_27   87
-#define HDMI_VFRMT_2560x1080p30_64_27   88
-#define HDMI_VFRMT_2560x1080p50_64_27   89
-#define HDMI_VFRMT_2560x1080p60_64_27   90
-#define HDMI_VFRMT_2560x1080p100_64_27  91
-#define HDMI_VFRMT_2560x1080p120_64_27  92
-#define HDMI_VFRMT_3840x2160p24_16_9    93
-#define HDMI_VFRMT_3840x2160p25_16_9    94
-#define HDMI_VFRMT_3840x2160p30_16_9    95
-#define HDMI_VFRMT_3840x2160p50_16_9    96
-#define HDMI_VFRMT_3840x2160p60_16_9    97
-#define HDMI_VFRMT_4096x2160p24_256_135 98
-#define HDMI_VFRMT_4096x2160p25_256_135 99
-#define HDMI_VFRMT_4096x2160p30_256_135 100
-#define HDMI_VFRMT_4096x2160p50_256_135 101
-#define HDMI_VFRMT_4096x2160p60_256_135 102
-#define HDMI_VFRMT_3840x2160p24_64_27   103
-#define HDMI_VFRMT_3840x2160p25_64_27   104
-#define HDMI_VFRMT_3840x2160p30_64_27   105
-#define HDMI_VFRMT_3840x2160p50_64_27   106
-#define HDMI_VFRMT_3840x2160p60_64_27   107
-
-/* Video Identification Codes from 107-127 are reserved for the future */
-#define HDMI_VFRMT_END			127
-
-#define EVFRMT_OFF(x)			(HDMI_VFRMT_END + x)
-
-/* extended video formats */
-#define HDMI_EVFRMT_3840x2160p30_16_9	EVFRMT_OFF(1)
-#define HDMI_EVFRMT_3840x2160p25_16_9	EVFRMT_OFF(2)
-#define HDMI_EVFRMT_3840x2160p24_16_9	EVFRMT_OFF(3)
-#define HDMI_EVFRMT_4096x2160p24_16_9	EVFRMT_OFF(4)
-#define HDMI_EVFRMT_END			HDMI_EVFRMT_4096x2160p24_16_9
-
-#define WQXGA_OFF(x)			(HDMI_EVFRMT_END + x)
-
-/* WQXGA */
-#define HDMI_VFRMT_2560x1600p60_16_9	WQXGA_OFF(1)
-#define HDMI_WQXGAFRMT_END		HDMI_VFRMT_2560x1600p60_16_9
-
-#define WXGA_OFF(x)			(HDMI_WQXGAFRMT_END + x)
-
-/* WXGA */
-#define HDMI_VFRMT_1280x800p60_16_10	WXGA_OFF(1)
-#define HDMI_VFRMT_1366x768p60_16_10	WXGA_OFF(2)
-#define HDMI_WXGAFRMT_END		HDMI_VFRMT_1366x768p60_16_10
-
-#define ETI_OFF(x)			(HDMI_WXGAFRMT_END + x)
-
-/* ESTABLISHED TIMINGS I */
-#define HDMI_VFRMT_800x600p60_4_3	ETI_OFF(1)
-#define ETI_VFRMT_END			HDMI_VFRMT_800x600p60_4_3
-
-#define ETII_OFF(x)			(ETI_VFRMT_END + x)
-
-/* ESTABLISHED TIMINGS II */
-#define HDMI_VFRMT_1024x768p60_4_3	ETII_OFF(1)
-#define HDMI_VFRMT_1280x1024p60_5_4	ETII_OFF(2)
-#define ETII_VFRMT_END			HDMI_VFRMT_1280x1024p60_5_4
-
-#define ETIII_OFF(x)			(ETII_VFRMT_END + x)
-
-/* ESTABLISHED TIMINGS III */
-#define HDMI_VFRMT_848x480p60_16_9	ETIII_OFF(1)
-#define HDMI_VFRMT_1280x960p60_4_3	ETIII_OFF(2)
-#define HDMI_VFRMT_1360x768p60_16_9	ETIII_OFF(3)
-#define HDMI_VFRMT_1440x900p60_16_10	ETIII_OFF(4)
-#define HDMI_VFRMT_1400x1050p60_4_3	ETIII_OFF(5)
-#define HDMI_VFRMT_1680x1050p60_16_10	ETIII_OFF(6)
-#define HDMI_VFRMT_1600x1200p60_4_3	ETIII_OFF(7)
-#define HDMI_VFRMT_1920x1200p60_16_10	ETIII_OFF(8)
-#define ETIII_VFRMT_END			HDMI_VFRMT_1920x1200p60_16_10
-
-#define RESERVE_OFF(x)			(ETIII_VFRMT_END + x)
-
-#define HDMI_VFRMT_RESERVE1		RESERVE_OFF(1)
-#define HDMI_VFRMT_RESERVE2		RESERVE_OFF(2)
-#define HDMI_VFRMT_RESERVE3		RESERVE_OFF(3)
-#define HDMI_VFRMT_RESERVE4		RESERVE_OFF(4)
-#define HDMI_VFRMT_RESERVE5		RESERVE_OFF(5)
-#define HDMI_VFRMT_RESERVE6		RESERVE_OFF(6)
-#define HDMI_VFRMT_RESERVE7		RESERVE_OFF(7)
-#define HDMI_VFRMT_RESERVE8		RESERVE_OFF(8)
-#define RESERVE_VFRMT_END		HDMI_VFRMT_RESERVE8
-
-#define HDMI_VFRMT_MAX			(RESERVE_VFRMT_END + 1)
-
-/* Timing information for supported modes */
-#define VFRMT_NOT_SUPPORTED(VFRMT) \
-	{VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, false,		\
-		HDMI_RES_AR_INVALID}
-
-#define HDMI_VFRMT_640x480p60_4_3_TIMING				\
-	{HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true,		\
-	 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_720x480p60_4_3_TIMING				\
-	{HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_720x480p60_16_9_TIMING				\
-	{HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1280x720p60_16_9_TIMING				\
-	{HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false,	\
-	 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080i60_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false,	\
-	 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1440x480i60_4_3_TIMING				\
-	{HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1440x480i60_16_9_TIMING				\
-	{HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080p60_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_720x576p50_4_3_TIMING				\
-	{HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_720x576p50_16_9_TIMING				\
-	{HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1280x720p50_16_9_TIMING				\
-	{HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false,	\
-	 720,  5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1440x576i50_4_3_TIMING				\
-	{HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1440x576i50_16_9_TIMING				\
-	{HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080p50_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080p24_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080p25_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1920x1080p30_16_9_TIMING				\
-	{HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1024x768p60_4_3_TIMING                               \
-	{HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false,         \
-	768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1280x1024p60_5_4_TIMING				\
-	{HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false,	\
-	1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4, 0}
-#define HDMI_VFRMT_2560x1600p60_16_9_TIMING				\
-	{HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false,		\
-	 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_EVFRMT_3840x2160p30_16_9_TIMING				\
-	{HDMI_EVFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_EVFRMT_3840x2160p25_16_9_TIMING				\
-	{HDMI_EVFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_EVFRMT_3840x2160p24_16_9_TIMING				\
-	{HDMI_EVFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_EVFRMT_4096x2160p24_16_9_TIMING				\
-	{HDMI_EVFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-
-#define HDMI_VFRMT_800x600p60_4_3_TIMING				\
-	{HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false,	\
-	 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_848x480p60_16_9_TIMING				\
-	{HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false,	\
-	 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1280x960p60_4_3_TIMING\
-	{HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false,	\
-	 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1360x768p60_16_9_TIMING\
-	{HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false,	\
-	 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_1440x900p60_16_10_TIMING\
-	{HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false,	\
-	 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10, 0}
-#define HDMI_VFRMT_1400x1050p60_4_3_TIMING\
-	{HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false,	\
-	 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1680x1050p60_16_10_TIMING\
-	{HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false,	\
-	 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10, 0}
-#define HDMI_VFRMT_1600x1200p60_4_3_TIMING\
-	{HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false,	\
-	 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3, 0}
-#define HDMI_VFRMT_1920x1200p60_16_10_TIMING\
-	{HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false,\
-	 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10, 0}
-#define HDMI_VFRMT_1366x768p60_16_10_TIMING\
-	{HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false,\
-	 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10, 0}
-#define HDMI_VFRMT_1280x800p60_16_10_TIMING\
-	{HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true,\
-	 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10, 0}
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING                             \
-	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING                             \
-	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING                             \
-	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,       \
-	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_3840x2160p50_16_9_TIMING                             \
-	{HDMI_VFRMT_3840x2160p50_16_9, 3840, 1056, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-#define HDMI_VFRMT_3840x2160p60_16_9_TIMING                             \
-	{HDMI_VFRMT_3840x2160p60_16_9, 3840, 176, 88, 296, false,       \
-	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
-		HDMI_RES_AR_16_9, 0}
-
-#define HDMI_VFRMT_4096x2160p24_256_135_TIMING                          \
-	{HDMI_VFRMT_4096x2160p24_256_135, 4096, 1020, 88, 296, false,   \
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
-		HDMI_RES_AR_256_135, 0}
-#define HDMI_VFRMT_4096x2160p25_256_135_TIMING                          \
-	{HDMI_VFRMT_4096x2160p25_256_135, 4096, 968, 88, 128, false,    \
-	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
-		HDMI_RES_AR_256_135, 0}
-#define HDMI_VFRMT_4096x2160p30_256_135_TIMING                          \
-	{HDMI_VFRMT_4096x2160p30_256_135, 4096, 88, 88, 128, false,     \
-	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
-		HDMI_RES_AR_256_135, 0}
-#define HDMI_VFRMT_4096x2160p50_256_135_TIMING                          \
-	{HDMI_VFRMT_4096x2160p50_256_135, 4096, 968, 88, 128, false,    \
-	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
-		HDMI_RES_AR_256_135, 0}
-#define HDMI_VFRMT_4096x2160p60_256_135_TIMING                          \
-	{HDMI_VFRMT_4096x2160p60_256_135, 4096, 88, 88, 128, false,     \
-	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
-		HDMI_RES_AR_256_135, 0}
-
-#define HDMI_VFRMT_3840x2160p24_64_27_TIMING                             \
-	{HDMI_VFRMT_3840x2160p24_64_27, 3840, 1276, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
-		HDMI_RES_AR_64_27, 0}
-#define HDMI_VFRMT_3840x2160p25_64_27_TIMING                             \
-	{HDMI_VFRMT_3840x2160p25_64_27, 3840, 1056, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
-		HDMI_RES_AR_64_27, 0}
-#define HDMI_VFRMT_3840x2160p30_64_27_TIMING                             \
-	{HDMI_VFRMT_3840x2160p30_64_27, 3840, 176, 88, 296, false,       \
-	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
-		HDMI_RES_AR_64_27, 0}
-#define HDMI_VFRMT_3840x2160p50_64_27_TIMING                             \
-	{HDMI_VFRMT_3840x2160p50_64_27, 3840, 1056, 88, 296, false,      \
-	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
-		HDMI_RES_AR_64_27, 0}
-#define HDMI_VFRMT_3840x2160p60_64_27_TIMING                             \
-	{HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false,       \
-	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
-		HDMI_RES_AR_64_27, 0}
-
-#define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do {		\
-	struct msm_hdmi_mode_timing_info mode = MODE##_TIMING;	\
-	LUT[MODE] = mode;\
-	} while (0)
-
-#define MSM_HDMI_MODES_INIT_TIMINGS(__lut)	\
-do {	\
-	unsigned int i;	\
-	for (i = 0; i < HDMI_VFRMT_MAX; i++) {	\
-		struct msm_hdmi_mode_timing_info mode =	\
-			VFRMT_NOT_SUPPORTED(i);	\
-		(__lut)[i] = mode;	\
-	}	\
-} while (0)
-
-#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut, __type)	\
-do {	\
-	if (__type & MSM_HDMI_MODES_CEA) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_640x480p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x480p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x480p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x720p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080i60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x480i60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x480i60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x576p50_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_720x576p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x720p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x576i50_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x576i50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p50_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p24_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p25_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1080p30_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p24_16_9);  \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p25_16_9);  \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p30_16_9);  \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p50_16_9);  \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p60_16_9);  \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p24_256_135);\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p25_256_135);\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p30_256_135);\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p50_256_135);\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p60_256_135);\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p24_64_27); \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p25_64_27); \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p30_64_27); \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p50_64_27); \
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p60_64_27); \
-	}	\
-	if (__type & MSM_HDMI_MODES_XTND) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_EVFRMT_3840x2160p30_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_EVFRMT_3840x2160p25_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_EVFRMT_3840x2160p24_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_EVFRMT_4096x2160p24_16_9);	\
-	}	\
-	if (__type & MSM_HDMI_MODES_DVI) {	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1024x768p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x1024p60_5_4);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_2560x1600p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_800x600p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_848x480p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x960p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1360x768p60_16_9);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1440x900p60_16_10);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1400x1050p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1680x1050p60_16_10);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1600x1200p60_4_3);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1920x1200p60_16_10);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1366x768p60_16_10);	\
-		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_1280x800p60_16_10);	\
-	}	\
-} while (0)
-
-#define MSM_HDMI_MODES_GET_DETAILS(mode, MODE) do {		\
-	struct msm_hdmi_mode_timing_info info = MODE##_TIMING;	\
-	*mode = info;						\
-	} while (0)
-
-#endif /* _UAPI_MSM_HDMI_MODES_H__ */

diff --git a/kernel-headers/linux/fips_status.h b/kernel-headers/linux/fips_status.h
index 1f1e552..cc760aa 100644
--- a/kernel-headers/linux/fips_status.h
+++ b/kernel-headers/linux/fips_status.h

@@ -31,3 +31,4 @@
 };
 #endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/kernel-headers/linux/ion.h b/kernel-headers/linux/ion.h
index bdfbd5a..8cd5d3c 100644
--- a/kernel-headers/linux/ion.h
+++ b/kernel-headers/linux/ion.h

@@ -16,8 +16,8 @@
  ***
  ****************************************************************************
  ****************************************************************************/
-#ifndef _UAPI_ION_H
-#define _UAPI_ION_H
+#ifndef _UAPI_LINUX_ION_H
+#define _UAPI_LINUX_ION_H
 #include <linux/ioctl.h>
 #include <linux/types.h>
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -38,7 +38,7 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT)
 #define ION_HEAP_TYPE_DMA_MASK (1 << ION_HEAP_TYPE_DMA)
-#define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8
+#define ION_NUM_HEAP_IDS (sizeof(unsigned int) * 8)
 #define ION_FLAG_CACHED 1
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_FLAG_CACHED_NEEDS_SYNC 2
@@ -76,3 +76,4 @@
 #define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
 #endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/kernel-headers/linux/mfd/msm-adie-codec.h b/kernel-headers/linux/mfd/msm-adie-codec.h
index c8c9f43..800f6af 100644
--- a/kernel-headers/linux/mfd/msm-adie-codec.h
+++ b/kernel-headers/linux/mfd/msm-adie-codec.h

@@ -92,3 +92,4 @@
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h b/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
index 2b16bcb..c9c7820 100644
--- a/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h
+++ b/kernel-headers/linux/mfd/wcd9xxx/wcd9320_registers.h

@@ -1743,3 +1743,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define TAIKO_CODEC_UNPACK_ENTRY(packed,reg,mask,val) do { ((reg) = ((packed >> 16) & (0xffff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while(0);
 #endif
+

diff --git a/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
index c6aad12..fd5c944 100644
--- a/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
+++ b/kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h

@@ -404,5 +404,31 @@
 #define WCD9330_A_LEAKAGE_CTL__POR (0x04)
 #define WCD9330_A_CDC_CTL (0x034)
 #define WCD9330_A_CDC_CTL__POR (0x00)
+#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0 (0xB42)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0 (0xB56)
+#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0 (0xB6A)
+#define WCD9XXX_A_CDC_CLSH_K1_MSB (0xC08)
+#define WCD9XXX_A_CDC_CLSH_K1_LSB (0xC09)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define WCD9XXX_A_ANA_RX_SUPPLIES (0x608)
+#define WCD9XXX_A_ANA_HPH (0x609)
+#define WCD9XXX_A_CDC_CLSH_CRC (0xC01)
+#define WCD9XXX_FLYBACK_EN (0x6A4)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define WCD9XXX_RX_BIAS_FLYB_BUFF (0x6C7)
+#define WCD9XXX_HPH_L_EN (0x6D3)
+#define WCD9XXX_HPH_R_EN (0x6D6)
+#define WCD9XXX_HPH_REFBUFF_UHQA_CTL (0x6DD)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define WCD9XXX_CLASSH_CTRL_VCL_2 (0x69B)
+#define WCD9XXX_CDC_CLSH_HPH_V_PA (0xC04)
+#define WCD9XXX_CDC_RX0_RX_PATH_SEC0 (0xB49)
+#define WCD9XXX_CDC_RX1_RX_PATH_CTL (0xB55)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define WCD9XXX_CDC_RX2_RX_PATH_CTL (0xB69)
+#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL (0xD41)
+#define WCD9XXX_CLASSH_CTRL_CCL_1 (0x69C)
 #endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/kernel-headers/linux/msm_audio.h b/kernel-headers/linux/msm_audio.h
index 8435f99..fab6458 100644
--- a/kernel-headers/linux/msm_audio.h
+++ b/kernel-headers/linux/msm_audio.h

@@ -92,7 +92,17 @@
 #define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, struct msm_audio_ion_info)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, struct msm_audio_ion_info)
-#define AUDIO_MAX_COMMON_IOCTL_NUM 100
+#define AUDIO_SET_EFFECTS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 99, struct msm_hwacc_effects_config)
+#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, struct msm_hwacc_buf_cfg)
+#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, struct msm_hwacc_buf_avail)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
+#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
+#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
+#define AUDIO_PM_AWAKE _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define AUDIO_PM_RELAX _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned)
+#define AUDIO_MAX_COMMON_IOCTL_NUM 107
 #define HANDSET_MIC 0x01
 #define HANDSET_SPKR 0x02
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -122,7 +132,7 @@
 #define I2S_TX 0x21
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ADRC_ENABLE 0x0001
-#define EQ_ENABLE 0x0002
+#define EQUALIZER_ENABLE 0x0002
 #define IIR_ENABLE 0x0004
 #define QCONCERT_PLUS_ENABLE 0x0008
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -381,4 +391,35 @@
   uint32_t * phys_buf;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msm_hwacc_data_config {
+  __u32 buf_size;
+  __u32 num_buf;
+  __u32 num_channels;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  __u8 channel_map[8];
+  __u32 sample_rate;
+  __u32 bits_per_sample;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msm_hwacc_buf_cfg {
+  __u32 input_len;
+  __u32 output_len;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msm_hwacc_buf_avail {
+  __u32 input_num_avail;
+  __u32 output_num_avail;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msm_hwacc_effects_config {
+  struct msm_hwacc_data_config input;
+  struct msm_hwacc_data_config output;
+  struct msm_hwacc_buf_cfg buf_cfg;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  __u32 meta_mode_enabled;
+  __u32 overwrite_topology;
+  __s32 topology;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/kernel-headers/linux/msm_audio_calibration.h b/kernel-headers/linux/msm_audio_calibration.h
index 5db6a5a..3feecfa 100644
--- a/kernel-headers/linux/msm_audio_calibration.h
+++ b/kernel-headers/linux/msm_audio_calibration.h

@@ -74,357 +74,417 @@
   AFE_FB_SPKR_PROT_CAL_TYPE,
   AFE_HW_DELAY_CAL_TYPE,
   AFE_SIDETONE_CAL_TYPE,
-  LSM_CUST_TOPOLOGY_CAL_TYPE,
+  AFE_TOPOLOGY_CAL_TYPE,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  AFE_CUST_TOPOLOGY_CAL_TYPE,
+  LSM_CUST_TOPOLOGY_CAL_TYPE,
   LSM_TOPOLOGY_CAL_TYPE,
   LSM_CAL_TYPE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ADM_RTAC_INFO_CAL_TYPE,
   VOICE_RTAC_INFO_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ADM_RTAC_APR_CAL_TYPE,
   ASM_RTAC_APR_CAL_TYPE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   VOICE_RTAC_APR_CAL_TYPE,
   MAD_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ULP_AFE_CAL_TYPE,
   ULP_LSM_CAL_TYPE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DTS_EAGLE_CAL_TYPE,
   AUDIO_CORE_METAINFO_CAL_TYPE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SRS_TRUMEDIA_CAL_TYPE,
+  CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  ADM_RTAC_AUDVOL_CAL_TYPE,
+  ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
+  AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
+  AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MAX_CAL_TYPES,
 };
-enum {
+#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
+#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   VERSION_0_0,
 };
 enum {
-  PER_VOCODER_CAL_BIT_MASK = 0x10000,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  PER_VOCODER_CAL_BIT_MASK = 0x10000,
 };
 #define MAX_IOCTL_CMD_SIZE 512
 struct audio_cal_header {
-  int32_t data_size;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t data_size;
   int32_t version;
   int32_t cal_type;
   int32_t cal_type_size;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_type_header {
   int32_t version;
   int32_t buffer_number;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_data {
   int32_t cal_size;
   int32_t mem_handle;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_type_alloc {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_alloc {
   struct audio_cal_header hdr;
   struct audio_cal_type_alloc cal_type;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_type_dealloc {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_dealloc {
   struct audio_cal_header hdr;
   struct audio_cal_type_dealloc cal_type;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_type_prepare {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_prepare {
   struct audio_cal_header hdr;
   struct audio_cal_type_prepare cal_type;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_type_post {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_post {
   struct audio_cal_header hdr;
   struct audio_cal_type_post cal_type;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_info_metainfo {
   uint32_t nKey;
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   RX_DEVICE,
   TX_DEVICE,
   MAX_PATH_TYPE
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_info_adm_top {
   int32_t topology;
   int32_t acdb_id;
-  int32_t path;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t path;
   int32_t app_type;
   int32_t sample_rate;
 };
-struct audio_cal_info_audproc {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_info_audproc {
   int32_t acdb_id;
   int32_t path;
   int32_t app_type;
-  int32_t sample_rate;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t sample_rate;
 };
 struct audio_cal_info_audvol {
   int32_t acdb_id;
-  int32_t path;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t path;
   int32_t app_type;
   int32_t vol_index;
 };
-struct audio_cal_info_afe {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_info_afe {
   int32_t acdb_id;
   int32_t path;
   int32_t sample_rate;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct audio_cal_info_afe_top {
+  int32_t topology;
+  int32_t acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t path;
+  int32_t sample_rate;
+};
 struct audio_cal_info_asm_top {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t topology;
   int32_t app_type;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_info_audstrm {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t app_type;
 };
 struct audio_cal_info_aanc {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #define MAX_HW_DELAY_ENTRIES 25
 struct audio_cal_hw_delay_entry {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t sample_rate;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t delay_usec;
 };
 struct audio_cal_hw_delay_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t num_entries;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_hw_delay_entry entry[MAX_HW_DELAY_ENTRIES];
 };
 struct audio_cal_info_hw_delay {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t path;
   int32_t property_type;
   struct audio_cal_hw_delay_data data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 enum msm_spkr_prot_states {
   MSM_SPKR_PROT_CALIBRATED,
   MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MSM_SPKR_PROT_DISABLED,
-  MSM_SPKR_PROT_NOT_CALIBRATED
-};
-enum msm_spkr_count {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MSM_SPKR_PROT_NOT_CALIBRATED,
+  MSM_SPKR_PROT_PRE_CALIBRATED,
+  MSM_SPKR_PROT_IN_FTM_MODE
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
+enum msm_spkr_count {
   SP_V2_SPKR_1,
   SP_V2_SPKR_2,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SP_V2_NUM_MAX_SPKRS
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_info_spk_prot_cfg {
   int32_t r0[SP_V2_NUM_MAX_SPKRS];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t t0[SP_V2_NUM_MAX_SPKRS];
   uint32_t quick_calib_flag;
+  uint32_t mode;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_info_sp_th_vi_ftm_cfg {
+  uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
+  uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
+  uint32_t mode;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct audio_cal_info_sp_ex_vi_ftm_cfg {
+  uint32_t wait_time[SP_V2_NUM_MAX_SPKRS];
+  uint32_t ftm_time[SP_V2_NUM_MAX_SPKRS];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t mode;
 };
+struct audio_cal_info_sp_ex_vi_param {
+  int32_t freq_q20[SP_V2_NUM_MAX_SPKRS];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t resis_q24[SP_V2_NUM_MAX_SPKRS];
+  int32_t qmct_q24[SP_V2_NUM_MAX_SPKRS];
+  int32_t status[SP_V2_NUM_MAX_SPKRS];
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_info_sp_th_vi_param {
+  int32_t r_dc_q24[SP_V2_NUM_MAX_SPKRS];
+  int32_t temp_q22[SP_V2_NUM_MAX_SPKRS];
+  int32_t status[SP_V2_NUM_MAX_SPKRS];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct audio_cal_info_msm_spk_prot_status {
   int32_t r0[SP_V2_NUM_MAX_SPKRS];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t status;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_info_sidetone {
   uint16_t enable;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t gain;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t tx_acdb_id;
   int32_t rx_acdb_id;
   int32_t mid;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t pid;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_info_lsm_top {
   int32_t topology;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t app_type;
 };
 struct audio_cal_info_lsm {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t path;
   int32_t app_type;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_info_voc_top {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t topology;
   int32_t acdb_id;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_info_vocproc {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t tx_acdb_id;
   int32_t rx_acdb_id;
   int32_t tx_sample_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t rx_sample_rate;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
   DEFAULT_FEATURE_SET,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   VOL_BOOST_FEATURE_SET,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_info_vocvol {
   int32_t tx_acdb_id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t rx_acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t feature_set;
 };
 struct audio_cal_info_vocdev_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t tx_acdb_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t rx_acdb_id;
 };
 #define MAX_VOICE_COLUMNS 20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 union audio_cal_col_na {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t val8;
   uint16_t val16;
   uint32_t val32;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint64_t val64;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 } __packed;
 struct audio_cal_col {
   uint32_t id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union audio_cal_col_na na_value;
 } __packed;
 struct audio_cal_col_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t num_columns;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_col column[MAX_VOICE_COLUMNS];
 } __packed;
 struct audio_cal_info_voc_col {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t table_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int32_t tx_acdb_id;
   int32_t rx_acdb_id;
   struct audio_cal_col_data data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_basic {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_basic {
   struct audio_cal_header hdr;
   struct audio_cal_type_basic cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_adm_top {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_adm_top cal_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_adm_top {
   struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_adm_top cal_type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_metainfo {
   struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_metainfo cal_info;
 };
 struct audio_core_metainfo {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_metainfo cal_type;
 };
 struct audio_cal_type_audproc {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_audproc cal_info;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_audproc {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_audproc cal_type;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_audvol {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
   struct audio_cal_info_audvol cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_audvol {
   struct audio_cal_header hdr;
   struct audio_cal_type_audvol cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_asm_top {
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_asm_top cal_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_asm_top {
   struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_asm_top cal_type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_audstrm {
   struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_audstrm cal_info;
 };
 struct audio_cal_audstrm {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_audstrm cal_type;
 };
 struct audio_cal_type_afe {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_afe cal_info;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_afe {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_afe cal_type;
 };
+struct audio_cal_type_afe_top {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_type_header cal_hdr;
+  struct audio_cal_data cal_data;
+  struct audio_cal_info_afe_top cal_info;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_afe_top {
+  struct audio_cal_header hdr;
+  struct audio_cal_type_afe_top cal_type;
+};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_aanc {
   struct audio_cal_type_header cal_hdr;
@@ -448,117 +508,163 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_fb_spk_prot_cfg cal_type;
 };
+struct audio_cal_type_sp_th_vi_ftm_cfg {
+  struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_data cal_data;
+  struct audio_cal_info_sp_th_vi_ftm_cfg cal_info;
+};
+struct audio_cal_sp_th_vi_ftm_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_header hdr;
+  struct audio_cal_type_sp_th_vi_ftm_cfg cal_type;
+};
+struct audio_cal_type_sp_ex_vi_ftm_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_type_header cal_hdr;
+  struct audio_cal_data cal_data;
+  struct audio_cal_info_sp_ex_vi_ftm_cfg cal_info;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct audio_cal_sp_ex_vi_ftm_cfg {
+  struct audio_cal_header hdr;
+  struct audio_cal_type_sp_ex_vi_ftm_cfg cal_type;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_hw_delay {
   struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_hw_delay cal_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_hw_delay {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_hw_delay cal_type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_sidetone {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_sidetone cal_info;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_sidetone {
   struct audio_cal_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_sidetone cal_type;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_lsm_top {
   struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_lsm_top cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_lsm_top {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_lsm_top cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_lsm {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_lsm cal_info;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_lsm {
   struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_lsm cal_type;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_voc_top {
   struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_voc_top cal_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_voc_top {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_voc_top cal_type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_vocproc {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_vocproc cal_info;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_vocproc {
   struct audio_cal_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_vocproc cal_type;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_vocvol {
   struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_vocvol cal_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_vocvol {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_vocvol cal_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_vocdev_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_info_vocdev_cfg cal_info;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_vocdev_cfg {
   struct audio_cal_header hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_vocdev_cfg cal_type;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct audio_cal_type_voc_col {
   struct audio_cal_type_header cal_hdr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_data cal_data;
   struct audio_cal_info_voc_col cal_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_voc_col {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_header hdr;
   struct audio_cal_type_voc_col cal_type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct audio_cal_type_fb_spk_prot_status {
+  struct audio_cal_type_header cal_hdr;
+  struct audio_cal_data cal_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_info_msm_spk_prot_status cal_info;
+};
+struct audio_cal_fb_spk_prot_status {
+  struct audio_cal_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_type_fb_spk_prot_status cal_type;
+};
+struct audio_cal_type_sp_th_vi_param {
+  struct audio_cal_type_header cal_hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_data cal_data;
+  struct audio_cal_info_sp_th_vi_param cal_info;
+};
+struct audio_cal_sp_th_vi_param {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct audio_cal_header hdr;
+  struct audio_cal_type_sp_th_vi_param cal_type;
+};
+struct audio_cal_type_sp_ex_vi_param {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct audio_cal_type_header cal_hdr;
   struct audio_cal_data cal_data;
-  struct audio_cal_info_msm_spk_prot_status cal_info;
+  struct audio_cal_info_sp_ex_vi_param cal_info;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct audio_cal_fb_spk_prot_status {
+struct audio_cal_sp_ex_vi_param {
   struct audio_cal_header hdr;
-  struct audio_cal_type_fb_spk_prot_status cal_type;
+  struct audio_cal_type_sp_ex_vi_param cal_type;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/kernel-headers/linux/msm_dsps.h b/kernel-headers/linux/msm_dsps.h
index c36df09..f2a33eb 100644
--- a/kernel-headers/linux/msm_dsps.h
+++ b/kernel-headers/linux/msm_dsps.h

@@ -28,3 +28,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5)
 #endif
+

diff --git a/kernel-headers/linux/msm_ion.h b/kernel-headers/linux/msm_ion.h
index a03f84a..177c345 100644
--- a/kernel-headers/linux/msm_ion.h
+++ b/kernel-headers/linux/msm_ion.h

@@ -23,101 +23,120 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
   ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
-  ION_HEAP_TYPE_REMOVED,
-};
+  ION_HEAP_TYPE_SYSTEM_SECURE,
+  ION_HEAP_TYPE_HYP_CMA,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 enum ion_heap_ids {
   INVALID_HEAP_ID = - 1,
   ION_CP_MM_HEAP_ID = 8,
-  ION_CP_MFC_HEAP_ID = 12,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  ION_SECURE_HEAP_ID = 9,
+  ION_SECURE_DISPLAY_HEAP_ID = 10,
+  ION_CP_MFC_HEAP_ID = 12,
   ION_CP_WB_HEAP_ID = 16,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_CAMERA_HEAP_ID = 20,
   ION_SYSTEM_CONTIG_HEAP_ID = 21,
   ION_ADSP_HEAP_ID = 22,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_PIL1_HEAP_ID = 23,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_SF_HEAP_ID = 24,
   ION_SYSTEM_HEAP_ID = 25,
   ION_PIL2_HEAP_ID = 26,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_QSECOM_HEAP_ID = 27,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   ION_AUDIO_HEAP_ID = 28,
   ION_MM_FIRMWARE_HEAP_ID = 29,
   ION_HEAP_ID_RESERVED = 31
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
 #define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
 enum ion_fixed_position {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOT_FIXED,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   FIXED_LOW,
   FIXED_MIDDLE,
   FIXED_HIGH,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 enum cp_mem_usage {
   VIDEO_BITSTREAM = 0x1,
   VIDEO_PIXEL = 0x2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   VIDEO_NONPIXEL = 0x3,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DISPLAY_SECURE_CP_USAGE = 0x4,
   CAMERA_SECURE_CP_USAGE = 0x5,
   MAX_USAGE = 0x6,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   UNKNOWN = 0x7FFFFFFF,
-};
-#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
-#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+#define ION_FLAG_CP_TOUCH (1 << 17)
+#define ION_FLAG_CP_BITSTREAM (1 << 18)
+#define ION_FLAG_CP_PIXEL (1 << 19)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_FLAG_CP_NON_PIXEL (1 << 20)
+#define ION_FLAG_CP_CAMERA (1 << 21)
+#define ION_FLAG_CP_HLOS (1 << 22)
+#define ION_FLAG_CP_HLOS_FREE (1 << 23)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_FLAG_CP_SEC_DISPLAY (1 << 25)
+#define ION_FLAG_CP_APP (1 << 26)
+#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
+#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
 #define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
 #define ION_SECURE ION_FLAG_SECURE
 #define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
-#define ION_HEAP(bit) (1 << (bit))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_HEAP(bit) (1 << (bit))
 #define ION_ADSP_HEAP_NAME "adsp"
 #define ION_SYSTEM_HEAP_NAME "system"
 #define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
-#define ION_KMALLOC_HEAP_NAME "kmalloc"
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_KMALLOC_HEAP_NAME "kmalloc"
 #define ION_AUDIO_HEAP_NAME "audio"
 #define ION_SF_HEAP_NAME "sf"
 #define ION_MM_HEAP_NAME "mm"
-#define ION_CAMERA_HEAP_NAME "camera_preview"
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_CAMERA_HEAP_NAME "camera_preview"
 #define ION_IOMMU_HEAP_NAME "iommu"
 #define ION_MFC_HEAP_NAME "mfc"
 #define ION_WB_HEAP_NAME "wb"
-#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
 #define ION_PIL1_HEAP_NAME "pil_1"
 #define ION_PIL2_HEAP_NAME "pil_2"
 #define ION_QSECOM_HEAP_NAME "qsecom"
-#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ION_SECURE_HEAP_NAME "secure_heap"
+#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
+#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
 #define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
 struct ion_flush_data {
   ion_user_handle_t handle;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int fd;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   void * vaddr;
   unsigned int offset;
   unsigned int length;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct ion_prefetch_data {
   int heap_id;
   unsigned long len;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_IOC_MSM_MAGIC 'M'
 #define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data)
 #define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, struct ion_prefetch_data)
 #define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data)
 #endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/kernel-headers/linux/msm_mdp.h b/kernel-headers/linux/msm_mdp.h
index 4b9adfb..d07f2e9 100644
--- a/kernel-headers/linux/msm_mdp.h
+++ b/kernel-headers/linux/msm_mdp.h

@@ -76,50 +76,60 @@
 #define MSMFB_OVERLAY_PREPARE _IOWR(MSMFB_IOCTL_MAGIC, 169, struct mdp_overlay_list)
 #define MSMFB_LPM_ENABLE _IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, struct mdp_pp_feature_version)
 #define FB_TYPE_3D_PANEL 0x10101010
 #define MDP_IMGTYPE2_START 0x10000
 #define MSMFB_DRIVER_VERSION 0xF9E8D701
-#define MDSS_GET_MAJOR(rev) ((rev) >> 28)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_GET_MAJOR(rev) ((rev) >> 28)
 #define MDSS_GET_MINOR(rev) (((rev) >> 16) & 0xFFF)
 #define MDSS_GET_STEP(rev) ((rev) & 0xFFFF)
 #define MDSS_GET_MAJOR_MINOR(rev) ((rev) >> 16)
-#define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IS_MDSS_MAJOR_MINOR_SAME(rev1,rev2) (MDSS_GET_MAJOR_MINOR((rev1)) == MDSS_GET_MAJOR_MINOR((rev2)))
 #define MDSS_MDP_REV(major,minor,step) ((((major) & 0x000F) << 28) | (((minor) & 0x0FFF) << 16) | ((step) & 0xFFFF))
 #define MDSS_MDP_HW_REV_100 MDSS_MDP_REV(1, 0, 0)
 #define MDSS_MDP_HW_REV_101 MDSS_MDP_REV(1, 1, 0)
-#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_MDP_HW_REV_101_1 MDSS_MDP_REV(1, 1, 1)
 #define MDSS_MDP_HW_REV_101_2 MDSS_MDP_REV(1, 1, 2)
 #define MDSS_MDP_HW_REV_102 MDSS_MDP_REV(1, 2, 0)
 #define MDSS_MDP_HW_REV_102_1 MDSS_MDP_REV(1, 2, 1)
-#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_MDP_HW_REV_103 MDSS_MDP_REV(1, 3, 0)
 #define MDSS_MDP_HW_REV_103_1 MDSS_MDP_REV(1, 3, 1)
 #define MDSS_MDP_HW_REV_105 MDSS_MDP_REV(1, 5, 0)
 #define MDSS_MDP_HW_REV_106 MDSS_MDP_REV(1, 6, 0)
-#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_MDP_HW_REV_107 MDSS_MDP_REV(1, 7, 0)
+#define MDSS_MDP_HW_REV_107_1 MDSS_MDP_REV(1, 7, 1)
+#define MDSS_MDP_HW_REV_107_2 MDSS_MDP_REV(1, 7, 2)
 #define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0)
 #define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0)
 #define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0)
+#define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_MDP_HW_REV_114 MDSS_MDP_REV(1, 14, 0)
+#define MDSS_MDP_HW_REV_115 MDSS_MDP_REV(1, 15, 0)
+#define MDSS_MDP_HW_REV_116 MDSS_MDP_REV(1, 16, 0)
 enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOTIFY_UPDATE_INIT,
   NOTIFY_UPDATE_DEINIT,
   NOTIFY_UPDATE_START,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOTIFY_UPDATE_STOP,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOTIFY_UPDATE_POWER_OFF,
 };
 enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOTIFY_TYPE_NO_UPDATE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   NOTIFY_TYPE_SUSPEND,
   NOTIFY_TYPE_UPDATE,
   NOTIFY_TYPE_BL_UPDATE,
+  NOTIFY_TYPE_BL_AD_ATTEN_UPDATE,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
@@ -178,208 +188,323 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MDP_ARGB_4444,
   MDP_RGBA_4444,
-  MDP_IMGTYPE_LIMIT,
-  MDP_RGB_BORDERFILL,
+  MDP_RGB_565_UBWC,
+  MDP_RGBA_8888_UBWC,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_Y_CBCR_H2V2_UBWC,
+  MDP_RGBX_8888_UBWC,
+  MDP_Y_CRCB_H2V2_VENUS,
+  MDP_IMGTYPE_LIMIT,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_RGB_BORDERFILL,
   MDP_FB_FORMAT = MDP_IMGTYPE2_START,
   MDP_IMGTYPE_LIMIT2
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   PMEM_IMG,
   FB_IMG,
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   HSIC_HUE = 0,
   HSIC_SAT,
   HSIC_INT,
-  HSIC_CON,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  HSIC_CON,
   NUM_HSIC_PARAM,
 };
+enum mdss_mdp_max_bw_mode {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDSS_MAX_BW_LIMIT_DEFAULT = 0x1,
+  MDSS_MAX_BW_LIMIT_CAMERA = 0x2,
+  MDSS_MAX_BW_LIMIT_HFLIP = 0x4,
+  MDSS_MAX_BW_LIMIT_VFLIP = 0x8,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 #define MDSS_MDP_ROT_ONLY 0x80
 #define MDSS_MDP_RIGHT_MIXER 0x100
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_MDP_DUAL_PIPE 0x200
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_ROT_NOP 0
 #define MDP_FLIP_LR 0x1
 #define MDP_FLIP_UD 0x2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_ROT_90 0x4
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_ROT_180 (MDP_FLIP_UD | MDP_FLIP_LR)
 #define MDP_ROT_270 (MDP_ROT_90 | MDP_FLIP_UD | MDP_FLIP_LR)
 #define MDP_DITHER 0x8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BLUR 0x10
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BLEND_FG_PREMULT 0x20000
 #define MDP_IS_FG 0x40000
 #define MDP_SOLID_FILL 0x00000020
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_VPU_PIPE 0x00000040
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_DEINTERLACE 0x80000000
 #define MDP_SHARPENING 0x40000000
 #define MDP_NO_DMA_BARRIER_START 0x20000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_NO_DMA_BARRIER_END 0x10000000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_NO_BLIT 0x08000000
 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000
 #define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BLIT_SRC_GEM 0x04000000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BLIT_DST_GEM 0x02000000
 #define MDP_BLIT_NON_CACHED 0x01000000
 #define MDP_OV_PIPE_SHARE 0x00800000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_DEINTERLACE_ODD 0x00400000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_OV_PLAY_NOWAIT 0x00200000
 #define MDP_SOURCE_ROTATED_90 0x00100000
 #define MDP_OVERLAY_PP_CFG_EN 0x00080000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BACKEND_COMPOSITION 0x00040000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BORDERFILL_SUPPORTED 0x00010000
 #define MDP_SECURE_OVERLAY_SESSION 0x00008000
 #define MDP_SECURE_DISPLAY_OVERLAY_SESSION 0x00002000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_OV_PIPE_FORCE_DMA 0x00004000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_MEMORY_ID_TYPE_FB 0x00001000
 #define MDP_BWC_EN 0x00000400
 #define MDP_DECIMATION_EN 0x00000800
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_SMP_FORCE_ALLOC 0x00200000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_TRANSP_NOP 0xffffffff
 #define MDP_ALPHA_NOP 0xff
-#define MDP_SMART_BLIT 0xC0000000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
 #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
 #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
 #define MDP_FB_PAGE_PROTECTION_INVALID (5)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
 struct mdp_rect {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t x;
   uint32_t y;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t w;
   uint32_t h;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct mdp_img {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t width;
   uint32_t height;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t format;
   uint32_t offset;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int memory_id;
   uint32_t priv;
+};
+struct mult_factor {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t numer;
+  uint32_t denom;
 };
 #define MDP_CCS_RGB2YUV 0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_CCS_YUV2RGB 1
 #define MDP_CCS_SIZE 9
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_BV_SIZE 3
 struct mdp_ccs {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int direction;
   uint16_t ccs[MDP_CCS_SIZE];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t bv[MDP_BV_SIZE];
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdp_csc {
   int id;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t csc_mv[9];
   uint32_t csc_pre_bv[3];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t csc_post_bv[3];
   uint32_t csc_pre_lv[6];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t csc_post_lv[6];
 };
-#define MDP_BLIT_REQ_VERSION 2
-struct color {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_BLIT_REQ_VERSION 3
+struct color {
   uint32_t r;
   uint32_t g;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t b;
   uint32_t alpha;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct mdp_blit_req {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct mdp_img src;
   struct mdp_img dst;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct mdp_rect src_rect;
   struct mdp_rect dst_rect;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct color const_color;
   uint32_t alpha;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t transp_mask;
   uint32_t flags;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int sharpening_strength;
   uint8_t color_space;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t fps;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdp_blit_req_list {
   uint32_t count;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct mdp_blit_req req[];
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSMFB_DATA_VERSION 2
 struct msmfb_data {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t offset;
   int memory_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int id;
   uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t priv;
   uint32_t iova;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #define MSMFB_NEW_REQUEST - 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct msmfb_overlay_data {
   uint32_t id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct msmfb_data data;
   uint32_t version_key;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct msmfb_data plane1_data;
   struct msmfb_data plane2_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct msmfb_data dst_data;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct msmfb_img {
   uint32_t width;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t height;
   uint32_t format;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct msmfb_writeback_data {
   struct msmfb_data buf_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct msmfb_img img;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_OPS_ENABLE 0x1
 #define MDP_PP_OPS_READ 0x2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_OPS_WRITE 0x4
 #define MDP_PP_OPS_DISABLE 0x8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_IGC_FLAG_ROM0 0x10
 #define MDP_PP_IGC_FLAG_ROM1 0x20
+#define MDSS_PP_DSPP_CFG 0x000
+#define MDSS_PP_SSPP_CFG 0x100
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_PP_LM_CFG 0x200
+#define MDSS_PP_WB_CFG 0x300
+#define MDSS_PP_ARG_MASK 0x3C00
+#define MDSS_PP_ARG_NUM 4
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDSS_PP_ARG_SHIFT 10
+#define MDSS_PP_LOCATION_MASK 0x0300
+#define MDSS_PP_LOGICAL_MASK 0x00FF
+#define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
+#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
+#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
+struct mdp_qseed_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t table_num;
+  uint32_t ops;
+  uint32_t len;
+  uint32_t * data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct mdp_sharp_cfg {
+  uint32_t flags;
+  uint32_t strength;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t edge_thr;
+  uint32_t smooth_thr;
+  uint32_t noise_thr;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_qseed_cfg_data {
+  uint32_t block;
+  struct mdp_qseed_cfg qseed_data;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_OVERLAY_PP_CSC_CFG 0x1
+#define MDP_OVERLAY_PP_QSEED_CFG 0x2
+#define MDP_OVERLAY_PP_PA_CFG 0x4
+#define MDP_OVERLAY_PP_IGC_CFG 0x8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_OVERLAY_PP_SHARP_CFG 0x10
+#define MDP_OVERLAY_PP_HIST_CFG 0x20
+#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
+#define MDP_OVERLAY_PP_PA_V2_CFG 0x80
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_OVERLAY_PP_PCC_CFG 0x100
+#define MDP_CSC_FLAG_ENABLE 0x1
+#define MDP_CSC_FLAG_YUV_IN 0x2
+#define MDP_CSC_FLAG_YUV_OUT 0x4
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_CSC_MATRIX_COEFF_SIZE 9
+#define MDP_CSC_CLAMP_SIZE 6
+#define MDP_CSC_BIAS_SIZE 3
+struct mdp_csc_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t flags;
+  uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE];
+  uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE];
+  uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE];
+  uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE];
+};
+struct mdp_csc_cfg_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t block;
+  struct mdp_csc_cfg csc_data;
+};
+struct mdp_pa_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t flags;
+  uint32_t hue_adj;
+  uint32_t sat_adj;
+  uint32_t val_adj;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t cont_adj;
+};
+struct mdp_pa_mem_col_cfg {
+  uint32_t color_adjust_p0;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t color_adjust_p1;
+  uint32_t hue_region;
+  uint32_t sat_region;
+  uint32_t val_region;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+#define MDP_SIX_ZONE_LUT_SIZE 384
 #define MDP_PP_PA_HUE_ENABLE 0x10
 #define MDP_PP_PA_SAT_ENABLE 0x20
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_PA_VAL_ENABLE 0x40
 #define MDP_PP_PA_CONT_ENABLE 0x80
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_PA_SIX_ZONE_ENABLE 0x100
 #define MDP_PP_PA_SKIN_ENABLE 0x200
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_PA_SKY_ENABLE 0x400
 #define MDP_PP_PA_FOL_ENABLE 0x800
+#define MDP_PP_PA_MEM_PROT_HUE_EN 0x1
+#define MDP_PP_PA_MEM_PROT_SAT_EN 0x2
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_PP_PA_MEM_PROT_VAL_EN 0x4
+#define MDP_PP_PA_MEM_PROT_CONT_EN 0x8
+#define MDP_PP_PA_MEM_PROT_SIX_EN 0x10
+#define MDP_PP_PA_MEM_PROT_BLEND_EN 0x20
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_PA_HUE_MASK 0x1000
 #define MDP_PP_PA_SAT_MASK 0x2000
@@ -396,339 +521,344 @@
 #define MDP_PP_PA_MEM_PROTECT_EN 0x400000
 #define MDP_PP_PA_SAT_ZERO_EXP_EN 0x800000
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_DSPP_CFG 0x000
-#define MDSS_PP_SSPP_CFG 0x100
-#define MDSS_PP_LM_CFG 0x200
-#define MDSS_PP_WB_CFG 0x300
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_ARG_MASK 0x3C00
-#define MDSS_PP_ARG_NUM 4
-#define MDSS_PP_ARG_SHIFT 10
-#define MDSS_PP_LOCATION_MASK 0x0300
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDSS_PP_LOGICAL_MASK 0x00FF
-#define MDSS_PP_ADD_ARG(var,arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
-#define PP_ARG(x,var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
-#define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
-struct mdp_qseed_cfg {
-  uint32_t table_num;
-  uint32_t ops;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t len;
-  uint32_t * data;
-};
-struct mdp_sharp_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_PP_PA_LEFT_HOLD 0x1
+#define MDP_PP_PA_RIGHT_HOLD 0x2
+struct mdp_pa_v2_data {
   uint32_t flags;
-  uint32_t strength;
-  uint32_t edge_thr;
-  uint32_t smooth_thr;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t noise_thr;
-};
-struct mdp_qseed_cfg_data {
-  uint32_t block;
+  uint32_t global_hue_adj;
+  uint32_t global_sat_adj;
+  uint32_t global_val_adj;
+  uint32_t global_cont_adj;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_qseed_cfg qseed_data;
-};
-#define MDP_OVERLAY_PP_CSC_CFG 0x1
-#define MDP_OVERLAY_PP_QSEED_CFG 0x2
+  struct mdp_pa_mem_col_cfg skin_cfg;
+  struct mdp_pa_mem_col_cfg sky_cfg;
+  struct mdp_pa_mem_col_cfg fol_cfg;
+  uint32_t six_zone_len;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OVERLAY_PP_PA_CFG 0x4
-#define MDP_OVERLAY_PP_IGC_CFG 0x8
-#define MDP_OVERLAY_PP_SHARP_CFG 0x10
-#define MDP_OVERLAY_PP_HIST_CFG 0x20
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_OVERLAY_PP_HIST_LUT_CFG 0x40
-#define MDP_OVERLAY_PP_PA_V2_CFG 0x80
-#define MDP_CSC_FLAG_ENABLE 0x1
-#define MDP_CSC_FLAG_YUV_IN 0x2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MDP_CSC_FLAG_YUV_OUT 0x4
-struct mdp_csc_cfg {
-  uint32_t flags;
-  uint32_t csc_mv[9];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t csc_pre_bv[3];
-  uint32_t csc_post_bv[3];
-  uint32_t csc_pre_lv[6];
-  uint32_t csc_post_lv[6];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_csc_cfg_data {
-  uint32_t block;
-  struct mdp_csc_cfg csc_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_pa_cfg {
-  uint32_t flags;
-  uint32_t hue_adj;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t sat_adj;
-  uint32_t val_adj;
-  uint32_t cont_adj;
+  uint32_t six_zone_thresh;
+  uint32_t * six_zone_curve_p0;
+  uint32_t * six_zone_curve_p1;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pa_mem_col_cfg {
+struct mdp_pa_mem_col_data_v1_7 {
   uint32_t color_adjust_p0;
   uint32_t color_adjust_p1;
+  uint32_t color_adjust_p2;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t blend_gain;
+  uint8_t sat_hold;
+  uint8_t val_hold;
   uint32_t hue_region;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t sat_region;
   uint32_t val_region;
 };
-#define MDP_SIX_ZONE_LUT_SIZE 384
+struct mdp_pa_data_v1_7 {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pa_v2_data {
-  uint32_t flags;
+  uint32_t mode;
   uint32_t global_hue_adj;
   uint32_t global_sat_adj;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t global_val_adj;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t global_cont_adj;
-  struct mdp_pa_mem_col_cfg skin_cfg;
-  struct mdp_pa_mem_col_cfg sky_cfg;
+  struct mdp_pa_mem_col_data_v1_7 skin_cfg;
+  struct mdp_pa_mem_col_data_v1_7 sky_cfg;
+  struct mdp_pa_mem_col_data_v1_7 fol_cfg;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pa_mem_col_cfg fol_cfg;
-  uint32_t six_zone_len;
   uint32_t six_zone_thresh;
-  uint32_t * six_zone_curve_p0;
+  uint32_t six_zone_adj_p0;
+  uint32_t six_zone_adj_p1;
+  uint8_t six_zone_sat_hold;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint8_t six_zone_val_hold;
+  uint32_t six_zone_len;
+  uint32_t * six_zone_curve_p0;
   uint32_t * six_zone_curve_p1;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
-struct mdp_igc_lut_data {
+struct mdp_pa_v2_cfg_data {
+  uint32_t version;
   uint32_t block;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t len, ops;
-  uint32_t * c0_c1_data;
-  uint32_t * c2_data;
+  uint32_t flags;
+  struct mdp_pa_v2_data pa_v2_data;
+  void * cfg_payload;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
+  mdp_igc_rec601 = 1,
+  mdp_igc_rec709,
+  mdp_igc_srgb,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_igc_custom,
+  mdp_igc_rec_max,
+};
+struct mdp_igc_lut_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t block;
+  uint32_t version;
+  uint32_t len, ops;
+  uint32_t * c0_c1_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t * c2_data;
+  void * cfg_payload;
+};
+struct mdp_igc_lut_data_v1_7 {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t table_fmt;
+  uint32_t len;
+  uint32_t * c0_c1_data;
+  uint32_t * c2_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct mdp_histogram_cfg {
   uint32_t ops;
   uint32_t block;
-  uint8_t frame_cnt;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint8_t frame_cnt;
   uint8_t bit_mask;
   uint16_t num_bins;
 };
-struct mdp_hist_lut_data {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_hist_lut_data_v1_7 {
+  uint32_t len;
+  uint32_t * data;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_hist_lut_data {
   uint32_t block;
+  uint32_t version;
+  uint32_t hist_lut_first;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t ops;
   uint32_t len;
   uint32_t * data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_overlay_pp_params {
-  uint32_t config_ops;
-  struct mdp_csc_cfg csc_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_qseed_cfg qseed_cfg[2];
-  struct mdp_pa_cfg pa_cfg;
-  struct mdp_pa_v2_data pa_v2_cfg;
-  struct mdp_igc_lut_data igc_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_sharp_cfg sharp_cfg;
-  struct mdp_histogram_cfg hist_cfg;
-  struct mdp_hist_lut_data hist_lut_cfg;
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-enum mdss_mdp_blend_op {
-  BLEND_OP_NOT_DEFINED = 0,
-  BLEND_OP_OPAQUE,
-  BLEND_OP_PREMULTIPLIED,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  BLEND_OP_COVERAGE,
-  BLEND_OP_MAX,
-};
-#define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define MAX_PLANES 4
-struct mdp_scale_data {
-  uint8_t enable_pxl_ext;
-  int init_phase_x[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int phase_step_x[MAX_PLANES];
-  int init_phase_y[MAX_PLANES];
-  int phase_step_y[MAX_PLANES];
-  int num_ext_pxls_left[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int num_ext_pxls_right[MAX_PLANES];
-  int num_ext_pxls_top[MAX_PLANES];
-  int num_ext_pxls_btm[MAX_PLANES];
-  int left_ftch[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int left_rpt[MAX_PLANES];
-  int right_ftch[MAX_PLANES];
-  int right_rpt[MAX_PLANES];
-  int top_rpt[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  int btm_rpt[MAX_PLANES];
-  int top_ftch[MAX_PLANES];
-  int btm_ftch[MAX_PLANES];
-  uint32_t roi_w[MAX_PLANES];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum mdp_overlay_pipe_type {
-  PIPE_TYPE_AUTO = 0,
-  PIPE_TYPE_VIG,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  PIPE_TYPE_RGB,
-  PIPE_TYPE_DMA,
-  PIPE_TYPE_CURSOR,
-  PIPE_TYPE_MAX,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_overlay {
-  struct msmfb_img src;
-  struct mdp_rect src_rect;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_rect dst_rect;
-  uint32_t z_order;
-  uint32_t is_fg;
-  uint32_t alpha;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t blend_op;
-  uint32_t transp_mask;
-  uint32_t flags;
-  uint32_t pipe_type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t id;
-  uint8_t priority;
-  uint32_t user_data[6];
-  uint32_t bg_color;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t horz_deci;
-  uint8_t vert_deci;
-  struct mdp_overlay_pp_params overlay_pp_cfg;
-  struct mdp_scale_data scale;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint8_t color_space;
-};
-struct msmfb_overlay_3d {
-  uint32_t is_3d;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t width;
-  uint32_t height;
-};
-struct msmfb_overlay_blt {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t enable;
-  uint32_t offset;
-  uint32_t width;
-  uint32_t height;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bpp;
-};
-struct mdp_histogram {
-  uint32_t frame_cnt;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t bin_cnt;
-  uint32_t * r;
-  uint32_t * g;
-  uint32_t * b;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-#define MISR_CRC_BATCH_SIZE 32
-enum {
-  DISPLAY_MISR_EDP,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DISPLAY_MISR_DSI0,
-  DISPLAY_MISR_DSI1,
-  DISPLAY_MISR_HDMI,
-  DISPLAY_MISR_LCDC,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  DISPLAY_MISR_MDP,
-  DISPLAY_MISR_ATV,
-  DISPLAY_MISR_DSI_CMD,
-  DISPLAY_MISR_MAX
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-enum {
-  MISR_OP_NONE,
-  MISR_OP_SFM,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MISR_OP_MFM,
-  MISR_OP_BM,
-  MISR_OP_MAX
-};
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_misr {
-  uint32_t block_id;
-  uint32_t frame_count;
-  uint32_t crc_op_mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t crc_value[MISR_CRC_BATCH_SIZE];
-};
-enum {
-  MDP_BLOCK_RESERVED = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BLOCK_OVERLAY_0,
-  MDP_BLOCK_OVERLAY_1,
-  MDP_BLOCK_VG_1,
-  MDP_BLOCK_VG_2,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BLOCK_RGB_1,
-  MDP_BLOCK_RGB_2,
-  MDP_BLOCK_DMA_P,
-  MDP_BLOCK_DMA_S,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_BLOCK_DMA_E,
-  MDP_BLOCK_OVERLAY_2,
-  MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
-  MDP_LOGICAL_BLOCK_DISP_1,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_LOGICAL_BLOCK_DISP_2,
-  MDP_BLOCK_MAX,
-};
-struct mdp_histogram_start_req {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t block;
-  uint8_t frame_cnt;
-  uint8_t bit_mask;
-  uint16_t num_bins;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
-struct mdp_histogram_data {
-  uint32_t block;
-  uint32_t bin_cnt;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  uint32_t * c0;
-  uint32_t * c1;
-  uint32_t * c2;
-  uint32_t * extra_info;
+  void * cfg_payload;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct mdp_pcc_coeff {
   uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_pcc_coeff_v1_7 {
+  uint32_t c, r, g, b, rg, gb, rb, rgb;
+};
+struct mdp_pcc_data_v1_7 {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_pcc_coeff_v1_7 r, g, b;
+};
 struct mdp_pcc_cfg_data {
+  uint32_t version;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t block;
   uint32_t ops;
   struct mdp_pcc_coeff r, g, b;
+  void * cfg_payload;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
-#define MDP_GAMUT_TABLE_NUM 8
 enum {
   mdp_lut_igc,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_lut_pgc,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_lut_hist,
   mdp_lut_rgb,
   mdp_lut_max,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_overlay_pp_params {
+  uint32_t config_ops;
+  struct mdp_csc_cfg csc_cfg;
+  struct mdp_qseed_cfg qseed_cfg[2];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_pa_cfg pa_cfg;
+  struct mdp_pa_v2_data pa_v2_cfg;
+  struct mdp_igc_lut_data igc_cfg;
+  struct mdp_sharp_cfg sharp_cfg;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_histogram_cfg hist_cfg;
+  struct mdp_hist_lut_data hist_lut_cfg;
+  struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
+  struct mdp_pcc_cfg_data pcc_cfg_data;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+enum mdss_mdp_blend_op {
+  BLEND_OP_NOT_DEFINED = 0,
+  BLEND_OP_OPAQUE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  BLEND_OP_PREMULTIPLIED,
+  BLEND_OP_COVERAGE,
+  BLEND_OP_MAX,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define DECIMATED_DIMENSION(dim,deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
+#define MAX_PLANES 4
+struct mdp_scale_data {
+  uint8_t enable_pxl_ext;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int init_phase_x[MAX_PLANES];
+  int phase_step_x[MAX_PLANES];
+  int init_phase_y[MAX_PLANES];
+  int phase_step_y[MAX_PLANES];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int num_ext_pxls_left[MAX_PLANES];
+  int num_ext_pxls_right[MAX_PLANES];
+  int num_ext_pxls_top[MAX_PLANES];
+  int num_ext_pxls_btm[MAX_PLANES];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int left_ftch[MAX_PLANES];
+  int left_rpt[MAX_PLANES];
+  int right_ftch[MAX_PLANES];
+  int right_rpt[MAX_PLANES];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int top_rpt[MAX_PLANES];
+  int btm_rpt[MAX_PLANES];
+  int top_ftch[MAX_PLANES];
+  int btm_ftch[MAX_PLANES];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t roi_w[MAX_PLANES];
+};
+enum mdp_overlay_pipe_type {
+  PIPE_TYPE_AUTO = 0,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  PIPE_TYPE_VIG,
+  PIPE_TYPE_RGB,
+  PIPE_TYPE_DMA,
+  PIPE_TYPE_CURSOR,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  PIPE_TYPE_MAX,
+};
+struct mdp_overlay {
+  struct msmfb_img src;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_rect src_rect;
+  struct mdp_rect dst_rect;
+  uint32_t z_order;
+  uint32_t is_fg;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t alpha;
+  uint32_t blend_op;
+  uint32_t transp_mask;
+  uint32_t flags;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t pipe_type;
+  uint32_t id;
+  uint8_t priority;
+  uint32_t user_data[6];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t bg_color;
+  uint8_t horz_deci;
+  uint8_t vert_deci;
+  struct mdp_overlay_pp_params overlay_pp_cfg;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_scale_data scale;
+  uint8_t color_space;
+  uint32_t frame_rate;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msmfb_overlay_3d {
+  uint32_t is_3d;
+  uint32_t width;
+  uint32_t height;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct msmfb_overlay_blt {
+  uint32_t enable;
+  uint32_t offset;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t width;
+  uint32_t height;
+  uint32_t bpp;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_histogram {
+  uint32_t frame_cnt;
+  uint32_t bin_cnt;
+  uint32_t * r;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t * g;
+  uint32_t * b;
+};
+#define MISR_CRC_BATCH_SIZE 32
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
+  DISPLAY_MISR_EDP,
+  DISPLAY_MISR_DSI0,
+  DISPLAY_MISR_DSI1,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  DISPLAY_MISR_HDMI,
+  DISPLAY_MISR_LCDC,
+  DISPLAY_MISR_MDP,
+  DISPLAY_MISR_ATV,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  DISPLAY_MISR_DSI_CMD,
+  DISPLAY_MISR_MAX
+};
+enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MISR_OP_NONE,
+  MISR_OP_SFM,
+  MISR_OP_MFM,
+  MISR_OP_BM,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MISR_OP_MAX
+};
+struct mdp_misr {
+  uint32_t block_id;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t frame_count;
+  uint32_t crc_op_mode;
+  uint32_t crc_value[MISR_CRC_BATCH_SIZE];
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
+  MDP_BLOCK_RESERVED = 0,
+  MDP_BLOCK_OVERLAY_0,
+  MDP_BLOCK_OVERLAY_1,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_BLOCK_VG_1,
+  MDP_BLOCK_VG_2,
+  MDP_BLOCK_RGB_1,
+  MDP_BLOCK_RGB_2,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_BLOCK_DMA_P,
+  MDP_BLOCK_DMA_S,
+  MDP_BLOCK_DMA_E,
+  MDP_BLOCK_OVERLAY_2,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
+  MDP_LOGICAL_BLOCK_DISP_1,
+  MDP_LOGICAL_BLOCK_DISP_2,
+  MDP_BLOCK_MAX,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct mdp_histogram_start_req {
+  uint32_t block;
+  uint8_t frame_cnt;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint8_t bit_mask;
+  uint16_t num_bins;
+};
+struct mdp_histogram_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t block;
+  uint32_t bin_cnt;
+  uint32_t * c0;
+  uint32_t * c1;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t * c2;
+  uint32_t * extra_info;
+};
+#define GC_LUT_ENTRIES_V1_7 512
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdp_ar_gc_lut_data {
   uint32_t x_start;
   uint32_t slope;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t offset;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct mdp_pgc_lut_data {
+  uint32_t version;
   uint32_t block;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t flags;
@@ -739,6 +869,16 @@
   struct mdp_ar_gc_lut_data * r_data;
   struct mdp_ar_gc_lut_data * g_data;
   struct mdp_ar_gc_lut_data * b_data;
+  void * cfg_payload;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+#define PGC_LUT_ENTRIES 1024
+struct mdp_pgc_lut_data_v1_7 {
+  uint32_t len;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t * c0_data;
+  uint32_t * c1_data;
+  uint32_t * c2_data;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdp_rgb_lut_data {
@@ -773,359 +913,423 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct mdp_pa_cfg pa_data;
 };
-struct mdp_pa_v2_cfg_data {
-  uint32_t block;
+struct mdp_dither_data_v1_7 {
+  uint32_t g_y_depth;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  struct mdp_pa_v2_data pa_v2_data;
+  uint32_t r_cr_depth;
+  uint32_t b_cb_depth;
 };
 struct mdp_dither_cfg_data {
-  uint32_t block;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t version;
+  uint32_t block;
   uint32_t flags;
+  uint32_t mode;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t g_y_depth;
   uint32_t r_cr_depth;
   uint32_t b_cb_depth;
+  void * cfg_payload;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+#define MDP_GAMUT_TABLE_NUM 8
+#define MDP_GAMUT_TABLE_NUM_V1_7 4
+#define MDP_GAMUT_SCALE_OFF_TABLE_NUM 3
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_GAMUT_TABLE_V1_7_SZ 1229
+#define MDP_GAMUT_SCALE_OFF_SZ 16
+#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32
 struct mdp_gamut_cfg_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t block;
   uint32_t flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t version;
   uint32_t gamut_first;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
   uint16_t * r_tbl[MDP_GAMUT_TABLE_NUM];
   uint16_t * g_tbl[MDP_GAMUT_TABLE_NUM];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t * b_tbl[MDP_GAMUT_TABLE_NUM];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  void * cfg_payload;
+};
+enum {
+  mdp_gamut_fine_mode = 0x1,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_gamut_coarse_mode,
+};
+struct mdp_gamut_data_v1_7 {
+  uint32_t mode;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t map_en;
+  uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7];
+  uint32_t * c0_data[MDP_GAMUT_TABLE_NUM_V1_7];
+  uint32_t * c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
+  uint32_t * scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
 };
 struct mdp_calib_config_data {
-  uint32_t ops;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t ops;
   uint32_t addr;
   uint32_t data;
 };
-struct mdp_calib_config_buffer {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_calib_config_buffer {
   uint32_t ops;
   uint32_t size;
   uint32_t * buffer;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct mdp_calib_dcm_state {
   uint32_t ops;
   uint32_t dcm_state;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-struct mdp_pp_init_data {
-  uint32_t init_request;
 };
 enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  MDP_PP_DISABLE,
-  MDP_PP_ENABLE,
-};
-enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DCM_UNINIT,
   DCM_UNBLANK,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DCM_ENTER,
   DCM_EXIT,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DCM_BLANK,
   DTM_ENTER,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   DTM_EXIT,
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_PP_SPLIT_LEFT_ONLY 0x10000000
 #define MDSS_PP_SPLIT_RIGHT_ONLY 0x20000000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_PP_SPLIT_MASK 0x30000000
 #define MDSS_MAX_BL_BRIGHTNESS 255
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define AD_BL_LIN_LEN 256
 #define AD_BL_ATT_LUT_LEN 33
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_AD_MODE_AUTO_BL 0x0
 #define MDSS_AD_MODE_AUTO_STR 0x1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_AD_MODE_TARG_STR 0x3
 #define MDSS_AD_MODE_MAN_STR 0x7
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_AD_MODE_CALIB 0xF
 #define MDP_PP_AD_INIT 0x10
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDP_PP_AD_CFG 0x20
 struct mdss_ad_init {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t asym_lut[33];
   uint32_t color_corr_lut[33];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t i_control[2];
   uint16_t black_lvl;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t white_lvl;
   uint8_t var;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t limit_ampl;
   uint8_t i_dither;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t slope_max;
   uint8_t slope_min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t dither_ctl;
   uint8_t format;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t auto_size;
   uint16_t frame_w;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t frame_h;
   uint8_t logo_v;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint8_t logo_h;
   uint32_t alpha;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t alpha_base;
+  uint32_t al_thresh;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t bl_lin_len;
   uint32_t bl_att_len;
   uint32_t * bl_lin;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t * bl_lin_inv;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t * bl_att_lut;
 };
 #define MDSS_AD_BL_CTRL_MODE_EN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MDSS_AD_BL_CTRL_MODE_DIS 0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdss_ad_cfg {
   uint32_t mode;
   uint32_t al_calib_lut[33];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t backlight_min;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t backlight_max;
   uint16_t backlight_scale;
   uint16_t amb_light_min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t filter[2];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t calib[4];
   uint8_t strength_limit;
   uint8_t t_filter_recursion;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint16_t stab_itr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t bl_ctrl_mode;
 };
 struct mdss_ad_init_cfg {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t ops;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union {
     struct mdss_ad_init init;
     struct mdss_ad_cfg cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   } params;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct mdss_ad_input {
   uint32_t mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     uint32_t amb_light;
     uint32_t strength;
     uint32_t calib_bl;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   } in;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t output;
 };
 #define MDSS_CALIB_MODE_BL 0x1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct mdss_calib_cfg {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t ops;
   uint32_t calib_mask;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_pcc_cfg,
   mdp_op_csc_cfg,
   mdp_op_lut_cfg,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_qseed_cfg,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_bl_scale_cfg,
   mdp_op_pa_cfg,
   mdp_op_pa_v2_cfg,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_dither_cfg,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_gamut_cfg,
   mdp_op_calib_cfg,
   mdp_op_ad_cfg,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_ad_input,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_calib_mode,
   mdp_op_calib_buffer,
   mdp_op_calib_dcm_state,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   mdp_op_max,
-  mdp_op_pp_init_cfg,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   WB_FORMAT_NV12,
   WB_FORMAT_RGB_565,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   WB_FORMAT_RGB_888,
   WB_FORMAT_xRGB_8888,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   WB_FORMAT_ARGB_8888,
   WB_FORMAT_BGRA_8888,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   WB_FORMAT_BGRX_8888,
   WB_FORMAT_ARGB_8888_INPUT_ALPHA
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct msmfb_mdp_pp {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t op;
   union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdp_pcc_cfg_data pcc_cfg_data;
     struct mdp_csc_cfg_data csc_cfg_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdp_lut_cfg_data lut_cfg_data;
     struct mdp_qseed_cfg_data qseed_cfg_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdp_bl_scale_data bl_scale_data;
     struct mdp_pa_cfg_data pa_cfg_data;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
     struct mdp_dither_cfg_data dither_cfg_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdp_gamut_cfg_data gamut_cfg_data;
     struct mdp_calib_config_data calib_cfg;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdss_ad_init_cfg ad_init_cfg;
     struct mdss_calib_cfg mdss_calib_cfg;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct mdss_ad_input ad_input;
     struct mdp_calib_config_buffer calib_buffer;
-    struct mdp_calib_dcm_state calib_dcm;
-    struct mdp_pp_init_data init_data;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+    struct mdp_calib_dcm_state calib_dcm;
   } data;
 };
 #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   metadata_op_none,
   metadata_op_base_blend,
   metadata_op_frame_rate,
-  metadata_op_vic,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  metadata_op_vic,
   metadata_op_wb_format,
   metadata_op_wb_secure,
   metadata_op_get_caps,
-  metadata_op_crc,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  metadata_op_crc,
   metadata_op_get_ion_fd,
   metadata_op_max
 };
-struct mdp_blend_cfg {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_blend_cfg {
   uint32_t is_premultiplied;
 };
 struct mdp_mixer_cfg {
-  uint32_t writeback_format;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t writeback_format;
   uint32_t alpha;
 };
 struct mdss_hw_caps {
-  uint32_t mdp_rev;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t mdp_rev;
   uint8_t rgb_pipes;
   uint8_t vig_pipes;
   uint8_t dma_pipes;
-  uint8_t max_smp_cnt;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint8_t max_smp_cnt;
   uint8_t smp_per_pipe;
   uint32_t features;
 };
-struct msmfb_metadata {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct msmfb_metadata {
   uint32_t op;
   uint32_t flags;
   union {
-    struct mdp_misr misr_request;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+    struct mdp_misr misr_request;
     struct mdp_blend_cfg blend_cfg;
     struct mdp_mixer_cfg mixer_cfg;
     uint32_t panel_frame_rate;
-    uint32_t video_info_code;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+    uint32_t video_info_code;
     struct mdss_hw_caps caps;
     uint8_t secure_en;
     int fbmem_ionfd;
-  } data;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  } data;
 };
 #define MDP_MAX_FENCE_FD 32
 #define MDP_BUF_SYNC_FLAG_WAIT 1
-#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
 struct mdp_buf_sync {
   uint32_t flags;
   uint32_t acq_fen_fd_cnt;
-  uint32_t session_id;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t session_id;
   int * acq_fen_fd;
   int * rel_fen_fd;
   int * retire_fen_fd;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct mdp_async_blit_req_list {
   struct mdp_buf_sync sync;
   uint32_t count;
-  struct mdp_blit_req req[];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_blit_req req[];
 };
 #define MDP_DISPLAY_COMMIT_OVERLAY 1
 struct mdp_display_commit {
-  uint32_t flags;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t flags;
   uint32_t wait_for_finish;
   struct fb_var_screeninfo var;
   struct mdp_rect l_roi;
-  struct mdp_rect r_roi;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_rect r_roi;
 };
 struct mdp_overlay_list {
   uint32_t num_overlays;
-  struct mdp_overlay * * overlay_list;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct mdp_overlay * * overlay_list;
   uint32_t flags;
   uint32_t processed_overlays;
 };
-struct mdp_page_protection {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_page_protection {
   uint32_t page_protection;
 };
 struct mdp_mixer_info {
-  int pndx;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int pndx;
   int pnum;
   int ptype;
   int mixer_num;
-  int z_order;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int z_order;
 };
 #define MAX_PIPE_PER_MIXER 7
 struct msmfb_mixer_info_req {
-  int mixer_num;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int mixer_num;
   int cnt;
   struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   DISPLAY_SUBSYSTEM_ID,
   ROTATOR_SUBSYSTEM_ID,
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   MDP_IOMMU_DOMAIN_CP,
   MDP_IOMMU_DOMAIN_NS,
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   MDP_WRITEBACK_MIRROR_OFF,
   MDP_WRITEBACK_MIRROR_ON,
   MDP_WRITEBACK_MIRROR_PAUSE,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MDP_WRITEBACK_MIRROR_RESUME,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
-enum {
+enum mdp_color_space {
   MDP_CSC_ITU_R_601,
-  MDP_CSC_ITU_R_601_FR,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  MDP_CSC_ITU_R_601_FR,
   MDP_CSC_ITU_R_709,
 };
+enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_igc_v1_7 = 1,
+  mdp_igc_vmax,
+  mdp_hist_lut_v1_7,
+  mdp_hist_lut_vmax,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_pgc_v1_7,
+  mdp_pgc_vmax,
+  mdp_dither_v1_7,
+  mdp_dither_vmax,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_gamut_v1_7,
+  mdp_gamut_vmax,
+  mdp_pa_v1_7,
+  mdp_pa_vmax,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  mdp_pcc_v1_7,
+  mdp_pcc_vmax,
+  mdp_pp_legacy,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
+  IGC = 1,
+  PCC,
+  GC,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  PA,
+  GAMUT,
+  DITHER,
+  QSEED,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  HIST_LUT,
+  HIST,
+  PP_FEATURE_MAX,
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct mdp_pp_feature_version {
+  uint32_t pp_feature;
+  uint32_t version_info;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/kernel-headers/linux/msm_rmnet.h b/kernel-headers/linux/msm_rmnet.h
index b31cd0c..7e34d6d 100644
--- a/kernel-headers/linux/msm_rmnet.h
+++ b/kernel-headers/linux/msm_rmnet.h

@@ -77,87 +77,89 @@
   RMNET_IOCTL_SET_XLAT_DEV_INFO = 0x0015,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   RMNET_IOCTL_DEREGISTER_DEV = 0x0016,
-  RMNET_IOCTL_EXTENDED_MAX = 0x0017
+  RMNET_IOCTL_GET_SG_SUPPORT = 0x0017,
+  RMNET_IOCTL_EXTENDED_MAX = 0x0018
 };
-#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1 << 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1 << 0)
 #define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT (1 << 1)
 #define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT (1 << 2)
 #define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT (1 << 3)
-#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1 << 4)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1 << 4)
 #define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE (1 << 5)
 #define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE (1 << 6)
 #define RMNET_IOCTL_FEAT_FLOW_CONTROL (1 << 7)
-#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1 << 8)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1 << 8)
 #define RMNET_IOCTL_FEAT_GET_HWSW_MAP (1 << 9)
 #define RMNET_IOCTL_EGRESS_FORMAT_MAP (1 << 1)
 #define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION (1 << 2)
-#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1 << 3)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1 << 3)
 #define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM (1 << 4)
 #define RMNET_IOCTL_INGRESS_FORMAT_MAP (1 << 1)
 #define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION (1 << 2)
-#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1 << 3)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1 << 3)
 #define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM (1 << 4)
 #define RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA (1 << 5)
 #ifndef IFNAMSIZ
-#define IFNAMSIZ 16
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define IFNAMSIZ 16
 #endif
 struct rmnet_ioctl_extended_s {
   uint32_t extended_ioctl;
-  union {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  union {
     uint32_t data;
     int8_t if_name[IFNAMSIZ];
     struct {
-      uint32_t mux_id;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+      uint32_t mux_id;
       int8_t vchannel_name[IFNAMSIZ];
     } rmnet_mux_val;
     struct {
-      uint8_t flow_mode;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+      uint8_t flow_mode;
       uint8_t mux_id;
     } flow_control_prop;
     struct {
-      uint32_t consumer_pipe_num;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+      uint32_t consumer_pipe_num;
       uint32_t producer_pipe_num;
     } ipa_ep_pair;
     struct {
-      uint32_t __data;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+      uint32_t __data;
       uint32_t agg_size;
       uint32_t agg_count;
     } ingress_format;
-  } u;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  } u;
 };
 struct rmnet_ioctl_data_s {
   union {
-    uint32_t operation_mode;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+    uint32_t operation_mode;
     uint32_t tcm_handle;
   } u;
 };
-#define RMNET_IOCTL_QOS_MODE_6 (1 << 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RMNET_IOCTL_QOS_MODE_6 (1 << 0)
 #define RMNET_IOCTL_QOS_MODE_8 (1 << 1)
 #define QMI_QOS_HDR_S __attribute((__packed__)) qmi_qos_hdr_s
 struct QMI_QOS_HDR_S {
-  unsigned char version;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char version;
   unsigned char flags;
   uint32_t flow_id;
 };
-struct qmi_qos_hdr8_s {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct qmi_qos_hdr8_s {
   struct QMI_QOS_HDR_S hdr;
   uint8_t reserved[2];
 } __attribute((__packed__));
-#endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
+

diff --git a/kernel-headers/linux/msm_rotator.h b/kernel-headers/linux/msm_rotator.h
index 38ef402..88bd68e 100644
--- a/kernel-headers/linux/msm_rotator.h
+++ b/kernel-headers/linux/msm_rotator.h

@@ -73,3 +73,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #endif
+

diff --git a/kernel-headers/linux/msm_thermal_ioctl.h b/kernel-headers/linux/msm_thermal_ioctl.h
index f83b63a..547746b 100644
--- a/kernel-headers/linux/msm_thermal_ioctl.h
+++ b/kernel-headers/linux/msm_thermal_ioctl.h

@@ -34,22 +34,32 @@
   uint32_t set_idx;
   unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
 };
-struct __attribute__((__packed__)) msm_thermal_ioctl {
+struct __attribute__((__packed__)) voltage_plan_arg {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t cluster_num;
+  uint32_t voltage_table_len;
+  uint32_t set_idx;
+  uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+struct __attribute__((__packed__)) msm_thermal_ioctl {
   uint32_t size;
   union {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct cpu_freq_arg cpu_freq;
     struct clock_plan_arg clock_freq;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+    struct voltage_plan_arg voltage;
   };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
   MSM_SET_CPU_MAX_FREQ = 0x00,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MSM_SET_CPU_MIN_FREQ = 0x01,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MSM_SET_CLUSTER_MAX_FREQ = 0x02,
   MSM_SET_CLUSTER_MIN_FREQ = 0x03,
   MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
+  MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   MSM_CMD_MAX_NR,
 };
@@ -61,4 +71,6 @@
 #define MSM_THERMAL_SET_CLUSTER_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM, MSM_SET_CLUSTER_MIN_FREQ, struct msm_thermal_ioctl)
 #define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM, MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
 #endif
+

diff --git a/kernel-headers/linux/qcedev.h b/kernel-headers/linux/qcedev.h
index 2a94dde..c868498 100644
--- a/kernel-headers/linux/qcedev.h
+++ b/kernel-headers/linux/qcedev.h

@@ -153,3 +153,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define QCEDEV_IOCTL_QUERY_FIPS_STATUS _IOR(QCEDEV_IOC_MAGIC, 11, enum fips_status)
 #endif
+

diff --git a/kernel-headers/linux/rmnet_data.h b/kernel-headers/linux/rmnet_data.h
index f10a705..697e850 100644
--- a/kernel-headers/linux/rmnet_data.h
+++ b/kernel-headers/linux/rmnet_data.h

@@ -133,3 +133,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #endif
+

diff --git a/kernel-headers/linux/sockios.h b/kernel-headers/linux/sockios.h
index b4cd102..3cab990 100644
--- a/kernel-headers/linux/sockios.h
+++ b/kernel-headers/linux/sockios.h

@@ -112,7 +112,9 @@
 #define SIOCBRDELIF 0x89a3
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SIOCSHWTSTAMP 0x89b0
+#define SIOCGHWTSTAMP 0x89b1
 #define SIOCDEVPRIVATE 0x89F0
 #define SIOCPROTOPRIVATE 0x89E0
-#endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
+

diff --git a/kernel-headers/sound/asound.h b/kernel-headers/sound/asound.h
index af76e0d..a3b58ab 100644
--- a/kernel-headers/sound/asound.h
+++ b/kernel-headers/sound/asound.h

@@ -67,312 +67,322 @@
   SNDRV_HWDEP_IFACE_HDA,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_HWDEP_IFACE_USB_STREAM,
+  SNDRV_HWDEP_IFACE_FW_DICE,
+  SNDRV_HWDEP_IFACE_FW_FIREWORKS,
+  SNDRV_HWDEP_IFACE_FW_BEBOB,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_HWDEP_IFACE_AUDIO_BE,
   SNDRV_HWDEP_IFACE_AUDIO_CODEC,
   SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_AUDIO_CODEC
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_hwdep_info {
   unsigned int device;
   int card;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char id[64];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char name[80];
   int iface;
   unsigned char reserved[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_hwdep_dsp_status {
   unsigned int version;
   unsigned char id[32];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int num_dsps;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int dsp_loaded;
   unsigned int chip_ready;
   unsigned char reserved[16];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_hwdep_dsp_image {
   unsigned int index;
   unsigned char name[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char __user * image;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   size_t length;
   unsigned long driver_data;
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info)
 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
+#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 12)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 11)
 typedef unsigned long snd_pcm_uframes_t;
 typedef signed long snd_pcm_sframes_t;
 enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_CLASS_GENERIC = 0,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_CLASS_MULTI,
   SNDRV_PCM_CLASS_MODEM,
   SNDRV_PCM_CLASS_DIGITIZER,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
   SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_SUBCLASS_MULTI_MIX,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
 };
 enum {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_STREAM_PLAYBACK = 0,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_STREAM_CAPTURE,
   SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 typedef int __bitwise snd_pcm_access_t;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
 typedef int __bitwise snd_pcm_format_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
 #define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
 #define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
 #define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
 #define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
 #define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
 #define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
 #define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
 #define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
 #define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
 #define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
 #define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
 #define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
 #define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
 #define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
 #define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
 #define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
 #define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
 #define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
+#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U16_LE
+#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
+#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
+#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
 #ifdef SNDRV_LITTLE_ENDIAN
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
 #endif
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #ifdef SNDRV_BIG_ENDIAN
 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
 typedef int __bitwise snd_pcm_subformat_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_MMAP 0x00000001
 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_DOUBLE 0x00000004
 #define SNDRV_PCM_INFO_BATCH 0x00000010
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_COMPLEX 0x00000400
 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000
 #define SNDRV_PCM_INFO_RESUME 0x00040000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_PAUSE 0x00080000
 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
 #define SNDRV_PCM_INFO_SYNC_START 0x00400000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
 typedef int __bitwise snd_pcm_state_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
 #define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
 #define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
 #define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
 #define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 enum {
   SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
   SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 union snd_pcm_sync_id {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char id[16];
   unsigned short id16[8];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int id32[4];
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_pcm_info {
   unsigned int device;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int subdevice;
   int stream;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int card;
   unsigned char id[64];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char name[80];
   unsigned char subname[32];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int dev_class;
   int dev_subclass;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int subdevices_count;
   unsigned int subdevices_avail;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union snd_pcm_sync_id sync;
   unsigned char reserved[64];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 typedef int snd_pcm_hw_param_t;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_ACCESS 0
 #define SNDRV_PCM_HW_PARAM_FORMAT 1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
 #define SNDRV_PCM_HW_PARAM_CHANNELS 10
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_RATE 11
 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_PERIODS 15
 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19
 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1)
 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_interval {
   unsigned int min, max;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_MASK_MAX 256
 struct snd_mask {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 bits[(SNDRV_MASK_MAX + 31) / 32];
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_pcm_hw_params {
   unsigned int flags;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
   struct snd_mask mres[5];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
   struct snd_interval ires[9];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int rmask;
   unsigned int cmask;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int info;
   unsigned int msbits;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int rate_num;
   unsigned int rate_den;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   snd_pcm_uframes_t fifo_size;
   unsigned char reserved[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_TSTAMP_NONE = 0,
   SNDRV_PCM_TSTAMP_ENABLE,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_pcm_sw_params {
   int tstamp_mode;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int period_step;
   unsigned int sleep_min;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   snd_pcm_uframes_t avail_min;
   snd_pcm_uframes_t xfer_align;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   snd_pcm_uframes_t start_threshold;
   snd_pcm_uframes_t stop_threshold;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   snd_pcm_uframes_t silence_threshold;
   snd_pcm_uframes_t silence_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   snd_pcm_uframes_t boundary;
-  unsigned char reserved[64];
+  unsigned int proto;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int tstamp_type;
+  unsigned char reserved[56];
 };
 struct snd_pcm_channel_info {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -449,537 +459,541 @@
 enum {
   SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
   SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
-  SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
+  SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
 };
 enum {
   SNDRV_CHMAP_UNKNOWN = 0,
-  SNDRV_CHMAP_NA,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_NA,
   SNDRV_CHMAP_MONO,
   SNDRV_CHMAP_FL,
   SNDRV_CHMAP_FR,
-  SNDRV_CHMAP_RL,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_RL,
   SNDRV_CHMAP_RR,
   SNDRV_CHMAP_FC,
   SNDRV_CHMAP_LFE,
-  SNDRV_CHMAP_SL,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_SL,
   SNDRV_CHMAP_SR,
   SNDRV_CHMAP_RC,
   SNDRV_CHMAP_FLC,
-  SNDRV_CHMAP_FRC,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_FRC,
   SNDRV_CHMAP_RLC,
   SNDRV_CHMAP_RRC,
   SNDRV_CHMAP_FLW,
-  SNDRV_CHMAP_FRW,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_FRW,
   SNDRV_CHMAP_FLH,
   SNDRV_CHMAP_FCH,
   SNDRV_CHMAP_FRH,
-  SNDRV_CHMAP_TC,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_TC,
   SNDRV_CHMAP_TFL,
   SNDRV_CHMAP_TFR,
   SNDRV_CHMAP_TFC,
-  SNDRV_CHMAP_TRL,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_TRL,
   SNDRV_CHMAP_TRR,
   SNDRV_CHMAP_TRC,
   SNDRV_CHMAP_TFLC,
-  SNDRV_CHMAP_TFRC,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_TFRC,
   SNDRV_CHMAP_TSL,
   SNDRV_CHMAP_TSR,
   SNDRV_CHMAP_LLFE,
-  SNDRV_CHMAP_RLFE,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_RLFE,
   SNDRV_CHMAP_BC,
   SNDRV_CHMAP_BLC,
   SNDRV_CHMAP_BRC,
-  SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
 };
 #define SNDRV_CHMAP_POSITION_MASK 0xffff
 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
-#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
-#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
-#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
-#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
-#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
-#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
-#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
-#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
 enum {
-  SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
   SNDRV_RAWMIDI_STREAM_INPUT,
   SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
 };
-#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
 struct snd_rawmidi_info {
-  unsigned int device;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int device;
   unsigned int subdevice;
   int stream;
   int card;
-  unsigned int flags;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int flags;
   unsigned char id[64];
   unsigned char name[80];
   unsigned char subname[32];
-  unsigned int subdevices_count;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int subdevices_count;
   unsigned int subdevices_avail;
   unsigned char reserved[64];
 };
-struct snd_rawmidi_params {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct snd_rawmidi_params {
   int stream;
   size_t buffer_size;
   size_t avail_min;
-  unsigned int no_active_sensing : 1;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int no_active_sensing : 1;
   unsigned char reserved[16];
 };
 struct snd_rawmidi_status {
-  int stream;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int stream;
   struct timespec tstamp;
   size_t avail;
   size_t xruns;
-  unsigned char reserved[16];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char reserved[16];
 };
 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
-#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
-#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
 enum {
   SNDRV_TIMER_CLASS_NONE = - 1,
   SNDRV_TIMER_CLASS_SLAVE = 0,
-  SNDRV_TIMER_CLASS_GLOBAL,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_TIMER_CLASS_GLOBAL,
   SNDRV_TIMER_CLASS_CARD,
   SNDRV_TIMER_CLASS_PCM,
   SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 enum {
   SNDRV_TIMER_SCLASS_NONE = 0,
   SNDRV_TIMER_SCLASS_APPLICATION,
-  SNDRV_TIMER_SCLASS_SEQUENCER,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_TIMER_SCLASS_SEQUENCER,
   SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
   SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
 };
-#define SNDRV_TIMER_GLOBAL_SYSTEM 0
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_GLOBAL_SYSTEM 0
 #define SNDRV_TIMER_GLOBAL_RTC 1
 #define SNDRV_TIMER_GLOBAL_HPET 2
 #define SNDRV_TIMER_GLOBAL_HRTIMER 3
-#define SNDRV_TIMER_FLG_SLAVE (1 << 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_FLG_SLAVE (1 << 0)
 struct snd_timer_id {
   int dev_class;
   int dev_sclass;
-  int card;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int card;
   int device;
   int subdevice;
 };
-struct snd_timer_ginfo {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct snd_timer_ginfo {
   struct snd_timer_id tid;
   unsigned int flags;
   int card;
-  unsigned char id[64];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char id[64];
   unsigned char name[80];
   unsigned long reserved0;
   unsigned long resolution;
-  unsigned long resolution_min;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned long resolution_min;
   unsigned long resolution_max;
   unsigned int clients;
   unsigned char reserved[32];
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct snd_timer_gparams {
   struct snd_timer_id tid;
   unsigned long period_num;
-  unsigned long period_den;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned long period_den;
   unsigned char reserved[32];
 };
 struct snd_timer_gstatus {
-  struct snd_timer_id tid;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct snd_timer_id tid;
   unsigned long resolution;
   unsigned long resolution_num;
   unsigned long resolution_den;
-  unsigned char reserved[32];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char reserved[32];
 };
 struct snd_timer_select {
   struct snd_timer_id id;
-  unsigned char reserved[32];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char reserved[32];
 };
 struct snd_timer_info {
   unsigned int flags;
-  int card;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int card;
   unsigned char id[64];
   unsigned char name[80];
   unsigned long reserved0;
-  unsigned long resolution;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned long resolution;
   unsigned char reserved[64];
 };
 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0)
-#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1)
 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2)
 struct snd_timer_params {
   unsigned int flags;
-  unsigned int ticks;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int ticks;
   unsigned int queue_size;
   unsigned int reserved0;
   unsigned int filter;
-  unsigned char reserved[60];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char reserved[60];
 };
 struct snd_timer_status {
   struct timespec tstamp;
-  unsigned int resolution;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int resolution;
   unsigned int lost;
   unsigned int overrun;
   unsigned int queue;
-  unsigned char reserved[64];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char reserved[64];
 };
 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
-#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
-#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
-#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
-struct snd_timer_read {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct snd_timer_read {
   unsigned int resolution;
   unsigned int ticks;
 };
-enum {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum {
   SNDRV_TIMER_EVENT_RESOLUTION = 0,
   SNDRV_TIMER_EVENT_TICK,
   SNDRV_TIMER_EVENT_START,
-  SNDRV_TIMER_EVENT_STOP,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_TIMER_EVENT_STOP,
   SNDRV_TIMER_EVENT_CONTINUE,
   SNDRV_TIMER_EVENT_PAUSE,
   SNDRV_TIMER_EVENT_EARLY,
-  SNDRV_TIMER_EVENT_SUSPEND,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_TIMER_EVENT_SUSPEND,
   SNDRV_TIMER_EVENT_RESUME,
   SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
   SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
-  SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
   SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
   SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
   SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct snd_timer_tread {
   int event;
   struct timespec tstamp;
-  unsigned int val;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned int val;
 };
 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
 struct snd_ctl_card_info {
-  int card;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int card;
   int pad;
   unsigned char id[16];
   unsigned char driver[16];
-  unsigned char name[32];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char name[32];
   unsigned char longname[80];
   unsigned char reserved_[16];
   unsigned char mixername[80];
-  unsigned char components[128];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  unsigned char components[128];
 };
 typedef int __bitwise snd_ctl_elem_type_t;
 #define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
-#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
 #define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
-#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
 typedef int __bitwise snd_ctl_elem_iface_t;
-#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
 #define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
 #define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
-#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
 #define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
-#define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0)
 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1)
 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE)
 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2)
-#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3)
 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4)
 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5)
 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6)
 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8)
 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9)
 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10)
-#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28)
 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29)
 #define SNDRV_CTL_POWER_D0 0x0000
 #define SNDRV_CTL_POWER_D1 0x0100
-#define SNDRV_CTL_POWER_D2 0x0200
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_POWER_D2 0x0200
 #define SNDRV_CTL_POWER_D3 0x0300
 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000)
 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001)
-struct snd_ctl_elem_id {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
+struct snd_ctl_elem_id {
   unsigned int numid;
   snd_ctl_elem_iface_t iface;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int device;
   unsigned int subdevice;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char name[44];
   unsigned int index;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct snd_ctl_elem_list {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int offset;
   unsigned int space;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int used;
   unsigned int count;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_ctl_elem_id __user * pids;
   unsigned char reserved[50];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct snd_ctl_elem_info {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_ctl_elem_id id;
   snd_ctl_elem_type_t type;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int access;
   unsigned int count;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __kernel_pid_t owner;
   union {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct {
       long min;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       long max;
       long step;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } integer;
     struct {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       long long min;
       long long max;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       long long step;
     } integer64;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct {
       unsigned int items;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       unsigned int item;
       char name[64];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       __u64 names_ptr;
       unsigned int names_length;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } enumerated;
     unsigned char reserved[128];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   } value;
   union {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     unsigned short d[4];
     unsigned short * d_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   } dimen;
   unsigned char reserved[64 - 4 * sizeof(unsigned short)];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct snd_ctl_elem_value {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_ctl_elem_id id;
   unsigned int indirect : 1;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union {
     union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       long value[128];
       long * value_ptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } integer;
     union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       long long value[64];
       long long * value_ptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } integer64;
     union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       unsigned int item[128];
       unsigned int * item_ptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } enumerated;
     union {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       unsigned char data[512];
       unsigned char * data_ptr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     } bytes;
     struct snd_aes_iec958 iec958;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   } value;
   struct timespec tstamp;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned char reserved[128 - sizeof(struct timespec)];
 };
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_ctl_tlv {
   unsigned int numid;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   unsigned int length;
   unsigned int tlv[0];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 enum sndrv_ctl_event_type {
   SNDRV_CTL_EVENT_ELEM = 0,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0)
 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2)
 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
 struct snd_ctl_event {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   int type;
   union {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     struct {
       unsigned int mask;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
       struct snd_ctl_elem_id id;
     } elem;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     unsigned char data8[60];
   } data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #define SNDRV_CTL_NAME_NONE ""
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_PLAYBACK "Playback "
 #define SNDRV_CTL_NAME_CAPTURE "Capture "
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_IEC958_NONE ""
 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_IEC958_MASK "Mask"
 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/kernel-headers/sound/audio_effects.h b/kernel-headers/sound/audio_effects.h
index bf98f4a..1b4489f 100644
--- a/kernel-headers/sound/audio_effects.h
+++ b/kernel-headers/sound/audio_effects.h

@@ -122,173 +122,208 @@
 #define EQ_BAND_BOOST 5
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define EQ_BAND_CUT 6
-#define DTS_EAGLE_MODULE 0x00005000
-#define EAGLE_DRIVER_ID 0xF2
-#define DTS_EAGLE_IOCTL_GET_CACHE_SIZE _IOR(EAGLE_DRIVER_ID, 0, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DTS_EAGLE_IOCTL_SET_CACHE_SIZE _IOW(EAGLE_DRIVER_ID, 1, int)
-#define DTS_EAGLE_IOCTL_GET_PARAM _IOR(EAGLE_DRIVER_ID, 2, void *)
-#define DTS_EAGLE_IOCTL_SET_PARAM _IOW(EAGLE_DRIVER_ID, 3, void *)
-#define DTS_EAGLE_IOCTL_SET_CACHE_BLOCK _IOW(EAGLE_DRIVER_ID, 4, void *)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DTS_EAGLE_IOCTL_SET_ACTIVE_DEVICE _IOW(EAGLE_DRIVER_ID, 5, void *)
-#define DTS_EAGLE_IOCTL_GET_LICENSE _IOR(EAGLE_DRIVER_ID, 6, void *)
-#define DTS_EAGLE_IOCTL_SET_LICENSE _IOW(EAGLE_DRIVER_ID, 7, void *)
-#define DTS_EAGLE_IOCTL_SEND_LICENSE _IOW(EAGLE_DRIVER_ID, 8, int)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DTS_EAGLE_IOCTL_SET_VOLUME_COMMANDS _IOW(EAGLE_DRIVER_ID, 9, void *)
-struct dts_eagle_param_desc {
-  __u32 id;
-  __s32 size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __s32 offset;
-  __u32 device;
-} __packed;
 #define SOFT_VOLUME_MODULE 0x00006000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME_ENABLE 0x00006001
 #define SOFT_VOLUME_GAIN_2CH 0x00006002
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME_GAIN_MASTER 0x00006003
 #define SOFT_VOLUME_ENABLE_PARAM_LEN 1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME_GAIN_2CH_PARAM_LEN 2
 #define SOFT_VOLUME_GAIN_MASTER_PARAM_LEN 1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME2_MODULE 0x00007000
 #define SOFT_VOLUME2_ENABLE 0x00007001
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME2_GAIN_2CH 0x00007002
 #define SOFT_VOLUME2_GAIN_MASTER 0x00007003
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME2_ENABLE_PARAM_LEN SOFT_VOLUME_ENABLE_PARAM_LEN
 #define SOFT_VOLUME2_GAIN_2CH_PARAM_LEN SOFT_VOLUME_GAIN_2CH_PARAM_LEN
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME2_GAIN_MASTER_PARAM_LEN SOFT_VOLUME_GAIN_MASTER_PARAM_LEN
+#define PBE_CONF_MODULE_ID 0x00010C2A
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PBE_CONF_PARAM_ID 0x00010C49
+#define PBE_MODULE 0x00008000
+#define PBE_ENABLE 0x00008001
+#define PBE_CONFIG 0x00008002
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PBE_ENABLE_PARAM_LEN 1
+#define PBE_CONFIG_PARAM_LEN 28
 #define COMMAND_PAYLOAD_LEN 3
 #define COMMAND_PAYLOAD_SZ (COMMAND_PAYLOAD_LEN * sizeof(uint32_t))
-#define MAX_INBAND_PARAM_SZ 4096
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MAX_INBAND_PARAM_SZ 4096
 #define Q27_UNITY (1 << 27)
 #define Q8_UNITY (1 << 8)
 #define CUSTOM_OPENSL_PRESET 18
-#define VIRTUALIZER_ENABLE_PARAM_SZ (VIRTUALIZER_ENABLE_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define VIRTUALIZER_ENABLE_PARAM_SZ (VIRTUALIZER_ENABLE_PARAM_LEN * sizeof(uint32_t))
 #define VIRTUALIZER_STRENGTH_PARAM_SZ (VIRTUALIZER_STRENGTH_PARAM_LEN * sizeof(uint32_t))
 #define VIRTUALIZER_OUT_TYPE_PARAM_SZ (VIRTUALIZER_OUT_TYPE_PARAM_LEN * sizeof(uint32_t))
 #define VIRTUALIZER_GAIN_ADJUST_PARAM_SZ (VIRTUALIZER_GAIN_ADJUST_PARAM_LEN * sizeof(uint32_t))
-struct virtualizer_params {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct virtualizer_params {
   uint32_t device;
   uint32_t enable_flag;
   uint32_t strength;
-  uint32_t out_type;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t out_type;
   int32_t gain_adjust;
 };
 #define NUM_OSL_REVERB_PRESETS_SUPPORTED 6
-#define REVERB_ENABLE_PARAM_SZ (REVERB_ENABLE_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define REVERB_ENABLE_PARAM_SZ (REVERB_ENABLE_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_MODE_PARAM_SZ (REVERB_MODE_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_PRESET_PARAM_SZ (REVERB_PRESET_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_WET_MIX_PARAM_SZ (REVERB_WET_MIX_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_GAIN_ADJUST_PARAM_SZ (REVERB_GAIN_ADJUST_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define REVERB_GAIN_ADJUST_PARAM_SZ (REVERB_GAIN_ADJUST_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_ROOM_LEVEL_PARAM_SZ (REVERB_ROOM_LEVEL_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_ROOM_HF_LEVEL_PARAM_SZ (REVERB_ROOM_HF_LEVEL_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_DECAY_TIME_PARAM_SZ (REVERB_DECAY_TIME_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_DECAY_HF_RATIO_PARAM_SZ (REVERB_DECAY_HF_RATIO_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define REVERB_DECAY_HF_RATIO_PARAM_SZ (REVERB_DECAY_HF_RATIO_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_REFLECTIONS_LEVEL_PARAM_SZ (REVERB_REFLECTIONS_LEVEL_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_REFLECTIONS_DELAY_PARAM_SZ (REVERB_REFLECTIONS_DELAY_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_LEVEL_PARAM_SZ (REVERB_LEVEL_PARAM_LEN * sizeof(uint32_t))
-#define REVERB_DELAY_PARAM_SZ (REVERB_DELAY_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define REVERB_DELAY_PARAM_SZ (REVERB_DELAY_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_DIFFUSION_PARAM_SZ (REVERB_DIFFUSION_PARAM_LEN * sizeof(uint32_t))
 #define REVERB_DENSITY_PARAM_SZ (REVERB_DENSITY_PARAM_LEN * sizeof(uint32_t))
 struct reverb_params {
-  uint32_t device;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t device;
   uint32_t enable_flag;
   uint32_t mode;
   uint32_t preset;
-  uint32_t wet_mix;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t wet_mix;
   int32_t gain_adjust;
   int32_t room_level;
   int32_t room_hf_level;
-  uint32_t decay_time;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t decay_time;
   uint32_t decay_hf_ratio;
   int32_t reflections_level;
   uint32_t reflections_delay;
-  int32_t level;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t level;
   uint32_t delay;
   uint32_t diffusion;
   uint32_t density;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 #define BASS_BOOST_ENABLE_PARAM_SZ (BASS_BOOST_ENABLE_PARAM_LEN * sizeof(uint32_t))
 #define BASS_BOOST_MODE_PARAM_SZ (BASS_BOOST_MODE_PARAM_LEN * sizeof(uint32_t))
 #define BASS_BOOST_STRENGTH_PARAM_SZ (BASS_BOOST_STRENGTH_PARAM_LEN * sizeof(uint32_t))
-struct bass_boost_params {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct bass_boost_params {
   uint32_t device;
   uint32_t enable_flag;
   uint32_t mode;
-  uint32_t strength;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t strength;
 };
 #define MAX_EQ_BANDS 12
 #define MAX_OSL_EQ_BANDS 5
-#define EQ_ENABLE_PARAM_SZ (EQ_ENABLE_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EQ_ENABLE_PARAM_SZ (EQ_ENABLE_PARAM_LEN * sizeof(uint32_t))
 #define EQ_CONFIG_PARAM_SZ (EQ_CONFIG_PARAM_LEN * sizeof(uint32_t))
 #define EQ_CONFIG_PER_BAND_PARAM_SZ (EQ_CONFIG_PER_BAND_PARAM_LEN * sizeof(uint32_t))
 #define EQ_CONFIG_PARAM_MAX_LEN (EQ_CONFIG_PARAM_LEN + MAX_EQ_BANDS * EQ_CONFIG_PER_BAND_PARAM_LEN)
-#define EQ_CONFIG_PARAM_MAX_SZ (EQ_CONFIG_PARAM_MAX_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EQ_CONFIG_PARAM_MAX_SZ (EQ_CONFIG_PARAM_MAX_LEN * sizeof(uint32_t))
 #define EQ_NUM_BANDS_PARAM_SZ (EQ_NUM_BANDS_PARAM_LEN * sizeof(uint32_t))
 #define EQ_BAND_LEVELS_PARAM_SZ (EQ_BAND_LEVELS_PARAM_LEN * sizeof(uint32_t))
 #define EQ_BAND_LEVEL_RANGE_PARAM_SZ (EQ_BAND_LEVEL_RANGE_PARAM_LEN * sizeof(uint32_t))
-#define EQ_BAND_FREQS_PARAM_SZ (EQ_BAND_FREQS_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EQ_BAND_FREQS_PARAM_SZ (EQ_BAND_FREQS_PARAM_LEN * sizeof(uint32_t))
 #define EQ_SINGLE_BAND_FREQ_RANGE_PARAM_SZ (EQ_SINGLE_BAND_FREQ_RANGE_PARAM_LEN * sizeof(uint32_t))
 #define EQ_SINGLE_BAND_FREQ_PARAM_SZ (EQ_SINGLE_BAND_FREQ_PARAM_LEN * sizeof(uint32_t))
 #define EQ_BAND_INDEX_PARAM_SZ (EQ_BAND_INDEX_PARAM_LEN * sizeof(uint32_t))
-#define EQ_PRESET_ID_PARAM_SZ (EQ_PRESET_ID_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EQ_PRESET_ID_PARAM_SZ (EQ_PRESET_ID_PARAM_LEN * sizeof(uint32_t))
 #define EQ_NUM_PRESETS_PARAM_SZ (EQ_NUM_PRESETS_PARAM_LEN * sizeof(uint8_t))
 struct eq_config_t {
   int32_t eq_pregain;
-  int32_t preset_id;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t preset_id;
   uint32_t num_bands;
 };
 struct eq_per_band_config_t {
-  int32_t band_idx;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t band_idx;
   uint32_t filter_type;
   uint32_t freq_millihertz;
   int32_t gain_millibels;
-  uint32_t quality_factor;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t quality_factor;
 };
 struct eq_per_band_freq_range_t {
   uint32_t band_index;
-  uint32_t min_freq_millihertz;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t min_freq_millihertz;
   uint32_t max_freq_millihertz;
 };
 struct eq_params {
-  uint32_t device;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t device;
   uint32_t enable_flag;
   struct eq_config_t config;
   struct eq_per_band_config_t per_band_cfg[MAX_EQ_BANDS];
-  struct eq_per_band_freq_range_t per_band_freq_range[MAX_EQ_BANDS];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct eq_per_band_freq_range_t per_band_freq_range[MAX_EQ_BANDS];
   uint32_t band_index;
   uint32_t freq_millihertz;
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define PBE_ENABLE_PARAM_SZ (PBE_ENABLE_PARAM_LEN * sizeof(uint32_t))
+#define PBE_CONFIG_PARAM_SZ (PBE_CONFIG_PARAM_LEN * sizeof(uint16_t))
+struct pbe_config_t {
+  int16_t real_bass_mix;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int16_t bass_color_control;
+  uint16_t main_chain_delay;
+  uint16_t xover_filter_order;
+  uint16_t bandpass_filter_order;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int16_t drc_delay;
+  uint16_t rms_tav;
+  int16_t exp_threshold;
+  uint16_t exp_slope;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int16_t comp_threshold;
+  uint16_t comp_slope;
+  uint16_t makeup_gain;
+  uint32_t comp_attack;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t comp_release;
+  uint32_t exp_attack;
+  uint32_t exp_release;
+  int16_t limiter_bass_threshold;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int16_t limiter_high_threshold;
+  int16_t limiter_bass_makeup_gain;
+  int16_t limiter_high_makeup_gain;
+  int16_t limiter_bass_gc;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int16_t limiter_high_gc;
+  int16_t limiter_delay;
+  uint16_t reserved;
+  int32_t p1LowPassCoeffs[5 * 2];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  int32_t p1HighPassCoeffs[5 * 2];
+  int32_t p1BandPassCoeffs[5 * 3];
+  int32_t p1BassShelfCoeffs[5];
+  int32_t p1TrebleShelfCoeffs[5];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __packed;
+struct pbe_params {
+  uint32_t device;
+  uint32_t enable_flag;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t cfg_len;
+  struct pbe_config_t config;
+};
 #define SOFT_VOLUME_ENABLE_PARAM_SZ (SOFT_VOLUME_ENABLE_PARAM_LEN * sizeof(uint32_t))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SOFT_VOLUME_GAIN_MASTER_PARAM_SZ (SOFT_VOLUME_GAIN_MASTER_PARAM_LEN * sizeof(uint32_t))
@@ -302,4 +337,16 @@
   uint32_t right_gain;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+struct msm_nt_eff_all_config {
+  struct bass_boost_params bass_boost;
+  struct pbe_params pbe;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct virtualizer_params virtualizer;
+  struct reverb_params reverb;
+  struct eq_params equalizer;
+  struct soft_volume_params saplus_vol;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct soft_volume_params topo_switch_vol;
+};
 #endif
+

diff --git a/kernel-headers/sound/compress_offload.h b/kernel-headers/sound/compress_offload.h
index 5f12b37..3de9105 100644
--- a/kernel-headers/sound/compress_offload.h
+++ b/kernel-headers/sound/compress_offload.h

@@ -27,28 +27,28 @@
   __u32 fragment_size;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 fragments;
-};
+} __attribute__((packed, aligned(4)));
 struct snd_compr_params {
   struct snd_compressed_buffer buffer;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_codec codec;
   __u8 no_wake_mode;
-};
+} __attribute__((packed, aligned(4)));
 struct snd_compr_tstamp {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 byte_offset;
-  __u32 copied_total;
+  __u64 copied_total;
   __u32 pcm_frames;
   __u32 pcm_io_frames;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 sampling_rate;
   uint64_t timestamp;
-};
+} __attribute__((packed, aligned(4)));
 struct snd_compr_avail {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u64 avail;
   struct snd_compr_tstamp tstamp;
-} __attribute__((packed));
+} __attribute__((packed, aligned(4)));
 enum snd_compr_direction {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   SND_COMPRESS_PLAYBACK = 0,
@@ -66,18 +66,18 @@
   __u32 codecs[MAX_NUM_CODECS];
   __u32 reserved[11];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
+} __attribute__((packed, aligned(4)));
 struct snd_compr_codec_caps {
   __u32 codec;
   __u32 num_descriptors;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_codec_desc descriptor[MAX_NUM_CODEC_DESCRIPTORS];
-};
+} __attribute__((packed, aligned(4)));
 struct snd_compr_audio_info {
   uint32_t frame_size;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t reserved[15];
-};
+} __attribute__((packed, aligned(4)));
 enum {
   SNDRV_COMPRESS_ENCODER_PADDING = 1,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -89,7 +89,7 @@
 struct snd_compr_metadata {
   __u32 key;
   __u32 value[8];
-};
+} __attribute__((packed, aligned(4)));
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_COMPRESS_IOCTL_VERSION _IOR('C', 0x00, int)
 #define SNDRV_COMPRESS_GET_CAPS _IOWR('C', 0x10, struct snd_compr_caps)
@@ -111,10 +111,11 @@
 #define SNDRV_COMPRESS_NEXT_TRACK _IO('C', 0x35)
 #define SNDRV_COMPRESS_PARTIAL_DRAIN _IO('C', 0x36)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM _IOW('C', 0x37, union snd_codec_options)
+#define SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM _IOW('C', 0x80, union snd_codec_options)
 #define SND_COMPR_TRIGGER_DRAIN 7
 #define SND_COMPR_TRIGGER_NEXT_TRACK 8
 #define SND_COMPR_TRIGGER_PARTIAL_DRAIN 9
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_COMPRESS_METADATA_MODE _IOW('C', 0x99, bool)
 #endif
+

diff --git a/kernel-headers/sound/compress_params.h b/kernel-headers/sound/compress_params.h
index 98df0db..cf92f58 100644
--- a/kernel-headers/sound/compress_params.h
+++ b/kernel-headers/sound/compress_params.h

@@ -19,285 +19,290 @@
 #ifndef __SND_COMPRESS_PARAMS_H
 #define __SND_COMPRESS_PARAMS_H
 #include <linux/types.h>
-#define MAX_NUM_CODECS 32
+#define SND_DEC_DDP_MAX_PARAMS 18
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MAX_NUM_CODECS 32
 #define MAX_NUM_CODEC_DESCRIPTORS 32
 #define MAX_NUM_BITRATES 32
+#define MAX_NUM_SAMPLE_RATES 32
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MAX_NUM_FRAMES_PER_BUFFER 1
 #define COMPRESSED_META_DATA_MODE 0x10
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define META_DATA_LEN_BYTES 36
 #define Q6_AC3_DECODER 0x00010BF6
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define Q6_EAC3_DECODER 0x00010C3C
 #define Q6_DTS 0x00010D88
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define Q6_DTS_LBR 0x00010DBB
 #define SND_AUDIOCODEC_PCM ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_MP3 ((__u32) 0x00000002)
 #define SND_AUDIOCODEC_AMR ((__u32) 0x00000003)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_AMRWB ((__u32) 0x00000004)
 #define SND_AUDIOCODEC_AMRWBPLUS ((__u32) 0x00000005)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_AAC ((__u32) 0x00000006)
 #define SND_AUDIOCODEC_WMA ((__u32) 0x00000007)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_REAL ((__u32) 0x00000008)
 #define SND_AUDIOCODEC_VORBIS ((__u32) 0x00000009)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_FLAC ((__u32) 0x0000000A)
 #define SND_AUDIOCODEC_IEC61937 ((__u32) 0x0000000B)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_G723_1 ((__u32) 0x0000000C)
 #define SND_AUDIOCODEC_G729 ((__u32) 0x0000000D)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_DTS_PASS_THROUGH ((__u32) 0x0000000E)
 #define SND_AUDIOCODEC_DTS_LBR ((__u32) 0x0000000F)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_DTS_TRANSCODE_LOOPBACK ((__u32) 0x00000010)
 #define SND_AUDIOCODEC_PASS_THROUGH ((__u32) 0x00000011)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_MP2 ((__u32) 0x00000012)
 #define SND_AUDIOCODEC_DTS_LBR_PASS_THROUGH ((__u32) 0x00000013)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_AC3 ((__u32) 0x00000014)
 #define SND_AUDIOCODEC_AC3_PASS_THROUGH ((__u32) 0x00000015)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_WMA_PRO ((__u32) 0x00000016)
 #define SND_AUDIOCODEC_DTS ((__u32) 0x00000017)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_EAC3 ((__u32) 0x00000018)
 #define SND_AUDIOCODEC_ALAC ((__u32) 0x00000019)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCODEC_APE ((__u32) 0x00000020)
 #define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_APE
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_PCM ((__u32) 0x00000001)
 #define SND_AUDIOCHANMODE_MP3_MONO ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCHANMODE_MP3_STEREO ((__u32) 0x00000002)
 #define SND_AUDIOCHANMODE_MP3_JOINTSTEREO ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOCHANMODE_MP3_DUAL ((__u32) 0x00000008)
 #define SND_AUDIOPROFILE_AMR ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AMR_DTX_OFF ((__u32) 0x00000001)
 #define SND_AUDIOMODE_AMR_VAD1 ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AMR_VAD2 ((__u32) 0x00000004)
 #define SND_AUDIOSTREAMFORMAT_UNDEFINED ((__u32) 0x00000000)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_CONFORMANCE ((__u32) 0x00000001)
 #define SND_AUDIOSTREAMFORMAT_IF1 ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_IF2 ((__u32) 0x00000004)
 #define SND_AUDIOSTREAMFORMAT_FSF ((__u32) 0x00000008)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_RTPPAYLOAD ((__u32) 0x00000010)
 #define SND_AUDIOSTREAMFORMAT_ITU ((__u32) 0x00000020)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_AMRWB ((__u32) 0x00000001)
 #define SND_AUDIOMODE_AMRWB_DTX_OFF ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AMRWB_VAD1 ((__u32) 0x00000002)
 #define SND_AUDIOMODE_AMRWB_VAD2 ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_AMRWBPLUS ((__u32) 0x00000001)
 #define SND_AUDIOPROFILE_AAC ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AAC_MAIN ((__u32) 0x00000001)
 #define SND_AUDIOMODE_AAC_LC ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AAC_SSR ((__u32) 0x00000004)
 #define SND_AUDIOMODE_AAC_LTP ((__u32) 0x00000008)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AAC_HE ((__u32) 0x00000010)
 #define SND_AUDIOMODE_AAC_SCALABLE ((__u32) 0x00000020)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AAC_ERLC ((__u32) 0x00000040)
 #define SND_AUDIOMODE_AAC_LD ((__u32) 0x00000080)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_AAC_HE_PS ((__u32) 0x00000100)
 #define SND_AUDIOMODE_AAC_HE_MPS ((__u32) 0x00000200)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_MP2ADTS ((__u32) 0x00000001)
 #define SND_AUDIOSTREAMFORMAT_MP4ADTS ((__u32) 0x00000002)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_MP4LOAS ((__u32) 0x00000004)
 #define SND_AUDIOSTREAMFORMAT_MP4LATM ((__u32) 0x00000008)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_ADIF ((__u32) 0x00000010)
 #define SND_AUDIOSTREAMFORMAT_MP4FF ((__u32) 0x00000020)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_RAW ((__u32) 0x00000040)
 #define SND_AUDIOPROFILE_WMA7 ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_WMA8 ((__u32) 0x00000002)
 #define SND_AUDIOPROFILE_WMA9 ((__u32) 0x00000004)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_WMA10 ((__u32) 0x00000008)
 #define SND_AUDIOMODE_WMA_LEVEL1 ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_WMA_LEVEL2 ((__u32) 0x00000002)
 #define SND_AUDIOMODE_WMA_LEVEL3 ((__u32) 0x00000004)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_WMA_LEVEL4 ((__u32) 0x00000008)
 #define SND_AUDIOMODE_WMAPRO_LEVELM0 ((__u32) 0x00000010)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_WMAPRO_LEVELM1 ((__u32) 0x00000020)
 #define SND_AUDIOMODE_WMAPRO_LEVELM2 ((__u32) 0x00000040)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_WMAPRO_LEVELM3 ((__u32) 0x00000080)
 #define SND_AUDIOSTREAMFORMAT_WMA_ASF ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_WMA_NOASF_HDR ((__u32) 0x00000002)
 #define SND_AUDIOPROFILE_REALAUDIO ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_REALAUDIO_G2 ((__u32) 0x00000001)
 #define SND_AUDIOMODE_REALAUDIO_8 ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_REALAUDIO_10 ((__u32) 0x00000004)
 #define SND_AUDIOMODE_REALAUDIO_SURROUND ((__u32) 0x00000008)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_VORBIS ((__u32) 0x00000001)
 #define SND_AUDIOMODE_VORBIS ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_FLAC ((__u32) 0x00000001)
 #define SND_AUDIOMODE_FLAC_LEVEL0 ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_FLAC_LEVEL1 ((__u32) 0x00000002)
 #define SND_AUDIOMODE_FLAC_LEVEL2 ((__u32) 0x00000004)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_FLAC_LEVEL3 ((__u32) 0x00000008)
 #define SND_AUDIOMODE_FLAC_LEVEL4 ((__u32) 0x00000010)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_FLAC_LEVEL5 ((__u32) 0x00000020)
 #define SND_AUDIOMODE_FLAC_LEVEL6 ((__u32) 0x00000040)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_FLAC_LEVEL7 ((__u32) 0x00000080)
 #define SND_AUDIOMODE_FLAC_LEVEL8 ((__u32) 0x00000100)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOSTREAMFORMAT_FLAC ((__u32) 0x00000001)
 #define SND_AUDIOSTREAMFORMAT_FLAC_OGG ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOPROFILE_IEC61937 ((__u32) 0x00000001)
 #define SND_AUDIOPROFILE_IEC61937_SPDIF ((__u32) 0x00000002)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_REF_STREAM_HEADER ((__u32) 0x00000000)
 #define SND_AUDIOMODE_IEC_LPCM ((__u32) 0x00000001)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_AC3 ((__u32) 0x00000002)
 #define SND_AUDIOMODE_IEC_MPEG1 ((__u32) 0x00000004)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_MP3 ((__u32) 0x00000008)
 #define SND_AUDIOMODE_IEC_MPEG2 ((__u32) 0x00000010)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_AACLC ((__u32) 0x00000020)
 #define SND_AUDIOMODE_IEC_DTS ((__u32) 0x00000040)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_ATRAC ((__u32) 0x00000080)
 #define SND_AUDIOMODE_IEC_SACD ((__u32) 0x00000100)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_EAC3 ((__u32) 0x00000200)
 #define SND_AUDIOMODE_IEC_DTS_HD ((__u32) 0x00000400)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_MLP ((__u32) 0x00000800)
 #define SND_AUDIOMODE_IEC_DST ((__u32) 0x00001000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_WMAPRO ((__u32) 0x00002000)
 #define SND_AUDIOMODE_IEC_REF_CXT ((__u32) 0x00004000)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_HE_AAC ((__u32) 0x00008000)
 #define SND_AUDIOMODE_IEC_HE_AAC2 ((__u32) 0x00010000)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_IEC_MPEG_SURROUND ((__u32) 0x00020000)
 #define SND_AUDIOPROFILE_G723_1 ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_G723_1_ANNEX_A ((__u32) 0x00000001)
 #define SND_AUDIOMODE_G723_1_ANNEX_B ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_G723_1_ANNEX_C ((__u32) 0x00000004)
 #define SND_AUDIOPROFILE_G729 ((__u32) 0x00000001)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_AUDIOMODE_G729_ANNEX_A ((__u32) 0x00000001)
 #define SND_AUDIOMODE_G729_ANNEX_B ((__u32) 0x00000002)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SND_RATECONTROLMODE_CONSTANTBITRATE ((__u32) 0x00000001)
 #define SND_RATECONTROLMODE_VARIABLEBITRATE ((__u32) 0x00000002)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_enc_wma {
   __u32 super_block_align;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 bits_per_sample;
   __u32 channelmask;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 encodeopt;
   __u32 encodeopt1;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 encodeopt2;
+  __u32 avg_bit_rate;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct snd_enc_vorbis {
   __s32 quality;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 managed;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 max_bit_rate;
   __u32 min_bit_rate;
   __u32 downmix;
+} __attribute__((packed, aligned(4)));
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-};
 struct snd_enc_real {
   __u32 quant_bits;
   __u32 start_region;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 num_regions;
-};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __attribute__((packed, aligned(4)));
 struct snd_enc_flac {
   __u32 num;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 gain;
-};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __attribute__((packed, aligned(4)));
 struct snd_enc_generic {
   __u32 bw;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __s32 reserved[15];
-};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __attribute__((packed, aligned(4)));
 struct snd_dec_ddp {
   __u32 params_length;
+  __u32 params_id[SND_DEC_DDP_MAX_PARAMS];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-  __u32 params_id[18];
-  __u32 params_value[18];
-};
+  __u32 params_value[SND_DEC_DDP_MAX_PARAMS];
+} __attribute__((packed, aligned(4)));
 struct snd_dec_flac {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 sample_size;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 min_blk_size;
   __u16 max_blk_size;
   __u16 min_frame_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 max_frame_size;
-};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __attribute__((packed, aligned(4)));
 struct snd_dec_vorbis {
   __u32 bit_stream_fmt;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 struct snd_dec_alac {
   __u32 frame_length;
   __u8 compatible_version;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u8 bit_depth;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u8 pb;
   __u8 mb;
   __u8 kb;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u8 num_channels;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 max_run;
   __u32 max_frame_bytes;
   __u32 avg_bit_rate;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 sample_rate;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 channel_layout_tag;
 };
 struct snd_dec_ape {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 compatible_version;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u16 compression_level;
   __u32 format_flags;
   __u32 blocks_per_frame;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 final_frame_blocks;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 total_frames;
   __u16 bits_per_sample;
   __u16 num_channels;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 sample_rate;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 seek_table_present;
 };
 union snd_codec_options {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_enc_wma wma;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_enc_vorbis vorbis;
   struct snd_enc_real real;
   struct snd_enc_flac flac;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_enc_generic generic;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_dec_ddp ddp;
   struct snd_dec_flac flac_dec;
   struct snd_dec_vorbis vorbis_dec;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   struct snd_dec_alac alac;
-  struct snd_dec_ape ape;
-};
-struct snd_codec_desc {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  struct snd_dec_ape ape;
+} __attribute__((packed, aligned(4)));
+struct snd_codec_desc {
   __u32 max_ch;
-  __u32 sample_rates;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  __u32 sample_rates[MAX_NUM_SAMPLE_RATES];
+  __u32 num_sample_rates;
   __u32 bit_rate[MAX_NUM_BITRATES];
   __u32 num_bitrates;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@@ -308,7 +313,7 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 min_buffer;
   __u32 reserved[15];
-};
+} __attribute__((packed, aligned(4)));
 struct snd_codec {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 id;
@@ -328,6 +333,7 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   union snd_codec_options options;
   __u32 reserved[3];
-};
+} __attribute__((packed, aligned(4)));
 #endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+

diff --git a/k318/kernel-headers/sound/devdep_params.h b/kernel-headers/sound/devdep_params.h
similarity index 100%
rename from k318/kernel-headers/sound/devdep_params.h
rename to kernel-headers/sound/devdep_params.h


diff --git a/kernel-headers/sound/lsm_params.h b/kernel-headers/sound/lsm_params.h
index 0005615..49ea6a3 100644
--- a/kernel-headers/sound/lsm_params.h
+++ b/kernel-headers/sound/lsm_params.h

@@ -22,6 +22,16 @@
 #include <sound/asound.h>
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0)
+#define LSM_OUT_FORMAT_PCM (0)
+#define LSM_OUT_FORMAT_ADPCM (1 << 0)
+#define LSM_OUT_DATA_RAW (0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define LSM_OUT_DATA_PACKED (1)
+#define LSM_OUT_DATA_EVENTS_DISABLED (0)
+#define LSM_OUT_DATA_EVENTS_ENABLED (1)
+#define LSM_OUT_TRANSFER_MODE_RT (0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define LSM_OUT_TRANSFER_MODE_FTRT (1)
 enum lsm_app_id {
   LSM_VOICE_WAKEUP_APP_ID = 1,
   LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
@@ -108,18 +118,28 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   __u32 data_size;
 };
+struct snd_lsm_output_format_cfg {
+  __u8 format;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  __u8 packing;
+  __u8 events;
+  __u8 mode;
+};
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_DEREG_SND_MODEL _IOW('U', 0x01, int)
 #define SNDRV_LSM_EVENT_STATUS _IOW('U', 0x02, struct snd_lsm_event_status)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_ABORT_EVENT _IOW('U', 0x03, int)
 #define SNDRV_LSM_START _IOW('U', 0x04, int)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_STOP _IOW('U', 0x05, int)
 #define SNDRV_LSM_SET_SESSION_DATA _IOW('U', 0x06, struct snd_lsm_session_data)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_REG_SND_MODEL_V2 _IOW('U', 0x07, struct snd_lsm_sound_model_v2)
 #define SNDRV_LSM_LAB_CONTROL _IOW('U', 0x08, uint32_t)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_STOP_LAB _IO('U', 0x09)
 #define SNDRV_LSM_SET_PARAMS _IOW('U', 0x0A, struct snd_lsm_detection_params)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_LSM_SET_MODULE_PARAMS _IOW('U', 0x0B, struct snd_lsm_module_params)
+#define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, struct snd_lsm_output_format_cfg)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/kernel-headers/sound/msmcal-hwdep.h b/kernel-headers/sound/msmcal-hwdep.h
index dd6dd0d..f7aa752 100644
--- a/kernel-headers/sound/msmcal-hwdep.h
+++ b/kernel-headers/sound/msmcal-hwdep.h

@@ -26,14 +26,16 @@
   WCD9XXX_MAD_CAL,
   WCD9XXX_MBHC_CAL,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  WCD9XXX_VBAT_CAL,
   WCD9XXX_MAX_CAL,
 };
 struct wcdcal_ioctl_buffer {
-  __u32 size;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  __u32 size;
   __u8 __user * buffer;
   enum wcd_cal_type cal_type;
 };
-#define SNDRV_CTL_IOCTL_HWDEP_CAL_TYPE _IOW('U', 0x1, struct wcdcal_ioctl_buffer)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SNDRV_CTL_IOCTL_HWDEP_CAL_TYPE _IOW('U', 0x1, struct wcdcal_ioctl_buffer)
 #endif
+

diff --git a/kernel-headers/sound/voice_params.h b/kernel-headers/sound/voice_params.h
index f76302b..043574b 100644
--- a/kernel-headers/sound/voice_params.h
+++ b/kernel-headers/sound/voice_params.h

@@ -28,3 +28,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SNDRV_VOICE_IOCTL_LCH _IOW('U', 0x00, enum voice_lch_mode)
 #endif
+

diff --git a/kernel-headers/sound/voice_svc.h b/kernel-headers/sound/voice_svc.h
index 95690fa..9606d9d 100644
--- a/kernel-headers/sound/voice_svc.h
+++ b/kernel-headers/sound/voice_svc.h

@@ -63,3 +63,4 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #endif
+

diff --git a/kernel-headers/video/msm_hdmi_modes.h b/kernel-headers/video/msm_hdmi_modes.h
index 6e95ed3..4e507cd 100644
--- a/kernel-headers/video/msm_hdmi_modes.h
+++ b/kernel-headers/video/msm_hdmi_modes.h

@@ -19,16 +19,31 @@
 #ifndef _UAPI_MSM_HDMI_MODES_H__
 #define _UAPI_MSM_HDMI_MODES_H__
 #include <linux/types.h>
-enum aspect_ratio {
+#include <linux/errno.h>
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSM_HDMI_RGB_888_24BPP_FORMAT BIT(0)
+#define MSM_HDMI_YUV_420_12BPP_FORMAT BIT(1)
+enum aspect_ratio {
   HDMI_RES_AR_INVALID,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   HDMI_RES_AR_4_3,
   HDMI_RES_AR_5_4,
   HDMI_RES_AR_16_9,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   HDMI_RES_AR_16_10,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  HDMI_RES_AR_64_27,
+  HDMI_RES_AR_256_135,
   HDMI_RES_AR_MAX,
 };
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+enum msm_hdmi_s3d_mode {
+  HDMI_S3D_NONE,
+  HDMI_S3D_SIDE_BY_SIDE,
+  HDMI_S3D_TOP_AND_BOTTOM,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  HDMI_S3D_FRAME_PACKING,
+  HDMI_S3D_MAX,
+};
 struct msm_hdmi_mode_timing_info {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
   uint32_t video_format;
@@ -51,203 +66,292 @@
   uint32_t supported;
   enum aspect_ratio ar;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+  uint32_t pixel_formats;
 };
+#define MSM_HDMI_INIT_RES_PAGE 1
 #define MSM_HDMI_MODES_CEA (1 << 0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSM_HDMI_MODES_XTND (1 << 1)
 #define MSM_HDMI_MODES_DVI (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSM_HDMI_MODES_ALL (MSM_HDMI_MODES_CEA | MSM_HDMI_MODES_XTND | MSM_HDMI_MODES_DVI)
 #define HDMI_VFRMT_UNKNOWN 0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_640x480p60_4_3 1
 #define HDMI_VFRMT_720x480p60_4_3 2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x480p60_16_9 3
 #define HDMI_VFRMT_1280x720p60_16_9 4
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1080i60_16_9 5
 #define HDMI_VFRMT_720x480i60_4_3 6
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i60_4_3 HDMI_VFRMT_720x480i60_4_3
 #define HDMI_VFRMT_720x480i60_16_9 7
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i60_16_9 HDMI_VFRMT_720x480i60_16_9
 #define HDMI_VFRMT_720x240p60_4_3 8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x240p60_4_3 HDMI_VFRMT_720x240p60_4_3
 #define HDMI_VFRMT_720x240p60_16_9 9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x240p60_16_9 HDMI_VFRMT_720x240p60_16_9
 #define HDMI_VFRMT_2880x480i60_4_3 10
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x480i60_16_9 11
 #define HDMI_VFRMT_2880x240p60_4_3 12
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x240p60_16_9 13
 #define HDMI_VFRMT_1440x480p60_4_3 14
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480p60_16_9 15
 #define HDMI_VFRMT_1920x1080p60_16_9 16
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x576p50_4_3 17
 #define HDMI_VFRMT_720x576p50_16_9 18
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1280x720p50_16_9 19
 #define HDMI_VFRMT_1920x1080i50_16_9 20
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x576i50_4_3 21
 #define HDMI_VFRMT_1440x576i50_4_3 HDMI_VFRMT_720x576i50_4_3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x576i50_16_9 22
 #define HDMI_VFRMT_1440x576i50_16_9 HDMI_VFRMT_720x576i50_16_9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x288p50_4_3 23
 #define HDMI_VFRMT_1440x288p50_4_3 HDMI_VFRMT_720x288p50_4_3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x288p50_16_9 24
 #define HDMI_VFRMT_1440x288p50_16_9 HDMI_VFRMT_720x288p50_16_9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x576i50_4_3 25
 #define HDMI_VFRMT_2880x576i50_16_9 26
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x288p50_4_3 27
 #define HDMI_VFRMT_2880x288p50_16_9 28
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x576p50_4_3 29
 #define HDMI_VFRMT_1440x576p50_16_9 30
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1080p50_16_9 31
 #define HDMI_VFRMT_1920x1080p24_16_9 32
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1080p25_16_9 33
 #define HDMI_VFRMT_1920x1080p30_16_9 34
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x480p60_4_3 35
 #define HDMI_VFRMT_2880x480p60_16_9 36
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_2880x576p50_4_3 37
 #define HDMI_VFRMT_2880x576p50_16_9 38
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1250i50_16_9 39
 #define HDMI_VFRMT_1920x1080i100_16_9 40
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1280x720p100_16_9 41
 #define HDMI_VFRMT_720x576p100_4_3 42
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x576p100_16_9 43
 #define HDMI_VFRMT_720x576i100_4_3 44
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x576i100_4_3 HDMI_VFRMT_720x576i100_4_3
 #define HDMI_VFRMT_720x576i100_16_9 45
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x576i100_16_9 HDMI_VFRMT_720x576i100_16_9
 #define HDMI_VFRMT_1920x1080i120_16_9 46
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1280x720p120_16_9 47
 #define HDMI_VFRMT_720x480p120_4_3 48
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x480p120_16_9 49
 #define HDMI_VFRMT_720x480i120_4_3 50
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i120_4_3 HDMI_VFRMT_720x480i120_4_3
 #define HDMI_VFRMT_720x480i120_16_9 51
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i120_16_9 HDMI_VFRMT_720x480i120_16_9
 #define HDMI_VFRMT_720x576p200_4_3 52
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x576p200_16_9 53
 #define HDMI_VFRMT_720x576i200_4_3 54
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x576i200_4_3 HDMI_VFRMT_720x576i200_4_3
 #define HDMI_VFRMT_720x576i200_16_9 55
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x576i200_16_9 HDMI_VFRMT_720x576i200_16_9
 #define HDMI_VFRMT_720x480p240_4_3 56
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_720x480p240_16_9 57
 #define HDMI_VFRMT_720x480i240_4_3 58
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i240_4_3 HDMI_VFRMT_720x480i240_4_3
 #define HDMI_VFRMT_720x480i240_16_9 59
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1440x480i240_16_9 HDMI_VFRMT_720x480i240_16_9
 #define HDMI_VFRMT_1280x720p24_16_9 60
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1280x720p25_16_9 61
 #define HDMI_VFRMT_1280x720p30_16_9 62
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1080p120_16_9 63
 #define HDMI_VFRMT_1920x1080p100_16_9 64
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1280x720p24_64_27 65
+#define HDMI_VFRMT_1280x720p25_64_27 66
+#define HDMI_VFRMT_1280x720p30_64_27 67
+#define HDMI_VFRMT_1280x720p50_64_27 68
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1280x720p60_64_27 69
+#define HDMI_VFRMT_1280x720p100_64_27 70
+#define HDMI_VFRMT_1280x720p120_64_27 71
+#define HDMI_VFRMT_1920x1080p24_64_27 72
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1920x1080p25_64_27 73
+#define HDMI_VFRMT_1920x1080p30_64_27 74
+#define HDMI_VFRMT_1920x1080p50_64_27 75
+#define HDMI_VFRMT_1920x1080p60_64_27 76
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1920x1080p100_64_27 77
+#define HDMI_VFRMT_1920x1080p120_64_27 78
+#define HDMI_VFRMT_1680x720p24_64_27 79
+#define HDMI_VFRMT_1680x720p25_64_27 80
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1680x720p30_64_27 81
+#define HDMI_VFRMT_1680x720p50_64_27 82
+#define HDMI_VFRMT_1680x720p60_64_27 83
+#define HDMI_VFRMT_1680x720p100_64_27 84
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1680x720p120_64_27 85
+#define HDMI_VFRMT_2560x1080p24_64_27 86
+#define HDMI_VFRMT_2560x1080p25_64_27 87
+#define HDMI_VFRMT_2560x1080p30_64_27 88
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_2560x1080p50_64_27 89
+#define HDMI_VFRMT_2560x1080p60_64_27 90
+#define HDMI_VFRMT_2560x1080p100_64_27 91
+#define HDMI_VFRMT_2560x1080p120_64_27 92
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_3840x2160p24_16_9 93
+#define HDMI_VFRMT_3840x2160p25_16_9 94
+#define HDMI_VFRMT_3840x2160p30_16_9 95
+#define HDMI_VFRMT_3840x2160p50_16_9 96
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_3840x2160p60_16_9 97
+#define HDMI_VFRMT_4096x2160p24_256_135 98
+#define HDMI_VFRMT_4096x2160p25_256_135 99
+#define HDMI_VFRMT_4096x2160p30_256_135 100
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_4096x2160p50_256_135 101
+#define HDMI_VFRMT_4096x2160p60_256_135 102
+#define HDMI_VFRMT_3840x2160p24_64_27 103
+#define HDMI_VFRMT_3840x2160p25_64_27 104
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_3840x2160p30_64_27 105
+#define HDMI_VFRMT_3840x2160p50_64_27 106
+#define HDMI_VFRMT_3840x2160p60_64_27 107
 #define HDMI_VFRMT_END 127
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define EVFRMT_OFF(x) (HDMI_VFRMT_END + x)
+#define HDMI_EVFRMT_3840x2160p30_16_9 EVFRMT_OFF(1)
+#define HDMI_EVFRMT_3840x2160p25_16_9 EVFRMT_OFF(2)
+#define HDMI_EVFRMT_3840x2160p24_16_9 EVFRMT_OFF(3)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p30_16_9 EVFRMT_OFF(1)
-#define HDMI_VFRMT_3840x2160p25_16_9 EVFRMT_OFF(2)
-#define HDMI_VFRMT_3840x2160p24_16_9 EVFRMT_OFF(3)
-#define HDMI_VFRMT_4096x2160p24_16_9 EVFRMT_OFF(4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_EVFRMT_END HDMI_VFRMT_4096x2160p24_16_9
+#define HDMI_EVFRMT_4096x2160p24_16_9 EVFRMT_OFF(4)
+#define HDMI_EVFRMT_END HDMI_EVFRMT_4096x2160p24_16_9
 #define WQXGA_OFF(x) (HDMI_EVFRMT_END + x)
 #define HDMI_VFRMT_2560x1600p60_16_9 WQXGA_OFF(1)
-#define HDMI_WQXGAFRMT_END HDMI_VFRMT_2560x1600p60_16_9
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_WQXGAFRMT_END HDMI_VFRMT_2560x1600p60_16_9
 #define WXGA_OFF(x) (HDMI_WQXGAFRMT_END + x)
 #define HDMI_VFRMT_1280x800p60_16_10 WXGA_OFF(1)
 #define HDMI_VFRMT_1366x768p60_16_10 WXGA_OFF(2)
-#define HDMI_WXGAFRMT_END HDMI_VFRMT_1366x768p60_16_10
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_WXGAFRMT_END HDMI_VFRMT_1366x768p60_16_10
 #define ETI_OFF(x) (HDMI_WXGAFRMT_END + x)
 #define HDMI_VFRMT_800x600p60_4_3 ETI_OFF(1)
 #define ETI_VFRMT_END HDMI_VFRMT_800x600p60_4_3
-#define ETII_OFF(x) (ETI_VFRMT_END + x)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ETII_OFF(x) (ETI_VFRMT_END + x)
 #define HDMI_VFRMT_1024x768p60_4_3 ETII_OFF(1)
 #define HDMI_VFRMT_1280x1024p60_5_4 ETII_OFF(2)
 #define ETII_VFRMT_END HDMI_VFRMT_1280x1024p60_5_4
-#define ETIII_OFF(x) (ETII_VFRMT_END + x)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define ETIII_OFF(x) (ETII_VFRMT_END + x)
 #define HDMI_VFRMT_848x480p60_16_9 ETIII_OFF(1)
 #define HDMI_VFRMT_1280x960p60_4_3 ETIII_OFF(2)
 #define HDMI_VFRMT_1360x768p60_16_9 ETIII_OFF(3)
-#define HDMI_VFRMT_1440x900p60_16_10 ETIII_OFF(4)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_1440x900p60_16_10 ETIII_OFF(4)
 #define HDMI_VFRMT_1400x1050p60_4_3 ETIII_OFF(5)
 #define HDMI_VFRMT_1680x1050p60_16_10 ETIII_OFF(6)
 #define HDMI_VFRMT_1600x1200p60_4_3 ETIII_OFF(7)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HDMI_VFRMT_1920x1200p60_16_10 ETIII_OFF(8)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ETIII_VFRMT_END HDMI_VFRMT_1920x1200p60_16_10
-#define HDMI_VFRMT_MAX (ETIII_VFRMT_END + 1)
-#define HDMI_VFRMT_FORCE_32BIT 0x7FFFFFFF
+#define RESERVE_OFF(x) (ETIII_VFRMT_END + x)
+#define HDMI_VFRMT_RESERVE1 RESERVE_OFF(1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_RESERVE2 RESERVE_OFF(2)
+#define HDMI_VFRMT_RESERVE3 RESERVE_OFF(3)
+#define HDMI_VFRMT_RESERVE4 RESERVE_OFF(4)
+#define HDMI_VFRMT_RESERVE5 RESERVE_OFF(5)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_RESERVE6 RESERVE_OFF(6)
+#define HDMI_VFRMT_RESERVE7 RESERVE_OFF(7)
+#define HDMI_VFRMT_RESERVE8 RESERVE_OFF(8)
+#define RESERVE_VFRMT_END HDMI_VFRMT_RESERVE8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_MAX (RESERVE_VFRMT_END + 1)
 #define VFRMT_NOT_SUPPORTED(VFRMT) { VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, false, HDMI_RES_AR_INVALID }
+#define HDMI_VFRMT_640x480p60_4_3_TIMING { HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true, 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_720x480p60_4_3_TIMING { HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_640x480p60_4_3_TIMING { HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true, 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_720x480p60_4_3_TIMING { HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_720x480p60_16_9_TIMING { HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1280x720p60_16_9_TIMING { HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false, 720, 5, 5, 20, false, 74250, 60000, false, HDMI_RES_AR_16_9 }
+#define HDMI_VFRMT_720x480p60_16_9_TIMING { HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true, 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1280x720p60_16_9_TIMING { HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false, 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1920x1080i60_16_9_TIMING { HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false, 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1440x480i60_4_3_TIMING { HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080i60_16_9_TIMING { HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false, 540, 2, 5, 5, false, 74250, 60000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1440x480i60_4_3_TIMING { HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_1440x480i60_16_9_TIMING { HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1920x1080p60_16_9_TIMING { HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 148500, 60000, false, HDMI_RES_AR_16_9 }
+#define HDMI_VFRMT_1440x480i60_16_9_TIMING { HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true, 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1920x1080p60_16_9_TIMING { HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_720x576p50_4_3_TIMING { HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_720x576p50_16_9_TIMING { HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_720x576p50_4_3_TIMING { HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_720x576p50_16_9_TIMING { HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true, 576, 5, 5, 39, true, 27000, 50000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1280x720p50_16_9_TIMING { HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false, 720, 5, 5, 20, false, 74250, 50000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1440x576i50_4_3_TIMING { HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3 }
+#define HDMI_VFRMT_1280x720p50_16_9_TIMING { HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false, 720, 5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1440x576i50_4_3_TIMING { HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_1440x576i50_16_9_TIMING { HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1920x1080p50_16_9_TIMING { HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x576i50_16_9_TIMING { HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true, 288, 2, 3, 19, true, 27000, 50000, true, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1920x1080p50_16_9_TIMING { HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 148500, 50000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1920x1080p24_16_9_TIMING { HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false, 1080, 4, 5, 36, false, 74250, 24000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1920x1080p25_16_9_TIMING { HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 74250, 25000, false, HDMI_RES_AR_16_9 }
+#define HDMI_VFRMT_1920x1080p24_16_9_TIMING { HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false, 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1920x1080p25_16_9_TIMING { HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false, 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1920x1080p30_16_9_TIMING { HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1024x768p60_4_3_TIMING { HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false, 768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1080p30_16_9_TIMING { HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false, 1080, 4, 5, 36, false, 74250, 30000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1024x768p60_4_3_TIMING { HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false, 768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_1280x1024p60_5_4_TIMING { HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false, 1024, 1, 3, 38, false, 108000, 60000, false, HDMI_RES_AR_5_4 }
-#define HDMI_VFRMT_2560x1600p60_16_9_TIMING { HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false, 1600, 3, 6, 37, false, 268500, 60000, false, HDMI_RES_AR_16_9 }
+#define HDMI_VFRMT_1280x1024p60_5_4_TIMING { HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false, 1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4, 0 }
+#define HDMI_VFRMT_2560x1600p60_16_9_TIMING { HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false, 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_EVFRMT_3840x2160p30_16_9_TIMING { HDMI_EVFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_EVFRMT_3840x2160p25_16_9_TIMING { HDMI_EVFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING { HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING { HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING { HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_4096x2160p24_16_9_TIMING { HDMI_VFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, HDMI_RES_AR_16_9 }
+#define HDMI_EVFRMT_3840x2160p24_16_9_TIMING { HDMI_EVFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_EVFRMT_4096x2160p24_16_9_TIMING { HDMI_EVFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_800x600p60_4_3_TIMING { HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false, 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_848x480p60_16_9_TIMING { HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false, 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_800x600p60_4_3_TIMING { HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false, 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_848x480p60_16_9_TIMING { HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false, 480, 6, 8, 23, false, 33750, 60000, false, HDMI_RES_AR_16_9 }
-#define HDMI_VFRMT_1280x960p60_4_3_TIMING { HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false, 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_1360x768p60_16_9_TIMING { HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false, 768, 3, 6, 18, false, 85500, 60000, false, HDMI_RES_AR_16_9 }
+#define HDMI_VFRMT_1280x960p60_4_3_TIMING { HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false, 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_1360x768p60_16_9_TIMING { HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false, 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_1440x900p60_16_10_TIMING { HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false, 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10, 0 }
+#define HDMI_VFRMT_1400x1050p60_4_3_TIMING { HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false, 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1440x900p60_16_10_TIMING { HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false, 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10 }
-#define HDMI_VFRMT_1400x1050p60_4_3_TIMING { HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false, 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3 }
-#define HDMI_VFRMT_1680x1050p60_16_10_TIMING { HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false, 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10 }
-#define HDMI_VFRMT_1600x1200p60_4_3_TIMING { HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false, 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3 }
+#define HDMI_VFRMT_1680x1050p60_16_10_TIMING { HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false, 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10, 0 }
+#define HDMI_VFRMT_1600x1200p60_4_3_TIMING { HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false, 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3, 0 }
+#define HDMI_VFRMT_1920x1200p60_16_10_TIMING { HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false, 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10, 0 }
+#define HDMI_VFRMT_1366x768p60_16_10_TIMING { HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false, 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10, 0 }
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define HDMI_VFRMT_1920x1200p60_16_10_TIMING { HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false, 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10 }
-#define HDMI_VFRMT_1366x768p60_16_10_TIMING { HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false, 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10 }
-#define HDMI_VFRMT_1280x800p60_16_10_TIMING { HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true, 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10 }
+#define HDMI_VFRMT_1280x800p60_16_10_TIMING { HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true, 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10, 0 }
+#define HDMI_VFRMT_3840x2160p24_16_9_TIMING { HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_3840x2160p25_16_9_TIMING { HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_3840x2160p30_16_9_TIMING { HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9, 0 }
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_3840x2160p50_16_9_TIMING { HDMI_VFRMT_3840x2160p50_16_9, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_3840x2160p60_16_9_TIMING { HDMI_VFRMT_3840x2160p60_16_9, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_16_9, 0 }
+#define HDMI_VFRMT_4096x2160p24_256_135_TIMING { HDMI_VFRMT_4096x2160p24_256_135, 4096, 1020, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_256_135, 0 }
+#define HDMI_VFRMT_4096x2160p25_256_135_TIMING { HDMI_VFRMT_4096x2160p25_256_135, 4096, 968, 88, 128, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_256_135, 0 }
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_4096x2160p30_256_135_TIMING { HDMI_VFRMT_4096x2160p30_256_135, 4096, 88, 88, 128, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_256_135, 0 }
+#define HDMI_VFRMT_4096x2160p50_256_135_TIMING { HDMI_VFRMT_4096x2160p50_256_135, 4096, 968, 88, 128, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_256_135, 0 }
+#define HDMI_VFRMT_4096x2160p60_256_135_TIMING { HDMI_VFRMT_4096x2160p60_256_135, 4096, 88, 88, 128, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_256_135, 0 }
+#define HDMI_VFRMT_3840x2160p24_64_27_TIMING { HDMI_VFRMT_3840x2160p24_64_27, 3840, 1276, 88, 296, false, 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_64_27, 0 }
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HDMI_VFRMT_3840x2160p25_64_27_TIMING { HDMI_VFRMT_3840x2160p25_64_27, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_64_27, 0 }
+#define HDMI_VFRMT_3840x2160p30_64_27_TIMING { HDMI_VFRMT_3840x2160p30_64_27, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_64_27, 0 }
+#define HDMI_VFRMT_3840x2160p50_64_27_TIMING { HDMI_VFRMT_3840x2160p50_64_27, 3840, 1056, 88, 296, false, 2160, 8, 10, 72, false, 594000, 50000, false, true, HDMI_RES_AR_64_27, 0 }
+#define HDMI_VFRMT_3840x2160p60_64_27_TIMING { HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false, 2160, 8, 10, 72, false, 594000, 60000, false, true, HDMI_RES_AR_64_27, 0 }
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSM_HDMI_MODES_SET_TIMING(LUT,MODE) do { struct msm_hdmi_mode_timing_info mode = MODE ##_TIMING; LUT[MODE] = mode; } while(0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSM_HDMI_MODES_INIT_TIMINGS(__lut) do { unsigned int i; for(i = 0; i < HDMI_VFRMT_MAX; i ++) { struct msm_hdmi_mode_timing_info mode = VFRMT_NOT_SUPPORTED(i); (__lut)[i] = mode; } \
 } while(0)
-#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut,__type) do { if(__type & MSM_HDMI_MODES_CEA) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_640x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p30_16_9); } if(__type & MSM_HDMI_MODES_XTND) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p24_16_9); } if(__type & MSM_HDMI_MODES_DVI) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1024x768p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x1024p60_5_4); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_2560x1600p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_800x600p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_848x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x960p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1360x768p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x900p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1400x1050p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1680x1050p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1600x1200p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1200p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1366x768p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x800p60_16_10); } \
+#define MSM_HDMI_MODES_SET_SUPP_TIMINGS(__lut,__type) do { if(__type & MSM_HDMI_MODES_CEA) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_640x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x480i60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_720x576p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x720p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x576i50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1080p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p50_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p24_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p25_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p30_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p50_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_4096x2160p60_256_135); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p24_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p25_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p30_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p50_64_27); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_3840x2160p60_64_27); } if(__type & MSM_HDMI_MODES_XTND) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p30_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p25_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_3840x2160p24_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_EVFRMT_4096x2160p24_16_9); } if(__type & MSM_HDMI_MODES_DVI) { MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1024x768p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x1024p60_5_4); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_2560x1600p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_800x600p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_848x480p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x960p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1360x768p60_16_9); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1440x900p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1400x1050p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1680x1050p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1600x1200p60_4_3); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1920x1200p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1366x768p60_16_10); MSM_HDMI_MODES_SET_TIMING(__lut, HDMI_VFRMT_1280x800p60_16_10); } \
 } while(0)
+#define MSM_HDMI_MODES_GET_DETAILS(mode,MODE) do { struct msm_hdmi_mode_timing_info info = MODE ##_TIMING; * mode = info; } while(0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
+

diff --git a/msm8x09.mk b/msm8x09.mk
index c839f10..c842e62 100644
--- a/msm8x09.mk
+++ b/msm8x09.mk

@@ -11,8 +11,5 @@
 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 # See the License for the specific language governing permissions and
 # limitations under the License.
-ifeq ($(TARGET_USES_318),true)
-    PRODUCT_VENDOR_KERNEL_HEADERS := hardware/qcom/msm8x09/k318/kernel-headers
-else
-    PRODUCT_VENDOR_KERNEL_HEADERS := hardware/qcom/msm8x09/kernel-headers
-endif
+
+PRODUCT_VENDOR_KERNEL_HEADERS := hardware/qcom/msm8x09/kernel-headers

diff --git a/original-kernel-headers/linux/ion.h b/original-kernel-headers/linux/ion.h
index 51df91f..6aa4956 100644
--- a/original-kernel-headers/linux/ion.h
+++ b/original-kernel-headers/linux/ion.h

@@ -1,5 +1,5 @@
 /*
- * include/linux/ion.h
+ * drivers/staging/android/uapi/ion.h
  *
  * Copyright (C) 2011 Google, Inc.
  *
@@ -14,8 +14,8 @@
  *
  */
 
-#ifndef _UAPI_ION_H
-#define _UAPI_ION_H
+#ifndef _UAPI_LINUX_ION_H
+#define _UAPI_LINUX_ION_H
 
 #include <linux/ioctl.h>
 #include <linux/types.h>
@@ -27,12 +27,12 @@
  * @ION_HEAP_TYPE_SYSTEM:	 memory allocated via vmalloc
  * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
  * @ION_HEAP_TYPE_CARVEOUT:	 memory allocated from a prereserved
- * 				 carveout heap, allocations are physically
- * 				 contiguous
+ *				 carveout heap, allocations are physically
+ *				 contiguous
  * @ION_HEAP_TYPE_DMA:		 memory allocated via DMA API
  * @ION_NUM_HEAPS:		 helper for iterating over heaps, a bit mask
- * 				 is used to identify the heaps, so only 32
- * 				 total heap types are supported
+ *				 is used to identify the heaps, so only 32
+ *				 total heap types are supported
  */
 enum ion_heap_type {
 	ION_HEAP_TYPE_SYSTEM,
@@ -50,7 +50,7 @@
 #define ION_HEAP_CARVEOUT_MASK		(1 << ION_HEAP_TYPE_CARVEOUT)
 #define ION_HEAP_TYPE_DMA_MASK		(1 << ION_HEAP_TYPE_DMA)
 
-#define ION_NUM_HEAP_IDS		sizeof(unsigned int) * 8
+#define ION_NUM_HEAP_IDS		(sizeof(unsigned int) * 8)
 
 /**
  * allocation flags - the lower 16 bits are used by core ion, the upper 16
@@ -78,7 +78,7 @@
  * @align:		required alignment of the allocation
  * @heap_id_mask:	mask of heap ids to allocate from
  * @flags:		flags passed to heap
- * @handle:		pointer that will be populated with a cookie to use to 
+ * @handle:		pointer that will be populated with a cookie to use to
  *			refer to this allocation
  *
  * Provided by userspace as an argument to the ioctl
@@ -126,6 +126,7 @@
 	unsigned int cmd;
 	unsigned long arg;
 };
+
 #define ION_IOC_MAGIC		'I'
 
 /**
@@ -192,4 +193,4 @@
  */
 #define ION_IOC_CUSTOM		_IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
 
-#endif /* _UAPI_ION_H */
+#endif /* _UAPI_LINUX_ION_H */

diff --git a/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h b/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
index 2ccb4bd..1dac14b 100644
--- a/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h
+++ b/original-kernel-headers/linux/mfd/wcd9xxx/wcd9xxx_registers.h

@@ -319,4 +319,26 @@
 #define WCD9330_A_LEAKAGE_CTL__POR				(0x04)
 #define WCD9330_A_CDC_CTL				(0x034)
 #define WCD9330_A_CDC_CTL__POR					(0x00)
+
+/* Class-H registers for codecs from and above WCD9335 */
+#define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0			(0xB42)
+#define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0			(0xB56)
+#define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0			(0xB6A)
+#define WCD9XXX_A_CDC_CLSH_K1_MSB			(0xC08)
+#define WCD9XXX_A_CDC_CLSH_K1_LSB			(0xC09)
+#define WCD9XXX_A_ANA_RX_SUPPLIES			(0x608)
+#define WCD9XXX_A_ANA_HPH				(0x609)
+#define WCD9XXX_A_CDC_CLSH_CRC				(0xC01)
+#define WCD9XXX_FLYBACK_EN				(0x6A4)
+#define WCD9XXX_RX_BIAS_FLYB_BUFF			(0x6C7)
+#define WCD9XXX_HPH_L_EN				(0x6D3)
+#define WCD9XXX_HPH_R_EN				(0x6D6)
+#define WCD9XXX_HPH_REFBUFF_UHQA_CTL			(0x6DD)
+#define WCD9XXX_CLASSH_CTRL_VCL_2                       (0x69B)
+#define WCD9XXX_CDC_CLSH_HPH_V_PA			(0xC04)
+#define WCD9XXX_CDC_RX0_RX_PATH_SEC0			(0xB49)
+#define WCD9XXX_CDC_RX1_RX_PATH_CTL			(0xB55)
+#define WCD9XXX_CDC_RX2_RX_PATH_CTL			(0xB69)
+#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL		(0xD41)
+#define WCD9XXX_CLASSH_CTRL_CCL_1                       (0x69C)
 #endif

diff --git a/original-kernel-headers/linux/msm_audio.h b/original-kernel-headers/linux/msm_audio.h
index 1f17371..36b66c7 100644
--- a/original-kernel-headers/linux/msm_audio.h
+++ b/original-kernel-headers/linux/msm_audio.h

@@ -1,7 +1,7 @@
 /* include/linux/msm_audio.h
  *
  * Copyright (C) 2008 Google, Inc.
- * Copyright (c) 2012 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -104,8 +104,20 @@
 		struct msm_audio_ion_info)
 #define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, \
 		struct msm_audio_ion_info)
+#define AUDIO_SET_EFFECTS_CONFIG   _IOW(AUDIO_IOCTL_MAGIC, 99, \
+				struct msm_hwacc_effects_config)
+#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, \
+				struct msm_hwacc_buf_cfg)
+#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, \
+				struct msm_hwacc_buf_avail)
+#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
+#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
+#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
 
-#define	AUDIO_MAX_COMMON_IOCTL_NUM	100
+#define AUDIO_PM_AWAKE      _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned)
+#define AUDIO_PM_RELAX      _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned)
+
+#define	AUDIO_MAX_COMMON_IOCTL_NUM	107
 
 
 #define HANDSET_MIC			0x01
@@ -140,7 +152,7 @@
 #define I2S_TX				0x21
 
 #define ADRC_ENABLE		0x0001
-#define EQ_ENABLE		0x0002
+#define EQUALIZER_ENABLE	0x0002
 #define IIR_ENABLE		0x0004
 #define QCONCERT_PLUS_ENABLE	0x0008
 #define MBADRC_ENABLE		0x0010
@@ -420,5 +432,32 @@
 	uint32_t     *phys_buf;           /* Physical Address of data */
 };
 
+struct msm_hwacc_data_config {
+	__u32 buf_size;
+	__u32 num_buf;
+	__u32 num_channels;
+	__u8 channel_map[8];
+	__u32 sample_rate;
+	__u32 bits_per_sample;
+};
+
+struct msm_hwacc_buf_cfg {
+	__u32 input_len;
+	__u32 output_len;
+};
+
+struct msm_hwacc_buf_avail {
+	__u32 input_num_avail;
+	__u32 output_num_avail;
+};
+
+struct msm_hwacc_effects_config {
+	struct msm_hwacc_data_config input;
+	struct msm_hwacc_data_config output;
+	struct msm_hwacc_buf_cfg buf_cfg;
+	__u32 meta_mode_enabled;
+	__u32 overwrite_topology;
+	__s32 topology;
+};
 
 #endif

diff --git a/original-kernel-headers/linux/msm_audio_calibration.h b/original-kernel-headers/linux/msm_audio_calibration.h
index de24f25..3c6ab13 100644
--- a/original-kernel-headers/linux/msm_audio_calibration.h
+++ b/original-kernel-headers/linux/msm_audio_calibration.h

@@ -71,6 +71,8 @@
 	AFE_FB_SPKR_PROT_CAL_TYPE,
 	AFE_HW_DELAY_CAL_TYPE,
 	AFE_SIDETONE_CAL_TYPE,
+	AFE_TOPOLOGY_CAL_TYPE,
+	AFE_CUST_TOPOLOGY_CAL_TYPE,
 
 	LSM_CUST_TOPOLOGY_CAL_TYPE,
 	LSM_TOPOLOGY_CAL_TYPE,
@@ -90,9 +92,18 @@
 	AUDIO_CORE_METAINFO_CAL_TYPE,
 	SRS_TRUMEDIA_CAL_TYPE,
 
+	CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
+	ADM_RTAC_AUDVOL_CAL_TYPE,
+
+	ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
+	AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
+	AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
 	MAX_CAL_TYPES,
 };
 
+#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
+#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
+
 enum {
 	VERSION_0_0,
 };
@@ -218,6 +229,14 @@
 	int32_t		sample_rate;
 };
 
+struct audio_cal_info_afe_top {
+	int32_t		topology;
+	int32_t		acdb_id;
+	/* RX_DEVICE or TX_DEVICE */
+	int32_t		path;
+	int32_t		sample_rate;
+};
+
 struct audio_cal_info_asm_top {
 	int32_t		topology;
 	int32_t		app_type;
@@ -255,8 +274,11 @@
 	MSM_SPKR_PROT_CALIBRATED,
 	MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
 	MSM_SPKR_PROT_DISABLED,
-	MSM_SPKR_PROT_NOT_CALIBRATED
+	MSM_SPKR_PROT_NOT_CALIBRATED,
+	MSM_SPKR_PROT_PRE_CALIBRATED,
+	MSM_SPKR_PROT_IN_FTM_MODE
 };
+#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
 
 enum msm_spkr_count {
 	SP_V2_SPKR_1,
@@ -268,9 +290,46 @@
 	int32_t		r0[SP_V2_NUM_MAX_SPKRS];
 	int32_t		t0[SP_V2_NUM_MAX_SPKRS];
 	uint32_t	quick_calib_flag;
-	uint32_t	mode; /*0 - Start spk prot
-	1 - Start calib
-	2 - Disable spk prot*/
+	uint32_t	mode;
+	/*
+	 * 0 - Start spk prot
+	 * 1 - Start calib
+	 * 2 - Disable spk prot
+	 */
+};
+
+struct audio_cal_info_sp_th_vi_ftm_cfg {
+	uint32_t	wait_time[SP_V2_NUM_MAX_SPKRS];
+	uint32_t	ftm_time[SP_V2_NUM_MAX_SPKRS];
+	uint32_t	mode;
+	/*
+	 * 0 - normal running mode
+	 * 1 - Calibration
+	 * 2 - FTM mode
+	 */
+};
+
+struct audio_cal_info_sp_ex_vi_ftm_cfg {
+	uint32_t	wait_time[SP_V2_NUM_MAX_SPKRS];
+	uint32_t	ftm_time[SP_V2_NUM_MAX_SPKRS];
+	uint32_t	mode;
+	/*
+	 * 0 - normal running mode
+	 * 2 - FTM mode
+	 */
+};
+
+struct audio_cal_info_sp_ex_vi_param {
+	int32_t		freq_q20[SP_V2_NUM_MAX_SPKRS];
+	int32_t		resis_q24[SP_V2_NUM_MAX_SPKRS];
+	int32_t		qmct_q24[SP_V2_NUM_MAX_SPKRS];
+	int32_t		status[SP_V2_NUM_MAX_SPKRS];
+};
+
+struct audio_cal_info_sp_th_vi_param {
+	int32_t		r_dc_q24[SP_V2_NUM_MAX_SPKRS];
+	int32_t		temp_q22[SP_V2_NUM_MAX_SPKRS];
+	int32_t		status[SP_V2_NUM_MAX_SPKRS];
 };
 
 struct audio_cal_info_msm_spk_prot_status {
@@ -445,6 +504,17 @@
 	struct audio_cal_type_afe	cal_type;
 };
 
+struct audio_cal_type_afe_top {
+	struct audio_cal_type_header	cal_hdr;
+	struct audio_cal_data		cal_data;
+	struct audio_cal_info_afe_top	cal_info;
+};
+
+struct audio_cal_afe_top {
+	struct audio_cal_header		hdr;
+	struct audio_cal_type_afe_top	cal_type;
+};
+
 struct audio_cal_type_aanc {
 	struct audio_cal_type_header	cal_hdr;
 	struct audio_cal_data		cal_data;
@@ -467,6 +537,27 @@
 	struct audio_cal_type_fb_spk_prot_cfg	cal_type;
 };
 
+struct audio_cal_type_sp_th_vi_ftm_cfg {
+	struct audio_cal_type_header		cal_hdr;
+	struct audio_cal_data			cal_data;
+	struct audio_cal_info_sp_th_vi_ftm_cfg	cal_info;
+};
+
+struct audio_cal_sp_th_vi_ftm_cfg {
+	struct audio_cal_header			hdr;
+	struct audio_cal_type_sp_th_vi_ftm_cfg	cal_type;
+};
+
+struct audio_cal_type_sp_ex_vi_ftm_cfg {
+	struct audio_cal_type_header		cal_hdr;
+	struct audio_cal_data			cal_data;
+	struct audio_cal_info_sp_ex_vi_ftm_cfg	cal_info;
+};
+
+struct audio_cal_sp_ex_vi_ftm_cfg {
+	struct audio_cal_header			hdr;
+	struct audio_cal_type_sp_ex_vi_ftm_cfg	cal_type;
+};
 struct audio_cal_type_hw_delay {
 	struct audio_cal_type_header	cal_hdr;
 	struct audio_cal_data		cal_data;
@@ -578,4 +669,24 @@
 	struct audio_cal_type_fb_spk_prot_status	cal_type;
 };
 
+struct audio_cal_type_sp_th_vi_param {
+	struct audio_cal_type_header			cal_hdr;
+	struct audio_cal_data				cal_data;
+	struct audio_cal_info_sp_th_vi_param		cal_info;
+};
+
+struct audio_cal_sp_th_vi_param {
+	struct audio_cal_header				hdr;
+	struct audio_cal_type_sp_th_vi_param		cal_type;
+};
+struct audio_cal_type_sp_ex_vi_param {
+	struct audio_cal_type_header			cal_hdr;
+	struct audio_cal_data				cal_data;
+	struct audio_cal_info_sp_ex_vi_param		cal_info;
+};
+
+struct audio_cal_sp_ex_vi_param {
+	struct audio_cal_header				hdr;
+	struct audio_cal_type_sp_ex_vi_param		cal_type;
+};
 #endif /* _UAPI_MSM_AUDIO_CALIBRATION_H */

diff --git a/original-kernel-headers/linux/msm_ion.h b/original-kernel-headers/linux/msm_ion.h
index b4d1e23..681e015 100644
--- a/original-kernel-headers/linux/msm_ion.h
+++ b/original-kernel-headers/linux/msm_ion.h

@@ -6,7 +6,8 @@
 enum msm_ion_heap_types {
 	ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
 	ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
-	ION_HEAP_TYPE_REMOVED,
+	ION_HEAP_TYPE_SYSTEM_SECURE,
+	ION_HEAP_TYPE_HYP_CMA,
 	/*
 	 * if you add a heap type here you should also add it to
 	 * heap_types_info[] in msm_ion.c
@@ -25,6 +26,8 @@
 enum ion_heap_ids {
 	INVALID_HEAP_ID = -1,
 	ION_CP_MM_HEAP_ID = 8,
+	ION_SECURE_HEAP_ID = 9,
+	ION_SECURE_DISPLAY_HEAP_ID = 10,
 	ION_CP_MFC_HEAP_ID = 12,
 	ION_CP_WB_HEAP_ID = 16, /* 8660 only */
 	ION_CAMERA_HEAP_ID = 20, /* 8660 only */
@@ -67,6 +70,26 @@
 };
 
 /**
+ * Flags to be used when allocating from the secure heap for
+ * content protection
+ */
+#define ION_FLAG_CP_TOUCH (1 << 17)
+#define ION_FLAG_CP_BITSTREAM (1 << 18)
+#define ION_FLAG_CP_PIXEL  (1 << 19)
+#define ION_FLAG_CP_NON_PIXEL (1 << 20)
+#define ION_FLAG_CP_CAMERA (1 << 21)
+#define ION_FLAG_CP_HLOS (1 << 22)
+#define ION_FLAG_CP_HLOS_FREE (1 << 23)
+#define ION_FLAG_CP_SEC_DISPLAY (1 << 25)
+#define ION_FLAG_CP_APP (1 << 26)
+
+/**
+ * Flag to allow non continguous allocation of memory from secure
+ * heap
+ */
+#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
+
+/**
  * Flag to use when allocating to indicate that a heap is secure.
  */
 #define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
@@ -110,6 +133,8 @@
 #define ION_PIL1_HEAP_NAME  "pil_1"
 #define ION_PIL2_HEAP_NAME  "pil_2"
 #define ION_QSECOM_HEAP_NAME	"qsecom"
+#define ION_SECURE_HEAP_NAME	"secure_heap"
+#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
 
 #define ION_SET_CACHED(__cache)		(__cache | ION_FLAG_CACHED)
 #define ION_SET_UNCACHED(__cache)	(__cache & ~ION_FLAG_CACHED)

diff --git a/original-kernel-headers/linux/msm_mdp.h b/original-kernel-headers/linux/msm_mdp.h
index 8298116..9f13b94 100644
--- a/original-kernel-headers/linux/msm_mdp.h
+++ b/original-kernel-headers/linux/msm_mdp.h

@@ -68,6 +68,8 @@
 #define MSMFB_OVERLAY_PREPARE		_IOWR(MSMFB_IOCTL_MAGIC, 169, \
 						struct mdp_overlay_list)
 #define MSMFB_LPM_ENABLE	_IOWR(MSMFB_IOCTL_MAGIC, 170, unsigned int)
+#define MSMFB_MDP_PP_GET_FEATURE_VERSION _IOWR(MSMFB_IOCTL_MAGIC, 171, \
+					      struct mdp_pp_feature_version)
 
 #define FB_TYPE_3D_PANEL 0x10101010
 #define MDP_IMGTYPE2_START 0x10000
@@ -97,11 +99,17 @@
 #define MDSS_MDP_HW_REV_103_1	MDSS_MDP_REV(1, 3, 1) /* 8084 v1.1 */
 #define MDSS_MDP_HW_REV_105	MDSS_MDP_REV(1, 5, 0) /* 8994 v1.0 */
 #define MDSS_MDP_HW_REV_106	MDSS_MDP_REV(1, 6, 0) /* 8916 v1.0 */
-#define MDSS_MDP_HW_REV_107	MDSS_MDP_REV(1, 7, 0)
+#define MDSS_MDP_HW_REV_107	MDSS_MDP_REV(1, 7, 0) /* 8996 v1 */
+#define MDSS_MDP_HW_REV_107_1	MDSS_MDP_REV(1, 7, 1) /* 8996 v2 */
+#define MDSS_MDP_HW_REV_107_2	MDSS_MDP_REV(1, 7, 2) /* 8996 v3 */
 #define MDSS_MDP_HW_REV_108	MDSS_MDP_REV(1, 8, 0) /* 8939 v1.0 */
 #define MDSS_MDP_HW_REV_109	MDSS_MDP_REV(1, 9, 0) /* 8994 v2.0 */
 #define MDSS_MDP_HW_REV_110	MDSS_MDP_REV(1, 10, 0) /* 8992 v1.0 */
 #define MDSS_MDP_HW_REV_200	MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */
+#define MDSS_MDP_HW_REV_112	MDSS_MDP_REV(1, 12, 0) /* 8952 v1.0 */
+#define MDSS_MDP_HW_REV_114	MDSS_MDP_REV(1, 14, 0) /* 8937 v1.0 */
+#define MDSS_MDP_HW_REV_115	MDSS_MDP_REV(1, 15, 0) /* msmgold */
+#define MDSS_MDP_HW_REV_116	MDSS_MDP_REV(1, 16, 0) /* msmtitanium */
 
 enum {
 	NOTIFY_UPDATE_INIT,
@@ -116,6 +124,7 @@
 	NOTIFY_TYPE_SUSPEND,
 	NOTIFY_TYPE_UPDATE,
 	NOTIFY_TYPE_BL_UPDATE,
+	NOTIFY_TYPE_BL_AD_ATTEN_UPDATE,
 };
 
 enum {
@@ -163,6 +172,11 @@
 	MDP_RGBA_5551,	/*RGBA 5551*/
 	MDP_ARGB_4444,	/*ARGB 4444*/
 	MDP_RGBA_4444,	/*RGBA 4444*/
+	MDP_RGB_565_UBWC,
+	MDP_RGBA_8888_UBWC,
+	MDP_Y_CBCR_H2V2_UBWC,
+	MDP_RGBX_8888_UBWC,
+	MDP_Y_CRCB_H2V2_VENUS,
 	MDP_IMGTYPE_LIMIT,
 	MDP_RGB_BORDERFILL,	/* border fill pipe */
 	MDP_FB_FORMAT = MDP_IMGTYPE2_START,    /* framebuffer format */
@@ -182,6 +196,13 @@
 	NUM_HSIC_PARAM,
 };
 
+enum mdss_mdp_max_bw_mode {
+	MDSS_MAX_BW_LIMIT_DEFAULT = 0x1,
+	MDSS_MAX_BW_LIMIT_CAMERA = 0x2,
+	MDSS_MAX_BW_LIMIT_HFLIP = 0x4,
+	MDSS_MAX_BW_LIMIT_VFLIP = 0x8,
+};
+
 #define MDSS_MDP_ROT_ONLY		0x80
 #define MDSS_MDP_RIGHT_MIXER		0x100
 #define MDSS_MDP_DUAL_PIPE		0x200
@@ -227,12 +248,6 @@
 #define MDP_TRANSP_NOP 0xffffffff
 #define MDP_ALPHA_NOP 0xff
 
-/*
- * MDP_DEINTERLACE & MDP_SHARPENING Flags are not valid for MDP3
- * so using them together for MDP_SMART_BLIT.
- */
-#define MDP_SMART_BLIT			0xC0000000
-
 #define MDP_FB_PAGE_PROTECTION_NONCACHED         (0)
 #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE      (1)
 #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
@@ -259,6 +274,11 @@
 	uint32_t priv;
 };
 
+struct mult_factor {
+	uint32_t numer;
+	uint32_t denom;
+};
+
 /*
  * {3x3} + {3} ccs matrix
  */
@@ -289,7 +309,7 @@
  * to include
  */
 
-#define MDP_BLIT_REQ_VERSION 2
+#define MDP_BLIT_REQ_VERSION 3
 
 struct color {
 	uint32_t r;
@@ -358,26 +378,6 @@
 #define MDP_PP_IGC_FLAG_ROM0	0x10
 #define MDP_PP_IGC_FLAG_ROM1	0x20
 
-#define MDP_PP_PA_HUE_ENABLE		0x10
-#define MDP_PP_PA_SAT_ENABLE		0x20
-#define MDP_PP_PA_VAL_ENABLE		0x40
-#define MDP_PP_PA_CONT_ENABLE		0x80
-#define MDP_PP_PA_SIX_ZONE_ENABLE	0x100
-#define MDP_PP_PA_SKIN_ENABLE		0x200
-#define MDP_PP_PA_SKY_ENABLE		0x400
-#define MDP_PP_PA_FOL_ENABLE		0x800
-#define MDP_PP_PA_HUE_MASK		0x1000
-#define MDP_PP_PA_SAT_MASK		0x2000
-#define MDP_PP_PA_VAL_MASK		0x4000
-#define MDP_PP_PA_CONT_MASK		0x8000
-#define MDP_PP_PA_SIX_ZONE_HUE_MASK	0x10000
-#define MDP_PP_PA_SIX_ZONE_SAT_MASK	0x20000
-#define MDP_PP_PA_SIX_ZONE_VAL_MASK	0x40000
-#define MDP_PP_PA_MEM_COL_SKIN_MASK	0x80000
-#define MDP_PP_PA_MEM_COL_SKY_MASK	0x100000
-#define MDP_PP_PA_MEM_COL_FOL_MASK	0x200000
-#define MDP_PP_PA_MEM_PROTECT_EN	0x400000
-#define MDP_PP_PA_SAT_ZERO_EXP_EN	0x800000
 
 #define MDSS_PP_DSPP_CFG	0x000
 #define MDSS_PP_SSPP_CFG	0x100
@@ -424,19 +424,24 @@
 #define MDP_OVERLAY_PP_HIST_CFG        0x20
 #define MDP_OVERLAY_PP_HIST_LUT_CFG    0x40
 #define MDP_OVERLAY_PP_PA_V2_CFG       0x80
+#define MDP_OVERLAY_PP_PCC_CFG	       0x100
 
 #define MDP_CSC_FLAG_ENABLE	0x1
 #define MDP_CSC_FLAG_YUV_IN	0x2
 #define MDP_CSC_FLAG_YUV_OUT	0x4
 
+#define MDP_CSC_MATRIX_COEFF_SIZE	9
+#define MDP_CSC_CLAMP_SIZE		6
+#define MDP_CSC_BIAS_SIZE		3
+
 struct mdp_csc_cfg {
 	/* flags for enable CSC, toggling RGB,YUV input/output */
 	uint32_t flags;
-	uint32_t csc_mv[9];
-	uint32_t csc_pre_bv[3];
-	uint32_t csc_post_bv[3];
-	uint32_t csc_pre_lv[6];
-	uint32_t csc_post_lv[6];
+	uint32_t csc_mv[MDP_CSC_MATRIX_COEFF_SIZE];
+	uint32_t csc_pre_bv[MDP_CSC_BIAS_SIZE];
+	uint32_t csc_post_bv[MDP_CSC_BIAS_SIZE];
+	uint32_t csc_pre_lv[MDP_CSC_CLAMP_SIZE];
+	uint32_t csc_post_lv[MDP_CSC_CLAMP_SIZE];
 };
 
 struct mdp_csc_cfg_data {
@@ -462,6 +467,42 @@
 
 #define MDP_SIX_ZONE_LUT_SIZE		384
 
+/* PA Write/Read extension flags */
+#define MDP_PP_PA_HUE_ENABLE		0x10
+#define MDP_PP_PA_SAT_ENABLE		0x20
+#define MDP_PP_PA_VAL_ENABLE		0x40
+#define MDP_PP_PA_CONT_ENABLE		0x80
+#define MDP_PP_PA_SIX_ZONE_ENABLE	0x100
+#define MDP_PP_PA_SKIN_ENABLE		0x200
+#define MDP_PP_PA_SKY_ENABLE		0x400
+#define MDP_PP_PA_FOL_ENABLE		0x800
+
+/* PA masks */
+/* Masks used in PA v1_7 only */
+#define MDP_PP_PA_MEM_PROT_HUE_EN	0x1
+#define MDP_PP_PA_MEM_PROT_SAT_EN	0x2
+#define MDP_PP_PA_MEM_PROT_VAL_EN	0x4
+#define MDP_PP_PA_MEM_PROT_CONT_EN	0x8
+#define MDP_PP_PA_MEM_PROT_SIX_EN	0x10
+#define MDP_PP_PA_MEM_PROT_BLEND_EN	0x20
+/* Masks used in all PAv2 versions */
+#define MDP_PP_PA_HUE_MASK		0x1000
+#define MDP_PP_PA_SAT_MASK		0x2000
+#define MDP_PP_PA_VAL_MASK		0x4000
+#define MDP_PP_PA_CONT_MASK		0x8000
+#define MDP_PP_PA_SIX_ZONE_HUE_MASK	0x10000
+#define MDP_PP_PA_SIX_ZONE_SAT_MASK	0x20000
+#define MDP_PP_PA_SIX_ZONE_VAL_MASK	0x40000
+#define MDP_PP_PA_MEM_COL_SKIN_MASK	0x80000
+#define MDP_PP_PA_MEM_COL_SKY_MASK	0x100000
+#define MDP_PP_PA_MEM_COL_FOL_MASK	0x200000
+#define MDP_PP_PA_MEM_PROTECT_EN	0x400000
+#define MDP_PP_PA_SAT_ZERO_EXP_EN	0x800000
+
+/* Flags for setting PA saturation and value hold */
+#define MDP_PP_PA_LEFT_HOLD		0x1
+#define MDP_PP_PA_RIGHT_HOLD		0x2
+
 struct mdp_pa_v2_data {
 	/* Mask bits for PA features */
 	uint32_t flags;
@@ -478,11 +519,69 @@
 	uint32_t *six_zone_curve_p1;
 };
 
+struct mdp_pa_mem_col_data_v1_7 {
+	uint32_t color_adjust_p0;
+	uint32_t color_adjust_p1;
+	uint32_t color_adjust_p2;
+	uint32_t blend_gain;
+	uint8_t sat_hold;
+	uint8_t val_hold;
+	uint32_t hue_region;
+	uint32_t sat_region;
+	uint32_t val_region;
+};
+
+struct mdp_pa_data_v1_7 {
+	uint32_t mode;
+	uint32_t global_hue_adj;
+	uint32_t global_sat_adj;
+	uint32_t global_val_adj;
+	uint32_t global_cont_adj;
+	struct mdp_pa_mem_col_data_v1_7 skin_cfg;
+	struct mdp_pa_mem_col_data_v1_7 sky_cfg;
+	struct mdp_pa_mem_col_data_v1_7 fol_cfg;
+	uint32_t six_zone_thresh;
+	uint32_t six_zone_adj_p0;
+	uint32_t six_zone_adj_p1;
+	uint8_t six_zone_sat_hold;
+	uint8_t six_zone_val_hold;
+	uint32_t six_zone_len;
+	uint32_t *six_zone_curve_p0;
+	uint32_t *six_zone_curve_p1;
+};
+
+
+struct mdp_pa_v2_cfg_data {
+	uint32_t version;
+	uint32_t block;
+	uint32_t flags;
+	struct mdp_pa_v2_data pa_v2_data;
+	void *cfg_payload;
+};
+
+
+enum {
+	mdp_igc_rec601 = 1,
+	mdp_igc_rec709,
+	mdp_igc_srgb,
+	mdp_igc_custom,
+	mdp_igc_rec_max,
+};
+
 struct mdp_igc_lut_data {
 	uint32_t block;
+	uint32_t version;
 	uint32_t len, ops;
 	uint32_t *c0_c1_data;
 	uint32_t *c2_data;
+	void *cfg_payload;
+};
+
+struct mdp_igc_lut_data_v1_7 {
+	uint32_t table_fmt;
+	uint32_t len;
+	uint32_t *c0_c1_data;
+	uint32_t *c2_data;
 };
 
 struct mdp_histogram_cfg {
@@ -493,13 +592,48 @@
 	uint16_t num_bins;
 };
 
-struct mdp_hist_lut_data {
-	uint32_t block;
-	uint32_t ops;
+struct mdp_hist_lut_data_v1_7 {
 	uint32_t len;
 	uint32_t *data;
 };
 
+struct mdp_hist_lut_data {
+	uint32_t block;
+	uint32_t version;
+	uint32_t hist_lut_first;
+	uint32_t ops;
+	uint32_t len;
+	uint32_t *data;
+	void *cfg_payload;
+};
+
+struct mdp_pcc_coeff {
+	uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
+};
+
+struct mdp_pcc_coeff_v1_7 {
+	uint32_t c, r, g, b, rg, gb, rb, rgb;
+};
+
+struct mdp_pcc_data_v1_7 {
+	struct mdp_pcc_coeff_v1_7 r, g, b;
+};
+
+struct mdp_pcc_cfg_data {
+	uint32_t version;
+	uint32_t block;
+	uint32_t ops;
+	struct mdp_pcc_coeff r, g, b;
+	void *cfg_payload;
+};
+
+enum {
+	mdp_lut_igc,
+	mdp_lut_pgc,
+	mdp_lut_hist,
+	mdp_lut_rgb,
+	mdp_lut_max,
+};
 struct mdp_overlay_pp_params {
 	uint32_t config_ops;
 	struct mdp_csc_cfg csc_cfg;
@@ -510,6 +644,9 @@
 	struct mdp_sharp_cfg sharp_cfg;
 	struct mdp_histogram_cfg hist_cfg;
 	struct mdp_hist_lut_data hist_lut_cfg;
+	/* PAv2 cfg data for PA 2.x versions */
+	struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
+	struct mdp_pcc_cfg_data pcc_cfg_data;
 };
 
 /**
@@ -656,6 +793,7 @@
 	struct mdp_overlay_pp_params overlay_pp_cfg;
 	struct mdp_scale_data scale;
 	uint8_t color_space;
+	uint32_t frame_rate;
 };
 
 struct msmfb_overlay_3d {
@@ -766,25 +904,8 @@
 	uint32_t *extra_info;
 };
 
-struct mdp_pcc_coeff {
-	uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
-};
 
-struct mdp_pcc_cfg_data {
-	uint32_t block;
-	uint32_t ops;
-	struct mdp_pcc_coeff r, g, b;
-};
-
-#define MDP_GAMUT_TABLE_NUM		8
-
-enum {
-	mdp_lut_igc,
-	mdp_lut_pgc,
-	mdp_lut_hist,
-	mdp_lut_rgb,
-	mdp_lut_max,
-};
+#define GC_LUT_ENTRIES_V1_7	512
 
 struct mdp_ar_gc_lut_data {
 	uint32_t x_start;
@@ -793,6 +914,7 @@
 };
 
 struct mdp_pgc_lut_data {
+	uint32_t version;
 	uint32_t block;
 	uint32_t flags;
 	uint8_t num_r_stages;
@@ -801,6 +923,15 @@
 	struct mdp_ar_gc_lut_data *r_data;
 	struct mdp_ar_gc_lut_data *g_data;
 	struct mdp_ar_gc_lut_data *b_data;
+	void *cfg_payload;
+};
+
+#define PGC_LUT_ENTRIES 1024
+struct mdp_pgc_lut_data_v1_7 {
+	uint32_t  len;
+	uint32_t  *c0_data;
+	uint32_t  *c1_data;
+	uint32_t  *c2_data;
 };
 
 /*
@@ -838,27 +969,57 @@
 	struct mdp_pa_cfg pa_data;
 };
 
-struct mdp_pa_v2_cfg_data {
-	uint32_t block;
-	struct mdp_pa_v2_data pa_v2_data;
-};
-
-struct mdp_dither_cfg_data {
-	uint32_t block;
-	uint32_t flags;
+struct mdp_dither_data_v1_7 {
 	uint32_t g_y_depth;
 	uint32_t r_cr_depth;
 	uint32_t b_cb_depth;
 };
 
+struct mdp_dither_cfg_data {
+	uint32_t version;
+	uint32_t block;
+	uint32_t flags;
+	uint32_t mode;
+	uint32_t g_y_depth;
+	uint32_t r_cr_depth;
+	uint32_t b_cb_depth;
+	void *cfg_payload;
+};
+
+#define MDP_GAMUT_TABLE_NUM		8
+#define MDP_GAMUT_TABLE_NUM_V1_7	4
+#define MDP_GAMUT_SCALE_OFF_TABLE_NUM	3
+#define MDP_GAMUT_TABLE_V1_7_SZ 1229
+#define MDP_GAMUT_SCALE_OFF_SZ 16
+#define MDP_GAMUT_TABLE_V1_7_COARSE_SZ 32
+
 struct mdp_gamut_cfg_data {
 	uint32_t block;
 	uint32_t flags;
+	uint32_t version;
+	/* v1 version specific params */
 	uint32_t gamut_first;
 	uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
 	uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
 	uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
 	uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
+	/* params for newer versions of gamut */
+	void *cfg_payload;
+};
+
+enum {
+	mdp_gamut_fine_mode = 0x1,
+	mdp_gamut_coarse_mode,
+};
+
+struct mdp_gamut_data_v1_7 {
+	uint32_t mode;
+	uint32_t map_en;
+	uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7];
+	uint32_t *c0_data[MDP_GAMUT_TABLE_NUM_V1_7];
+	uint32_t *c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7];
+	uint32_t  tbl_scale_off_sz[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
+	uint32_t  *scale_off_data[MDP_GAMUT_SCALE_OFF_TABLE_NUM];
 };
 
 struct mdp_calib_config_data {
@@ -878,15 +1039,6 @@
 	uint32_t dcm_state;
 };
 
-struct mdp_pp_init_data {
-	uint32_t init_request;
-};
-
-enum {
-	MDP_PP_DISABLE,
-	MDP_PP_ENABLE,
-};
-
 enum {
 	DCM_UNINIT,
 	DCM_UNBLANK,
@@ -934,6 +1086,7 @@
 	uint8_t logo_h;
 	uint32_t alpha;
 	uint32_t alpha_base;
+	uint32_t al_thresh;
 	uint32_t bl_lin_len;
 	uint32_t bl_att_len;
 	uint32_t *bl_lin;
@@ -1001,7 +1154,6 @@
 	mdp_op_calib_buffer,
 	mdp_op_calib_dcm_state,
 	mdp_op_max,
-	mdp_op_pp_init_cfg,
 };
 
 enum {
@@ -1033,7 +1185,6 @@
 		struct mdss_ad_input ad_input;
 		struct mdp_calib_config_buffer calib_buffer;
 		struct mdp_calib_dcm_state calib_dcm;
-		struct mdp_pp_init_data init_data;
 	} data;
 };
 
@@ -1110,6 +1261,13 @@
 	uint32_t flags;
 	uint32_t wait_for_finish;
 	struct fb_var_screeninfo var;
+	/*
+	 * user needs to follow guidelines as per below rules
+	 * 1. source split is enabled: l_roi = roi and r_roi = 0
+	 * 2. source split is disabled:
+	 *	2.1 split display: l_roi = l_roi and r_roi = r_roi
+	 *	2.2 non split display: l_roi = roi and r_roi = 0
+	 */
 	struct mdp_rect l_roi;
 	struct mdp_rect r_roi;
 };
@@ -1170,9 +1328,46 @@
 	MDP_WRITEBACK_MIRROR_RESUME,
 };
 
-enum {
+enum mdp_color_space {
 	MDP_CSC_ITU_R_601,
 	MDP_CSC_ITU_R_601_FR,
 	MDP_CSC_ITU_R_709,
 };
+
+enum {
+	mdp_igc_v1_7 = 1,
+	mdp_igc_vmax,
+	mdp_hist_lut_v1_7,
+	mdp_hist_lut_vmax,
+	mdp_pgc_v1_7,
+	mdp_pgc_vmax,
+	mdp_dither_v1_7,
+	mdp_dither_vmax,
+	mdp_gamut_v1_7,
+	mdp_gamut_vmax,
+	mdp_pa_v1_7,
+	mdp_pa_vmax,
+	mdp_pcc_v1_7,
+	mdp_pcc_vmax,
+	mdp_pp_legacy,
+};
+
+/* PP Features */
+enum {
+	IGC = 1,
+	PCC,
+	GC,
+	PA,
+	GAMUT,
+	DITHER,
+	QSEED,
+	HIST_LUT,
+	HIST,
+	PP_FEATURE_MAX,
+};
+
+struct mdp_pp_feature_version {
+	uint32_t pp_feature;
+	uint32_t version_info;
+};
 #endif /*_UAPI_MSM_MDP_H_*/

diff --git a/original-kernel-headers/linux/msm_rmnet.h b/original-kernel-headers/linux/msm_rmnet.h
index 936b437..4892602 100644
--- a/original-kernel-headers/linux/msm_rmnet.h
+++ b/original-kernel-headers/linux/msm_rmnet.h

@@ -59,7 +59,8 @@
 	RMNET_IOCTL_SET_SLEEP_STATE            = 0x0014,   /* Set sleep state */
 	RMNET_IOCTL_SET_XLAT_DEV_INFO          = 0x0015,   /* xlat dev name   */
 	RMNET_IOCTL_DEREGISTER_DEV             = 0x0016,   /* Dereg a net dev */
-	RMNET_IOCTL_EXTENDED_MAX               = 0x0017
+	RMNET_IOCTL_GET_SG_SUPPORT             = 0x0017,   /* Query sg support*/
+	RMNET_IOCTL_EXTENDED_MAX               = 0x0018
 };
 
 /* Return values for the RMNET_IOCTL_GET_SUPPORTED_FEATURES IOCTL */

diff --git a/original-kernel-headers/linux/msm_thermal_ioctl.h b/original-kernel-headers/linux/msm_thermal_ioctl.h
index 0cfc16f..6797d39 100644
--- a/original-kernel-headers/linux/msm_thermal_ioctl.h
+++ b/original-kernel-headers/linux/msm_thermal_ioctl.h

@@ -40,11 +40,19 @@
 	unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
 };
 
+struct __attribute__((__packed__)) voltage_plan_arg {
+	uint32_t cluster_num;
+	uint32_t voltage_table_len;
+	uint32_t set_idx;
+	uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
+};
+
 struct __attribute__((__packed__)) msm_thermal_ioctl {
 	uint32_t size;
 	union {
 		struct cpu_freq_arg cpu_freq;
 		struct clock_plan_arg clock_freq;
+		struct voltage_plan_arg voltage;
 	};
 };
 
@@ -57,7 +65,8 @@
 	MSM_SET_CLUSTER_MIN_FREQ = 0x03,
 	/*Get cluster frequency plan*/
 	MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
-
+	/*Get cluster voltage plan */
+	MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
 	MSM_CMD_MAX_NR,
 };
 
@@ -78,6 +87,8 @@
 #define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
 		MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
 
+#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
+		MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
 #ifdef __KERNEL__
 extern int msm_thermal_ioctl_init(void);
 extern void msm_thermal_ioctl_cleanup(void);

diff --git a/original-kernel-headers/linux/sockios.h b/original-kernel-headers/linux/sockios.h
index f7ffe36..623e9aa 100644
--- a/original-kernel-headers/linux/sockios.h
+++ b/original-kernel-headers/linux/sockios.h

@@ -126,7 +126,8 @@
 #define SIOCBRDELIF	0x89a3		/* remove interface from bridge */
 
 /* hardware time stamping: parameters in linux/net_tstamp.h */
-#define SIOCSHWTSTAMP   0x89b0
+#define SIOCSHWTSTAMP	0x89b0		/* set and get config		*/
+#define SIOCGHWTSTAMP	0x89b1		/* get config			*/
 
 /* Device private ioctl calls */
 

diff --git a/original-kernel-headers/sound/asound.h b/original-kernel-headers/sound/asound.h
index 78efb06..fe40f8e 100644
--- a/original-kernel-headers/sound/asound.h
+++ b/original-kernel-headers/sound/asound.h

@@ -93,8 +93,11 @@
 	SNDRV_HWDEP_IFACE_SB_RC,	/* SB Extigy/Audigy2NX remote control */
 	SNDRV_HWDEP_IFACE_HDA,		/* HD-audio */
 	SNDRV_HWDEP_IFACE_USB_STREAM,	/* direct access to usb stream */
+	SNDRV_HWDEP_IFACE_FW_DICE,	/* TC DICE FireWire device */
+	SNDRV_HWDEP_IFACE_FW_FIREWORKS,	/* Echo Audio Fireworks based device */
+	SNDRV_HWDEP_IFACE_FW_BEBOB,	/* BridgeCo BeBoB based device */
 	SNDRV_HWDEP_IFACE_AUDIO_BE,	/* Backend Audio Control */
-	SNDRV_HWDEP_IFACE_AUDIO_CODEC,	/* codec Audio Control */
+	SNDRV_HWDEP_IFACE_AUDIO_CODEC,  /* codec Audio Control */
 
 	/* Don't forget to change the following: */
 	SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_AUDIO_CODEC
@@ -138,7 +141,7 @@
  *                                                                           *
  *****************************************************************************/
 
-#define SNDRV_PCM_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 11)
+#define SNDRV_PCM_VERSION		SNDRV_PROTOCOL_VERSION(2, 0, 12)
 
 typedef unsigned long snd_pcm_uframes_t;
 typedef signed long snd_pcm_sframes_t;
@@ -218,7 +221,10 @@
 #define	SNDRV_PCM_FORMAT_G723_40_1B	((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
 #define	SNDRV_PCM_FORMAT_DSD_U8		((__force snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */
 #define	SNDRV_PCM_FORMAT_DSD_U16_LE	((__force snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */
-#define	SNDRV_PCM_FORMAT_LAST		SNDRV_PCM_FORMAT_DSD_U16_LE
+#define	SNDRV_PCM_FORMAT_DSD_U32_LE	((__force snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */
+#define	SNDRV_PCM_FORMAT_DSD_U16_BE	((__force snd_pcm_format_t) 51) /* DSD, 2-byte samples DSD (x16), big endian */
+#define	SNDRV_PCM_FORMAT_DSD_U32_BE	((__force snd_pcm_format_t) 52) /* DSD, 4-byte samples DSD (x32), big endian */
+#define	SNDRV_PCM_FORMAT_LAST		SNDRV_PCM_FORMAT_DSD_U32_BE
 
 #ifdef SNDRV_LITTLE_ENDIAN
 #define	SNDRV_PCM_FORMAT_S16		SNDRV_PCM_FORMAT_S16_LE
@@ -390,7 +396,9 @@
 	snd_pcm_uframes_t silence_threshold;	/* min distance from noise for silence filling */
 	snd_pcm_uframes_t silence_size;		/* silence block size */
 	snd_pcm_uframes_t boundary;		/* pointers wrap point */
-	unsigned char reserved[64];		/* reserved for future */
+	unsigned int proto;			/* protocol version */
+	unsigned int tstamp_type;		/* timestamp type (req. proto >= 2.0.12) */
+	unsigned char reserved[56];		/* reserved for future */
 };
 
 struct snd_pcm_channel_info {
@@ -461,7 +469,8 @@
 enum {
 	SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,	/* gettimeofday equivalent */
 	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,	/* posix_clock_monotonic equivalent */
-	SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
+	SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,    /* monotonic_raw (no NTP) */
+	SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
 };
 
 /* channel positions */
@@ -819,6 +828,8 @@
 #define SNDRV_CTL_POWER_D3hot		(SNDRV_CTL_POWER_D3|0x0000)	/* Off, with power */
 #define SNDRV_CTL_POWER_D3cold		(SNDRV_CTL_POWER_D3|0x0001)	/* Off, without power */
 
+#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN	44
+
 struct snd_ctl_elem_id {
 	unsigned int numid;		/* numeric identifier, zero = invalid */
 	snd_ctl_elem_iface_t iface;	/* interface identifier */

diff --git a/original-kernel-headers/sound/audio_effects.h b/original-kernel-headers/sound/audio_effects.h
index fe21041..6565acf 100644
--- a/original-kernel-headers/sound/audio_effects.h
+++ b/original-kernel-headers/sound/audio_effects.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -133,26 +133,6 @@
 #define EQ_BAND_BOOST	5
 #define EQ_BAND_CUT	6
 
-#define DTS_EAGLE_MODULE		0x00005000
-#define EAGLE_DRIVER_ID 0xF2
-#define DTS_EAGLE_IOCTL_GET_CACHE_SIZE _IOR(EAGLE_DRIVER_ID, 0, int)
-#define DTS_EAGLE_IOCTL_SET_CACHE_SIZE _IOW(EAGLE_DRIVER_ID, 1, int)
-#define DTS_EAGLE_IOCTL_GET_PARAM _IOR(EAGLE_DRIVER_ID, 2, void*)
-#define DTS_EAGLE_IOCTL_SET_PARAM _IOW(EAGLE_DRIVER_ID, 3, void*)
-#define DTS_EAGLE_IOCTL_SET_CACHE_BLOCK _IOW(EAGLE_DRIVER_ID, 4, void*)
-#define DTS_EAGLE_IOCTL_SET_ACTIVE_DEVICE _IOW(EAGLE_DRIVER_ID, 5, void*)
-#define DTS_EAGLE_IOCTL_GET_LICENSE _IOR(EAGLE_DRIVER_ID, 6, void*)
-#define DTS_EAGLE_IOCTL_SET_LICENSE _IOW(EAGLE_DRIVER_ID, 7, void*)
-#define DTS_EAGLE_IOCTL_SEND_LICENSE _IOW(EAGLE_DRIVER_ID, 8, int)
-#define DTS_EAGLE_IOCTL_SET_VOLUME_COMMANDS _IOW(EAGLE_DRIVER_ID, 9, void*)
-
-struct dts_eagle_param_desc {
-	__u32 id;
-	__s32 size;
-	__s32 offset;
-	__u32 device;
-} __packed;
-
 #define SOFT_VOLUME_MODULE		0x00006000
 #define SOFT_VOLUME_ENABLE		0x00006001
 #define SOFT_VOLUME_GAIN_2CH		0x00006002
@@ -170,6 +150,15 @@
 #define SOFT_VOLUME2_GAIN_MASTER_PARAM_LEN	\
 					SOFT_VOLUME_GAIN_MASTER_PARAM_LEN
 
+#define PBE_CONF_MODULE_ID	0x00010C2A
+#define PBE_CONF_PARAM_ID	0x00010C49
+
+#define PBE_MODULE		0x00008000
+#define PBE_ENABLE		0x00008001
+#define PBE_CONFIG		0x00008002
+#define PBE_ENABLE_PARAM_LEN		1
+#define PBE_CONFIG_PARAM_LEN		28
+
 #define COMMAND_PAYLOAD_LEN	3
 #define COMMAND_PAYLOAD_SZ	(COMMAND_PAYLOAD_LEN * sizeof(uint32_t))
 #define MAX_INBAND_PARAM_SZ	4096
@@ -315,6 +304,50 @@
 	uint32_t freq_millihertz;
 };
 
+#define PBE_ENABLE_PARAM_SZ	\
+			(PBE_ENABLE_PARAM_LEN*sizeof(uint32_t))
+#define PBE_CONFIG_PARAM_SZ	\
+			(PBE_CONFIG_PARAM_LEN*sizeof(uint16_t))
+struct pbe_config_t {
+	int16_t  real_bass_mix;
+	int16_t  bass_color_control;
+	uint16_t main_chain_delay;
+	uint16_t xover_filter_order;
+	uint16_t bandpass_filter_order;
+	int16_t  drc_delay;
+	uint16_t rms_tav;
+	int16_t exp_threshold;
+	uint16_t exp_slope;
+	int16_t comp_threshold;
+	uint16_t comp_slope;
+	uint16_t makeup_gain;
+	uint32_t comp_attack;
+	uint32_t comp_release;
+	uint32_t exp_attack;
+	uint32_t exp_release;
+	int16_t limiter_bass_threshold;
+	int16_t limiter_high_threshold;
+	int16_t limiter_bass_makeup_gain;
+	int16_t limiter_high_makeup_gain;
+	int16_t limiter_bass_gc;
+	int16_t limiter_high_gc;
+	int16_t  limiter_delay;
+	uint16_t reserved;
+	/* place holder for filter coeffs to be followed */
+	int32_t p1LowPassCoeffs[5*2];
+	int32_t p1HighPassCoeffs[5*2];
+	int32_t p1BandPassCoeffs[5*3];
+	int32_t p1BassShelfCoeffs[5];
+	int32_t p1TrebleShelfCoeffs[5];
+} __packed;
+
+struct pbe_params {
+	uint32_t device;
+	uint32_t enable_flag;
+	uint32_t cfg_len;
+	struct pbe_config_t config;
+};
+
 #define SOFT_VOLUME_ENABLE_PARAM_SZ		\
 			(SOFT_VOLUME_ENABLE_PARAM_LEN*sizeof(uint32_t))
 #define SOFT_VOLUME_GAIN_MASTER_PARAM_SZ	\
@@ -329,4 +362,14 @@
 	uint32_t right_gain;
 };
 
+struct msm_nt_eff_all_config {
+	struct bass_boost_params bass_boost;
+	struct pbe_params pbe;
+	struct virtualizer_params virtualizer;
+	struct reverb_params reverb;
+	struct eq_params equalizer;
+	struct soft_volume_params saplus_vol;
+	struct soft_volume_params topo_switch_vol;
+};
+
 #endif /*_MSM_AUDIO_EFFECTS_H*/

diff --git a/original-kernel-headers/sound/compress_offload.h b/original-kernel-headers/sound/compress_offload.h
index a2f5baa..161f4aa 100644
--- a/original-kernel-headers/sound/compress_offload.h
+++ b/original-kernel-headers/sound/compress_offload.h

@@ -39,7 +39,7 @@
 struct snd_compressed_buffer {
 	__u32 fragment_size;
 	__u32 fragments;
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_compr_params: compressed stream params
@@ -51,7 +51,7 @@
 	struct snd_compressed_buffer buffer;
 	struct snd_codec codec;
 	__u8 no_wake_mode;
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_compr_tstamp: timestamp descriptor
@@ -66,12 +66,12 @@
  */
 struct snd_compr_tstamp {
 	__u32 byte_offset;
-	__u32 copied_total;
+	__u64 copied_total;
 	__u32 pcm_frames;
 	__u32 pcm_io_frames;
 	__u32 sampling_rate;
 	uint64_t timestamp;
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_compr_avail: avail descriptor
@@ -81,7 +81,7 @@
 struct snd_compr_avail {
 	__u64 avail;
 	struct snd_compr_tstamp tstamp;
-} __attribute__((packed));
+} __attribute__((packed, aligned(4)));
 
 enum snd_compr_direction {
 	SND_COMPRESS_PLAYBACK = 0,
@@ -108,7 +108,7 @@
 	__u32 max_fragments;
 	__u32 codecs[MAX_NUM_CODECS];
 	__u32 reserved[11];
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_compr_codec_caps: query capability of codec
@@ -120,7 +120,7 @@
 	__u32 codec;
 	__u32 num_descriptors;
 	struct snd_codec_desc descriptor[MAX_NUM_CODEC_DESCRIPTORS];
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_compr_audio_info: compressed input audio information
@@ -130,7 +130,7 @@
 struct snd_compr_audio_info {
 	uint32_t frame_size;
 	uint32_t reserved[15];
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * @SNDRV_COMPRESS_ENCODER_PADDING: no of samples appended by the encoder at the
@@ -153,7 +153,7 @@
 struct snd_compr_metadata {
 	 __u32 key;
 	 __u32 value[8];
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * compress path ioctl definitions
@@ -171,6 +171,8 @@
  * SNDRV_COMPRESS_STOP: stop a running stream, discarding ring buffer content
  * and the buffers currently with DSP
  * SNDRV_COMPRESS_DRAIN: Play till end of buffers and stop after that
+ * SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM: send codec specific data for the next
+ * track in gapless
  * SNDRV_COMPRESS_IOCTL_VERSION: Query the API version
  */
 #define SNDRV_COMPRESS_IOCTL_VERSION	_IOR('C', 0x00, int)
@@ -193,7 +195,7 @@
 #define SNDRV_COMPRESS_NEXT_TRACK	_IO('C', 0x35)
 #define SNDRV_COMPRESS_PARTIAL_DRAIN	_IO('C', 0x36)
 #define SNDRV_COMPRESS_SET_NEXT_TRACK_PARAM\
-					_IOW('C', 0x37, union snd_codec_options)
+					_IOW('C', 0x80, union snd_codec_options)
 /*
  * TODO
  * 1. add mmap support

diff --git a/original-kernel-headers/sound/compress_params.h b/original-kernel-headers/sound/compress_params.h
index 43615f9..eae29f3 100644
--- a/original-kernel-headers/sound/compress_params.h
+++ b/original-kernel-headers/sound/compress_params.h

@@ -53,10 +53,13 @@
 
 #include <linux/types.h>
 
+#define SND_DEC_DDP_MAX_PARAMS 18
+
 /* AUDIO CODECS SUPPORTED */
 #define MAX_NUM_CODECS 32
 #define MAX_NUM_CODEC_DESCRIPTORS 32
 #define MAX_NUM_BITRATES 32
+#define MAX_NUM_SAMPLE_RATES 32
 
 /* compressed TX */
 #define MAX_NUM_FRAMES_PER_BUFFER 1
@@ -264,6 +267,7 @@
 	__u32 encodeopt;
 	__u32 encodeopt1;
 	__u32 encodeopt2;
+	__u32 avg_bit_rate;
 };
 
 
@@ -293,7 +297,7 @@
 	__u32 max_bit_rate;
 	__u32 min_bit_rate;
 	__u32 downmix;
-};
+} __attribute__((packed, aligned(4)));
 
 
 /**
@@ -309,7 +313,7 @@
 	__u32 quant_bits;
 	__u32 start_region;
 	__u32 num_regions;
-};
+} __attribute__((packed, aligned(4)));
 
 /**
  * struct snd_enc_flac
@@ -333,24 +337,26 @@
 struct snd_enc_flac {
 	__u32 num;
 	__u32 gain;
-};
+} __attribute__((packed, aligned(4)));
 
 struct snd_enc_generic {
 	__u32 bw;	/* encoder bandwidth */
 	__s32 reserved[15];
-};
+} __attribute__((packed, aligned(4)));
+
 struct snd_dec_ddp {
 	__u32 params_length;
-	__u32 params_id[18];
-	__u32 params_value[18];
-};
+	__u32 params_id[SND_DEC_DDP_MAX_PARAMS];
+	__u32 params_value[SND_DEC_DDP_MAX_PARAMS];
+} __attribute__((packed, aligned(4)));
+
 struct snd_dec_flac {
 	__u16 sample_size;
 	__u16 min_blk_size;
 	__u16 max_blk_size;
 	__u16 min_frame_size;
 	__u16 max_frame_size;
-};
+} __attribute__((packed, aligned(4)));
 
 struct snd_dec_vorbis {
 	__u32 bit_stream_fmt;
@@ -395,11 +401,12 @@
 	struct snd_dec_vorbis vorbis_dec;
 	struct snd_dec_alac alac;
 	struct snd_dec_ape ape;
-};
+} __attribute__((packed, aligned(4)));
 
 /** struct snd_codec_desc - description of codec capabilities
  * @max_ch: Maximum number of audio channels
- * @sample_rates: Sampling rates in Hz, use SNDRV_PCM_RATE_xxx for this
+ * @sample_rates: Sampling rates in Hz, use values like 48000 for this
+ * @num_sample_rates: Number of valid values in sample_rates array
  * @bit_rate: Indexed array containing supported bit rates
  * @num_bitrates: Number of valid values in bit_rate array
  * @rate_control: value is specified by SND_RATECONTROLMODE defines.
@@ -421,7 +428,8 @@
 
 struct snd_codec_desc {
 	__u32 max_ch;
-	__u32 sample_rates;
+	__u32 sample_rates[MAX_NUM_SAMPLE_RATES];
+	__u32 num_sample_rates;
 	__u32 bit_rate[MAX_NUM_BITRATES];
 	__u32 num_bitrates;
 	__u32 rate_control;
@@ -430,7 +438,7 @@
 	__u32 formats;
 	__u32 min_buffer;
 	__u32 reserved[15];
-};
+} __attribute__((packed, aligned(4)));
 
 /** struct snd_codec
  * @id: Identifies the supported audio encoder/decoder.
@@ -439,7 +447,8 @@
  * @ch_out: Number of output channels. In case of contradiction between
  *		this field and the channelMode field, the channelMode field
  *		overrides.
- * @sample_rate: Audio sample rate of input data
+ * @sample_rate: Audio sample rate of input data in Hz, use values like 48000
+ *		for this.
  * @bit_rate: Bitrate of encoded data. May be ignored by decoders
  * @rate_control: Encoding rate control. See SND_RATECONTROLMODE defines.
  *               Encoders may rely on profiles for quality levels.
@@ -471,6 +480,6 @@
 	__u32 compr_passthr;
 	union snd_codec_options options;
 	__u32 reserved[3];
-};
+} __attribute__((packed, aligned(4)));
 
 #endif

diff --git a/k318/original-kernel-headers/sound/devdep_params.h b/original-kernel-headers/sound/devdep_params.h
similarity index 100%
rename from k318/original-kernel-headers/sound/devdep_params.h
rename to original-kernel-headers/sound/devdep_params.h


diff --git a/original-kernel-headers/sound/lsm_params.h b/original-kernel-headers/sound/lsm_params.h
index e2528c7..eafdc11 100644
--- a/original-kernel-headers/sound/lsm_params.h
+++ b/original-kernel-headers/sound/lsm_params.h

@@ -6,6 +6,18 @@
 
 #define SNDRV_LSM_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0)
 
+#define LSM_OUT_FORMAT_PCM (0)
+#define LSM_OUT_FORMAT_ADPCM (1 << 0)
+
+#define LSM_OUT_DATA_RAW (0)
+#define LSM_OUT_DATA_PACKED (1)
+
+#define LSM_OUT_DATA_EVENTS_DISABLED (0)
+#define LSM_OUT_DATA_EVENTS_ENABLED (1)
+
+#define LSM_OUT_TRANSFER_MODE_RT (0)
+#define LSM_OUT_TRANSFER_MODE_FTRT (1)
+
 enum lsm_app_id {
 	LSM_VOICE_WAKEUP_APP_ID = 1,
 	LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
@@ -129,6 +141,19 @@
 	__u32 data_size;
 };
 
+/*
+ * Data passed to LSM_OUT_FORMAT_CFG IOCTL
+ * @format: The media format enum
+ * @packing: indicates the packing method used for data path
+ * @events: indicates whether data path events need to be enabled
+ * @transfer_mode: indicates whether FTRT mode or RT mode.
+ */
+struct snd_lsm_output_format_cfg {
+	__u8 format;
+	__u8 packing;
+	__u8 events;
+	__u8 mode;
+};
 
 #define SNDRV_LSM_DEREG_SND_MODEL _IOW('U', 0x01, int)
 #define SNDRV_LSM_EVENT_STATUS	_IOW('U', 0x02, struct snd_lsm_event_status)
@@ -144,5 +169,7 @@
 					struct snd_lsm_detection_params)
 #define SNDRV_LSM_SET_MODULE_PARAMS	_IOW('U', 0x0B, \
 					struct snd_lsm_module_params)
+#define SNDRV_LSM_OUT_FORMAT_CFG _IOW('U', 0x0C, \
+				      struct snd_lsm_output_format_cfg)
 
 #endif

diff --git a/original-kernel-headers/sound/msmcal-hwdep.h b/original-kernel-headers/sound/msmcal-hwdep.h
index 324b497..2a29482 100644
--- a/original-kernel-headers/sound/msmcal-hwdep.h
+++ b/original-kernel-headers/sound/msmcal-hwdep.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,7 @@
 	WCD9XXX_ANC_CAL = WCD9XXX_MIN_CAL,
 	WCD9XXX_MAD_CAL,
 	WCD9XXX_MBHC_CAL,
+	WCD9XXX_VBAT_CAL,
 	WCD9XXX_MAX_CAL,
 };
 

diff --git a/original-kernel-headers/video/msm_hdmi_modes.h b/original-kernel-headers/video/msm_hdmi_modes.h
index 83970d0..2200485 100644
--- a/original-kernel-headers/video/msm_hdmi_modes.h
+++ b/original-kernel-headers/video/msm_hdmi_modes.h

@@ -1,6 +1,10 @@
 #ifndef _UAPI_MSM_HDMI_MODES_H__
 #define _UAPI_MSM_HDMI_MODES_H__
 #include <linux/types.h>
+#include <linux/errno.h>
+
+#define MSM_HDMI_RGB_888_24BPP_FORMAT       BIT(0)
+#define MSM_HDMI_YUV_420_12BPP_FORMAT       BIT(1)
 
 enum aspect_ratio {
 	HDMI_RES_AR_INVALID,
@@ -8,9 +12,19 @@
 	HDMI_RES_AR_5_4,
 	HDMI_RES_AR_16_9,
 	HDMI_RES_AR_16_10,
+	HDMI_RES_AR_64_27,
+	HDMI_RES_AR_256_135,
 	HDMI_RES_AR_MAX,
 };
 
+enum msm_hdmi_s3d_mode {
+	HDMI_S3D_NONE,
+	HDMI_S3D_SIDE_BY_SIDE,
+	HDMI_S3D_TOP_AND_BOTTOM,
+	HDMI_S3D_FRAME_PACKING,
+	HDMI_S3D_MAX,
+};
+
 struct msm_hdmi_mode_timing_info {
 	uint32_t	video_format;
 	uint32_t	active_h;
@@ -30,8 +44,12 @@
 	uint32_t	interlaced;
 	uint32_t	supported;
 	enum aspect_ratio ar;
+	/* Flags indicating support for specific pixel formats */
+	uint32_t        pixel_formats;
 };
 
+#define MSM_HDMI_INIT_RES_PAGE          1
+
 #define MSM_HDMI_MODES_CEA		(1 << 0)
 #define MSM_HDMI_MODES_XTND		(1 << 1)
 #define MSM_HDMI_MODES_DVI		(1 << 2)
@@ -121,17 +139,61 @@
 #define HDMI_VFRMT_1280x720p30_16_9	62
 #define HDMI_VFRMT_1920x1080p120_16_9	63
 #define HDMI_VFRMT_1920x1080p100_16_9	64
-/* Video Identification Codes from 65-127 are reserved for the future */
+#define HDMI_VFRMT_1280x720p24_64_27    65
+#define HDMI_VFRMT_1280x720p25_64_27    66
+#define HDMI_VFRMT_1280x720p30_64_27    67
+#define HDMI_VFRMT_1280x720p50_64_27    68
+#define HDMI_VFRMT_1280x720p60_64_27    69
+#define HDMI_VFRMT_1280x720p100_64_27   70
+#define HDMI_VFRMT_1280x720p120_64_27   71
+#define HDMI_VFRMT_1920x1080p24_64_27   72
+#define HDMI_VFRMT_1920x1080p25_64_27   73
+#define HDMI_VFRMT_1920x1080p30_64_27   74
+#define HDMI_VFRMT_1920x1080p50_64_27   75
+#define HDMI_VFRMT_1920x1080p60_64_27   76
+#define HDMI_VFRMT_1920x1080p100_64_27  77
+#define HDMI_VFRMT_1920x1080p120_64_27  78
+#define HDMI_VFRMT_1680x720p24_64_27    79
+#define HDMI_VFRMT_1680x720p25_64_27    80
+#define HDMI_VFRMT_1680x720p30_64_27    81
+#define HDMI_VFRMT_1680x720p50_64_27    82
+#define HDMI_VFRMT_1680x720p60_64_27    83
+#define HDMI_VFRMT_1680x720p100_64_27   84
+#define HDMI_VFRMT_1680x720p120_64_27   85
+#define HDMI_VFRMT_2560x1080p24_64_27   86
+#define HDMI_VFRMT_2560x1080p25_64_27   87
+#define HDMI_VFRMT_2560x1080p30_64_27   88
+#define HDMI_VFRMT_2560x1080p50_64_27   89
+#define HDMI_VFRMT_2560x1080p60_64_27   90
+#define HDMI_VFRMT_2560x1080p100_64_27  91
+#define HDMI_VFRMT_2560x1080p120_64_27  92
+#define HDMI_VFRMT_3840x2160p24_16_9    93
+#define HDMI_VFRMT_3840x2160p25_16_9    94
+#define HDMI_VFRMT_3840x2160p30_16_9    95
+#define HDMI_VFRMT_3840x2160p50_16_9    96
+#define HDMI_VFRMT_3840x2160p60_16_9    97
+#define HDMI_VFRMT_4096x2160p24_256_135 98
+#define HDMI_VFRMT_4096x2160p25_256_135 99
+#define HDMI_VFRMT_4096x2160p30_256_135 100
+#define HDMI_VFRMT_4096x2160p50_256_135 101
+#define HDMI_VFRMT_4096x2160p60_256_135 102
+#define HDMI_VFRMT_3840x2160p24_64_27   103
+#define HDMI_VFRMT_3840x2160p25_64_27   104
+#define HDMI_VFRMT_3840x2160p30_64_27   105
+#define HDMI_VFRMT_3840x2160p50_64_27   106
+#define HDMI_VFRMT_3840x2160p60_64_27   107
+
+/* Video Identification Codes from 107-127 are reserved for the future */
 #define HDMI_VFRMT_END			127
 
 #define EVFRMT_OFF(x)			(HDMI_VFRMT_END + x)
 
 /* extended video formats */
-#define HDMI_VFRMT_3840x2160p30_16_9	EVFRMT_OFF(1)
-#define HDMI_VFRMT_3840x2160p25_16_9	EVFRMT_OFF(2)
-#define HDMI_VFRMT_3840x2160p24_16_9	EVFRMT_OFF(3)
-#define HDMI_VFRMT_4096x2160p24_16_9	EVFRMT_OFF(4)
-#define HDMI_EVFRMT_END			HDMI_VFRMT_4096x2160p24_16_9
+#define HDMI_EVFRMT_3840x2160p30_16_9	EVFRMT_OFF(1)
+#define HDMI_EVFRMT_3840x2160p25_16_9	EVFRMT_OFF(2)
+#define HDMI_EVFRMT_3840x2160p24_16_9	EVFRMT_OFF(3)
+#define HDMI_EVFRMT_4096x2160p24_16_9	EVFRMT_OFF(4)
+#define HDMI_EVFRMT_END			HDMI_EVFRMT_4096x2160p24_16_9
 
 #define WQXGA_OFF(x)			(HDMI_EVFRMT_END + x)
 
@@ -172,8 +234,19 @@
 #define HDMI_VFRMT_1920x1200p60_16_10	ETIII_OFF(8)
 #define ETIII_VFRMT_END			HDMI_VFRMT_1920x1200p60_16_10
 
-#define HDMI_VFRMT_MAX			(ETIII_VFRMT_END + 1)
-#define HDMI_VFRMT_FORCE_32BIT		0x7FFFFFFF
+#define RESERVE_OFF(x)			(ETIII_VFRMT_END + x)
+
+#define HDMI_VFRMT_RESERVE1		RESERVE_OFF(1)
+#define HDMI_VFRMT_RESERVE2		RESERVE_OFF(2)
+#define HDMI_VFRMT_RESERVE3		RESERVE_OFF(3)
+#define HDMI_VFRMT_RESERVE4		RESERVE_OFF(4)
+#define HDMI_VFRMT_RESERVE5		RESERVE_OFF(5)
+#define HDMI_VFRMT_RESERVE6		RESERVE_OFF(6)
+#define HDMI_VFRMT_RESERVE7		RESERVE_OFF(7)
+#define HDMI_VFRMT_RESERVE8		RESERVE_OFF(8)
+#define RESERVE_VFRMT_END		HDMI_VFRMT_RESERVE8
+
+#define HDMI_VFRMT_MAX			(RESERVE_VFRMT_END + 1)
 
 /* Timing information for supported modes */
 #define VFRMT_NOT_SUPPORTED(VFRMT) \
@@ -182,110 +255,176 @@
 
 #define HDMI_VFRMT_640x480p60_4_3_TIMING				\
 	{HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true,		\
-	 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3}
+	 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x480p60_4_3_TIMING				\
 	{HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3}
+	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x480p60_16_9_TIMING				\
 	{HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, HDMI_RES_AR_16_9}
+	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x720p60_16_9_TIMING				\
 	{HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false,	\
-	 720, 5, 5, 20, false, 74250, 60000, false, HDMI_RES_AR_16_9}
+	 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080i60_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false,	\
-	 540, 2, 5, 5, false, 74250, 60000, false, HDMI_RES_AR_16_9}
+	 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x480i60_4_3_TIMING				\
 	{HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3}
+	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1440x480i60_16_9_TIMING				\
 	{HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, HDMI_RES_AR_16_9}
+	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p60_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 60000, false, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_720x576p50_4_3_TIMING				\
 	{HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3}
+	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x576p50_16_9_TIMING				\
 	{HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, HDMI_RES_AR_16_9}
+	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x720p50_16_9_TIMING				\
 	{HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false,	\
-	 720,  5, 5, 20, false, 74250, 50000, false, HDMI_RES_AR_16_9}
+	 720,  5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x576i50_4_3_TIMING				\
 	{HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3}
+	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1440x576i50_16_9_TIMING				\
 	{HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, HDMI_RES_AR_16_9}
+	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p50_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 50000, false, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p24_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 24000, false, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p25_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 25000, false, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p30_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 30000, false, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1024x768p60_4_3_TIMING                               \
 	{HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false,         \
-	768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3}
+	768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1280x1024p60_5_4_TIMING				\
 	{HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false,	\
-	1024, 1, 3, 38, false, 108000, 60000, false, HDMI_RES_AR_5_4}
+	1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4, 0}
 #define HDMI_VFRMT_2560x1600p60_16_9_TIMING				\
 	{HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false,		\
-	 1600, 3, 6, 37, false, 268500, 60000, false, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 30000, false, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 25000, false, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_4096x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, HDMI_RES_AR_16_9}
+	 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p30_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p25_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p24_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_4096x2160p24_16_9_TIMING				\
+	{HDMI_EVFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
 
 #define HDMI_VFRMT_800x600p60_4_3_TIMING				\
 	{HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false,	\
-	 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3}
+	 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_848x480p60_16_9_TIMING				\
 	{HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false,	\
-	 480, 6, 8, 23, false, 33750, 60000, false, HDMI_RES_AR_16_9}
+	 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x960p60_4_3_TIMING\
 	{HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false,	\
-	 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3}
+	 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1360x768p60_16_9_TIMING\
 	{HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false,	\
-	 768, 3, 6, 18, false, 85500, 60000, false, HDMI_RES_AR_16_9}
+	 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x900p60_16_10_TIMING\
 	{HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false,	\
-	 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10}
+	 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1400x1050p60_4_3_TIMING\
 	{HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false,	\
-	 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3}
+	 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1680x1050p60_16_10_TIMING\
 	{HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false,	\
-	 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10}
+	 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1600x1200p60_4_3_TIMING\
 	{HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false,	\
-	 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3}
+	 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1920x1200p60_16_10_TIMING\
 	{HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false,\
-	 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10}
+	 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1366x768p60_16_10_TIMING\
 	{HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false,\
-	 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10}
+	 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1280x800p60_16_10_TIMING\
 	{HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true,\
-	 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10}
+	 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10, 0}
+#define HDMI_VFRMT_3840x2160p24_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p25_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p30_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p50_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p50_16_9, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p60_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p60_16_9, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+
+#define HDMI_VFRMT_4096x2160p24_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p24_256_135, 4096, 1020, 88, 296, false,   \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p25_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p25_256_135, 4096, 968, 88, 128, false,    \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p30_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p30_256_135, 4096, 88, 88, 128, false,     \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p50_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p50_256_135, 4096, 968, 88, 128, false,    \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p60_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p60_256_135, 4096, 88, 88, 128, false,     \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+
+#define HDMI_VFRMT_3840x2160p24_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p24_64_27, 3840, 1276, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p25_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p25_64_27, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p30_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p30_64_27, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p50_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p50_64_27, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p60_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_64_27, 0}
 
 #define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do {		\
 	struct msm_hdmi_mode_timing_info mode = MODE##_TIMING;	\
@@ -339,16 +478,46 @@
 			HDMI_VFRMT_1920x1080p25_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
 			HDMI_VFRMT_1920x1080p30_16_9);	\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p24_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p25_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p30_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p50_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p60_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p24_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p25_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p30_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p50_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p60_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p24_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p25_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p30_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p50_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p60_64_27); \
 	}	\
 	if (__type & MSM_HDMI_MODES_XTND) {	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p30_16_9);	\
+			HDMI_EVFRMT_3840x2160p30_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p25_16_9);	\
+			HDMI_EVFRMT_3840x2160p25_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p24_16_9);	\
+			HDMI_EVFRMT_3840x2160p24_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p24_16_9);	\
+			HDMI_EVFRMT_4096x2160p24_16_9);	\
 	}	\
 	if (__type & MSM_HDMI_MODES_DVI) {	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
@@ -382,82 +551,9 @@
 	}	\
 } while (0)
 
-static inline const char *msm_hdmi_mode_2string(uint32_t mode)
-{
-	switch (mode) {
-	case HDMI_VFRMT_UNKNOWN:		return "Unknown";
-	case HDMI_VFRMT_640x480p60_4_3:		return "640x480 p60 4/3";
-	case HDMI_VFRMT_720x480p60_4_3:		return "720x480 p60 4/3";
-	case HDMI_VFRMT_720x480p60_16_9:	return "720x480 p60 16/9";
-	case HDMI_VFRMT_1280x720p60_16_9:	return "1280x 720 p60 16/9";
-	case HDMI_VFRMT_1920x1080i60_16_9:	return "1920x1080 i60 16/9";
-	case HDMI_VFRMT_1440x480i60_4_3:	return "1440x480 i60 4/3";
-	case HDMI_VFRMT_1440x480i60_16_9:	return "1440x480 i60 16/9";
-	case HDMI_VFRMT_1440x240p60_4_3:	return "1440x240 p60 4/3";
-	case HDMI_VFRMT_1440x240p60_16_9:	return "1440x240 p60 16/9";
-	case HDMI_VFRMT_2880x480i60_4_3:	return "2880x480 i60 4/3";
-	case HDMI_VFRMT_2880x480i60_16_9:	return "2880x480 i60 16/9";
-	case HDMI_VFRMT_2880x240p60_4_3:	return "2880x240 p60 4/3";
-	case HDMI_VFRMT_2880x240p60_16_9:	return "2880x240 p60 16/9";
-	case HDMI_VFRMT_1440x480p60_4_3:	return "1440x480 p60 4/3";
-	case HDMI_VFRMT_1440x480p60_16_9:	return "1440x480 p60 16/9";
-	case HDMI_VFRMT_1920x1080p60_16_9:	return "1920x1080 p60 16/9";
-	case HDMI_VFRMT_720x576p50_4_3:		return "720x576 p50 4/3";
-	case HDMI_VFRMT_720x576p50_16_9:	return "720x576 p50 16/9";
-	case HDMI_VFRMT_1280x720p50_16_9:	return "1280x720 p50 16/9";
-	case HDMI_VFRMT_1920x1080i50_16_9:	return "1920x1080 i50 16/9";
-	case HDMI_VFRMT_1440x576i50_4_3:	return "1440x576 i50 4/3";
-	case HDMI_VFRMT_1440x576i50_16_9:	return "1440x576 i50 16/9";
-	case HDMI_VFRMT_1440x288p50_4_3:	return "1440x288 p50 4/3";
-	case HDMI_VFRMT_1440x288p50_16_9:	return "1440x288 p50 16/9";
-	case HDMI_VFRMT_2880x576i50_4_3:	return "2880x576 i50 4/3";
-	case HDMI_VFRMT_2880x576i50_16_9:	return "2880x576 i50 16/9";
-	case HDMI_VFRMT_2880x288p50_4_3:	return "2880x288 p50 4/3";
-	case HDMI_VFRMT_2880x288p50_16_9:	return "2880x288 p50 16/9";
-	case HDMI_VFRMT_1440x576p50_4_3:	return "1440x576 p50 4/3";
-	case HDMI_VFRMT_1440x576p50_16_9:	return "1440x576 p50 16/9";
-	case HDMI_VFRMT_1920x1080p50_16_9:	return "1920x1080 p50 16/9";
-	case HDMI_VFRMT_1920x1080p24_16_9:	return "1920x1080 p24 16/9";
-	case HDMI_VFRMT_1920x1080p25_16_9:	return "1920x1080 p25 16/9";
-	case HDMI_VFRMT_1920x1080p30_16_9:	return "1920x1080 p30 16/9";
-	case HDMI_VFRMT_2880x480p60_4_3:	return "2880x480 p60 4/3";
-	case HDMI_VFRMT_2880x480p60_16_9:	return "2880x480 p60 16/9";
-	case HDMI_VFRMT_2880x576p50_4_3:	return "2880x576 p50 4/3";
-	case HDMI_VFRMT_2880x576p50_16_9:	return "2880x576 p50 16/9";
-	case HDMI_VFRMT_1920x1250i50_16_9:	return "1920x1250 i50 16/9";
-	case HDMI_VFRMT_1920x1080i100_16_9:	return "1920x1080 i100 16/9";
-	case HDMI_VFRMT_1280x720p100_16_9:	return "1280x720 p100 16/9";
-	case HDMI_VFRMT_720x576p100_4_3:	return "720x576 p100 4/3";
-	case HDMI_VFRMT_720x576p100_16_9:	return "720x576 p100 16/9";
-	case HDMI_VFRMT_1440x576i100_4_3:	return "1440x576 i100 4/3";
-	case HDMI_VFRMT_1440x576i100_16_9:	return "1440x576 i100 16/9";
-	case HDMI_VFRMT_1920x1080i120_16_9:	return "1920x1080 i120 16/9";
-	case HDMI_VFRMT_1280x720p120_16_9:	return "1280x720 p120 16/9";
-	case HDMI_VFRMT_720x480p120_4_3:	return "720x480 p120 4/3";
-	case HDMI_VFRMT_720x480p120_16_9:	return "720x480 p120 16/9";
-	case HDMI_VFRMT_1440x480i120_4_3:	return "1440x480 i120 4/3";
-	case HDMI_VFRMT_1440x480i120_16_9:	return "1440x480 i120 16/9";
-	case HDMI_VFRMT_720x576p200_4_3:	return "720x576 p200 4/3";
-	case HDMI_VFRMT_720x576p200_16_9:	return "720x576 p200 16/9";
-	case HDMI_VFRMT_1440x576i200_4_3:	return "1440x576 i200 4/3";
-	case HDMI_VFRMT_1440x576i200_16_9:	return "1440x576 i200 16/9";
-	case HDMI_VFRMT_720x480p240_4_3:	return "720x480 p240 4/3";
-	case HDMI_VFRMT_720x480p240_16_9:	return "720x480 p240 16/9";
-	case HDMI_VFRMT_1440x480i240_4_3:	return "1440x480 i240 4/3";
-	case HDMI_VFRMT_1440x480i240_16_9:	return "1440x480 i240 16/9";
-	case HDMI_VFRMT_1280x720p24_16_9:	return "1280x720 p24 16/9";
-	case HDMI_VFRMT_1280x720p25_16_9:	return "1280x720 p25 16/9";
-	case HDMI_VFRMT_1280x720p30_16_9:	return "1280x720 p30 16/9";
-	case HDMI_VFRMT_1920x1080p120_16_9:	return "1920x1080 p120 16/9";
-	case HDMI_VFRMT_1920x1080p100_16_9:	return "1920x1080 p100 16/9";
-	case HDMI_VFRMT_3840x2160p30_16_9:	return "3840x2160 p30 16/9";
-	case HDMI_VFRMT_3840x2160p25_16_9:	return "3840x2160 p25 16/9";
-	case HDMI_VFRMT_3840x2160p24_16_9:	return "3840x2160 p24 16/9";
-	case HDMI_VFRMT_4096x2160p24_16_9:	return "4096x2160 p24 16/9";
-	case HDMI_VFRMT_1024x768p60_4_3:	return "1024x768 p60 4/3";
-	case HDMI_VFRMT_1280x1024p60_5_4:	return "1280x1024 p60 5/4";
-	case HDMI_VFRMT_2560x1600p60_16_9:	return "2560x1600 p60 16/9";
-	default:				return "???";
-	}
-}
+#define MSM_HDMI_MODES_GET_DETAILS(mode, MODE) do {		\
+	struct msm_hdmi_mode_timing_info info = MODE##_TIMING;	\
+	*mode = info;						\
+	} while (0)
+
 #endif /* _UAPI_MSM_HDMI_MODES_H__ */
commit	157e733a55f0040238010b1d2e6eb068413744d5	[log] [tgz]
author	Tom Cherry <tomcherry@google.com>	Wed Jun 01 20:36:02 2016 +0000
committer	android-build-merger <android-build-merger@google.com>	Wed Jun 01 20:36:02 2016 +0000
tree	262812f4f1b56b786cf9bc765439d3cdab8fdaf7
parent	47e7517366ca0a9ef87a784b049413c6b4182ce1 [diff]
parent	b06208fcfb6b350603267746f736c5a7e7a92d8f [diff]