| #ifndef UAPI_MMC_MMC_H |
| #define UAPI_MMC_MMC_H |
| |
| /* Standard MMC commands (4.1) type argument response */ |
| /* class 1 */ |
| #define MMC_GO_IDLE_STATE 0 /* bc */ |
| #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ |
| #define MMC_ALL_SEND_CID 2 /* bcr R2 */ |
| #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ |
| #define MMC_SET_DSR 4 /* bc [31:16] RCA */ |
| #define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */ |
| #define MMC_SWITCH 6 /* ac [31:0] See below R1b */ |
| #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ |
| #define MMC_SEND_EXT_CSD 8 /* adtc R1 */ |
| #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ |
| #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ |
| #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ |
| #define MMC_STOP_TRANSMISSION 12 /* ac R1b */ |
| #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ |
| #define MMC_BUS_TEST_R 14 /* adtc R1 */ |
| #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ |
| #define MMC_BUS_TEST_W 19 /* adtc R1 */ |
| #define MMC_SPI_READ_OCR 58 /* spi spi_R3 */ |
| #define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */ |
| |
| /* class 2 */ |
| #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ |
| #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ |
| #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ |
| #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ |
| #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */ |
| #define MMC_SEND_TUNING_BLOCK_HS400 MMC_SEND_TUNING_BLOCK_HS200 |
| |
| /* class 3 */ |
| #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ |
| |
| /* class 4 */ |
| #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ |
| #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ |
| #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ |
| #define MMC_PROGRAM_CID 26 /* adtc R1 */ |
| #define MMC_PROGRAM_CSD 27 /* adtc R1 */ |
| |
| /* class 6 */ |
| #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ |
| #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ |
| #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ |
| |
| /* class 5 */ |
| #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ |
| #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ |
| #define MMC_ERASE 38 /* ac R1b */ |
| |
| /* class 9 */ |
| #define MMC_FAST_IO 39 /* ac <Complex> R4 */ |
| #define MMC_GO_IRQ_STATE 40 /* bcr R5 */ |
| |
| /* class 7 */ |
| #define MMC_LOCK_UNLOCK 42 /* adtc R1b */ |
| |
| /* class 8 */ |
| #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ |
| #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ |
| |
| #endif /* UAPI_MMC_MMC_H */ |
