DO NOT MERGE - Merge PPRL.190305.001 into master
Bug: 127812889
Change-Id: Ibe64ebd729c5f57c1d089d7345ffe1506b3adb59
diff --git a/1.1/android.hardware.nfc@1.1-service.rc b/1.1/android.hardware.nfc@1.1-service.rc
index 39afab2..61c6bba 100644
--- a/1.1/android.hardware.nfc@1.1-service.rc
+++ b/1.1/android.hardware.nfc@1.1-service.rc
@@ -1,4 +1,4 @@
-service nfc_hal_service /vendor/bin/hw/android.hardware.nfc@1.1-service
+service vendor.nfc_hal_service /vendor/bin/hw/android.hardware.nfc@1.1-service
class hal
user nfc
group nfc
diff --git a/Android.bp b/Android.bp
index 0a5cd9a..9b018fe 100755
--- a/Android.bp
+++ b/Android.bp
@@ -21,6 +21,8 @@
"-Wall",
"-Werror",
"-Wextra",
+ // Allow implicit fallthroughs in phDnldNfc_Internal.cc and phNxpConfig.cpp until they are fixed.
+ "-Wno-error=implicit-fallthrough",
],
srcs: [
diff --git a/OWNERS b/OWNERS
index 984e5f9..fde96be 100755
--- a/OWNERS
+++ b/OWNERS
@@ -1,2 +1,2 @@
-eisenbach@google.com
kandoiruchi@google.com
+zachoverflow@google.com
diff --git a/extns/intf/nxpnfc/1.0/Android.bp b/extns/intf/nxpnfc/1.0/Android.bp
index 05dcffa..dcc1354 100644
--- a/extns/intf/nxpnfc/1.0/Android.bp
+++ b/extns/intf/nxpnfc/1.0/Android.bp
@@ -1,10 +1,5 @@
// This file is autogenerated by hidl-gen -Landroidbp.
-hidl_package_root {
- name: "vendor.nxp.nxpnfc",
- path: "hardware/nxp/nfc/extns/intf/nxpnfc",
-}
-
hidl_interface {
name: "vendor.nxp.nxpnfc@1.0",
root: "vendor.nxp.nxpnfc",
diff --git a/extns/intf/nxpnfc/Android.bp b/extns/intf/nxpnfc/Android.bp
new file mode 100644
index 0000000..65946cf
--- /dev/null
+++ b/extns/intf/nxpnfc/Android.bp
@@ -0,0 +1,3 @@
+hidl_package_root {
+ name: "vendor.nxp.nxpnfc",
+}
diff --git a/halimpl/hal/phNxpNciHal.cc b/halimpl/hal/phNxpNciHal.cc
index bf74a72..de0d52b 100755
--- a/halimpl/hal/phNxpNciHal.cc
+++ b/halimpl/hal/phNxpNciHal.cc
@@ -51,6 +51,7 @@
static uint8_t config_success = true;
static bool persist_uicc_enabled =false;
+static ThreadMutex sHalFnLock;
/* NCI HAL Control structure */
phNxpNciHal_Control_t nxpncihal_ctrl;
@@ -118,6 +119,7 @@
static NFCSTATUS phNxpNciHal_CheckRFCmdRespStatus();
static void phNxpNciHal_getPersistUiccSetting();
int check_config_parameter();
+void phNxpNciHal_phase_tirm_offset_sign_update();
void phNxpNciHal_isFactoryOTAModeActive();
static NFCSTATUS phNxpNciHal_disableFactoryOTAMode(void);
/******************************************************************************
@@ -205,8 +207,8 @@
/* Send the event */
(*nxpncihal_ctrl.p_nfc_stack_cback)(HAL_NFC_CLOSE_CPLT_EVT,
HAL_NFC_STATUS_OK);
- phNxpNciHal_kill_client_thread(&nxpncihal_ctrl);
}
+ phNxpNciHal_kill_client_thread(&nxpncihal_ctrl);
REENTRANCE_UNLOCK();
break;
}
@@ -360,7 +362,7 @@
if (NFCSTATUS_SUCCESS != phNxpNciHal_fw_mw_ver_check()) {
NXPLOG_NCIHAL_D("Chip Version Middleware Version mismatch!!!!");
phOsalNfc_Timer_Cleanup();
- phTmlNfc_Shutdown();
+ phTmlNfc_Shutdown_CleanUp();
status = NFCSTATUS_FAILED;
} else {
NXPLOG_NCIHAL_E("FW download failed, Continue NFCC init");
@@ -377,7 +379,7 @@
(pphTmlNfc_TransactCompletionCb_t)&phNxpNciHal_read_complete, NULL);
if (readRestoreStatus != NFCSTATUS_PENDING) {
NXPLOG_NCIHAL_E("TML Read status error status = %x", readRestoreStatus);
- readRestoreStatus = phTmlNfc_Shutdown();
+ readRestoreStatus = phTmlNfc_Shutdown_CleanUp();
if (readRestoreStatus != NFCSTATUS_SUCCESS) {
NXPLOG_NCIHAL_E("TML Shutdown failed. Status = %x", readRestoreStatus);
}
@@ -552,6 +554,8 @@
static uint8_t cmd_reset_nci[] = {0x20, 0x00, 0x01, 0x00};
/*NCI2_0_INIT_CMD*/
static uint8_t cmd_init_nci2_0[] = {0x20, 0x01, 0x02, 0x00, 0x00};
+
+ AutoThreadMutex a(sHalFnLock);
if (nxpncihal_ctrl.halStatus == HAL_STATUS_MIN_OPEN) {
NXPLOG_NCIHAL_E("phNxpNciHal_MinOpen(): already open");
return NFCSTATUS_SUCCESS;
@@ -626,15 +630,11 @@
}
/* Create the client thread */
- pthread_attr_t attr;
- pthread_attr_init(&attr);
- pthread_attr_setdetachstate(&attr, PTHREAD_CREATE_DETACHED);
- ret_val = pthread_create(&nxpncihal_ctrl.client_thread, &attr,
+ ret_val = pthread_create(&nxpncihal_ctrl.client_thread, NULL,
phNxpNciHal_client_thread, &nxpncihal_ctrl);
- pthread_attr_destroy(&attr);
if (ret_val != 0) {
NXPLOG_NCIHAL_E("pthread_create failed");
- wConfigStatus = phTmlNfc_Shutdown();
+ wConfigStatus = phTmlNfc_Shutdown_CleanUp();
goto clean_and_return;
}
@@ -646,7 +646,7 @@
(pphTmlNfc_TransactCompletionCb_t)&phNxpNciHal_read_complete, NULL);
if (status != NFCSTATUS_PENDING) {
NXPLOG_NCIHAL_E("TML Read status error status = %x", status);
- wConfigStatus = phTmlNfc_Shutdown();
+ wConfigStatus = phTmlNfc_Shutdown_CleanUp();
wConfigStatus = NFCSTATUS_FAILED;
goto clean_and_return;
}
@@ -669,7 +669,7 @@
goto init_retry;
} else
init_retry_cnt = 0;
- wConfigStatus = phTmlNfc_Shutdown();
+ wConfigStatus = phTmlNfc_Shutdown_CleanUp();
wConfigStatus = NFCSTATUS_FAILED;
goto clean_and_return;
}
@@ -678,7 +678,11 @@
status = phNxpNciHal_send_ext_cmd(sizeof(cmd_init_nci2_0), cmd_init_nci2_0);
} else {
status = phNxpNciHal_send_ext_cmd(sizeof(cmd_init_nci), cmd_init_nci);
- if (status == NFCSTATUS_SUCCESS && (nfcFL.chipType == pn557)) {
+ /*If chipType is pn557 or PN81A(PN553_TC) and if the chip is in 1.0 mode,
+ Force it to 2.0 mode. To confirm the PN553_TC/PN81A chip, FW version check
+ is also added */
+ bool pn81A_pn553_chip = (nfcFL.chipType == pn553) && ((wFwVerRsp >> 8 & 0xFFFF) == 0x1102);
+ if ((status == NFCSTATUS_SUCCESS) && ((nfcFL.chipType == pn557) || pn81A_pn553_chip)) {
NXPLOG_NCIHAL_E("Chip is in NCI1.0 mode reset the chip to 2.0 mode");
status = phNxpNciHal_send_ext_cmd(sizeof(cmd_reset_nci), cmd_reset_nci);
if (status == NFCSTATUS_SUCCESS) {
@@ -697,7 +701,7 @@
goto init_retry;
} else
init_retry_cnt = 0;
- wConfigStatus = phTmlNfc_Shutdown();
+ wConfigStatus = phTmlNfc_Shutdown_CleanUp();
wConfigStatus = NFCSTATUS_FAILED;
goto clean_and_return;
}
@@ -1128,6 +1132,22 @@
(status == NFCSTATUS_SUCCESS)) {
(*nxpncihal_ctrl.p_nfc_stack_data_cback)(nxpncihal_ctrl.rx_data_len,
nxpncihal_ctrl.p_rx_data);
+ //workaround for sync issue between SPI and NFC
+ if ((nfcFL.chipType == pn557) && nxpncihal_ctrl.p_rx_data[0] == 0x62 &&
+ nxpncihal_ctrl.p_rx_data[1] == 0x00 &&
+ nxpncihal_ctrl.p_rx_data[3] == 0xC0 &&
+ nxpncihal_ctrl.p_rx_data[4] == 0x00) {
+ uint8_t nfcee_notifiations[3][9] = {
+ {0x61, 0x0A, 0x06, 0x01, 0x00, 0x03, 0xC0, 0x80, 0x04},
+ {0x61, 0x0A, 0x06, 0x01, 0x00, 0x03, 0xC0, 0x81, 0x04},
+ {0x61, 0x0A, 0x06, 0x01, 0x00, 0x03, 0xC0, 0x82, 0x03},
+ };
+
+ for (int i = 0; i < 3; i++) {
+ (*nxpncihal_ctrl.p_nfc_stack_data_cback)(sizeof(nfcee_notifiations[i]),
+ nfcee_notifiations[i]);
+ }
+ }
}
} else {
NXPLOG_NCIHAL_E("read error status = 0x%x", pInfo->wStatus);
@@ -1374,6 +1394,10 @@
retlen = 0;
fw_download_success = 0;
+ if(GetNxpNumValue(NAME_NXP_PHASE_TIRM_OFFSET_SIGN_UPDATE, &num, sizeof(num))) {
+ if(num != 0) phNxpNciHal_phase_tirm_offset_sign_update();
+ }
+
NXPLOG_NCIHAL_D("Performing TVDD Settings");
isfound = GetNxpNumValue(NAME_NXP_EXT_TVDD_CFG, &num, sizeof(num));
if (isfound > 0) {
@@ -1873,6 +1897,35 @@
return NFCSTATUS_SUCCESS;
}
+void phNxpNciHal_phase_tirm_offset_sign_update() {
+ uint8_t phase_tirm_offset_read[] = {0x20, 0x03, 0x03, 0x01, 0xA0, 0x17};
+ uint8_t phase_tirm_offset_write[] = {0x20, 0x02, 0x05, 0x01, 0xA0, 0x17, 0x01, 0x80};
+ NFCSTATUS status = NFCSTATUS_FAILED;
+
+ NXPLOG_NCIHAL_D("check A017 mode status");
+
+ status = phNxpNciHal_send_ext_cmd(sizeof(phase_tirm_offset_read), phase_tirm_offset_read);
+
+ if (status == NFCSTATUS_SUCCESS) {
+ if((nxpncihal_ctrl.p_rx_data[8] & 0x40) == 0x40) {
+ NXPLOG_NCIHAL_D("Set new tirm offset sing update");
+ phase_tirm_offset_write[7] |= nxpncihal_ctrl.p_rx_data[8] & 0x3F;
+ status = phNxpNciHal_send_ext_cmd(sizeof(phase_tirm_offset_write), phase_tirm_offset_write);
+ if (status == NFCSTATUS_SUCCESS) {
+ NXPLOG_NCIHAL_D("Phase tirm offset updated");
+ } else {
+ NXPLOG_NCIHAL_E("Phase tirm offset update error");
+ }
+ } else {
+ NXPLOG_NCIHAL_D("Phase tirm offset OK");
+ }
+ } else {
+ NXPLOG_NCIHAL_E("Fail to get phase tirm offset status");
+ }
+ return;
+}
+
+
void phNxpNciHal_isFactoryOTAModeActive() {
uint8_t check_factoryOTA[] = {0x20, 0x03, 0x05, 0x02, 0xA0, 0x08, 0xA0, 0x88};
NFCSTATUS status = NFCSTATUS_FAILED;
@@ -2049,6 +2102,7 @@
static uint8_t cmd_ven_disable_nci[] = {0x20, 0x02, 0x05, 0x01,
0xA0, 0x07, 0x01, 0x02};
+ AutoThreadMutex a(sHalFnLock);
if (nxpncihal_ctrl.halStatus == HAL_STATUS_CLOSE) {
NXPLOG_NCIHAL_E("phNxpNciHal_close is already closed, ignoring close");
return NFCSTATUS_FAILED;
@@ -2056,7 +2110,11 @@
CONCURRENCY_LOCK();
-
+ int sem_val;
+ sem_getvalue(&(nxpncihal_ctrl.syncSpiNfc), &sem_val);
+ if(sem_val == 0 ) {
+ sem_post(&(nxpncihal_ctrl.syncSpiNfc));
+ }
if(!bShutdown){
status = phNxpNciHal_send_ext_cmd(sizeof(cmd_ven_disable_nci), cmd_ven_disable_nci);
if(status != NFCSTATUS_SUCCESS) {
@@ -2095,6 +2153,12 @@
status = phTmlNfc_Shutdown();
+ if (0 != pthread_join(nxpncihal_ctrl.client_thread, (void **)NULL)) {
+ NXPLOG_TML_E("Fail to kill client thread!");
+ }
+
+ phTmlNfc_CleanUp();
+
phDal4Nfc_msgrelease(nxpncihal_ctrl.gDrvCfg.nClientId);
memset(&nxpncihal_ctrl, 0x00, sizeof(nxpncihal_ctrl));
@@ -2434,14 +2498,14 @@
if(pInpOutData->out.data.nciRsp.p_rsp[0] == 0x4F && pInpOutData->out.data.nciRsp.p_rsp[1] == 0x01
&& pInpOutData->out.data.nciRsp.p_rsp[2] == 0x01 && pInpOutData->out.data.nciRsp.p_rsp[3] == 0x00
- && pInpOutData->inp.data.nciCmd.p_cmd[1] == 0x01)
+ && pInpOutData->inp.data.nciCmd.p_cmd[3] == 0x01)
{
NXPLOG_NCIHAL_D("OMAPI COMMAND for Open SUCCESS : 0x%x",pInpOutData->out.data.nciRsp.p_rsp[3]);
ret=pInpOutData->out.data.nciRsp.p_rsp[3];
}
else if(pInpOutData->out.data.nciRsp.p_rsp[0] == 0x4F && pInpOutData->out.data.nciRsp.p_rsp[1] == 0x01
&& pInpOutData->out.data.nciRsp.p_rsp[2] == 0x01 && pInpOutData->out.data.nciRsp.p_rsp[3] == 0x00
- && pInpOutData->inp.data.nciCmd.p_cmd[1] == 0x00)
+ && pInpOutData->inp.data.nciCmd.p_cmd[3] == 0x00)
{
NXPLOG_NCIHAL_D("OMAPI COMMAND for Close SUCCESS : 0x%x",pInpOutData->out.data.nciRsp.p_rsp[3]);
@@ -2454,8 +2518,12 @@
}
break;
case HAL_NFC_SET_SPM_PWR:
- ret = phPalEse_spi_ioctl(phPalEse_e_ChipRst, gpphTmlNfc_Context->pDevHandle, level);
- break;
+ ret = phPalEse_spi_ioctl(phPalEse_e_ChipRst, gpphTmlNfc_Context->pDevHandle, level);
+ if ((nxpncihal_ctrl.halStatus == HAL_STATUS_MIN_OPEN) && (level == 0x01)) {
+ NXPLOG_NCIHAL_D(" HAL close after SPI close , while NFC is Off");
+ phNxpNciHal_close(false);
+ }
+ break;
case HAL_NFC_SET_POWER_SCHEME:
ret = phPalEse_spi_ioctl(phPalEse_e_SetPowerScheme,gpphTmlNfc_Context->pDevHandle,level);
break;
diff --git a/halimpl/hal/phNxpNciHal_ext.cc b/halimpl/hal/phNxpNciHal_ext.cc
index bc3f7ec..141948f 100755
--- a/halimpl/hal/phNxpNciHal_ext.cc
+++ b/halimpl/hal/phNxpNciHal_ext.cc
@@ -924,6 +924,7 @@
NXPLOG_NCIHAL_E("hal_extns_write_rsp_timeout_cb - write timeout!!!");
nxpncihal_ctrl.ext_cb_data.status = NFCSTATUS_FAILED;
usleep(1);
+ sem_post(&(nxpncihal_ctrl.syncSpiNfc));
SEM_POST(&(nxpncihal_ctrl.ext_cb_data));
return;
diff --git a/halimpl/libnfc-nxp-PN551_example.conf b/halimpl/libnfc-nxp-PN551_example.conf
index 9add9b7..27f95d4 100755
--- a/halimpl/libnfc-nxp-PN551_example.conf
+++ b/halimpl/libnfc-nxp-PN551_example.conf
@@ -220,11 +220,11 @@
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
# command is sent waiting for rsp and ntf.
-PRESENCE_CHECK_ALGORITHM=2
+PRESENCE_CHECK_ALGORITHM=1
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
DEVICE_HOST_WHITE_LIST={02}
-###############################################################################
\ No newline at end of file
+###############################################################################
diff --git a/halimpl/libnfc-nxp-PN81B_example_NCI2_0.conf b/halimpl/libnfc-nxp-PN81B_example_NCI2_0.conf
index 653d593..03bcb20 100755
--- a/halimpl/libnfc-nxp-PN81B_example_NCI2_0.conf
+++ b/halimpl/libnfc-nxp-PN81B_example_NCI2_0.conf
@@ -126,7 +126,8 @@
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# SPI CL Sync enable A098
-NXP_CORE_CONF_EXTN={20, 02, 2D, 0B,
+# EVT END OF Operation delay A0B2
+NXP_CORE_CONF_EXTN={20, 02, 31, 0C,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 5E, 01, 01,
@@ -137,7 +138,8 @@
A0, 37, 01, 35,
A0, D8, 01, 02,
A0, D5, 01, 0A,
- A0, 98, 01, 01
+ A0, 98, 01, 03,
+ A0, B2, 01, 19
}
###############################################################################
@@ -207,7 +209,7 @@
# Enable or Disable RF_STATUS_UPDATE to EseHal module
# Disable 0x00
# Enable 0x01
-RF_STATUS_UPDATE_ENABLE=0x01
+RF_STATUS_UPDATE_ENABLE=0x00
###############################################################################
# Configure the single default SE to use. The default is to use the first
@@ -257,7 +259,7 @@
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
-DEVICE_HOST_WHITE_LIST={C0, 80}
+DEVICE_HOST_WHITE_LIST={C0, 02}
###############################################################################
# Extended APDU length for ISO_DEP
@@ -277,7 +279,7 @@
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM)
OFF_HOST_ESE_PIPE_ID=0x19
-OFF_HOST_SIM_PIPE_ID=0x70
+OFF_HOST_SIM_PIPE_ID=0x0A
###############################################################################
#Set the Felica T3T System Code Power state :
@@ -285,9 +287,9 @@
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
-# bit pos 3 = Screen On lock
-# bit pos 4 = Screen off unlock
+# bit pos 3 = Screen off unlock
+# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
-DEFAULT_SYS_CODE_PWR_STATE=0x39
+DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
\ No newline at end of file
diff --git a/halimpl/libnfc-nxp-PN81T_example_NCI2_0.conf b/halimpl/libnfc-nxp-PN81T_example_NCI2_0.conf
index 653d593..c6d81f9 100755
--- a/halimpl/libnfc-nxp-PN81T_example_NCI2_0.conf
+++ b/halimpl/libnfc-nxp-PN81T_example_NCI2_0.conf
@@ -126,7 +126,8 @@
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
# SPI CL Sync enable A098
-NXP_CORE_CONF_EXTN={20, 02, 2D, 0B,
+# EVT END OF Operation delay A0B2
+NXP_CORE_CONF_EXTN={20, 02, 31, 0C,
A0, EC, 01, 01,
A0, ED, 01, 01,
A0, 5E, 01, 01,
@@ -137,7 +138,8 @@
A0, 37, 01, 35,
A0, D8, 01, 02,
A0, D5, 01, 0A,
- A0, 98, 01, 01
+ A0, 98, 01, 03,
+ A0, B2, 01, 19
}
###############################################################################
@@ -257,7 +259,7 @@
###############################################################################
# White list of Hosts
# This values will be the Hosts(NFCEEs) in the HCI Network.
-DEVICE_HOST_WHITE_LIST={C0, 80}
+DEVICE_HOST_WHITE_LIST={C0, 02}
###############################################################################
# Extended APDU length for ISO_DEP
@@ -277,7 +279,7 @@
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each EE (ESE/SIM)
OFF_HOST_ESE_PIPE_ID=0x19
-OFF_HOST_SIM_PIPE_ID=0x70
+OFF_HOST_SIM_PIPE_ID=0x0A
###############################################################################
#Set the Felica T3T System Code Power state :
@@ -285,9 +287,9 @@
# bit pos 0 = Switch On
# bit pos 1 = Switch Off
# bit pos 2 = Battery Off
-# bit pos 3 = Screen On lock
-# bit pos 4 = Screen off unlock
+# bit pos 3 = Screen off unlock
+# bit pos 4 = Screen On lock
# bit pos 5 = Screen Off lock
-DEFAULT_SYS_CODE_PWR_STATE=0x39
+DEFAULT_SYS_CODE_PWR_STATE=0x3B
###############################################################################
\ No newline at end of file
diff --git a/halimpl/tml/phTmlNfc.cc b/halimpl/tml/phTmlNfc.cc
index 87ec71f..b8d7628 100755
--- a/halimpl/tml/phTmlNfc.cc
+++ b/halimpl/tml/phTmlNfc.cc
@@ -43,7 +43,6 @@
phTmlNfc_Context_t* gpphTmlNfc_Context = NULL;
/* Local Function prototypes */
static NFCSTATUS phTmlNfc_StartThread(void);
-static void phTmlNfc_CleanUp(void);
static void phTmlNfc_ReadDeferredCb(void* pParams);
static void phTmlNfc_WriteDeferredCb(void* pParams);
static void * phTmlNfc_TmlThread(void* pParam);
@@ -543,7 +542,7 @@
** Returns None
**
*******************************************************************************/
-static void phTmlNfc_CleanUp(void) {
+void phTmlNfc_CleanUp(void) {
if (NULL == gpphTmlNfc_Context) {
return;
}
@@ -606,7 +605,6 @@
}
NXPLOG_TML_D("bThreadDone == 0");
- phTmlNfc_CleanUp();
} else {
wShutdownStatus = PHNFCSTVAL(CID_NFC_TML, NFCSTATUS_NOT_INITIALISED);
}
@@ -975,3 +973,20 @@
phTmlNfc_i2cfragmentation_t phTmlNfc_get_fragmentation_enabled() {
return fragmentation_enabled;
}
+
+/*******************************************************************************
+**
+** Function phTmlNfc_Shutdown_CleanUp
+**
+** Description wrapper function for shutdown and cleanup of resources
+**
+** Parameters None
+**
+** Returns NFCSTATUS
+**
+*******************************************************************************/
+NFCSTATUS phTmlNfc_Shutdown_CleanUp() {
+ NFCSTATUS wShutdownStatus = phTmlNfc_Shutdown();
+ phTmlNfc_CleanUp();
+ return wShutdownStatus;
+}
diff --git a/halimpl/tml/phTmlNfc.h b/halimpl/tml/phTmlNfc.h
old mode 100644
new mode 100755
index 03cde41..16c6c70
--- a/halimpl/tml/phTmlNfc.h
+++ b/halimpl/tml/phTmlNfc.h
@@ -210,6 +210,8 @@
/* Function declarations */
NFCSTATUS phTmlNfc_Init(pphTmlNfc_Config_t pConfig);
NFCSTATUS phTmlNfc_Shutdown(void);
+NFCSTATUS phTmlNfc_Shutdown_CleanUp();
+void phTmlNfc_CleanUp(void);
NFCSTATUS phTmlNfc_Write(uint8_t* pBuffer, uint16_t wLength,
pphTmlNfc_TransactCompletionCb_t pTmlWriteComplete,
void* pContext);
diff --git a/halimpl/utils/phNxpConfig.h b/halimpl/utils/phNxpConfig.h
index db6c770..e6931e2 100755
--- a/halimpl/utils/phNxpConfig.h
+++ b/halimpl/utils/phNxpConfig.h
@@ -103,6 +103,7 @@
#define NAME_OFF_HOST_SIM_PIPE_ID "OFF_HOST_SIM_PIPE_ID"
#define NAME_NFA_PROPRIETARY_CFG "NFA_PROPRIETARY_CFG"
#define NAME_PRESENCE_CHECK_ALGORITHM "PRESENCE_CHECK_ALGORITHM"
+#define NAME_NXP_PHASE_TIRM_OFFSET_SIGN_UPDATE "NXP_PHASE_TIRM_OFFSET_SIGN_UPDATE"
/* default configuration */
#define default_storage_location "/data/vendor/nfc"
