MLK-12748-3 imx: adjust imx7d lpddr3 lpsr exit flow
On i.MX7D lpddr3, retention mode exit flow should restore
more registers to make sure the ddr controller and ddr phy
settings restored properly, otherwise, some of the boards
can NOT pass memtester after retention mode exited.
For LPSR mode, ddr resume flow is same as retention mode,
just adjust it accordingly.
Change-Id: I6ef16964ef71e7f290f0b415019ef2a65498ab49
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
diff --git a/board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S b/board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S
index fbcd682..aaf65c2 100644
--- a/board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S
+++ b/board/freescale/mx7d_12x12_lpddr3_arm2/plugin.S
@@ -151,7 +151,7 @@
str r7, [r3, r6]
ldr r6, =0x108
- ldr r7, =0x03060707
+ ldr r7, =0x03060708
str r7, [r3, r6]
ldr r6, =0x10c
@@ -174,6 +174,10 @@
ldr r7, =0x00000202
str r7, [r3, r6]
+ ldr r6, =0x120
+ ldr r7, =0x00000202
+ str r7, [r3, r6]
+
ldr r6, =0x180
ldr r7, =0x00600018
str r7, [r3, r6]
@@ -198,6 +202,10 @@
ldr r7, =0x00171717
str r7, [r3, r6]
+ ldr r6, =0x210
+ ldr r7, =0xF00
+ str r7, [r3, r6]
+
ldr r6, =0x214
ldr r7, =0x05050505
str r7, [r3, r6]
@@ -267,6 +275,10 @@
ldr r7, =0x0007080C
str r7, [r4, r6]
+ ldr r6, =0xb0
+ ldr r7, =0x1010007e
+ str r7, [r4, r6]
+
ldr r7, [r1, #0x800]
and r7, r7, #0xFF
cmp r7, #0x11
