nrsh1 is written before tmp321 is read, so needs to be earlyclobber

Otherwise, the compiler is allowed to put them in the same register
under the assumption that all inputs are read before any
(non-earlyclobber) output is written, which in this case would result
in nrsh2 being corrupted.

BUG=3439
R=aluebs@webrtc.org, ljubomir.papuga@gmail.com

Review URL: https://webrtc-codereview.appspot.com/16089004

git-svn-id: http://webrtc.googlecode.com/svn/trunk@6700 4adac7df-926f-26a2-2b94-8c16560cd09d
diff --git a/webrtc/modules/audio_processing/aecm/aecm_core_mips.c b/webrtc/modules/audio_processing/aecm/aecm_core_mips.c
index 31f232b..4c925ca 100644
--- a/webrtc/modules/audio_processing/aecm/aecm_core_mips.c
+++ b/webrtc/modules/audio_processing/aecm/aecm_core_mips.c
@@ -1485,7 +1485,7 @@
       "mul    %[tmp321],  %[tmp321],      %[tmp161]               \n\t"
       "sra    %[nrsh1],   %[tmp32],       14                      \n\t"
       "sra    %[nrsh2],   %[tmp321],      14                      \n\t"
-      : [nrsh1] "=r" (nrsh1), [nrsh2] "=r" (nrsh2)
+      : [nrsh1] "=&r" (nrsh1), [nrsh2] "=r" (nrsh2)
       : [tmp16] "r" (tmp16), [tmp161] "r" (tmp161), [tmp32] "r" (tmp32),
         [tmp321] "r" (tmp321)
       : "memory", "hi", "lo"