It has long been assumed that host and guest architectures
are the same - even though the initial design goal was likely
different allowing a cross-valgrind of sorts. But as Julian
put it:
But it's been 12+ years and I've never once heard any mention of
such a thing. So perhaps it's time to give up on that one.
Now let's take advantage of this decision and tighten up the VEX
API using Addr instead of Addr64. As a first step move the definition
of Addr into VEX proper and change the chase_into_ok callback
accordingly.
git-svn-id: svn://svn.valgrind.org/vex/trunk@3050 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest_amd64_defs.h b/priv/guest_amd64_defs.h
index 5f95482..494f366 100644
--- a/priv/guest_amd64_defs.h
+++ b/priv/guest_amd64_defs.h
@@ -51,7 +51,7 @@
bb_to_IR.h. */
extern
DisResult disInstr_AMD64 ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_amd64_toIR.c b/priv/guest_amd64_toIR.c
index 7011668..135ab18 100644
--- a/priv/guest_amd64_toIR.c
+++ b/priv/guest_amd64_toIR.c
@@ -19329,7 +19329,7 @@
Long dis_ESC_NONE (
/*MB_OUT*/DisResult* dres,
/*MB_OUT*/Bool* expect_CAS,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -19745,7 +19745,7 @@
&& vex_control.guest_chase_cond
&& (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta < 0
- && resteerOkFn( callback_opaque, d64) ) {
+ && resteerOkFn( callback_opaque, (Addr64)d64) ) {
/* Speculation: assume this backward branch is taken. So we
need to emit a side-exit to the insn following this one,
on the negation of the condition, and continue at the
@@ -20834,7 +20834,7 @@
if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
d64 = (guest_RIP_bbstart+delta+sz) + getSDisp(sz,delta);
delta += sz;
- if (resteerOkFn(callback_opaque,d64)) {
+ if (resteerOkFn(callback_opaque, (Addr64)d64)) {
dres->whatNext = Dis_ResteerU;
dres->continueAt = d64;
} else {
@@ -20851,7 +20851,7 @@
if (haveF2(pfx)) DIP("bnd ; "); /* MPX bnd prefix. */
d64 = (guest_RIP_bbstart+delta+1) + getSDisp8(delta);
delta++;
- if (resteerOkFn(callback_opaque,d64)) {
+ if (resteerOkFn(callback_opaque, (Addr64)d64)) {
dres->whatNext = Dis_ResteerU;
dres->continueAt = d64;
} else {
@@ -21040,7 +21040,7 @@
Long dis_ESC_0F (
/*MB_OUT*/DisResult* dres,
/*MB_OUT*/Bool* expect_CAS,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -21287,7 +21287,7 @@
&& vex_control.guest_chase_cond
&& (Addr64)d64 != (Addr64)guest_RIP_bbstart
&& jmpDelta < 0
- && resteerOkFn( callback_opaque, d64) ) {
+ && resteerOkFn( callback_opaque, (Addr64)d64) ) {
/* Speculation: assume this backward branch is taken. So
we need to emit a side-exit to the insn following this
one, on the negation of the condition, and continue at
@@ -22006,7 +22006,7 @@
static
Long dis_ESC_0F38 (
/*MB_OUT*/DisResult* dres,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -22091,7 +22091,7 @@
static
Long dis_ESC_0F3A (
/*MB_OUT*/DisResult* dres,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -23394,7 +23394,7 @@
Long dis_ESC_0F__VEX (
/*MB_OUT*/DisResult* dres,
/*OUT*/ Bool* uses_vvvv,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -27396,7 +27396,7 @@
Long dis_ESC_0F38__VEX (
/*MB_OUT*/DisResult* dres,
/*OUT*/ Bool* uses_vvvv,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -29557,7 +29557,7 @@
Long dis_ESC_0F3A__VEX (
/*MB_OUT*/DisResult* dres,
/*OUT*/ Bool* uses_vvvv,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const VexArchInfo* archinfo,
@@ -31144,7 +31144,7 @@
static
DisResult disInstr_AMD64_WRK (
/*OUT*/Bool* expect_CAS,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
Long delta64,
@@ -31779,7 +31779,7 @@
is located in host memory at &guest_code[delta]. */
DisResult disInstr_AMD64 ( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/guest_arm64_defs.h b/priv/guest_arm64_defs.h
index 3014bac..1b52aa7 100644
--- a/priv/guest_arm64_defs.h
+++ b/priv/guest_arm64_defs.h
@@ -41,7 +41,7 @@
bb_to_IR.h. */
extern
DisResult disInstr_ARM64 ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_arm64_toIR.c b/priv/guest_arm64_toIR.c
index b8751ea..6cc8472 100644
--- a/priv/guest_arm64_toIR.c
+++ b/priv/guest_arm64_toIR.c
@@ -12787,7 +12787,7 @@
static
Bool disInstr_ARM64_WRK (
/*MB_OUT*/DisResult* dres,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_instr,
@@ -12966,7 +12966,7 @@
is located in host memory at &guest_code[delta]. */
DisResult disInstr_ARM64 ( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/guest_arm_defs.h b/priv/guest_arm_defs.h
index b91af1d..c03f261 100644
--- a/priv/guest_arm_defs.h
+++ b/priv/guest_arm_defs.h
@@ -43,7 +43,7 @@
bb_to_IR.h. */
extern
DisResult disInstr_ARM ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_arm_toIR.c b/priv/guest_arm_toIR.c
index 5c63619..1da4ddd 100644
--- a/priv/guest_arm_toIR.c
+++ b/priv/guest_arm_toIR.c
@@ -14587,7 +14587,7 @@
static
DisResult disInstr_ARM_WRK (
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_instr,
@@ -15551,7 +15551,7 @@
if (condT == IRTemp_INVALID) {
/* unconditional transfer to 'dst'. See if we can simply
continue tracing at the destination. */
- if (resteerOkFn( callback_opaque, (Addr64)dst )) {
+ if (resteerOkFn( callback_opaque, dst )) {
/* yes */
dres.whatNext = Dis_ResteerU;
dres.continueAt = (Addr64)dst;
@@ -15574,7 +15574,7 @@
&& resteerCisOk
&& vex_control.guest_chase_cond
&& dst < guest_R15_curr_instr_notENC
- && resteerOkFn( callback_opaque, (Addr64)(Addr32)dst) ) {
+ && resteerOkFn( callback_opaque, dst) ) {
/* Speculation: assume this backward branch is taken. So
we need to emit a side-exit to the insn following this
one, on the negation of the condition, and continue at
@@ -15594,8 +15594,7 @@
&& vex_control.guest_chase_cond
&& dst >= guest_R15_curr_instr_notENC
&& resteerOkFn( callback_opaque,
- (Addr64)(Addr32)
- (guest_R15_curr_instr_notENC+4)) ) {
+ guest_R15_curr_instr_notENC+4) ) {
/* Speculation: assume this forward branch is not taken.
So we need to emit a side-exit to dst (the dest) and
continue disassembling at the insn immediately
@@ -17419,7 +17418,7 @@
static
DisResult disInstr_THUMB_WRK (
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_instr,
@@ -22015,7 +22014,7 @@
is located in host memory at &guest_code[delta]. */
DisResult disInstr_ARM ( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/guest_generic_bb_to_IR.c b/priv/guest_generic_bb_to_IR.c
index d3c0ede..cd17fda 100644
--- a/priv/guest_generic_bb_to_IR.c
+++ b/priv/guest_generic_bb_to_IR.c
@@ -97,7 +97,7 @@
static ULong genericg_compute_checksum_8al_12 ( HWord first_w64 );
/* Small helpers */
-static Bool const_False ( void* callback_opaque, Addr64 a ) {
+static Bool const_False ( void* callback_opaque, Addr a ) {
return False;
}
@@ -185,7 +185,7 @@
/*IN*/ DisOneInstrFn dis_instr_fn,
/*IN*/ const UChar* guest_code,
/*IN*/ Addr64 guest_IP_bbstart,
- /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
+ /*IN*/ Bool (*chase_into_ok)(void*,Addr),
/*IN*/ VexEndness host_endness,
/*IN*/ Bool sigill_diag,
/*IN*/ VexArch arch_guest,
@@ -214,7 +214,7 @@
IRConst* guest_IP_bbstart_IRConst = NULL;
Int n_cond_resteers_allowed = 2;
- Bool (*resteerOKfn)(void*,Addr64) = NULL;
+ Bool (*resteerOKfn)(void*,Addr) = NULL;
debug_print = toBool(vex_traceflags & VEX_TRACE_FE);
diff --git a/priv/guest_generic_bb_to_IR.h b/priv/guest_generic_bb_to_IR.h
index 93ad0f1..7bf65cf 100644
--- a/priv/guest_generic_bb_to_IR.h
+++ b/priv/guest_generic_bb_to_IR.h
@@ -124,7 +124,7 @@
/* Return True iff resteering to the given addr is allowed (for
branches/calls to destinations that are known at JIT-time) */
- /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ /*IN*/ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
/* Should we speculatively resteer across conditional branches?
(Experimental and not enabled by default). The strategy is
@@ -175,7 +175,7 @@
/*IN*/ DisOneInstrFn dis_instr_fn,
/*IN*/ const UChar* guest_code,
/*IN*/ Addr64 guest_IP_bbstart,
- /*IN*/ Bool (*chase_into_ok)(void*,Addr64),
+ /*IN*/ Bool (*chase_into_ok)(void*,Addr),
/*IN*/ VexEndness host_endness,
/*IN*/ Bool sigill_diag,
/*IN*/ VexArch arch_guest,
diff --git a/priv/guest_mips_defs.h b/priv/guest_mips_defs.h
index 3a1ee94..7cc2f88 100644
--- a/priv/guest_mips_defs.h
+++ b/priv/guest_mips_defs.h
@@ -42,7 +42,7 @@
/* Convert one MIPS insn to IR. See the type DisOneInstrFn in bb_to_IR.h. */
extern DisResult disInstr_MIPS ( IRSB* irbb,
- Bool (*resteerOkFn) (void *, Addr64),
+ Bool (*resteerOkFn) (void *, Addr),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_mips_toIR.c b/priv/guest_mips_toIR.c
index e40b717..92c64af 100644
--- a/priv/guest_mips_toIR.c
+++ b/priv/guest_mips_toIR.c
@@ -2064,7 +2064,7 @@
/*--- Branch Instructions for mips64 ---*/
/*********************************************************/
static Bool dis_instr_branch ( UInt theInstr, DisResult * dres,
- Bool(*resteerOkFn) (void *, Addr64),
+ Bool(*resteerOkFn) (void *, Addr),
void *callback_opaque, IRStmt ** set )
{
UInt jmpKind = 0;
@@ -12008,7 +12008,7 @@
here. */
static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *,
- Addr64),
+ Addr),
Bool resteerCisOk,
void* callback_opaque,
Long delta64,
@@ -17282,7 +17282,7 @@
/* Disassemble a single instruction into IR. The instruction
is located in host memory at &guest_code[delta]. */
DisResult disInstr_MIPS( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void *, Addr64 ),
+ Bool (*resteerOkFn) ( void *, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/guest_ppc_defs.h b/priv/guest_ppc_defs.h
index b8798cf..19cdcbe 100644
--- a/priv/guest_ppc_defs.h
+++ b/priv/guest_ppc_defs.h
@@ -52,7 +52,7 @@
bb_to_IR.h. */
extern
DisResult disInstr_PPC ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_ppc_toIR.c b/priv/guest_ppc_toIR.c
index f4d0af3..e603b6e 100644
--- a/priv/guest_ppc_toIR.c
+++ b/priv/guest_ppc_toIR.c
@@ -5686,7 +5686,7 @@
static Bool dis_branch ( UInt theInstr,
const VexAbiInfo* vbi,
/*OUT*/DisResult* dres,
- Bool (*resteerOkFn)(void*,Addr64),
+ Bool (*resteerOkFn)(void*,Addr),
void* callback_opaque )
{
UChar opc1 = ifieldOPC(theInstr);
@@ -18298,7 +18298,7 @@
static Bool dis_transactional_memory ( UInt theInstr, UInt nextInstr,
const VexAbiInfo* vbi,
/*OUT*/DisResult* dres,
- Bool (*resteerOkFn)(void*,Addr64),
+ Bool (*resteerOkFn)(void*,Addr),
void* callback_opaque )
{
UInt opc2 = IFIELD( theInstr, 1, 10 );
@@ -18701,7 +18701,7 @@
static
DisResult disInstr_PPC_WRK (
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
Long delta64,
@@ -20182,7 +20182,7 @@
is located in host memory at &guest_code[delta]. */
DisResult disInstr_PPC ( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/guest_s390_defs.h b/priv/guest_s390_defs.h
index 3baecec..de2cb6e 100644
--- a/priv/guest_s390_defs.h
+++ b/priv/guest_s390_defs.h
@@ -41,7 +41,7 @@
/* Convert one s390 insn to IR. See the type DisOneInstrFn in
bb_to_IR.h. */
DisResult disInstr_S390 ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_s390_toIR.c b/priv/guest_s390_toIR.c
index 3c985ef..98d7805 100644
--- a/priv/guest_s390_toIR.c
+++ b/priv/guest_s390_toIR.c
@@ -71,7 +71,7 @@
static DisResult *dis_res;
/* Resteer function and callback data */
-static Bool (*resteer_fn)(void *, Addr64);
+static Bool (*resteer_fn)(void *, Addr);
static void *resteer_data;
/* Whether to print diagnostics for illegal instructions. */
@@ -16658,7 +16658,7 @@
DisResult
disInstr_S390(IRSB *irsb_IN,
- Bool (*resteerOkFn)(void *, Addr64),
+ Bool (*resteerOkFn)(void *, Addr),
Bool resteerCisOk,
void *callback_opaque,
const UChar *guest_code,
diff --git a/priv/guest_x86_defs.h b/priv/guest_x86_defs.h
index e3c2ecc..802b767 100644
--- a/priv/guest_x86_defs.h
+++ b/priv/guest_x86_defs.h
@@ -51,7 +51,7 @@
bb_to_IR.h. */
extern
DisResult disInstr_X86 ( IRSB* irbb,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code,
diff --git a/priv/guest_x86_toIR.c b/priv/guest_x86_toIR.c
index 12a96c9..893fcac 100644
--- a/priv/guest_x86_toIR.c
+++ b/priv/guest_x86_toIR.c
@@ -8061,7 +8061,7 @@
static
DisResult disInstr_X86_WRK (
/*OUT*/Bool* expect_CAS,
- Bool (*resteerOkFn) ( /*opaque*/void*, Addr64 ),
+ Bool (*resteerOkFn) ( /*opaque*/void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
Long delta64,
@@ -13078,7 +13078,7 @@
assign(t1, binop(Iop_Sub32, getIReg(4,R_ESP), mkU32(4)));
putIReg(4, R_ESP, mkexpr(t1));
storeLE( mkexpr(t1), mkU32(guest_EIP_bbstart+delta));
- if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32 )) {
+ if (resteerOkFn( callback_opaque, (Addr32)d32 )) {
/* follow into the call target. */
dres.whatNext = Dis_ResteerU;
dres.continueAt = (Addr64)(Addr32)d32;
@@ -13393,7 +13393,7 @@
case 0xEB: /* Jb (jump, byte offset) */
d32 = (((Addr32)guest_EIP_bbstart)+delta+1) + getSDisp8(delta);
delta++;
- if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
+ if (resteerOkFn( callback_opaque, (Addr32)d32) ) {
dres.whatNext = Dis_ResteerU;
dres.continueAt = (Addr64)(Addr32)d32;
} else {
@@ -13407,7 +13407,7 @@
vassert(sz == 4); /* JRS added 2004 July 11 */
d32 = (((Addr32)guest_EIP_bbstart)+delta+sz) + getSDisp(sz,delta);
delta += sz;
- if (resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
+ if (resteerOkFn( callback_opaque, (Addr32)d32) ) {
dres.whatNext = Dis_ResteerU;
dres.continueAt = (Addr64)(Addr32)d32;
} else {
@@ -13443,7 +13443,7 @@
&& vex_control.guest_chase_cond
&& (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta < 0
- && resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
+ && resteerOkFn( callback_opaque, (Addr32)d32) ) {
/* Speculation: assume this backward branch is taken. So we
need to emit a side-exit to the insn following this one,
on the negation of the condition, and continue at the
@@ -13465,7 +13465,7 @@
&& (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque,
- (Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) {
+ (Addr32)(guest_EIP_bbstart+delta)) ) {
/* Speculation: assume this forward branch is not taken. So
we need to emit a side-exit to d32 (the dest) and continue
disassembling at the insn immediately following this
@@ -15007,7 +15007,7 @@
&& vex_control.guest_chase_cond
&& (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta < 0
- && resteerOkFn( callback_opaque, (Addr64)(Addr32)d32) ) {
+ && resteerOkFn( callback_opaque, (Addr32)d32) ) {
/* Speculation: assume this backward branch is taken. So
we need to emit a side-exit to the insn following this
one, on the negation of the condition, and continue at
@@ -15030,7 +15030,7 @@
&& (Addr32)d32 != (Addr32)guest_EIP_bbstart
&& jmpDelta >= 0
&& resteerOkFn( callback_opaque,
- (Addr64)(Addr32)(guest_EIP_bbstart+delta)) ) {
+ (Addr32)(guest_EIP_bbstart+delta)) ) {
/* Speculation: assume this forward branch is not taken.
So we need to emit a side-exit to d32 (the dest) and
continue disassembling at the insn immediately
@@ -15408,7 +15408,7 @@
is located in host memory at &guest_code[delta]. */
DisResult disInstr_X86 ( IRSB* irsb_IN,
- Bool (*resteerOkFn) ( void*, Addr64 ),
+ Bool (*resteerOkFn) ( void*, Addr ),
Bool resteerCisOk,
void* callback_opaque,
const UChar* guest_code_IN,
diff --git a/priv/main_main.c b/priv/main_main.c
index 7dc538e..12f641d 100644
--- a/priv/main_main.c
+++ b/priv/main_main.c
@@ -167,6 +167,8 @@
vassert(sizeof(void*) == 4 || sizeof(void*) == 8);
vassert(sizeof(void*) == sizeof(int*));
vassert(sizeof(void*) == sizeof(HWord));
+ vassert(sizeof(void*) == sizeof(Addr));
+ vassert(sizeof(unsigned long) == sizeof(SizeT));
vassert(VEX_HOST_WORDSIZE == sizeof(void*));
vassert(VEX_HOST_WORDSIZE == sizeof(HWord));
diff --git a/pub/libvex.h b/pub/libvex.h
index bf8fad0..3a5220c 100644
--- a/pub/libvex.h
+++ b/pub/libvex.h
@@ -609,7 +609,7 @@
/* Is it OK to chase into this guest address? May not be
NULL. */
- Bool (*chase_into_ok) ( /*callback_opaque*/void*, Addr64 );
+ Bool (*chase_into_ok) ( /*callback_opaque*/void*, Addr );
/* OUT: which bits of guest code actually got translated */
VexGuestExtents* guest_extents;
diff --git a/pub/libvex_basictypes.h b/pub/libvex_basictypes.h
index 68ba30a..b62281e 100644
--- a/pub/libvex_basictypes.h
+++ b/pub/libvex_basictypes.h
@@ -132,6 +132,10 @@
typedef UInt Addr32;
typedef ULong Addr64;
+/* An address: 32-bit or 64-bit wide depending on host architecture */
+typedef unsigned long Addr;
+
+
/* Something which has the same size as void* on the host. That is,
it is 32 bits on a 32-bit host and 64 bits on a 64-bit host, and so
it can safely be coerced to and from a pointer type on the host
