commit ac0c92bd3ff8700c78166e38ed602bfbc6acce6b
author sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Wed May 07 09:20:59 2014 +0000
committer sewardj <sewardj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Wed May 07 09:20:59 2014 +0000
tree 1ded65a34f2a8285cc5d10913d30c46fcf91defd
parent 1955143979d8ce1b229b5431001a3b19cc97a950

Handle IRStmt::STle of type F32.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2855 8f6e269a-dfd6-0310-a8e1-e2731360e62c

priv/host_arm64_isel.c

diff --git a/priv/host_arm64_isel.c b/priv/host_arm64_isel.c
index 45641d9..c54c973 100644
--- a/priv/host_arm64_isel.c
+++ b/priv/host_arm64_isel.c
@@ -6345,6 +6345,12 @@
          addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, addr, 0));
          return;
       }
+      if (tyd == Ity_F32) {
+         HReg sD   = iselFltExpr(env, stmt->Ist.Store.data);
+         HReg addr = iselIntExpr_R(env, stmt->Ist.Store.addr);
+         addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, sD, addr, 0));
+         return;
+      }
 
 //ZZ       if (tyd == Ity_I16) {
 //ZZ          HReg       rD = iselIntExpr_R(env, stmt->Ist.Store.data);