blob: 568076349a6b7e1698b83b2d37f9625e9a67855b [file] [log] [blame]
#include <stdio.h>
#include <assert.h>
#include <malloc.h> // memalign
#include <string.h> // memset
#include <math.h> // isnormal
typedef unsigned char UChar;
typedef unsigned short int UShort;
typedef unsigned int UInt;
typedef signed int Int;
typedef unsigned char UChar;
typedef unsigned long long int ULong;
typedef unsigned char Bool;
#define False ((Bool)0)
#define True ((Bool)1)
#define ITERS 1
typedef
enum { TySF=1234, TyDF, TyB, TyH, TyS, TyD, TyNONE }
LaneTy;
union _V128 {
UChar u8[16];
UShort u16[8];
UInt u32[4];
ULong u64[2];
float f32[4];
double f64[2];
};
typedef union _V128 V128;
static inline UChar randUChar ( void )
{
static UInt seed = 80021;
seed = 1103515245 * seed + 12345;
return (seed >> 17) & 0xFF;
}
static ULong randULong ( LaneTy ty )
{
Int i;
ULong r = 0;
for (i = 0; i < 8; i++) {
r = (r << 8) | (ULong)(0xFF & randUChar());
}
return r;
}
/* Generates a random V128. Ensures that that it contains normalised
FP numbers when viewed as either F32x4 or F64x2, so that it is
reasonable to use in FP test cases. */
static void randV128 ( /*OUT*/V128* v, LaneTy ty )
{
static UInt nCalls = 0, nIters = 0;
Int i;
nCalls++;
while (1) {
nIters++;
for (i = 0; i < 16; i++) {
v->u8[i] = randUChar();
}
if (isnormal(v->f32[0]) && isnormal(v->f32[1]) && isnormal(v->f32[2])
&& isnormal(v->f32[3]) && isnormal(v->f64[0]) && isnormal(v->f64[1]))
break;
}
if (0 == (nCalls & 0xFF))
printf("randV128: %u calls, %u iters\n", nCalls, nIters);
}
static void showV128 ( V128* v )
{
Int i;
for (i = 15; i >= 0; i--)
printf("%02x", (Int)v->u8[i]);
}
__attribute__((unused))
static void* memalign16(size_t szB)
{
void* x;
x = memalign(16, szB);
assert(x);
assert(0 == ((16-1) & (unsigned long)x));
return x;
}
/* ---------------------------------------------------------------- */
/* -- Test functions -- */
/* ---------------------------------------------------------------- */
/* Note this also sets the destination register to a known value (0x55..55)
since it can sometimes be an input to the instruction too. */
#define GEN_UNARY_TEST(INSN,SUFFIXD,SUFFIXN) \
__attribute__((noinline)) \
static void test_##INSN##_##SUFFIXD##_##SUFFIXN ( LaneTy ty ) { \
Int i; \
for (i = 0; i < ITERS; i++) { \
V128 block[2+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q7, [%0, #0] ; " \
"ldr q8, [%0, #16] ; " \
#INSN " v8." #SUFFIXD ", v7." #SUFFIXN " ; " \
"str q8, [%0, #16] ; " \
"mrs x30, fpsr ; str x30, [%0, #32] " \
: : "r"(&block[0]) : "memory", "v7", "v8", "x30" \
); \
printf(#INSN " v8." #SUFFIXD ", v7." #SUFFIXN); \
UInt fpsr = 0xFFFFFF60 & block[2].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" fpsr=%08x\n", fpsr); \
} \
}
/* Note this also sets the destination register to a known value (0x55..55)
since it can sometimes be an input to the instruction too. */
#define GEN_BINARY_TEST(INSN,SUFFIXD,SUFFIXN,SUFFIXM) \
__attribute__((noinline)) \
static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##SUFFIXM ( LaneTy ty ) { \
Int i; \
for (i = 0; i < ITERS; i++) { \
V128 block[3+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
randV128(&block[2], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q7, [%0, #0] ; " \
"ldr q8, [%0, #16] ; " \
"ldr q9, [%0, #32] ; " \
#INSN " v9." #SUFFIXD ", v7." #SUFFIXN ", v8." #SUFFIXM " ; " \
"str q9, [%0, #32] ; " \
"mrs x30, fpsr ; str x30, [%0, #48] " \
: : "r"(&block[0]) : "memory", "v7", "v8", "v9", "x30" \
); \
printf(#INSN " v9." #SUFFIXD \
", v7." #SUFFIXN ", v8." #SUFFIXM " "); \
UInt fpsr = 0xFFFFFF60 & block[3].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" "); \
showV128(&block[2]); printf(" fpsr=%08x\n", fpsr); \
} \
}
/* Note this also sets the destination register to a known value (0x55..55)
since it can sometimes be an input to the instruction too. */
#define GEN_SHIFT_TEST(INSN,SUFFIXD,SUFFIXN,AMOUNT) \
__attribute__((noinline)) \
static void test_##INSN##_##SUFFIXD##_##SUFFIXN##_##AMOUNT ( LaneTy ty ) { \
Int i; \
for (i = 0; i < ITERS; i++) { \
V128 block[2+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q7, [%0, #0] ; " \
"ldr q8, [%0, #16] ; " \
#INSN " v8." #SUFFIXD ", v7." #SUFFIXN ", #" #AMOUNT " ; " \
"str q8, [%0, #16] ; " \
"mrs x30, fpsr ; str x30, [%0, #32] " \
: : "r"(&block[0]) : "memory", "v7", "v8", "x30" \
); \
printf(#INSN " v8." #SUFFIXD ", v7." #SUFFIXN ", #" #AMOUNT " "); \
UInt fpsr = 0xFFFFFF60 & block[2].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" fpsr=%08x\n", fpsr); \
} \
}
/* Generate a test that involves one integer reg and one vector reg,
with no bias as towards which is input or output. */
#define GEN_ONEINT_ONEVEC_TEST(TESTNAME,INSN,INTREGNO,VECREGNO) \
__attribute__((noinline)) \
static void test_##TESTNAME ( LaneTy ty ) { \
Int i; \
assert(INTREGNO != 30); \
for (i = 0; i < ITERS; i++) { \
V128 block[4+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
randV128(&block[2], ty); \
randV128(&block[3], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q"#VECREGNO", [%0, #0] ; " \
"ldr x"#INTREGNO", [%0, #16] ; " \
INSN " ; " \
"str q"#VECREGNO", [%0, #32] ; " \
"str x"#INTREGNO", [%0, #48] ; " \
"mrs x30, fpsr ; str x30, [%0, #64] " \
: : "r"(&block[0]) : "memory", "v"#VECREGNO, "x"#INTREGNO, "x30" \
); \
printf(INSN " "); \
UInt fpsr = 0xFFFFFF60 & block[4].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" "); \
showV128(&block[2]); printf(" "); \
showV128(&block[3]); printf(" fpsr=%08x\n", fpsr); \
} \
}
/* Generate a test that involves two vector regs,
with no bias as towards which is input or output.
It's OK to use x10 as scratch.*/
#define GEN_TWOVEC_TEST(TESTNAME,INSN,VECREG1NO,VECREG2NO) \
__attribute__((noinline)) \
static void test_##TESTNAME ( LaneTy ty ) { \
Int i; \
for (i = 0; i < ITERS; i++) { \
V128 block[4+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
randV128(&block[2], ty); \
randV128(&block[3], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q"#VECREG1NO", [%0, #0] ; " \
"ldr q"#VECREG2NO", [%0, #16] ; " \
INSN " ; " \
"str q"#VECREG1NO", [%0, #32] ; " \
"str q"#VECREG2NO", [%0, #48] ; " \
"mrs x30, fpsr ; str x30, [%0, #64] " \
: : "r"(&block[0]) \
: "memory", "v"#VECREG1NO, "v"#VECREG2NO, "x10", "x30" \
); \
printf(INSN " "); \
UInt fpsr = 0xFFFFFF60 & block[4].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" "); \
showV128(&block[2]); printf(" "); \
showV128(&block[3]); printf(" fpsr=%08x\n", fpsr); \
} \
}
/* Generate a test that involves three vector regs,
with no bias as towards which is input or output. It's also OK
to use v16, v17, v18 as scratch. */
#define GEN_THREEVEC_TEST(TESTNAME,INSN,VECREG1NO,VECREG2NO,VECREG3NO) \
__attribute__((noinline)) \
static void test_##TESTNAME ( LaneTy ty ) { \
Int i; \
for (i = 0; i < ITERS; i++) { \
V128 block[6+1]; \
memset(block, 0x55, sizeof(block)); \
randV128(&block[0], ty); \
randV128(&block[1], ty); \
randV128(&block[2], ty); \
randV128(&block[3], ty); \
randV128(&block[4], ty); \
randV128(&block[5], ty); \
__asm__ __volatile__( \
"mov x30, #0 ; msr fpsr, x30 ; " \
"ldr q"#VECREG1NO", [%0, #0] ; " \
"ldr q"#VECREG2NO", [%0, #16] ; " \
"ldr q"#VECREG3NO", [%0, #32] ; " \
INSN " ; " \
"str q"#VECREG1NO", [%0, #48] ; " \
"str q"#VECREG2NO", [%0, #64] ; " \
"str q"#VECREG3NO", [%0, #80] ; " \
"mrs x30, fpsr ; str x30, [%0, #96] " \
: : "r"(&block[0]) \
: "memory", "v"#VECREG1NO, "v"#VECREG2NO, "v"#VECREG3NO, \
"v16", "v17", "v18", "x30" \
); \
printf(INSN " "); \
UInt fpsr = 0xFFFFFF60 & block[6].u32[0]; \
showV128(&block[0]); printf(" "); \
showV128(&block[1]); printf(" "); \
showV128(&block[2]); printf(" "); \
showV128(&block[3]); printf(" "); \
showV128(&block[4]); printf(" "); \
showV128(&block[5]); printf(" fpsr=%08x\n", fpsr); \
} \
}
void test_UMINV ( void )
{
int i;
V128 block[2];
/* -- 4s -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyS);
randV128(&block[1], TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"uminv s8, v7.4s ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMINV v8, v7.4s ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"uminv h8, v7.8h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMINV h8, v7.8h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 4h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"uminv h8, v7.4h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMINV h8, v7.4h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 16b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"uminv b8, v7.16b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMINV b8, v7.16b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"uminv b8, v7.8b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMINV b8, v7.8b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
}
void test_UMAXV ( void )
{
int i;
V128 block[2];
/* -- 4s -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyS);
randV128(&block[1], TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"umaxv s8, v7.4s ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMAXV v8, v7.4s ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"umaxv h8, v7.8h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMAXV h8, v7.8h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 4h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"umaxv h8, v7.4h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMAXV h8, v7.4h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 16b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"umaxv b8, v7.16b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMAXV b8, v7.16b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"umaxv b8, v7.8b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("UMAXV b8, v7.8b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
}
void test_INS_general ( void )
{
V128 block[3];
/* -- D[0..1] -- */
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyD);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.d[0], x19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.u64[0],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyD);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.d[1], x19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.d[1],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
/* -- S[0..3] -- */
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.s[0], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.s[0],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.s[1], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.s[1],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.s[2], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.s[2],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.s[3], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.s[3],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
/* -- H[0..7] -- */
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[0], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[0],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[1], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[1],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[2], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[2],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[3], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[3],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[4], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[4],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[5], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[5],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[6], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[6],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.h[7], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.h[7],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
/* -- B[0,15] -- */
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.b[0], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.b[0],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
memset(&block, 0x55, sizeof(block));
block[1].u64[0] = randULong(TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"ldr x19, [%0, #16] ; "
"ins v7.b[15], w19 ; "
"str q7, [%0, #32] "
: : "r"(&block[0]) : "memory", "x19", "v7"
);
printf("INS v7.b[15],x19 ");
showV128(&block[0]); printf(" %016llx ", block[1].u64[0]);
showV128(&block[2]); printf("\n");
}
void test_SMINV ( void )
{
int i;
V128 block[2];
/* -- 4s -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyS);
randV128(&block[1], TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"sminv s8, v7.4s ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMINV v8, v7.4s ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"sminv h8, v7.8h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMINV h8, v7.8h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 4h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"sminv h8, v7.4h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMINV h8, v7.4h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 16b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"sminv b8, v7.16b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMINV b8, v7.16b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"sminv b8, v7.8b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMINV b8, v7.8b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
}
void test_SMAXV ( void )
{
int i;
V128 block[2];
/* -- 4s -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyS);
randV128(&block[1], TyS);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"smaxv s8, v7.4s ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMAXV v8, v7.4s ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"smaxv h8, v7.8h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMAXV h8, v7.8h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 4h -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyH);
randV128(&block[1], TyH);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"smaxv h8, v7.4h ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMAXV h8, v7.4h ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 16b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"smaxv b8, v7.16b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMAXV b8, v7.16b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
/* -- 8b -- */
for (i = 0; i < 10; i++) {
memset(&block, 0x55, sizeof(block));
randV128(&block[0], TyB);
randV128(&block[1], TyB);
__asm__ __volatile__(
"ldr q7, [%0, #0] ; "
"smaxv b8, v7.8b ; "
"str q8, [%0, #16] "
: : "r"(&block[0]) : "memory", "v7", "v8"
);
printf("SMAXV b8, v7.8b ");
showV128(&block[0]); printf(" ");
showV128(&block[1]); printf("\n");
}
}
GEN_BINARY_TEST(umax, 4s, 4s, 4s)
GEN_BINARY_TEST(umax, 2s, 2s, 2s)
GEN_BINARY_TEST(umax, 8h, 8h, 8h)
GEN_BINARY_TEST(umax, 4h, 4h, 4h)
GEN_BINARY_TEST(umax, 16b, 16b, 16b)
GEN_BINARY_TEST(umax, 8b, 8b, 8b)
GEN_BINARY_TEST(umin, 4s, 4s, 4s)
GEN_BINARY_TEST(umin, 2s, 2s, 2s)
GEN_BINARY_TEST(umin, 8h, 8h, 8h)
GEN_BINARY_TEST(umin, 4h, 4h, 4h)
GEN_BINARY_TEST(umin, 16b, 16b, 16b)
GEN_BINARY_TEST(umin, 8b, 8b, 8b)
GEN_BINARY_TEST(smax, 4s, 4s, 4s)
GEN_BINARY_TEST(smax, 2s, 2s, 2s)
GEN_BINARY_TEST(smax, 8h, 8h, 8h)
GEN_BINARY_TEST(smax, 4h, 4h, 4h)
GEN_BINARY_TEST(smax, 16b, 16b, 16b)
GEN_BINARY_TEST(smax, 8b, 8b, 8b)
GEN_BINARY_TEST(smin, 4s, 4s, 4s)
GEN_BINARY_TEST(smin, 2s, 2s, 2s)
GEN_BINARY_TEST(smin, 8h, 8h, 8h)
GEN_BINARY_TEST(smin, 4h, 4h, 4h)
GEN_BINARY_TEST(smin, 16b, 16b, 16b)
GEN_BINARY_TEST(smin, 8b, 8b, 8b)
GEN_BINARY_TEST(add, 2d, 2d, 2d)
GEN_BINARY_TEST(add, 4s, 4s, 4s)
GEN_BINARY_TEST(add, 2s, 2s, 2s)
GEN_BINARY_TEST(add, 8h, 8h, 8h)
GEN_BINARY_TEST(add, 4h, 4h, 4h)
GEN_BINARY_TEST(add, 16b, 16b, 16b)
GEN_BINARY_TEST(add, 8b, 8b, 8b)
GEN_BINARY_TEST(sub, 2d, 2d, 2d)
GEN_BINARY_TEST(sub, 4s, 4s, 4s)
GEN_BINARY_TEST(sub, 2s, 2s, 2s)
GEN_BINARY_TEST(sub, 8h, 8h, 8h)
GEN_BINARY_TEST(sub, 4h, 4h, 4h)
GEN_BINARY_TEST(sub, 16b, 16b, 16b)
GEN_BINARY_TEST(sub, 8b, 8b, 8b)
GEN_BINARY_TEST(mul, 4s, 4s, 4s)
GEN_BINARY_TEST(mul, 2s, 2s, 2s)
GEN_BINARY_TEST(mul, 8h, 8h, 8h)
GEN_BINARY_TEST(mul, 4h, 4h, 4h)
GEN_BINARY_TEST(mul, 16b, 16b, 16b)
GEN_BINARY_TEST(mul, 8b, 8b, 8b)
GEN_BINARY_TEST(mla, 4s, 4s, 4s)
GEN_BINARY_TEST(mla, 2s, 2s, 2s)
GEN_BINARY_TEST(mla, 8h, 8h, 8h)
GEN_BINARY_TEST(mla, 4h, 4h, 4h)
GEN_BINARY_TEST(mla, 16b, 16b, 16b)
GEN_BINARY_TEST(mla, 8b, 8b, 8b)
GEN_BINARY_TEST(mls, 4s, 4s, 4s)
GEN_BINARY_TEST(mls, 2s, 2s, 2s)
GEN_BINARY_TEST(mls, 8h, 8h, 8h)
GEN_BINARY_TEST(mls, 4h, 4h, 4h)
GEN_BINARY_TEST(mls, 16b, 16b, 16b)
GEN_BINARY_TEST(mls, 8b, 8b, 8b)
GEN_BINARY_TEST(and, 16b, 16b, 16b)
GEN_BINARY_TEST(and, 8b, 8b, 8b)
GEN_BINARY_TEST(bic, 16b, 16b, 16b)
GEN_BINARY_TEST(bic, 8b, 8b, 8b)
GEN_BINARY_TEST(orr, 16b, 16b, 16b)
GEN_BINARY_TEST(orr, 8b, 8b, 8b)
GEN_BINARY_TEST(orn, 16b, 16b, 16b)
GEN_BINARY_TEST(orn, 8b, 8b, 8b)
GEN_BINARY_TEST(eor, 16b, 16b, 16b)
GEN_BINARY_TEST(eor, 8b, 8b, 8b)
GEN_BINARY_TEST(bsl, 16b, 16b, 16b)
GEN_BINARY_TEST(bsl, 8b, 8b, 8b)
GEN_BINARY_TEST(bit, 16b, 16b, 16b)
GEN_BINARY_TEST(bit, 8b, 8b, 8b)
GEN_BINARY_TEST(bif, 16b, 16b, 16b)
GEN_BINARY_TEST(bif, 8b, 8b, 8b)
GEN_BINARY_TEST(cmeq, 2d, 2d, 2d)
GEN_BINARY_TEST(cmeq, 4s, 4s, 4s)
GEN_BINARY_TEST(cmeq, 2s, 2s, 2s)
GEN_BINARY_TEST(cmeq, 8h, 8h, 8h)
GEN_BINARY_TEST(cmeq, 4h, 4h, 4h)
GEN_BINARY_TEST(cmeq, 16b, 16b, 16b)
GEN_BINARY_TEST(cmeq, 8b, 8b, 8b)
GEN_BINARY_TEST(cmtst, 2d, 2d, 2d)
GEN_BINARY_TEST(cmtst, 4s, 4s, 4s)
GEN_BINARY_TEST(cmtst, 2s, 2s, 2s)
GEN_BINARY_TEST(cmtst, 8h, 8h, 8h)
GEN_BINARY_TEST(cmtst, 4h, 4h, 4h)
GEN_BINARY_TEST(cmtst, 16b, 16b, 16b)
GEN_BINARY_TEST(cmtst, 8b, 8b, 8b)
GEN_BINARY_TEST(cmhi, 2d, 2d, 2d)
GEN_BINARY_TEST(cmhi, 4s, 4s, 4s)
GEN_BINARY_TEST(cmhi, 2s, 2s, 2s)
GEN_BINARY_TEST(cmhi, 8h, 8h, 8h)
GEN_BINARY_TEST(cmhi, 4h, 4h, 4h)
GEN_BINARY_TEST(cmhi, 16b, 16b, 16b)
GEN_BINARY_TEST(cmhi, 8b, 8b, 8b)
GEN_BINARY_TEST(cmgt, 2d, 2d, 2d)
GEN_BINARY_TEST(cmgt, 4s, 4s, 4s)
GEN_BINARY_TEST(cmgt, 2s, 2s, 2s)
GEN_BINARY_TEST(cmgt, 8h, 8h, 8h)
GEN_BINARY_TEST(cmgt, 4h, 4h, 4h)
GEN_BINARY_TEST(cmgt, 16b, 16b, 16b)
GEN_BINARY_TEST(cmgt, 8b, 8b, 8b)
GEN_BINARY_TEST(cmhs, 2d, 2d, 2d)
GEN_BINARY_TEST(cmhs, 4s, 4s, 4s)
GEN_BINARY_TEST(cmhs, 2s, 2s, 2s)
GEN_BINARY_TEST(cmhs, 8h, 8h, 8h)
GEN_BINARY_TEST(cmhs, 4h, 4h, 4h)
GEN_BINARY_TEST(cmhs, 16b, 16b, 16b)
GEN_BINARY_TEST(cmhs, 8b, 8b, 8b)
GEN_BINARY_TEST(cmge, 2d, 2d, 2d)
GEN_BINARY_TEST(cmge, 4s, 4s, 4s)
GEN_BINARY_TEST(cmge, 2s, 2s, 2s)
GEN_BINARY_TEST(cmge, 8h, 8h, 8h)
GEN_BINARY_TEST(cmge, 4h, 4h, 4h)
GEN_BINARY_TEST(cmge, 16b, 16b, 16b)
GEN_BINARY_TEST(cmge, 8b, 8b, 8b)
GEN_SHIFT_TEST(ushr, 2d, 2d, 1)
GEN_SHIFT_TEST(ushr, 2d, 2d, 13)
GEN_SHIFT_TEST(ushr, 2d, 2d, 64)
GEN_SHIFT_TEST(sshr, 2d, 2d, 1)
GEN_SHIFT_TEST(sshr, 2d, 2d, 13)
GEN_SHIFT_TEST(sshr, 2d, 2d, 64)
GEN_SHIFT_TEST(shl, 2d, 2d, 0)
GEN_SHIFT_TEST(shl, 2d, 2d, 13)
GEN_SHIFT_TEST(shl, 2d, 2d, 63)
GEN_SHIFT_TEST(ushr, 4s, 4s, 1)
GEN_SHIFT_TEST(ushr, 4s, 4s, 13)
GEN_SHIFT_TEST(ushr, 4s, 4s, 32)
GEN_SHIFT_TEST(sshr, 4s, 4s, 1)
GEN_SHIFT_TEST(sshr, 4s, 4s, 13)
GEN_SHIFT_TEST(sshr, 4s, 4s, 32)
GEN_SHIFT_TEST(shl, 4s, 4s, 0)
GEN_SHIFT_TEST(shl, 4s, 4s, 13)
GEN_SHIFT_TEST(shl, 4s, 4s, 31)
GEN_SHIFT_TEST(ushr, 2s, 2s, 1)
GEN_SHIFT_TEST(ushr, 2s, 2s, 13)
GEN_SHIFT_TEST(ushr, 2s, 2s, 32)
GEN_SHIFT_TEST(sshr, 2s, 2s, 1)
GEN_SHIFT_TEST(sshr, 2s, 2s, 13)
GEN_SHIFT_TEST(sshr, 2s, 2s, 32)
GEN_SHIFT_TEST(shl, 2s, 2s, 0)
GEN_SHIFT_TEST(shl, 2s, 2s, 13)
GEN_SHIFT_TEST(shl, 2s, 2s, 31)
GEN_SHIFT_TEST(ushr, 8h, 8h, 1)
GEN_SHIFT_TEST(ushr, 8h, 8h, 13)
GEN_SHIFT_TEST(ushr, 8h, 8h, 16)
GEN_SHIFT_TEST(sshr, 8h, 8h, 1)
GEN_SHIFT_TEST(sshr, 8h, 8h, 13)
GEN_SHIFT_TEST(sshr, 8h, 8h, 16)
GEN_SHIFT_TEST(shl, 8h, 8h, 0)
GEN_SHIFT_TEST(shl, 8h, 8h, 13)
GEN_SHIFT_TEST(shl, 8h, 8h, 15)
GEN_SHIFT_TEST(ushr, 4h, 4h, 1)
GEN_SHIFT_TEST(ushr, 4h, 4h, 13)
GEN_SHIFT_TEST(ushr, 4h, 4h, 16)
GEN_SHIFT_TEST(sshr, 4h, 4h, 1)
GEN_SHIFT_TEST(sshr, 4h, 4h, 13)
GEN_SHIFT_TEST(sshr, 4h, 4h, 16)
GEN_SHIFT_TEST(shl, 4h, 4h, 0)
GEN_SHIFT_TEST(shl, 4h, 4h, 13)
GEN_SHIFT_TEST(shl, 4h, 4h, 15)
GEN_SHIFT_TEST(ushr, 16b, 16b, 1)
GEN_SHIFT_TEST(ushr, 16b, 16b, 8)
GEN_SHIFT_TEST(sshr, 16b, 16b, 1)
GEN_SHIFT_TEST(sshr, 16b, 16b, 8)
GEN_SHIFT_TEST(shl, 16b, 16b, 0)
GEN_SHIFT_TEST(shl, 16b, 16b, 7)
GEN_SHIFT_TEST(ushr, 8b, 8b, 1)
GEN_SHIFT_TEST(ushr, 8b, 8b, 8)
GEN_SHIFT_TEST(sshr, 8b, 8b, 1)
GEN_SHIFT_TEST(sshr, 8b, 8b, 8)
GEN_SHIFT_TEST(shl, 8b, 8b, 0)
GEN_SHIFT_TEST(shl, 8b, 8b, 7)
GEN_SHIFT_TEST(ushll, 2d, 2s, 0)
GEN_SHIFT_TEST(ushll, 2d, 2s, 15)
GEN_SHIFT_TEST(ushll, 2d, 2s, 31)
GEN_SHIFT_TEST(ushll2, 2d, 4s, 0)
GEN_SHIFT_TEST(ushll2, 2d, 4s, 15)
GEN_SHIFT_TEST(ushll2, 2d, 4s, 31)
GEN_SHIFT_TEST(ushll, 4s, 4h, 0)
GEN_SHIFT_TEST(ushll, 4s, 4h, 7)
GEN_SHIFT_TEST(ushll, 4s, 4h, 15)
GEN_SHIFT_TEST(ushll2, 4s, 8h, 0)
GEN_SHIFT_TEST(ushll2, 4s, 8h, 7)
GEN_SHIFT_TEST(ushll2, 4s, 8h, 15)
GEN_SHIFT_TEST(ushll, 8h, 8b, 0)
GEN_SHIFT_TEST(ushll, 8h, 8b, 3)
GEN_SHIFT_TEST(ushll, 8h, 8b, 7)
GEN_SHIFT_TEST(ushll2, 8h, 16b, 0)
GEN_SHIFT_TEST(ushll2, 8h, 16b, 3)
GEN_SHIFT_TEST(ushll2, 8h, 16b, 7)
GEN_SHIFT_TEST(sshll, 2d, 2s, 0)
GEN_SHIFT_TEST(sshll, 2d, 2s, 15)
GEN_SHIFT_TEST(sshll, 2d, 2s, 31)
GEN_SHIFT_TEST(sshll2, 2d, 4s, 0)
GEN_SHIFT_TEST(sshll2, 2d, 4s, 15)
GEN_SHIFT_TEST(sshll2, 2d, 4s, 31)
GEN_SHIFT_TEST(sshll, 4s, 4h, 0)
GEN_SHIFT_TEST(sshll, 4s, 4h, 7)
GEN_SHIFT_TEST(sshll, 4s, 4h, 15)
GEN_SHIFT_TEST(sshll2, 4s, 8h, 0)
GEN_SHIFT_TEST(sshll2, 4s, 8h, 7)
GEN_SHIFT_TEST(sshll2, 4s, 8h, 15)
GEN_SHIFT_TEST(sshll, 8h, 8b, 0)
GEN_SHIFT_TEST(sshll, 8h, 8b, 3)
GEN_SHIFT_TEST(sshll, 8h, 8b, 7)
GEN_SHIFT_TEST(sshll2, 8h, 16b, 0)
GEN_SHIFT_TEST(sshll2, 8h, 16b, 3)
GEN_SHIFT_TEST(sshll2, 8h, 16b, 7)
GEN_UNARY_TEST(xtn, 2s, 2d)
GEN_UNARY_TEST(xtn2, 4s, 2d)
GEN_UNARY_TEST(xtn, 4h, 4s)
GEN_UNARY_TEST(xtn2, 8h, 4s)
GEN_UNARY_TEST(xtn, 8b, 8h)
GEN_UNARY_TEST(xtn2, 16b, 8h)
GEN_ONEINT_ONEVEC_TEST(umov_x_d0, "umov x9, v10.d[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_x_d1, "umov x9, v10.d[1]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_s0, "umov w9, v10.s[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_s3, "umov w9, v10.s[3]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_h0, "umov w9, v10.h[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_h7, "umov w9, v10.h[7]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_b0, "umov w9, v10.b[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(umov_w_b15, "umov w9, v10.b[15]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_s0, "smov x9, v10.s[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_s3, "smov x9, v10.s[3]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_h0, "smov x9, v10.h[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_h7, "smov x9, v10.h[7]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_w_h0, "smov w9, v10.h[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_w_h7, "smov w9, v10.h[7]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_b0, "smov x9, v10.b[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_x_b15, "smov x9, v10.b[15]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_w_b0, "smov w9, v10.b[0]", 9, 10)
GEN_ONEINT_ONEVEC_TEST(smov_w_b15, "smov w9, v10.b[15]", 9, 10)
GEN_TWOVEC_TEST(fcvtn_2s_2d, "fcvtn v22.2s, v23.2d", 22, 23)
GEN_TWOVEC_TEST(fcvtn_4s_2d, "fcvtn2 v22.4s, v23.2d", 22, 23)
GEN_UNARY_TEST(neg, 2d, 2d)
GEN_UNARY_TEST(neg, 4s, 4s)
GEN_UNARY_TEST(neg, 2s, 2s)
GEN_UNARY_TEST(neg, 8h, 8h)
GEN_UNARY_TEST(neg, 4h, 4h)
GEN_UNARY_TEST(neg, 16b, 16b)
GEN_UNARY_TEST(neg, 8b, 8b)
GEN_BINARY_TEST(fadd, 2d, 2d, 2d)
GEN_BINARY_TEST(fadd, 4s, 4s, 4s)
GEN_BINARY_TEST(fadd, 2s, 2s, 2s)
GEN_BINARY_TEST(fsub, 2d, 2d, 2d)
GEN_BINARY_TEST(fsub, 4s, 4s, 4s)
GEN_BINARY_TEST(fsub, 2s, 2s, 2s)
GEN_BINARY_TEST(fmul, 2d, 2d, 2d)
GEN_BINARY_TEST(fmul, 4s, 4s, 4s)
GEN_BINARY_TEST(fmul, 2s, 2s, 2s)
GEN_BINARY_TEST(fdiv, 2d, 2d, 2d)
GEN_BINARY_TEST(fdiv, 4s, 4s, 4s)
GEN_BINARY_TEST(fdiv, 2s, 2s, 2s)
GEN_BINARY_TEST(fmla, 2d, 2d, 2d)
GEN_BINARY_TEST(fmla, 4s, 4s, 4s)
GEN_BINARY_TEST(fmla, 2s, 2s, 2s)
GEN_BINARY_TEST(fmls, 2d, 2d, 2d)
GEN_BINARY_TEST(fmls, 4s, 4s, 4s)
GEN_BINARY_TEST(fmls, 2s, 2s, 2s)
GEN_BINARY_TEST(fabd, 2d, 2d, 2d)
GEN_BINARY_TEST(fabd, 4s, 4s, 4s)
GEN_BINARY_TEST(fabd, 2s, 2s, 2s)
GEN_THREEVEC_TEST(add_d_d_d, "add d21, d22, d23", 21, 22, 23)
GEN_THREEVEC_TEST(sub_d_d_d, "sub d21, d22, d23", 21, 22, 23)
/* overkill -- don't need two vecs, only one */
GEN_TWOVEC_TEST(fmov_d_imm_01, "fmov d22, #0.125", 22, 23)
GEN_TWOVEC_TEST(fmov_d_imm_02, "fmov d22, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_d_imm_03, "fmov d22, #1.0", 22, 23)
GEN_TWOVEC_TEST(fmov_s_imm_01, "fmov s22, #0.125", 22, 23)
GEN_TWOVEC_TEST(fmov_s_imm_02, "fmov s22, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_s_imm_03, "fmov s22, #-1.0", 22, 23)
GEN_ONEINT_ONEVEC_TEST(fmov_s_w, "fmov s7, w15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(fmov_d_x, "fmov d7, x15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(fmov_d1_x, "fmov v7.d[1], x15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(fmov_w_s, "fmov w15, s7", 15, 7)
GEN_ONEINT_ONEVEC_TEST(fmov_x_d, "fmov x15, d7", 15, 7)
GEN_ONEINT_ONEVEC_TEST(fmov_x_d1, "fmov x15, v7.d[1]", 15, 7)
GEN_TWOVEC_TEST(fmov_2d_imm_01, "fmov v22.2d, #0.125", 22, 23)
GEN_TWOVEC_TEST(fmov_2d_imm_02, "fmov v22.2d, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_2d_imm_03, "fmov v22.2d, #1.0", 22, 23)
GEN_TWOVEC_TEST(fmov_4s_imm_01, "fmov v22.4s, #0.125", 22, 23)
GEN_TWOVEC_TEST(fmov_4s_imm_02, "fmov v22.4s, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_4s_imm_03, "fmov v22.4s, #1.0", 22, 23)
GEN_TWOVEC_TEST(fmov_2s_imm_01, "fmov v22.2s, #0.125", 22, 23)
GEN_TWOVEC_TEST(fmov_2s_imm_02, "fmov v22.2s, #-4.0", 22, 23)
GEN_TWOVEC_TEST(fmov_2s_imm_03, "fmov v22.2s, #1.0", 22, 23)
GEN_ONEINT_ONEVEC_TEST(scvtf_s_w, "scvtf s7, w15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(scvtf_d_w, "scvtf d7, w15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(scvtf_s_x, "scvtf s7, x15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(scvtf_d_x, "scvtf d7, x15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(ucvtf_s_w, "ucvtf s7, w15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(ucvtf_d_w, "ucvtf d7, w15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(ucvtf_s_x, "ucvtf s7, x15", 15, 7)
GEN_ONEINT_ONEVEC_TEST(ucvtf_d_x, "ucvtf d7, x15", 15, 7)
GEN_THREEVEC_TEST(fmul_2d_2d_d0, "fmul v2.2d, v11.2d, v29.d[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2d_2d_d1, "fmul v2.2d, v11.2d, v29.d[1]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_4s_4s_s0, "fmul v2.4s, v11.4s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_4s_4s_s3, "fmul v2.4s, v11.4s, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2s_2s_s0, "fmul v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_2s_2s_s3, "fmul v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(fadd_d_d_d, "fadd d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fadd_s_s_s, "fadd s2, s11, s29", 2, 11, 29)
GEN_THREEVEC_TEST(fsub_d_d_d, "fsub d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fsub_s_s_s, "fsub s2, s11, s29", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_d_d_d, "fmul d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fmul_s_s_s, "fmul s2, s11, s29", 2, 11, 29)
GEN_THREEVEC_TEST(fdiv_d_d_d, "fdiv d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fdiv_s_s_s, "fdiv s2, s11, s29", 2, 11, 29)
GEN_THREEVEC_TEST(fnmul_d_d_d, "fnmul d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fnmul_s_s_s, "fnmul s2, s11, s29", 2, 11, 29)
GEN_THREEVEC_TEST(fabd_d_d_d, "fabd d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(fabd_s_s_s, "fabd s2, s11, s29", 2, 11, 29)
GEN_TWOVEC_TEST(fmov_d_d, "fmov d22, d23", 22, 23)
GEN_TWOVEC_TEST(fmov_s_s, "fmov s22, s23", 22, 23)
GEN_TWOVEC_TEST(fabs_d_d, "fabs d22, d23", 22, 23)
GEN_TWOVEC_TEST(fabs_s_s, "fabs s22, s23", 22, 23)
GEN_TWOVEC_TEST(fneg_d_d, "fneg d22, d23", 22, 23)
GEN_TWOVEC_TEST(fneg_s_s, "fneg s22, s23", 22, 23)
GEN_TWOVEC_TEST(fsqrt_d_d, "fsqrt d22, d23", 22, 23)
GEN_TWOVEC_TEST(fsqrt_s_s, "fsqrt s22, s23", 22, 23)
GEN_UNARY_TEST(fneg, 2d, 2d)
GEN_UNARY_TEST(fneg, 4s, 4s)
GEN_UNARY_TEST(fneg, 2s, 2s)
GEN_UNARY_TEST(fabs, 2d, 2d)
GEN_UNARY_TEST(fabs, 4s, 4s)
GEN_UNARY_TEST(fabs, 2s, 2s)
GEN_BINARY_TEST(fcmeq, 2d, 2d, 2d)
GEN_BINARY_TEST(fcmeq, 4s, 4s, 4s)
GEN_BINARY_TEST(fcmeq, 2s, 2s, 2s)
GEN_BINARY_TEST(fcmge, 2d, 2d, 2d)
GEN_BINARY_TEST(fcmge, 4s, 4s, 4s)
GEN_BINARY_TEST(fcmge, 2s, 2s, 2s)
GEN_BINARY_TEST(fcmgt, 2d, 2d, 2d)
GEN_BINARY_TEST(fcmgt, 4s, 4s, 4s)
GEN_BINARY_TEST(fcmgt, 2s, 2s, 2s)
GEN_BINARY_TEST(facge, 2d, 2d, 2d)
GEN_BINARY_TEST(facge, 4s, 4s, 4s)
GEN_BINARY_TEST(facge, 2s, 2s, 2s)
GEN_BINARY_TEST(facgt, 2d, 2d, 2d)
GEN_BINARY_TEST(facgt, 4s, 4s, 4s)
GEN_BINARY_TEST(facgt, 2s, 2s, 2s)
// Uses v15 as the first table entry
GEN_THREEVEC_TEST(
tbl_16b_1reg, "tbl v21.16b, {v15.16b}, v23.16b", 21, 15, 23)
// and v15 ^ v21 as the second table entry
GEN_THREEVEC_TEST(
tbl_16b_2reg, "eor v16.16b, v15.16b, v21.16b ; "
"tbl v21.16b, {v15.16b, v16.16b}, v23.16b", 21, 15, 23)
// and v15 ^ v23 as the third table entry
GEN_THREEVEC_TEST(
tbl_16b_3reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"tbl v21.16b, {v15.16b, v16.16b, v17.16b}, v23.16b",
21, 15, 23)
// and v21 ^ v23 as the fourth table entry
GEN_THREEVEC_TEST(
tbl_16b_4reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"eor v18.16b, v21.16b, v23.16b ; "
"tbl v21.16b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.16b",
21, 15, 23)
// Same register scheme for tbl .8b, tbx .16b, tbx.8b
GEN_THREEVEC_TEST(
tbl_8b_1reg, "tbl v21.8b, {v15.16b}, v23.8b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbl_8b_2reg, "eor v16.16b, v15.16b, v21.16b ; "
"tbl v21.8b, {v15.16b, v16.16b}, v23.8b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbl_8b_3reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"tbl v21.8b, {v15.16b, v16.16b, v17.16b}, v23.8b",
21, 15, 23)
GEN_THREEVEC_TEST(
tbl_8b_4reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"eor v18.16b, v21.16b, v23.16b ; "
"tbl v21.8b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.8b",
21, 15, 23)
GEN_THREEVEC_TEST(
tbx_16b_1reg, "tbx v21.16b, {v15.16b}, v23.16b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbx_16b_2reg, "eor v16.16b, v15.16b, v21.16b ; "
"tbx v21.16b, {v15.16b, v16.16b}, v23.16b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbx_16b_3reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"tbx v21.16b, {v15.16b, v16.16b, v17.16b}, v23.16b",
21, 15, 23)
GEN_THREEVEC_TEST(
tbx_16b_4reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"eor v18.16b, v21.16b, v23.16b ; "
"tbx v21.16b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.16b",
21, 15, 23)
// Same register scheme for tbx .8b, tbx .16b, tbx.8b
GEN_THREEVEC_TEST(
tbx_8b_1reg, "tbx v21.8b, {v15.16b}, v23.8b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbx_8b_2reg, "eor v16.16b, v15.16b, v21.16b ; "
"tbx v21.8b, {v15.16b, v16.16b}, v23.8b", 21, 15, 23)
GEN_THREEVEC_TEST(
tbx_8b_3reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"tbx v21.8b, {v15.16b, v16.16b, v17.16b}, v23.8b",
21, 15, 23)
GEN_THREEVEC_TEST(
tbx_8b_4reg, "eor v16.16b, v15.16b, v21.16b ; "
"eor v17.16b, v15.16b, v23.16b ; "
"eor v18.16b, v21.16b, v23.16b ; "
"tbx v21.8b, {v15.16b, v16.16b, v17.16b, v18.16b}, v23.8b",
21, 15, 23)
GEN_TWOVEC_TEST(cmge_zero_2d_2d, "cmge v5.2d, v22.2d, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_4s_4s, "cmge v5.4s, v22.4s, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_2s_2s, "cmge v5.2s, v22.2s, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_8h_8h, "cmge v5.8h, v22.8h, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_4h_4h, "cmge v5.4h, v22.4h, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_16b_16b, "cmge v5.16b, v22.16b, #0", 5, 22)
GEN_TWOVEC_TEST(cmge_zero_8b_8b, "cmge v5.8b, v22.8b, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_2d_2d, "cmgt v5.2d, v22.2d, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_4s_4s, "cmgt v5.4s, v22.4s, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_2s_2s, "cmgt v5.2s, v22.2s, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_8h_8h, "cmgt v5.8h, v22.8h, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_4h_4h, "cmgt v5.4h, v22.4h, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_16b_16b, "cmgt v5.16b, v22.16b, #0", 5, 22)
GEN_TWOVEC_TEST(cmgt_zero_8b_8b, "cmgt v5.8b, v22.8b, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_2d_2d, "cmle v5.2d, v22.2d, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_4s_4s, "cmle v5.4s, v22.4s, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_2s_2s, "cmle v5.2s, v22.2s, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_8h_8h, "cmle v5.8h, v22.8h, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_4h_4h, "cmle v5.4h, v22.4h, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_16b_16b, "cmle v5.16b, v22.16b, #0", 5, 22)
GEN_TWOVEC_TEST(cmle_zero_8b_8b, "cmle v5.8b, v22.8b, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_2d_2d, "cmeq v5.2d, v22.2d, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_4s_4s, "cmeq v5.4s, v22.4s, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_2s_2s, "cmeq v5.2s, v22.2s, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_8h_8h, "cmeq v5.8h, v22.8h, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_4h_4h, "cmeq v5.4h, v22.4h, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_16b_16b, "cmeq v5.16b, v22.16b, #0", 5, 22)
GEN_TWOVEC_TEST(cmeq_zero_8b_8b, "cmeq v5.8b, v22.8b, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_2d_2d, "cmlt v5.2d, v22.2d, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_4s_4s, "cmlt v5.4s, v22.4s, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_2s_2s, "cmlt v5.2s, v22.2s, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_8h_8h, "cmlt v5.8h, v22.8h, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_4h_4h, "cmlt v5.4h, v22.4h, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_16b_16b, "cmlt v5.16b, v22.16b, #0", 5, 22)
GEN_TWOVEC_TEST(cmlt_zero_8b_8b, "cmlt v5.8b, v22.8b, #0", 5, 22)
GEN_TWOVEC_TEST(abs_d_d, "abs d22, d23", 22, 23)
GEN_TWOVEC_TEST(neg_d_d, "neg d22, d23", 22, 23)
GEN_UNARY_TEST(abs, 2d, 2d)
GEN_UNARY_TEST(abs, 4s, 4s)
GEN_UNARY_TEST(abs, 2s, 2s)
GEN_UNARY_TEST(abs, 8h, 8h)
GEN_UNARY_TEST(abs, 4h, 4h)
GEN_UNARY_TEST(abs, 16b, 16b)
GEN_UNARY_TEST(abs, 8b, 8b)
GEN_BINARY_TEST(addhn, 2s, 2d, 2d)
GEN_BINARY_TEST(addhn2, 4s, 2d, 2d)
GEN_BINARY_TEST(addhn, 4h, 4s, 4s)
GEN_BINARY_TEST(addhn2, 8h, 4s, 4s)
GEN_BINARY_TEST(addhn, 8b, 8h, 8h)
GEN_BINARY_TEST(addhn2, 16b, 8h, 8h)
GEN_BINARY_TEST(subhn, 2s, 2d, 2d)
GEN_BINARY_TEST(subhn2, 4s, 2d, 2d)
GEN_BINARY_TEST(subhn, 4h, 4s, 4s)
GEN_BINARY_TEST(subhn2, 8h, 4s, 4s)
GEN_BINARY_TEST(subhn, 8b, 8h, 8h)
GEN_BINARY_TEST(subhn2, 16b, 8h, 8h)
GEN_BINARY_TEST(raddhn, 2s, 2d, 2d)
GEN_BINARY_TEST(raddhn2, 4s, 2d, 2d)
GEN_BINARY_TEST(raddhn, 4h, 4s, 4s)
GEN_BINARY_TEST(raddhn2, 8h, 4s, 4s)
GEN_BINARY_TEST(raddhn, 8b, 8h, 8h)
GEN_BINARY_TEST(raddhn2, 16b, 8h, 8h)
GEN_BINARY_TEST(rsubhn, 2s, 2d, 2d)
GEN_BINARY_TEST(rsubhn2, 4s, 2d, 2d)
GEN_BINARY_TEST(rsubhn, 4h, 4s, 4s)
GEN_BINARY_TEST(rsubhn2, 8h, 4s, 4s)
GEN_BINARY_TEST(rsubhn, 8b, 8h, 8h)
GEN_BINARY_TEST(rsubhn2, 16b, 8h, 8h)
GEN_TWOVEC_TEST(addp_d_2d, "addp d22, v23.2d", 22, 23)
GEN_BINARY_TEST(addp, 2d, 2d, 2d)
GEN_BINARY_TEST(addp, 4s, 4s, 4s)
GEN_BINARY_TEST(addp, 2s, 2s, 2s)
GEN_BINARY_TEST(addp, 8h, 8h, 8h)
GEN_BINARY_TEST(addp, 4h, 4h, 4h)
GEN_BINARY_TEST(addp, 16b, 16b, 16b)
GEN_BINARY_TEST(addp, 8b, 8b, 8b)
GEN_TWOVEC_TEST(addv_s_4s, "addv s22, v23.4s", 22, 23)
GEN_TWOVEC_TEST(addv_h_8h, "addv h22, v23.8h", 22, 23)
GEN_TWOVEC_TEST(addv_h_4h, "addv h22, v23.4h", 22, 23)
GEN_TWOVEC_TEST(addv_b_16b, "addv b22, v23.16b", 22, 23)
GEN_TWOVEC_TEST(addv_b_8b, "addv b22, v23.8b", 22, 23)
/* overkill -- don't need two vecs, only one */
GEN_TWOVEC_TEST(orr_8h_0x5A_lsl0, "orr v22.8h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(orr_8h_0xA5_lsl8, "orr v22.8h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(orr_4h_0x5A_lsl0, "orr v22.4h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(orr_4h_0xA5_lsl8, "orr v22.4h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(orr_4s_0x5A_lsl0, "orr v22.4s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(orr_4s_0x6B_lsl8, "orr v22.4s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(orr_4s_0x49_lsl16, "orr v22.4s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(orr_4s_0x3D_lsl24, "orr v22.4s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(orr_2s_0x5A_lsl0, "orr v22.2s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(orr_2s_0x6B_lsl8, "orr v22.2s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(orr_2s_0x49_lsl16, "orr v22.2s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(orr_2s_0x3D_lsl24, "orr v22.2s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(bic_8h_0x5A_lsl0, "bic v22.8h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(bic_8h_0xA5_lsl8, "bic v22.8h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(bic_4h_0x5A_lsl0, "bic v22.4h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(bic_4h_0xA5_lsl8, "bic v22.4h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(bic_4s_0x5A_lsl0, "bic v22.4s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(bic_4s_0x6B_lsl8, "bic v22.4s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(bic_4s_0x49_lsl16, "bic v22.4s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(bic_4s_0x3D_lsl24, "bic v22.4s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(bic_2s_0x5A_lsl0, "bic v22.2s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(bic_2s_0x6B_lsl8, "bic v22.2s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(bic_2s_0x49_lsl16, "bic v22.2s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(bic_2s_0x3D_lsl24, "bic v22.2s, #0x3D, LSL #24", 22, 23)
GEN_UNARY_TEST(cls, 4s, 4s)
GEN_UNARY_TEST(cls, 2s, 2s)
GEN_UNARY_TEST(cls, 8h, 8h)
GEN_UNARY_TEST(cls, 4h, 4h)
GEN_UNARY_TEST(cls, 16b, 16b)
GEN_UNARY_TEST(cls, 8b, 8b)
GEN_UNARY_TEST(clz, 4s, 4s)
GEN_UNARY_TEST(clz, 2s, 2s)
GEN_UNARY_TEST(clz, 8h, 8h)
GEN_UNARY_TEST(clz, 4h, 4h)
GEN_UNARY_TEST(clz, 16b, 16b)
GEN_UNARY_TEST(clz, 8b, 8b)
GEN_THREEVEC_TEST(cmeq_d_d_d, "cmeq d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(cmge_d_d_d, "cmge d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(cmgt_d_d_d, "cmgt d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(cmhi_d_d_d, "cmhi d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(cmhs_d_d_d, "cmhs d2, d11, d29", 2, 11, 29)
GEN_THREEVEC_TEST(cmtst_d_d_d, "cmtst d2, d11, d29", 2, 11, 29)
GEN_TWOVEC_TEST(cmeq_zero_d_d, "cmeq d2, d11, #0", 2, 11)
GEN_TWOVEC_TEST(cmge_zero_d_d, "cmge d2, d11, #0", 2, 11)
GEN_TWOVEC_TEST(cmgt_zero_d_d, "cmgt d2, d11, #0", 2, 11)
GEN_TWOVEC_TEST(cmle_zero_d_d, "cmle d2, d11, #0", 2, 11)
GEN_TWOVEC_TEST(cmlt_zero_d_d, "cmlt d2, d11, #0", 2, 11)
GEN_UNARY_TEST(cnt, 16b, 16b)
GEN_UNARY_TEST(cnt, 8b, 8b)
GEN_TWOVEC_TEST(dup_d_d0, "dup d22, v23.d[0]", 22, 23)
GEN_TWOVEC_TEST(dup_d_d1, "dup d22, v23.d[1]", 22, 23)
GEN_TWOVEC_TEST(dup_s_s0, "dup s22, v23.s[0]", 22, 23)
GEN_TWOVEC_TEST(dup_s_s3, "dup s22, v23.s[3]", 22, 23)
GEN_TWOVEC_TEST(dup_h_h0, "dup h22, v23.h[0]", 22, 23)
GEN_TWOVEC_TEST(dup_h_h6, "dup h22, v23.h[6]", 22, 23)
GEN_TWOVEC_TEST(dup_b_b0, "dup b0, v23.b[0]", 22, 23)
GEN_TWOVEC_TEST(dup_b_b13, "dup b13, v23.b[13]", 22, 23)
GEN_TWOVEC_TEST(dup_2d_d0, "dup v9.2d, v17.d[0]", 9, 17)
GEN_TWOVEC_TEST(dup_2d_d1, "dup v9.2d, v17.d[1]", 9, 17)
GEN_TWOVEC_TEST(dup_4s_s0, "dup v9.4s, v17.s[0]", 9, 17)
GEN_TWOVEC_TEST(dup_4s_s3, "dup v9.4s, v17.s[3]", 9, 17)
GEN_TWOVEC_TEST(dup_2s_s0, "dup v9.2s, v17.s[0]", 9, 17)
GEN_TWOVEC_TEST(dup_2s_s2, "dup v9.2s, v17.s[2]", 9, 17)
GEN_TWOVEC_TEST(dup_8h_h0, "dup v9.8h, v17.h[0]", 9, 17)
GEN_TWOVEC_TEST(dup_8h_h6, "dup v9.8h, v17.h[6]", 9, 17)
GEN_TWOVEC_TEST(dup_4h_h1, "dup v9.4h, v17.h[1]", 9, 17)
GEN_TWOVEC_TEST(dup_4h_h5, "dup v9.4h, v17.h[5]", 9, 17)
GEN_TWOVEC_TEST(dup_16b_b2, "dup v9.16b, v17.b[2]", 9, 17)
GEN_TWOVEC_TEST(dup_16b_b12, "dup v9.16b, v17.b[12]", 9, 17)
GEN_TWOVEC_TEST(dup_8b_b3, "dup v9.8b, v17.b[3]", 9, 17)
GEN_TWOVEC_TEST(dup_8b_b13, "dup v9.8b, v17.b[13]", 9, 17)
GEN_TWOVEC_TEST(dup_2d_x, "mov x10, v17.d[0]; dup v9.2d, x10", 9, 17)
GEN_TWOVEC_TEST(dup_4s_w, "mov x10, v17.d[0]; dup v9.4s, w10", 9, 17)
GEN_TWOVEC_TEST(dup_2s_w, "mov x10, v17.d[0]; dup v9.2s, w10", 9, 17)
GEN_TWOVEC_TEST(dup_8h_w, "mov x10, v17.d[0]; dup v9.8h, w10", 9, 17)
GEN_TWOVEC_TEST(dup_4h_w, "mov x10, v17.d[0]; dup v9.4h, w10", 9, 17)
GEN_TWOVEC_TEST(dup_16b_w, "mov x10, v17.d[0]; dup v9.16b, w10", 9, 17)
GEN_TWOVEC_TEST(dup_8b_w, "mov x10, v17.d[0]; dup v9.8b, w10", 9, 17)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x0,
"ext v2.16b, v11.16b, v29.16b, #0", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x1,
"ext v2.16b, v11.16b, v29.16b, #1", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x2,
"ext v2.16b, v11.16b, v29.16b, #2", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x3,
"ext v2.16b, v11.16b, v29.16b, #3", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x4,
"ext v2.16b, v11.16b, v29.16b, #4", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x5,
"ext v2.16b, v11.16b, v29.16b, #5", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x6,
"ext v2.16b, v11.16b, v29.16b, #6", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x7,
"ext v2.16b, v11.16b, v29.16b, #7", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x8,
"ext v2.16b, v11.16b, v29.16b, #8", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0x9,
"ext v2.16b, v11.16b, v29.16b, #9", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xA,
"ext v2.16b, v11.16b, v29.16b, #10", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xB,
"ext v2.16b, v11.16b, v29.16b, #11", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xC,
"ext v2.16b, v11.16b, v29.16b, #12", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xD,
"ext v2.16b, v11.16b, v29.16b, #13", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xE,
"ext v2.16b, v11.16b, v29.16b, #14", 2, 11, 29)
GEN_THREEVEC_TEST(ext_16b_16b_16b_0xF,
"ext v2.16b, v11.16b, v29.16b, #15", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x0,
"ext v2.8b, v11.8b, v29.8b, #0", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x1,
"ext v2.8b, v11.8b, v29.8b, #1", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x2,
"ext v2.8b, v11.8b, v29.8b, #2", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x3,
"ext v2.8b, v11.8b, v29.8b, #3", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x4,
"ext v2.8b, v11.8b, v29.8b, #4", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x5,
"ext v2.8b, v11.8b, v29.8b, #5", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x6,
"ext v2.8b, v11.8b, v29.8b, #6", 2, 11, 29)
GEN_THREEVEC_TEST(ext_8b_8b_8b_0x7,
"ext v2.8b, v11.8b, v29.8b, #7", 2, 11, 29)
GEN_TWOVEC_TEST(ins_d0_d0, "ins v3.d[0], v24.d[0]", 3, 24)
GEN_TWOVEC_TEST(ins_d0_d1, "ins v3.d[0], v24.d[1]", 3, 24)
GEN_TWOVEC_TEST(ins_d1_d0, "ins v3.d[1], v24.d[0]", 3, 24)
GEN_TWOVEC_TEST(ins_d1_d1, "ins v3.d[1], v24.d[1]", 3, 24)
GEN_TWOVEC_TEST(ins_s0_s2, "ins v3.s[0], v24.s[2]", 3, 24)
GEN_TWOVEC_TEST(ins_s3_s0, "ins v3.s[3], v24.s[0]", 3, 24)
GEN_TWOVEC_TEST(ins_s2_s1, "ins v3.s[2], v24.s[1]", 3, 24)
GEN_TWOVEC_TEST(ins_s1_s3, "ins v3.s[1], v24.s[3]", 3, 24)
GEN_TWOVEC_TEST(ins_h0_h6, "ins v3.h[0], v24.h[6]", 3, 24)
GEN_TWOVEC_TEST(ins_h7_h0, "ins v3.h[7], v24.h[0]", 3, 24)
GEN_TWOVEC_TEST(ins_h6_h1, "ins v3.h[6], v24.h[1]", 3, 24)
GEN_TWOVEC_TEST(ins_h1_h7, "ins v3.h[1], v24.h[7]", 3, 24)
GEN_TWOVEC_TEST(ins_b0_b14, "ins v3.b[0], v24.b[14]", 3, 24)
GEN_TWOVEC_TEST(ins_b15_b8, "ins v3.b[15], v24.b[8]", 3, 24)
GEN_TWOVEC_TEST(ins_b13_b9, "ins v3.b[13], v24.b[9]", 3, 24)
GEN_TWOVEC_TEST(ins_b5_b12, "ins v3.b[5], v24.b[12]", 3, 24)
GEN_THREEVEC_TEST(mla_4s_4s_s0, "mla v2.4s, v11.4s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mla_4s_4s_s3, "mla v2.4s, v11.4s, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(mla_2s_2s_s0, "mla v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mla_2s_2s_s3, "mla v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
// For the 'h' version of these, Rm can only be <= 15 (!)
GEN_THREEVEC_TEST(mla_8h_8h_h1, "mla v2.8h, v11.8h, v2.h[1]", 2, 11, 9)
GEN_THREEVEC_TEST(mla_8h_8h_h5, "mla v2.8h, v11.8h, v2.h[5]", 2, 11, 9)
GEN_THREEVEC_TEST(mla_4h_4h_h2, "mla v2.4h, v11.4h, v2.h[2]", 2, 11, 9)
GEN_THREEVEC_TEST(mla_4h_4h_h7, "mla v2.4h, v11.4h, v2.h[7]", 2, 11, 9)
GEN_THREEVEC_TEST(mls_4s_4s_s0, "mls v2.4s, v11.4s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mls_4s_4s_s3, "mls v2.4s, v11.4s, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(mls_2s_2s_s0, "mls v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mls_2s_2s_s3, "mls v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
// For the 'h' version of these, Rm can only be <= 15 (!)
GEN_THREEVEC_TEST(mls_8h_8h_h1, "mls v2.8h, v11.8h, v2.h[1]", 2, 11, 9)
GEN_THREEVEC_TEST(mls_8h_8h_h5, "mls v2.8h, v11.8h, v2.h[5]", 2, 11, 9)
GEN_THREEVEC_TEST(mls_4h_4h_h2, "mls v2.4h, v11.4h, v2.h[2]", 2, 11, 9)
GEN_THREEVEC_TEST(mls_4h_4h_h7, "mls v2.4h, v11.4h, v2.h[7]", 2, 11, 9)
GEN_THREEVEC_TEST(mul_4s_4s_s0, "mul v2.4s, v11.4s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mul_4s_4s_s3, "mul v2.4s, v11.4s, v29.s[3]", 2, 11, 29)
GEN_THREEVEC_TEST(mul_2s_2s_s0, "mul v2.2s, v11.2s, v29.s[0]", 2, 11, 29)
GEN_THREEVEC_TEST(mul_2s_2s_s3, "mul v2.2s, v11.2s, v29.s[3]", 2, 11, 29)
// For the 'h' version of these, Rm can only be <= 15 (!)
GEN_THREEVEC_TEST(mul_8h_8h_h1, "mul v2.8h, v11.8h, v2.h[1]", 2, 11, 9)
GEN_THREEVEC_TEST(mul_8h_8h_h5, "mul v2.8h, v11.8h, v2.h[5]", 2, 11, 9)
GEN_THREEVEC_TEST(mul_4h_4h_h2, "mul v2.4h, v11.4h, v2.h[2]", 2, 11, 9)
GEN_THREEVEC_TEST(mul_4h_4h_h7, "mul v2.4h, v11.4h, v2.h[7]", 2, 11, 9)
/* overkill -- don't need two vecs, only one */
GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0, "movi v22.8b, #0x8B, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_8h_0x5A_lsl0, "movi v22.8h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_8h_0xA5_lsl8, "movi v22.8h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_4h_0x5A_lsl0, "movi v22.4h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_4h_0xA5_lsl8, "movi v22.4h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x5A_lsl0, "movi v22.4s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x6B_lsl8, "movi v22.4s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x49_lsl16, "movi v22.4s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x3D_lsl24, "movi v22.4s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0x5A_lsl0, "movi v22.2s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0x6B_lsl8, "movi v22.2s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0x49_lsl16, "movi v22.2s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0x3D_lsl24, "movi v22.2s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x6B_msl8, "movi v22.4s, #0x6B, MSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_4s_0x94_msl16, "movi v22.4s, #0x94, MSL #16", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0x7A_msl8, "movi v22.2s, #0x7A, MSL #8", 22, 23)
GEN_TWOVEC_TEST(movi_2s_0xA5_msl16, "movi v22.2s, #0xA5, MSL #16", 22, 23)
GEN_TWOVEC_TEST(movi_d_0xA5, "movi d22, #0xFF00FF0000FF00FF", 22, 23)
GEN_TWOVEC_TEST(movi_2d_0xB4, "movi v22.2d, #0xFF00FFFF00FF0000", 22, 23)
/* overkill -- don't need two vecs, only one */
GEN_TWOVEC_TEST(mvni_8h_0x5A_lsl0, "mvni v22.8h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(mvni_8h_0xA5_lsl8, "mvni v22.8h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_4h_0x5A_lsl0, "mvni v22.4h, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(mvni_4h_0xA5_lsl8, "mvni v22.4h, #0xA5, LSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x5A_lsl0, "mvni v22.4s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x6B_lsl8, "mvni v22.4s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x49_lsl16, "mvni v22.4s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x3D_lsl24, "mvni v22.4s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0x5A_lsl0, "mvni v22.2s, #0x5A, LSL #0", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0x6B_lsl8, "mvni v22.2s, #0x6B, LSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0x49_lsl16, "mvni v22.2s, #0x49, LSL #16", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0x3D_lsl24, "mvni v22.2s, #0x3D, LSL #24", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x6B_msl8, "mvni v22.4s, #0x6B, MSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_4s_0x94_msl16, "mvni v22.4s, #0x94, MSL #16", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0x7A_msl8, "mvni v22.2s, #0x7A, MSL #8", 22, 23)
GEN_TWOVEC_TEST(mvni_2s_0xA5_msl16, "mvni v22.2s, #0xA5, MSL #16", 22, 23)
GEN_UNARY_TEST(not, 16b, 16b)
GEN_UNARY_TEST(not, 8b, 8b)
GEN_BINARY_TEST(pmul, 16b, 16b, 16b)
GEN_BINARY_TEST(pmul, 8b, 8b, 8b)
GEN_BINARY_TEST(pmull, 8h, 8b, 8b)
GEN_BINARY_TEST(pmull2, 8h, 16b, 16b)
//GEN_BINARY_TEST(pmull, 1q, 1d, 1d)
//GEN_BINARY_TEST(pmull, 1q, 2d, 2d)
GEN_UNARY_TEST(rbit, 16b, 16b)
GEN_UNARY_TEST(rbit, 8b, 8b)
GEN_UNARY_TEST(rev16, 16b, 16b)
GEN_UNARY_TEST(rev16, 8b, 8b)
GEN_UNARY_TEST(rev32, 16b, 16b)
GEN_UNARY_TEST(rev32, 8b, 8b)
GEN_UNARY_TEST(rev32, 8h, 8h)
GEN_UNARY_TEST(rev32, 4h, 4h)
GEN_UNARY_TEST(rev64, 16b, 16b)
GEN_UNARY_TEST(rev64, 8b, 8b)
GEN_UNARY_TEST(rev64, 8h, 8h)
GEN_UNARY_TEST(rev64, 4h, 4h)
GEN_UNARY_TEST(rev64, 4s, 4s)
GEN_UNARY_TEST(rev64, 2s, 2s)
GEN_BINARY_TEST(saba, 4s, 4s, 4s)
GEN_BINARY_TEST(saba, 2s, 2s, 2s)
GEN_BINARY_TEST(saba, 8h, 8h, 8h)
GEN_BINARY_TEST(saba, 4h, 4h, 4h)
GEN_BINARY_TEST(saba, 16b, 16b, 16b)
GEN_BINARY_TEST(saba, 8b, 8b, 8b)
GEN_BINARY_TEST(uaba, 4s, 4s, 4s)
GEN_BINARY_TEST(uaba, 2s, 2s, 2s)
GEN_BINARY_TEST(uaba, 8h, 8h, 8h)
GEN_BINARY_TEST(uaba, 4h, 4h, 4h)
GEN_BINARY_TEST(uaba, 16b, 16b, 16b)
GEN_BINARY_TEST(uaba, 8b, 8b, 8b)
GEN_THREEVEC_TEST(sabal_2d_2s_2s, "sabal v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(sabal2_2d_4s_4s, "sabal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(sabal_4s_4h_4h, "sabal v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(sabal2_4s_8h_8h, "sabal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(sabal_8h_8b_8b, "sabal v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(sabal2_8h_16b_16b,
"sabal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uabal_2d_2s_2s, "uabal v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uabal2_2d_4s_4s, "uabal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uabal_4s_4h_4h, "uabal v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uabal2_4s_8h_8h, "uabal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uabal_8h_8b_8b, "uabal v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uabal2_8h_16b_16b,
"uabal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_4s_4s_4s, "sabd v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_2s_2s_2s, "sabd v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_8h_8h_8h, "sabd v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_4h_4h_4h, "sabd v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_16b_16b_16b, "sabd v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(sabd_8b_8b_8b, "sabd v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_4s_4s_4s, "uabd v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_2s_2s_2s, "uabd v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_8h_8h_8h, "uabd v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_4h_4h_4h, "uabd v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_16b_16b_16b, "uabd v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uabd_8b_8b_8b, "uabd v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl_2d_2s_2s, "sabdl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl2_2d_4s_4s, "sabdl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl_4s_4h_4h, "sabdl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl2_4s_8h_8h, "sabdl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl_8h_8b_8b, "sabdl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(sabdl2_8h_16b_16b,
"sabdl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl_2d_2s_2s, "uabdl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl2_2d_4s_4s, "uabdl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl_4s_4h_4h, "uabdl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl2_4s_8h_8h, "uabdl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl_8h_8b_8b, "uabdl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uabdl2_8h_16b_16b,
"uabdl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_TWOVEC_TEST(sadalp_4h_8b, "sadalp v3.4h, v19.8b", 3, 19)
GEN_TWOVEC_TEST(sadalp_8h_16b, "sadalp v3.8h, v19.16b", 3, 19)
GEN_TWOVEC_TEST(sadalp_2s_4h, "sadalp v3.2s, v19.4h", 3, 19)
GEN_TWOVEC_TEST(sadalp_4s_8h, "sadalp v3.4s, v19.8h", 3, 19)
GEN_TWOVEC_TEST(sadalp_1d_2s, "sadalp v3.1d, v19.2s", 3, 19)
GEN_TWOVEC_TEST(sadalp_2d_4s, "sadalp v3.2d, v19.4s", 3, 19)
GEN_TWOVEC_TEST(uadalp_4h_8b, "uadalp v3.4h, v19.8b", 3, 19)
GEN_TWOVEC_TEST(uadalp_8h_16b, "uadalp v3.8h, v19.16b", 3, 19)
GEN_TWOVEC_TEST(uadalp_2s_4h, "uadalp v3.2s, v19.4h", 3, 19)
GEN_TWOVEC_TEST(uadalp_4s_8h, "uadalp v3.4s, v19.8h", 3, 19)
GEN_TWOVEC_TEST(uadalp_1d_2s, "uadalp v3.1d, v19.2s", 3, 19)
GEN_TWOVEC_TEST(uadalp_2d_4s, "uadalp v3.2d, v19.4s", 3, 19)
GEN_THREEVEC_TEST(saddl_2d_2s_2s, "saddl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(saddl2_2d_4s_4s, "saddl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(saddl_4s_4h_4h, "saddl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(saddl2_4s_8h_8h, "saddl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(saddl_8h_8b_8b, "saddl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(saddl2_8h_16b_16b,
"saddl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl_2d_2s_2s, "uaddl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl2_2d_4s_4s, "uaddl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl_4s_4h_4h, "uaddl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl2_4s_8h_8h, "uaddl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl_8h_8b_8b, "uaddl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uaddl2_8h_16b_16b,
"uaddl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl_2d_2s_2s, "ssubl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl2_2d_4s_4s, "ssubl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl_4s_4h_4h, "ssubl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl2_4s_8h_8h, "ssubl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl_8h_8b_8b, "ssubl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(ssubl2_8h_16b_16b,
"ssubl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(usubl_2d_2s_2s, "usubl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(usubl2_2d_4s_4s, "usubl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(usubl_4s_4h_4h, "usubl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(usubl2_4s_8h_8h, "usubl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(usubl_8h_8b_8b, "usubl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(usubl2_8h_16b_16b,
"usubl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_TWOVEC_TEST(saddlp_4h_8b, "saddlp v3.4h, v19.8b", 3, 19)
GEN_TWOVEC_TEST(saddlp_8h_16b, "saddlp v3.8h, v19.16b", 3, 19)
GEN_TWOVEC_TEST(saddlp_2s_4h, "saddlp v3.2s, v19.4h", 3, 19)
GEN_TWOVEC_TEST(saddlp_4s_8h, "saddlp v3.4s, v19.8h", 3, 19)
GEN_TWOVEC_TEST(saddlp_1d_2s, "saddlp v3.1d, v19.2s", 3, 19)
GEN_TWOVEC_TEST(saddlp_2d_4s, "saddlp v3.2d, v19.4s", 3, 19)
GEN_TWOVEC_TEST(uaddlp_4h_8b, "uaddlp v3.4h, v19.8b", 3, 19)
GEN_TWOVEC_TEST(uaddlp_8h_16b, "uaddlp v3.8h, v19.16b", 3, 19)
GEN_TWOVEC_TEST(uaddlp_2s_4h, "uaddlp v3.2s, v19.4h", 3, 19)
GEN_TWOVEC_TEST(uaddlp_4s_8h, "uaddlp v3.4s, v19.8h", 3, 19)
GEN_TWOVEC_TEST(uaddlp_1d_2s, "uaddlp v3.1d, v19.2s", 3, 19)
GEN_TWOVEC_TEST(uaddlp_2d_4s, "uaddlp v3.2d, v19.4s", 3, 19)
GEN_TWOVEC_TEST(saddlv_h_16b, "saddlv h3, v19.16b", 3, 19)
GEN_TWOVEC_TEST(saddlv_h_8b, "saddlv h3, v19.8b", 3, 19)
GEN_TWOVEC_TEST(saddlv_s_8h, "saddlv s3, v19.8h", 3, 19)
GEN_TWOVEC_TEST(saddlv_s_4h, "saddlv s3, v19.4h", 3, 19)
GEN_TWOVEC_TEST(saddlv_d_4s, "saddlv d3, v19.4s", 3, 19)
GEN_TWOVEC_TEST(uaddlv_h_16b, "uaddlv h3, v19.16b", 3, 19)
GEN_TWOVEC_TEST(uaddlv_h_8b, "uaddlv h3, v19.8b", 3, 19)
GEN_TWOVEC_TEST(uaddlv_s_8h, "uaddlv s3, v19.8h", 3, 19)
GEN_TWOVEC_TEST(uaddlv_s_4h, "uaddlv s3, v19.4h", 3, 19)
GEN_TWOVEC_TEST(uaddlv_d_4s, "uaddlv d3, v19.4s", 3, 19)
GEN_THREEVEC_TEST(saddw2_8h_8h_16b, "saddw2 v5.8h, v13.8h, v31.16b", 5, 13, 31)
GEN_THREEVEC_TEST(saddw_8h_8h_8b, "saddw v5.8h, v13.8h, v31.8b", 5, 13, 31)
GEN_THREEVEC_TEST(saddw2_4s_4s_8h, "saddw2 v5.4s, v13.4s, v31.8h", 5, 13, 31)
GEN_THREEVEC_TEST(saddw_4s_4s_4h, "saddw v5.4s, v13.4s, v31.4h", 5, 13, 31)
GEN_THREEVEC_TEST(saddw2_2d_2d_4s, "saddw2 v5.2d, v13.2d, v31.4s", 5, 13, 31)
GEN_THREEVEC_TEST(saddw_2d_2d_2s, "saddw v5.2d, v13.2d, v31.2s", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw2_8h_8h_16b, "uaddw2 v5.8h, v13.8h, v31.16b", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw_8h_8h_8b, "uaddw v5.8h, v13.8h, v31.8b", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw2_4s_4s_8h, "uaddw2 v5.4s, v13.4s, v31.8h", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw_4s_4s_4h, "uaddw v5.4s, v13.4s, v31.4h", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw2_2d_2d_4s, "uaddw2 v5.2d, v13.2d, v31.4s", 5, 13, 31)
GEN_THREEVEC_TEST(uaddw_2d_2d_2s, "uaddw v5.2d, v13.2d, v31.2s", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw2_8h_8h_16b, "ssubw2 v5.8h, v13.8h, v31.16b", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw_8h_8h_8b, "ssubw v5.8h, v13.8h, v31.8b", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw2_4s_4s_8h, "ssubw2 v5.4s, v13.4s, v31.8h", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw_4s_4s_4h, "ssubw v5.4s, v13.4s, v31.4h", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw2_2d_2d_4s, "ssubw2 v5.2d, v13.2d, v31.4s", 5, 13, 31)
GEN_THREEVEC_TEST(ssubw_2d_2d_2s, "ssubw v5.2d, v13.2d, v31.2s", 5, 13, 31)
GEN_THREEVEC_TEST(usubw2_8h_8h_16b, "usubw2 v5.8h, v13.8h, v31.16b", 5, 13, 31)
GEN_THREEVEC_TEST(usubw_8h_8h_8b, "usubw v5.8h, v13.8h, v31.8b", 5, 13, 31)
GEN_THREEVEC_TEST(usubw2_4s_4s_8h, "usubw2 v5.4s, v13.4s, v31.8h", 5, 13, 31)
GEN_THREEVEC_TEST(usubw_4s_4s_4h, "usubw v5.4s, v13.4s, v31.4h", 5, 13, 31)
GEN_THREEVEC_TEST(usubw2_2d_2d_4s, "usubw2 v5.2d, v13.2d, v31.4s", 5, 13, 31)
GEN_THREEVEC_TEST(usubw_2d_2d_2s, "usubw v5.2d, v13.2d, v31.2s", 5, 13, 31)
GEN_THREEVEC_TEST(shadd_4s_4s_4s, "shadd v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(shadd_2s_2s_2s, "shadd v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(shadd_8h_8h_8h, "shadd v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(shadd_4h_4h_4h, "shadd v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(shadd_16b_16b_16b,"shadd v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(shadd_8b_8b_8b, "shadd v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_4s_4s_4s, "uhadd v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_2s_2s_2s, "uhadd v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_8h_8h_8h, "uhadd v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_4h_4h_4h, "uhadd v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_16b_16b_16b,"uhadd v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uhadd_8b_8b_8b, "uhadd v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_4s_4s_4s, "shsub v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_2s_2s_2s, "shsub v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_8h_8h_8h, "shsub v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_4h_4h_4h, "shsub v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_16b_16b_16b,"shsub v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(shsub_8b_8b_8b, "shsub v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_4s_4s_4s, "uhsub v2.4s, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_2s_2s_2s, "uhsub v2.2s, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_8h_8h_8h, "uhsub v2.8h, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_4h_4h_4h, "uhsub v2.4h, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_16b_16b_16b,"uhsub v2.16b, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(uhsub_8b_8b_8b, "uhsub v2.8b, v11.8b, v29.8b", 2, 11, 29)
GEN_TWOVEC_TEST(shll_8h_8b_8, "shll v3.8h, v24.8b, #8", 3, 24)
GEN_TWOVEC_TEST(shll2_8h_16b_8, "shll2 v3.8h, v24.16b, #8", 3, 24)
GEN_TWOVEC_TEST(shll_4s_4h_16, "shll v3.4s, v24.4h, #16", 3, 24)
GEN_TWOVEC_TEST(shll2_4s_8h_16, "shll2 v3.4s, v24.8h, #16", 3, 24)
GEN_TWOVEC_TEST(shll_2d_2s_32, "shll v3.2d, v24.2s, #32", 3, 24)
GEN_TWOVEC_TEST(shll2_2d_4s_32, "shll2 v3.2d, v24.4s, #32", 3, 24)
GEN_TWOVEC_TEST(shrn_2s_2d_1, "shrn v4.2s, v29.2d, #1", 4, 29)
GEN_TWOVEC_TEST(shrn_2s_2d_32, "shrn v4.2s, v29.2d, #32", 4, 29)
GEN_TWOVEC_TEST(shrn2_4s_2d_1, "shrn2 v4.4s, v29.2d, #1", 4, 29)
GEN_TWOVEC_TEST(shrn2_4s_2d_32, "shrn2 v4.4s, v29.2d, #32", 4, 29)
GEN_TWOVEC_TEST(shrn_4h_4s_1, "shrn v4.4h, v29.4s, #1", 4, 29)
GEN_TWOVEC_TEST(shrn_4h_4s_16, "shrn v4.4h, v29.4s, #16", 4, 29)
GEN_TWOVEC_TEST(shrn2_8h_4s_1, "shrn2 v4.8h, v29.4s, #1", 4, 29)
GEN_TWOVEC_TEST(shrn2_8h_4s_16, "shrn2 v4.8h, v29.4s, #16", 4, 29)
GEN_TWOVEC_TEST(shrn_8b_8h_1, "shrn v4.8b, v29.8h, #1", 4, 29)
GEN_TWOVEC_TEST(shrn_8b_8h_8, "shrn v4.8b, v29.8h, #8", 4, 29)
GEN_TWOVEC_TEST(shrn2_16b_8h_1, "shrn2 v4.16b, v29.8h, #1", 4, 29)
GEN_TWOVEC_TEST(shrn2_16b_8h_8, "shrn2 v4.16b, v29.8h, #8", 4, 29)
GEN_TWOVEC_TEST(rshrn_2s_2d_1, "rshrn v4.2s, v29.2d, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn_2s_2d_32, "rshrn v4.2s, v29.2d, #32", 4, 29)
GEN_TWOVEC_TEST(rshrn2_4s_2d_1, "rshrn2 v4.4s, v29.2d, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn2_4s_2d_32, "rshrn2 v4.4s, v29.2d, #32", 4, 29)
GEN_TWOVEC_TEST(rshrn_4h_4s_1, "rshrn v4.4h, v29.4s, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn_4h_4s_16, "rshrn v4.4h, v29.4s, #16", 4, 29)
GEN_TWOVEC_TEST(rshrn2_8h_4s_1, "rshrn2 v4.8h, v29.4s, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn2_8h_4s_16, "rshrn2 v4.8h, v29.4s, #16", 4, 29)
GEN_TWOVEC_TEST(rshrn_8b_8h_1, "rshrn v4.8b, v29.8h, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn_8b_8h_8, "rshrn v4.8b, v29.8h, #8", 4, 29)
GEN_TWOVEC_TEST(rshrn2_16b_8h_1, "rshrn2 v4.16b, v29.8h, #1", 4, 29)
GEN_TWOVEC_TEST(rshrn2_16b_8h_8, "rshrn2 v4.16b, v29.8h, #8", 4, 29)
GEN_TWOVEC_TEST(sli_d_d_0, "sli d5, d28, #0", 5, 28)
GEN_TWOVEC_TEST(sli_d_d_32, "sli d5, d28, #32", 5, 28)
GEN_TWOVEC_TEST(sli_d_d_63, "sli d5, d28, #63", 5, 28)
GEN_TWOVEC_TEST(sri_d_d_1, "sri d5, d28, #1", 5, 28)
GEN_TWOVEC_TEST(sri_d_d_33, "sri d5, d28, #33", 5, 28)
GEN_TWOVEC_TEST(sri_d_d_64, "sri d5, d28, #64", 5, 28)
GEN_TWOVEC_TEST(sli_2d_2d_0, "sli v6.2d, v27.2d, #0", 6, 27)
GEN_TWOVEC_TEST(sli_2d_2d_32, "sli v6.2d, v27.2d, #32", 6, 27)
GEN_TWOVEC_TEST(sli_2d_2d_63, "sli v6.2d, v27.2d, #63", 6, 27)
GEN_TWOVEC_TEST(sli_4s_4s_0, "sli v6.4s, v27.4s, #0", 6, 27)
GEN_TWOVEC_TEST(sli_4s_4s_16, "sli v6.4s, v27.4s, #16", 6, 27)
GEN_TWOVEC_TEST(sli_4s_4s_31, "sli v6.4s, v27.4s, #31", 6, 27)
GEN_TWOVEC_TEST(sli_2s_2s_0, "sli v6.2s, v27.2s, #0", 6, 27)
GEN_TWOVEC_TEST(sli_2s_2s_16, "sli v6.2s, v27.2s, #16", 6, 27)
GEN_TWOVEC_TEST(sli_2s_2s_31, "sli v6.2s, v27.2s, #31", 6, 27)
GEN_TWOVEC_TEST(sli_8h_8h_0, "sli v6.8h, v27.8h, #0", 6, 27)
GEN_TWOVEC_TEST(sli_8h_8h_8, "sli v6.8h, v27.8h, #8", 6, 27)
GEN_TWOVEC_TEST(sli_8h_8h_15, "sli v6.8h, v27.8h, #15", 6, 27)
GEN_TWOVEC_TEST(sli_4h_4h_0, "sli v6.4h, v27.4h, #0", 6, 27)
GEN_TWOVEC_TEST(sli_4h_4h_8, "sli v6.4h, v27.4h, #8", 6, 27)
GEN_TWOVEC_TEST(sli_4h_4h_15, "sli v6.4h, v27.4h, #15", 6, 27)
GEN_TWOVEC_TEST(sli_16b_16b_0, "sli v6.16b, v27.16b, #0", 6, 27)
GEN_TWOVEC_TEST(sli_16b_16b_3, "sli v6.16b, v27.16b, #3", 6, 27)
GEN_TWOVEC_TEST(sli_16b_16b_7, "sli v6.16b, v27.16b, #7", 6, 27)
GEN_TWOVEC_TEST(sli_8b_8b_0, "sli v6.8b, v27.8b, #0", 6, 27)
GEN_TWOVEC_TEST(sli_8b_8b_3, "sli v6.8b, v27.8b, #3", 6, 27)
GEN_TWOVEC_TEST(sli_8b_8b_7, "sli v6.8b, v27.8b, #7", 6, 27)
GEN_TWOVEC_TEST(sri_2d_2d_1, "sri v6.2d, v27.2d, #1", 6, 27)
GEN_TWOVEC_TEST(sri_2d_2d_33, "sri v6.2d, v27.2d, #33", 6, 27)
GEN_TWOVEC_TEST(sri_2d_2d_64, "sri v6.2d, v27.2d, #64", 6, 27)
GEN_TWOVEC_TEST(sri_4s_4s_1, "sri v6.4s, v27.4s, #1", 6, 27)
GEN_TWOVEC_TEST(sri_4s_4s_17, "sri v6.4s, v27.4s, #17", 6, 27)
GEN_TWOVEC_TEST(sri_4s_4s_32, "sri v6.4s, v27.4s, #32", 6, 27)
GEN_TWOVEC_TEST(sri_2s_2s_1, "sri v6.2s, v27.2s, #1", 6, 27)
GEN_TWOVEC_TEST(sri_2s_2s_17, "sri v6.2s, v27.2s, #17", 6, 27)
GEN_TWOVEC_TEST(sri_2s_2s_32, "sri v6.2s, v27.2s, #32", 6, 27)
GEN_TWOVEC_TEST(sri_8h_8h_1, "sri v6.8h, v27.8h, #1", 6, 27)
GEN_TWOVEC_TEST(sri_8h_8h_8, "sri v6.8h, v27.8h, #8", 6, 27)
GEN_TWOVEC_TEST(sri_8h_8h_16, "sri v6.8h, v27.8h, #16", 6, 27)
GEN_TWOVEC_TEST(sri_4h_4h_1, "sri v6.4h, v27.4h, #1", 6, 27)
GEN_TWOVEC_TEST(sri_4h_4h_8, "sri v6.4h, v27.4h, #8", 6, 27)
GEN_TWOVEC_TEST(sri_4h_4h_16, "sri v6.4h, v27.4h, #16", 6, 27)
GEN_TWOVEC_TEST(sri_16b_16b_1, "sri v6.16b, v27.16b, #1", 6, 27)
GEN_TWOVEC_TEST(sri_16b_16b_4, "sri v6.16b, v27.16b, #4", 6, 27)
GEN_TWOVEC_TEST(sri_16b_16b_8, "sri v6.16b, v27.16b, #8", 6, 27)
GEN_TWOVEC_TEST(sri_8b_8b_1, "sri v6.8b, v27.8b, #1", 6, 27)
GEN_TWOVEC_TEST(sri_8b_8b_4, "sri v6.8b, v27.8b, #4", 6, 27)
GEN_TWOVEC_TEST(sri_8b_8b_8, "sri v6.8b, v27.8b, #8", 6, 27)
GEN_BINARY_TEST(smaxp, 4s, 4s, 4s)
GEN_BINARY_TEST(smaxp, 2s, 2s, 2s)
GEN_BINARY_TEST(smaxp, 8h, 8h, 8h)
GEN_BINARY_TEST(smaxp, 4h, 4h, 4h)
GEN_BINARY_TEST(smaxp, 16b, 16b, 16b)
GEN_BINARY_TEST(smaxp, 8b, 8b, 8b)
GEN_BINARY_TEST(umaxp, 4s, 4s, 4s)
GEN_BINARY_TEST(umaxp, 2s, 2s, 2s)
GEN_BINARY_TEST(umaxp, 8h, 8h, 8h)
GEN_BINARY_TEST(umaxp, 4h, 4h, 4h)
GEN_BINARY_TEST(umaxp, 16b, 16b, 16b)
GEN_BINARY_TEST(umaxp, 8b, 8b, 8b)
GEN_BINARY_TEST(sminp, 4s, 4s, 4s)
GEN_BINARY_TEST(sminp, 2s, 2s, 2s)
GEN_BINARY_TEST(sminp, 8h, 8h, 8h)
GEN_BINARY_TEST(sminp, 4h, 4h, 4h)
GEN_BINARY_TEST(sminp, 16b, 16b, 16b)
GEN_BINARY_TEST(sminp, 8b, 8b, 8b)
GEN_BINARY_TEST(uminp, 4s, 4s, 4s)
GEN_BINARY_TEST(uminp, 2s, 2s, 2s)
GEN_BINARY_TEST(uminp, 8h, 8h, 8h)
GEN_BINARY_TEST(uminp, 4h, 4h, 4h)
GEN_BINARY_TEST(uminp, 16b, 16b, 16b)
GEN_BINARY_TEST(uminp, 8b, 8b, 8b)
GEN_THREEVEC_TEST(smlal_2d_2s_s0, "smlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal_2d_2s_s3, "smlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal2_2d_4s_s1, "smlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal2_2d_4s_s2, "smlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal_4s_4h_h0, "smlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal_4s_4h_h7, "smlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal2_4s_8h_h1, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal2_4s_8h_h4, "smlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal_2d_2s_s0, "umlal v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal_2d_2s_s3, "umlal v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal2_2d_4s_s1, "umlal2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal2_2d_4s_s2, "umlal2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal_4s_4h_h0, "umlal v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal_4s_4h_h7, "umlal v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal2_4s_8h_h1, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlal2_4s_8h_h4, "umlal2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl_2d_2s_s0, "smlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl_2d_2s_s3, "smlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl2_2d_4s_s1, "smlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl2_2d_4s_s2, "smlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl_4s_4h_h0, "smlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl_4s_4h_h7, "smlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl2_4s_8h_h1, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlsl2_4s_8h_h4, "smlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl_2d_2s_s0, "umlsl v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl_2d_2s_s3, "umlsl v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl2_2d_4s_s1, "umlsl2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl2_2d_4s_s2, "umlsl2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl_4s_4h_h0, "umlsl v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl_4s_4h_h7, "umlsl v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl2_4s_8h_h1, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umlsl2_4s_8h_h4, "umlsl2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smull_2d_2s_s0, "smull v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smull_2d_2s_s3, "smull v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(smull2_2d_4s_s1, "smull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smull2_2d_4s_s2, "smull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(smull_4s_4h_h0, "smull v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(smull_4s_4h_h7, "smull v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(smull2_4s_8h_h1, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smull2_4s_8h_h4, "smull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umull_2d_2s_s0, "umull v29.2d, v20.2s, v3.s[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umull_2d_2s_s3, "umull v29.2d, v20.2s, v3.s[3]", 29, 20, 3)
GEN_THREEVEC_TEST(umull2_2d_4s_s1, "umull2 v29.2d, v20.4s, v3.s[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umull2_2d_4s_s2, "umull2 v29.2d, v20.4s, v3.s[2]", 29, 20, 3)
GEN_THREEVEC_TEST(umull_4s_4h_h0, "umull v29.4s, v20.4h, v3.h[0]", 29, 20, 3)
GEN_THREEVEC_TEST(umull_4s_4h_h7, "umull v29.4s, v20.4h, v3.h[7]", 29, 20, 3)
GEN_THREEVEC_TEST(umull2_4s_8h_h1, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(umull2_4s_8h_h4, "umull2 v29.4s, v20.8h, v3.h[1]", 29, 20, 3)
GEN_THREEVEC_TEST(smlal_2d_2s_2s, "smlal v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(smlal2_2d_4s_4s, "smlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(smlal_4s_4h_4h, "smlal v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(smlal2_4s_8h_8h, "smlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(smlal_8h_8b_8b, "smlal v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(smlal2_8h_16b_16b,
"smlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(umlal_2d_2s_2s, "umlal v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(umlal2_2d_4s_4s, "umlal2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(umlal_4s_4h_4h, "umlal v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(umlal2_4s_8h_8h, "umlal2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(umlal_8h_8b_8b, "umlal v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(umlal2_8h_16b_16b,
"umlal2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl_2d_2s_2s, "smlsl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl2_2d_4s_4s, "smlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl_4s_4h_4h, "smlsl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl2_4s_8h_8h, "smlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl_8h_8b_8b, "smlsl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(smlsl2_8h_16b_16b,
"smlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl_2d_2s_2s, "umlsl v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl2_2d_4s_4s, "umlsl2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl_4s_4h_4h, "umlsl v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl2_4s_8h_8h, "umlsl2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl_8h_8b_8b, "umlsl v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(umlsl2_8h_16b_16b,
"umlsl2 v2.8h, v11.16b, v29.16b", 2, 11, 29)
GEN_THREEVEC_TEST(smull_2d_2s_2s, "smull v2.2d, v11.2s, v29.2s", 2, 11, 29)
GEN_THREEVEC_TEST(smull2_2d_4s_4s, "smull2 v2.2d, v11.4s, v29.4s", 2, 11, 29)
GEN_THREEVEC_TEST(smull_4s_4h_4h, "smull v2.4s, v11.4h, v29.4h", 2, 11, 29)
GEN_THREEVEC_TEST(smull2_4s_8h_8h, "smull2 v2.4s, v11.8h, v29.8h", 2, 11, 29)
GEN_THREEVEC_TEST(smull_8h_8b_8b, "smull v2.8h, v11.8b, v29.8b", 2, 11, 29)
GEN_THREEVEC_TEST(