commit 38b79ace9613df76a5feb7a237226f4a4cc02ecd
author carll <carll@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Fri Sep 06 22:27:34 2013 +0000
committer carll <carll@8f6e269a-dfd6-0310-a8e1-e2731360e62c> Fri Sep 06 22:27:34 2013 +0000
tree 167c24d3ce3fc043733bb8951ae064af8a27291d
parent 9708b6ac7026b33277e01044d6ab82666048eeda

The existing overflow detection in VEX/priv/guest_ppc_toIR.c/set_XER_OV_64()
under the case PPCG_FLAG_OP_MULLW: does not apply to the mulldo as we need to
detect overflow when performing a Multiply Low Doubleword (not Multiply Low
Word). Hence, we added a new enumeration value PPCG_FLAG_OP_MULLD in
VEX/priv/guest_ppc_defs.h and a corresponding new case under which the
computation for detecting overflow for mulldo/mulldo. is added in
set_XER_OV_64(). The tests have been added to: none/tests/ppc32/jm-insns.c

Bugzilla 324594, submitted by Anmol P. Paralkar

Patch reviewed and tested by Carl Love


git-svn-id: svn://svn.valgrind.org/vex/trunk@2754 8f6e269a-dfd6-0310-a8e1-e2731360e62c

priv/guest_ppc_defs.h

diff --git a/priv/guest_ppc_defs.h b/priv/guest_ppc_defs.h
index 11844b1..0ac4574 100644
--- a/priv/guest_ppc_defs.h
+++ b/priv/guest_ppc_defs.h
@@ -134,6 +134,7 @@
    /* 15 */ PPCG_FLAG_OP_DIVWEU,  // divweuo
    /* 16 */ PPCG_FLAG_OP_DIVWE,   // divweo
    /* 17 */ PPCG_FLAG_OP_DIVDEU,  // divdeuo
+   /* 18 */ PPCG_FLAG_OP_MULLD,   // mulldo
    PPCG_FLAG_OP_NUMBER
 };
 

priv/guest_ppc_toIR.c

diff --git a/priv/guest_ppc_toIR.c b/priv/guest_ppc_toIR.c
index ab13815..34166b0 100644
--- a/priv/guest_ppc_toIR.c
+++ b/priv/guest_ppc_toIR.c
@@ -2121,6 +2121,22 @@
                          binop( Iop_CmpLE64U, argR, argL ) );
      break;
 
+   case /* 18 */ PPCG_FLAG_OP_MULLD: {
+      IRTemp  t128;
+      /* OV true if result can't be represented in 64 bits
+         i.e sHi != sign extension of sLo */
+      t128 = newTemp(Ity_I128);
+      assign( t128, binop(Iop_MullS64, argL, argR) );
+      xer_ov 
+         = binop( Iop_CmpNE64,
+                  unop(Iop_128HIto64, mkexpr(t128)),
+                  binop( Iop_Sar64,
+                         unop(Iop_128to64, mkexpr(t128)),
+                         mkU8(63))
+                  );
+      break;
+   }
+      
    default: 
       vex_printf("set_XER_OV: op = %u\n", op);
       vpanic("set_XER_OV(ppc64)");
@@ -3483,7 +3499,7 @@
              rD_addr, rA_addr, rB_addr);
          assign( rD, binop(Iop_Mul64, mkexpr(rA), mkexpr(rB)) );
          if (flag_OE) {
-            set_XER_OV( ty, PPCG_FLAG_OP_MULLW, 
+            set_XER_OV( ty, PPCG_FLAG_OP_MULLD, 
                         mkexpr(rD), mkexpr(rA), mkexpr(rB) );
          }
          break;