On 32-bit x86, allow lzcnt to be detected on Intel CPUs as well as on
AMDs. 64-bit equivalent does not have this bug. Fixes #334049.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13957 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index 12d963e..c09d528 100644
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -750,18 +750,24 @@
if (!have_cx8)
return False;
- /* Figure out if this is an AMD that can do mmxext and/or LZCNT. */
+ /* Figure out if this is an AMD that can do MMXEXT. */
have_mmxext = False;
- have_lzcnt = False;
if (0 == VG_(strcmp)(vstr, "AuthenticAMD")
&& max_extended >= 0x80000001) {
VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
- have_lzcnt = (ecx & (1<<5)) != 0; /* True => have LZCNT */
-
/* Some older AMD processors support a sse1 subset (Integer SSE). */
have_mmxext = !have_sse1 && ((edx & (1<<22)) != 0);
}
+ /* Figure out if this is an AMD or Intel that can do LZCNT. */
+ have_lzcnt = False;
+ if ((0 == VG_(strcmp)(vstr, "AuthenticAMD")
+ || 0 == VG_(strcmp)(vstr, "GenuineIntel"))
+ && max_extended >= 0x80000001) {
+ VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
+ have_lzcnt = (ecx & (1<<5)) != 0; /* True => have LZCNT */
+ }
+
/* Intel processors don't define the mmxext extension, but since it
is just a sse1 subset always define it when we have sse1. */
if (have_sse1)
@@ -852,7 +858,6 @@
}
}
-
/* cmpxchg8b is a minimum requirement now; if we don't have it we
must simply give up. But all CPUs since Pentium-I have it, so
that doesn't seem like much of a restriction. */
