mips32: Fix typo.
Fix some typo error and some errors in tests that was discovered while running Valgrind on MIPS/Android.
In some cases initial FCSR value wasn't being set properly.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13746 a5019735-40e9-0310-863c-91ae7b9d1cf9
diff --git a/none/tests/allexec.c b/none/tests/allexec.c
index b7177e8..527c36e 100644
--- a/none/tests/allexec.c
+++ b/none/tests/allexec.c
@@ -33,7 +33,7 @@
these links points to the same executable to ensure this test works
everywhere the same.
No arguments or more arguments means just print its args. */
-int main(int argc, char **argv, char **envp)
+int main(int argc, char **argv, char **envp)
{
if ( (argc == 2) && (strcmp (argv[1], "exec") == 0)) {
S("%s will exec ./allexec32\n", argv[0]);
diff --git a/none/tests/mips32/FPUarithmetic.c b/none/tests/mips32/FPUarithmetic.c
index 3a76b3f..72806fa 100644
--- a/none/tests/mips32/FPUarithmetic.c
+++ b/none/tests/mips32/FPUarithmetic.c
@@ -1,4 +1,5 @@
#include <stdio.h>
+#include <stdlib.h>
typedef enum {
ABSS=0, ABSD,
@@ -24,40 +25,44 @@
"rsqrt.s", "rsqrt.d"
};
+typedef enum {
+ TO_NEAREST=0, TO_ZERO, TO_PLUS_INFINITY, TO_MINUS_INFINITY } round_mode_t;
+char *round_mode_name[] = { "near", "zero", "+inf", "-inf" };
+
const double fs_d[] = {
- 0, 456.2489562, 3, -1,
- 1384.6, -7.2945676, 1000000000, -5786.47,
- 1752, 0.0024575, 0.00000001, -248562.76,
- -45786.476, 456.2489562, 34.00046, 45786.476,
- 1752065, 107, -45667.24, -7.2945676,
- -347856.475, 356047.56, -1.0, 23.04
+ 0, 456.25, 3, -1,
+ 1384.5, -7.25, 1000000000, -5786.5,
+ 1752, 0.015625, 0.03125, -248562.75,
+ 456, -45786.5, 34.03125, 45786.75,
+ 1752065, 107, -45667.25, -7,
+ -347856.5, 356047.5, -1.0, 23.0625
};
const double ft_d[] = {
- -45786.476, 456.2489562, 34.00046, 45786.476,
- 1752065, 107, -45667.24, -7.2945676,
- -347856.475, 356047.56, -1.0, 23.04,
- 0, 456.2489562, 3, -1,
- 1384.6, -7.2945676, 1000000000, -5786.47,
- 1752, 0.0024575, 0.00000001, -248562.76
+ -456.25, -45786.5, 34.03125, 45786.75,
+ 1752065, 107, -45667.25, -7.25,
+ -347856.5, 356047.5, -1.0, 23.0625,
+ 0, 456.25, 3, -1,
+ 1384.5, -7, 1000000000, -5786.5,
+ 1752, 0.015625, 0.03125, -248562.75
};
const float fs_f[] = {
- 0, 456.2489562, 3, -1,
- 1384.6, -7.2945676, 1000000000, -5786.47,
- 1752, 0.0024575, 0.00000001, -248562.76,
- -45786.476, 456.2489562, 34.00046, 45786.476,
- 1752065, 107, -45667.24, -7.2945676,
- -347856.475, 356047.56, -1.0, 23.04
+ 0, 456.25, 3, -1,
+ 1384.5, -7.25, 1000000000, -5786.5,
+ 1752, 0.015625, 0.03125, -248562.75,
+ 456, -45786.5, 34.03125, 45786.75,
+ 1752065, 107, -45667.25, -7,
+ -347856.5, 356047.5, -1.0, 23.0625
};
const float ft_f[] = {
- -45786.476, 456.2489562, 34.00046, 45786.476,
- 1752065, 107, -45667.24, -7.2945676,
- -347856.475, 356047.56, -1.0, 23.04,
- 0, 456.2489562, 3, -1,
- 1384.6, -7.2945676, 1000000000, -5786.47,
- 1752, 0.0024575, 0.00000001, -248562.76
+ -456.25, -4578.5, 34.03125, 4578.75,
+ 175, 107, -456.25, -7.25,
+ -3478.5, 356.5, -1.0, 23.0625,
+ 0, 456.25, 3, -1,
+ 1384.5, -7, 100, -5786.5,
+ 1752, 0.015625, 0.03125, -248562.75
};
#define UNOPdd(op) \
@@ -84,98 +89,136 @@
op" %0, %1, %2\n\t" \
: "=f"(fd_d) : "f"(fs_d[i]) , "f"(ft_d[i]));
-int arithmeticOperations(flt_art_op_t op)
+void set_rounding_mode(round_mode_t mode)
+{
+ switch(mode) {
+ case TO_NEAREST:
+ __asm__ volatile("cfc1 $t0, $31\n\t"
+ "srl $t0, 2\n\t"
+ "sll $t0, 2\n\t"
+ "ctc1 $t0, $31\n\t");
+ break;
+ case TO_ZERO:
+ __asm__ volatile("cfc1 $t0, $31\n\t"
+ "srl $t0, 2\n\t"
+ "sll $t0, 2\n\t"
+ "addiu $t0, 1\n\t"
+ "ctc1 $t0, $31\n\t");
+ break;
+ case TO_PLUS_INFINITY:
+ __asm__ volatile("cfc1 $t0, $31\n\t"
+ "srl $t0, 2\n\t"
+ "sll $t0, 2\n\t"
+ "addiu $t0, 2\n\t"
+ "ctc1 $t0, $31\n\t");
+ break;
+ case TO_MINUS_INFINITY:
+ __asm__ volatile("cfc1 $t0, $31\n\t"
+ "srl $t0, 2\n\t"
+ "sll $t0, 2\n\t"
+ "addiu $t0, 3\n\t"
+ "ctc1 $t0, $31\n\t");
+ break;
+ }
+}
+
+int arithmeticOperations(flt_art_op_t op)
{
double fd_d = 0;
float fd_f = 0;
int i = 0;
- for (i = 0; i < 24; i++)
- {
- switch(op) {
- case ABSS:
- UNOPff("abs.s");
- printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
- break;
- case ABSD:
- UNOPdd("abs.d");
- printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
- break;
- case ADDS:
- BINOPf("add.s");
- printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
- break;
- case ADDD:
- BINOPd("add.d");
- printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
- break;
- case DIVS:
- BINOPf("div.s");
- printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
- break;
- case DIVD:
- BINOPd("div.d");
- printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
- break;
- case MULS:
- BINOPf("mul.s");
- printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
- break;
- case MULD:
- BINOPd("mul.d");
- printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
- break;
- case NEGS:
- UNOPff("neg.s");
- printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
- break;
- case NEGD:
- UNOPdd("neg.d");
- printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
- break;
- case SQRTS:
- UNOPff("sqrt.s");
- printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
- break;
- case SQRTD:
- UNOPdd("sqrt.d");
- printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
- break;
- case SUBS:
- BINOPf("sub.s");
- printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
- break;
- case SUBD:
- BINOPd("sub.d");
- printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
- break;
- case RECIPS:
+ round_mode_t rm;
+ for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
+ set_rounding_mode(rm);
+ printf("rounding mode: %s\n", round_mode_name[rm]);
+ for (i = 0; i < 24; i++)
+ {
+ switch(op) {
+ case ABSS:
+ UNOPff("abs.s");
+ printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
+ break;
+ case ABSD:
+ UNOPdd("abs.d");
+ printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
+ break;
+ case ADDS:
+ BINOPf("add.s");
+ printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
+ break;
+ case ADDD:
+ BINOPd("add.d");
+ printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
+ break;
+ case DIVS:
+ BINOPf("div.s");
+ printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
+ break;
+ case DIVD:
+ BINOPd("div.d");
+ printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
+ break;
+ case MULS:
+ BINOPf("mul.s");
+ printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
+ break;
+ case MULD:
+ BINOPd("mul.d");
+ printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
+ break;
+ case NEGS:
+ UNOPff("neg.s");
+ printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
+ break;
+ case NEGD:
+ UNOPdd("neg.d");
+ printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
+ break;
+ case SQRTS:
+ UNOPff("sqrt.s");
+ printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
+ break;
+ case SQRTD:
+ UNOPdd("sqrt.d");
+ printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
+ break;
+ case SUBS:
+ BINOPf("sub.s");
+ printf("%s %f %f %f\n", flt_art_op_names[op], fd_f, fs_f[i], ft_f[i]);
+ break;
+ case SUBD:
+ BINOPd("sub.d");
+ printf("%s %lf %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i], ft_d[i]);
+ break;
+ case RECIPS:
#if (__mips==32) && (__mips_isa_rev>=2)
- UNOPff("recip.s");
- printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
+ UNOPff("recip.s");
+ printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
#endif
- break;
- case RECIPD:
+ break;
+ case RECIPD:
#if (__mips==32) && (__mips_isa_rev>=2)
- UNOPdd("recip.d");
- printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
+ UNOPdd("recip.d");
+ printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
#endif
- break;
- case RSQRTS:
+ break;
+ case RSQRTS:
#if (__mips==32) && (__mips_isa_rev>=2)
- UNOPff("rsqrt.s");
- printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
+ UNOPff("rsqrt.s");
+ printf("%s %f %f\n", flt_art_op_names[op], fd_f, fs_f[i]);
#endif
- break;
- case RSQRTD:
+ break;
+ case RSQRTD:
#if (__mips==32) && (__mips_isa_rev>=2)
- UNOPdd("rsqrt.d");
- printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
+ UNOPdd("rsqrt.d");
+ printf("%s %lf %lf\n", flt_art_op_names[op], fd_d, fs_d[i]);
#endif
- break;
- default:
- printf("error\n");
- break;
- }
+ break;
+ default:
+ printf("error\n");
+ break;
+ }
+ }
}
return 0;
}
diff --git a/none/tests/mips32/FPUarithmetic.stdout.exp b/none/tests/mips32/FPUarithmetic.stdout.exp
index 0eac001..29a5950 100644
--- a/none/tests/mips32/FPUarithmetic.stdout.exp
+++ b/none/tests/mips32/FPUarithmetic.stdout.exp
@@ -1,385 +1,1601 @@
-------------------------- test FPU Arithmetic Operations --------------------------
+rounding mode: near
abs.s 0.000000 0.000000
-abs.s 456.248962 456.248962
+abs.s 456.250000 456.250000
abs.s 3.000000 3.000000
abs.s 1.000000 -1.000000
-abs.s 1384.599976 1384.599976
-abs.s 7.294568 -7.294568
+abs.s 1384.500000 1384.500000
+abs.s 7.250000 -7.250000
abs.s 1000000000.000000 1000000000.000000
-abs.s 5786.470215 -5786.470215
+abs.s 5786.500000 -5786.500000
abs.s 1752.000000 1752.000000
-abs.s 0.002457 0.002457
-abs.s 0.000000 0.000000
-abs.s 248562.765625 -248562.765625
-abs.s 45786.476562 -45786.476562
-abs.s 456.248962 456.248962
-abs.s 34.000462 34.000462
-abs.s 45786.476562 45786.476562
+abs.s 0.015625 0.015625
+abs.s 0.031250 0.031250
+abs.s 248562.750000 -248562.750000
+abs.s 456.000000 456.000000
+abs.s 45786.500000 -45786.500000
+abs.s 34.031250 34.031250
+abs.s 45786.750000 45786.750000
abs.s 1752065.000000 1752065.000000
abs.s 107.000000 107.000000
-abs.s 45667.238281 -45667.238281
-abs.s 7.294568 -7.294568
-abs.s 347856.468750 -347856.468750
-abs.s 356047.562500 356047.562500
+abs.s 45667.250000 -45667.250000
+abs.s 7.000000 -7.000000
+abs.s 347856.500000 -347856.500000
+abs.s 356047.500000 356047.500000
abs.s 1.000000 -1.000000
-abs.s 23.040001 23.040001
+abs.s 23.062500 23.062500
+rounding mode: zero
+abs.s 0.000000 0.000000
+abs.s 456.250000 456.250000
+abs.s 3.000000 3.000000
+abs.s 1.000000 -1.000000
+abs.s 1384.500000 1384.500000
+abs.s 7.250000 -7.250000
+abs.s 1000000000.000000 1000000000.000000
+abs.s 5786.500000 -5786.500000
+abs.s 1752.000000 1752.000000
+abs.s 0.015625 0.015625
+abs.s 0.031250 0.031250
+abs.s 248562.750000 -248562.750000
+abs.s 456.000000 456.000000
+abs.s 45786.500000 -45786.500000
+abs.s 34.031250 34.031250
+abs.s 45786.750000 45786.750000
+abs.s 1752065.000000 1752065.000000
+abs.s 107.000000 107.000000
+abs.s 45667.250000 -45667.250000
+abs.s 7.000000 -7.000000
+abs.s 347856.500000 -347856.500000
+abs.s 356047.500000 356047.500000
+abs.s 1.000000 -1.000000
+abs.s 23.062500 23.062500
+rounding mode: +inf
+abs.s 0.000000 0.000000
+abs.s 456.250000 456.250000
+abs.s 3.000000 3.000000
+abs.s 1.000000 -1.000000
+abs.s 1384.500000 1384.500000
+abs.s 7.250000 -7.250000
+abs.s 1000000000.000000 1000000000.000000
+abs.s 5786.500000 -5786.500000
+abs.s 1752.000000 1752.000000
+abs.s 0.015625 0.015625
+abs.s 0.031250 0.031250
+abs.s 248562.750000 -248562.750000
+abs.s 456.000000 456.000000
+abs.s 45786.500000 -45786.500000
+abs.s 34.031250 34.031250
+abs.s 45786.750000 45786.750000
+abs.s 1752065.000000 1752065.000000
+abs.s 107.000000 107.000000
+abs.s 45667.250000 -45667.250000
+abs.s 7.000000 -7.000000
+abs.s 347856.500000 -347856.500000
+abs.s 356047.500000 356047.500000
+abs.s 1.000000 -1.000000
+abs.s 23.062500 23.062500
+rounding mode: -inf
+abs.s 0.000000 0.000000
+abs.s 456.250000 456.250000
+abs.s 3.000000 3.000000
+abs.s 1.000000 -1.000000
+abs.s 1384.500000 1384.500000
+abs.s 7.250000 -7.250000
+abs.s 1000000000.000000 1000000000.000000
+abs.s 5786.500000 -5786.500000
+abs.s 1752.000000 1752.000000
+abs.s 0.015625 0.015625
+abs.s 0.031250 0.031250
+abs.s 248562.750000 -248562.750000
+abs.s 456.000000 456.000000
+abs.s 45786.500000 -45786.500000
+abs.s 34.031250 34.031250
+abs.s 45786.750000 45786.750000
+abs.s 1752065.000000 1752065.000000
+abs.s 107.000000 107.000000
+abs.s 45667.250000 -45667.250000
+abs.s 7.000000 -7.000000
+abs.s 347856.500000 -347856.500000
+abs.s 356047.500000 356047.500000
+abs.s 1.000000 -1.000000
+abs.s 23.062500 23.062500
+rounding mode: near
abs.d 0.000000 0.000000
-abs.d 456.248956 456.248956
+abs.d 456.250000 456.250000
abs.d 3.000000 3.000000
abs.d 1.000000 -1.000000
-abs.d 1384.600000 1384.600000
-abs.d 7.294568 -7.294568
+abs.d 1384.500000 1384.500000
+abs.d 7.250000 -7.250000
abs.d 1000000000.000000 1000000000.000000
-abs.d 5786.470000 -5786.470000
+abs.d 5786.500000 -5786.500000
abs.d 1752.000000 1752.000000
-abs.d 0.002458 0.002458
-abs.d 0.000000 0.000000
-abs.d 248562.760000 -248562.760000
-abs.d 45786.476000 -45786.476000
-abs.d 456.248956 456.248956
-abs.d 34.000460 34.000460
-abs.d 45786.476000 45786.476000
+abs.d 0.015625 0.015625
+abs.d 0.031250 0.031250
+abs.d 248562.750000 -248562.750000
+abs.d 456.000000 456.000000
+abs.d 45786.500000 -45786.500000
+abs.d 34.031250 34.031250
+abs.d 45786.750000 45786.750000
abs.d 1752065.000000 1752065.000000
abs.d 107.000000 107.000000
-abs.d 45667.240000 -45667.240000
-abs.d 7.294568 -7.294568
-abs.d 347856.475000 -347856.475000
-abs.d 356047.560000 356047.560000
+abs.d 45667.250000 -45667.250000
+abs.d 7.000000 -7.000000
+abs.d 347856.500000 -347856.500000
+abs.d 356047.500000 356047.500000
abs.d 1.000000 -1.000000
-abs.d 23.040000 23.040000
-add.s -45786.476562 0.000000 -45786.476562
-add.s 912.497925 456.248962 456.248962
-add.s 37.000462 3.000000 34.000462
-add.s 45785.476562 -1.000000 45786.476562
-add.s 1753449.625000 1384.599976 1752065.000000
-add.s 99.705429 -7.294568 107.000000
-add.s 999954304.000000 1000000000.000000 -45667.238281
-add.s -5793.764648 -5786.470215 -7.294568
-add.s -346104.468750 1752.000000 -347856.468750
-add.s 356047.562500 0.002457 356047.562500
-add.s -1.000000 0.000000 -1.000000
-add.s -248539.718750 -248562.765625 23.040001
-add.s -45786.476562 -45786.476562 0.000000
-add.s 912.497925 456.248962 456.248962
-add.s 37.000462 34.000462 3.000000
-add.s 45785.476562 45786.476562 -1.000000
-add.s 1753449.625000 1752065.000000 1384.599976
-add.s 99.705429 107.000000 -7.294568
-add.s 999954304.000000 -45667.238281 1000000000.000000
-add.s -5793.764648 -7.294568 -5786.470215
-add.s -346104.468750 -347856.468750 1752.000000
-add.s 356047.562500 356047.562500 0.002457
-add.s -1.000000 -1.000000 0.000000
-add.s -248539.718750 23.040001 -248562.765625
-add.d -45786.476000 0.000000 -45786.476000
-add.d 912.497912 456.248956 456.248956
-add.d 37.000460 3.000000 34.000460
-add.d 45785.476000 -1.000000 45786.476000
-add.d 1753449.600000 1384.600000 1752065.000000
-add.d 99.705432 -7.294568 107.000000
-add.d 999954332.760000 1000000000.000000 -45667.240000
-add.d -5793.764568 -5786.470000 -7.294568
-add.d -346104.475000 1752.000000 -347856.475000
-add.d 356047.562458 0.002458 356047.560000
-add.d -1.000000 0.000000 -1.000000
-add.d -248539.720000 -248562.760000 23.040000
-add.d -45786.476000 -45786.476000 0.000000
-add.d 912.497912 456.248956 456.248956
-add.d 37.000460 34.000460 3.000000
-add.d 45785.476000 45786.476000 -1.000000
-add.d 1753449.600000 1752065.000000 1384.600000
-add.d 99.705432 107.000000 -7.294568
-add.d 999954332.760000 -45667.240000 1000000000.000000
-add.d -5793.764568 -7.294568 -5786.470000
-add.d -346104.475000 -347856.475000 1752.000000
-add.d 356047.562458 356047.560000 0.002458
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diff --git a/none/tests/mips32/FPUarithmetic.stdout.exp-mips32 b/none/tests/mips32/FPUarithmetic.stdout.exp-mips32
index c33b2b2..90235fe 100644
--- a/none/tests/mips32/FPUarithmetic.stdout.exp-mips32
+++ b/none/tests/mips32/FPUarithmetic.stdout.exp-mips32
@@ -1,337 +1,1409 @@
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+sqrt.d 1323.655922 1752065.000000
+sqrt.d 10.344080 107.000000
+sqrt.d nan -45667.250000
+sqrt.d nan -7.000000
+sqrt.d nan -347856.500000
+sqrt.d 596.697159 356047.500000
+sqrt.d nan -1.000000
+sqrt.d 4.802343 23.062500
+rounding mode: near
+sub.s 456.250000 0.000000 -456.250000
+sub.s 5034.750000 456.250000 -4578.500000
+sub.s -31.031250 3.000000 34.031250
+sub.s -4579.750000 -1.000000 4578.750000
+sub.s 1209.500000 1384.500000 175.000000
+sub.s -114.250000 -7.250000 107.000000
+sub.s 1000000448.000000 1000000000.000000 -456.250000
+sub.s -5779.250000 -5786.500000 -7.250000
+sub.s 5230.500000 1752.000000 -3478.500000
+sub.s -356.484375 0.015625 356.500000
+sub.s 1.031250 0.031250 -1.000000
+sub.s -248585.812500 -248562.750000 23.062500
+sub.s 456.000000 456.000000 0.000000
+sub.s -46242.750000 -45786.500000 456.250000
+sub.s 31.031250 34.031250 3.000000
+sub.s 45787.750000 45786.750000 -1.000000
+sub.s 1750680.500000 1752065.000000 1384.500000
+sub.s 114.000000 107.000000 -7.000000
+sub.s -45767.250000 -45667.250000 100.000000
+sub.s 5779.500000 -7.000000 -5786.500000
+sub.s -349608.500000 -347856.500000 1752.000000
+sub.s 356047.500000 356047.500000 0.015625
+sub.s -1.031250 -1.000000 0.031250
+sub.s 248585.812500 23.062500 -248562.750000
+rounding mode: zero
+sub.s 456.250000 0.000000 -456.250000
+sub.s 5034.750000 456.250000 -4578.500000
+sub.s -31.031250 3.000000 34.031250
+sub.s -4579.750000 -1.000000 4578.750000
+sub.s 1209.500000 1384.500000 175.000000
+sub.s -114.250000 -7.250000 107.000000
+sub.s 1000000448.000000 1000000000.000000 -456.250000
+sub.s -5779.250000 -5786.500000 -7.250000
+sub.s 5230.500000 1752.000000 -3478.500000
+sub.s -356.484375 0.015625 356.500000
+sub.s 1.031250 0.031250 -1.000000
+sub.s -248585.812500 -248562.750000 23.062500
+sub.s 456.000000 456.000000 0.000000
+sub.s -46242.750000 -45786.500000 456.250000
+sub.s 31.031250 34.031250 3.000000
+sub.s 45787.750000 45786.750000 -1.000000
+sub.s 1750680.500000 1752065.000000 1384.500000
+sub.s 114.000000 107.000000 -7.000000
+sub.s -45767.250000 -45667.250000 100.000000
+sub.s 5779.500000 -7.000000 -5786.500000
+sub.s -349608.500000 -347856.500000 1752.000000
+sub.s 356047.468750 356047.500000 0.015625
+sub.s -1.031250 -1.000000 0.031250
+sub.s 248585.812500 23.062500 -248562.750000
+rounding mode: +inf
+sub.s 456.250000 0.000000 -456.250000
+sub.s 5034.750000 456.250000 -4578.500000
+sub.s -31.031250 3.000000 34.031250
+sub.s -4579.750000 -1.000000 4578.750000
+sub.s 1209.500000 1384.500000 175.000000
+sub.s -114.250000 -7.250000 107.000000
+sub.s 1000000512.000000 1000000000.000000 -456.250000
+sub.s -5779.250000 -5786.500000 -7.250000
+sub.s 5230.500000 1752.000000 -3478.500000
+sub.s -356.484375 0.015625 356.500000
+sub.s 1.031250 0.031250 -1.000000
+sub.s -248585.812500 -248562.750000 23.062500
+sub.s 456.000000 456.000000 0.000000
+sub.s -46242.750000 -45786.500000 456.250000
+sub.s 31.031250 34.031250 3.000000
+sub.s 45787.750000 45786.750000 -1.000000
+sub.s 1750680.500000 1752065.000000 1384.500000
+sub.s 114.000000 107.000000 -7.000000
+sub.s -45767.250000 -45667.250000 100.000000
+sub.s 5779.500000 -7.000000 -5786.500000
+sub.s -349608.500000 -347856.500000 1752.000000
+sub.s 356047.500000 356047.500000 0.015625
+sub.s -1.031250 -1.000000 0.031250
+sub.s 248585.812500 23.062500 -248562.750000
+rounding mode: -inf
+sub.s 456.250000 0.000000 -456.250000
+sub.s 5034.750000 456.250000 -4578.500000
+sub.s -31.031250 3.000000 34.031250
+sub.s -4579.750000 -1.000000 4578.750000
+sub.s 1209.500000 1384.500000 175.000000
+sub.s -114.250000 -7.250000 107.000000
+sub.s 1000000448.000000 1000000000.000000 -456.250000
+sub.s -5779.250000 -5786.500000 -7.250000
+sub.s 5230.500000 1752.000000 -3478.500000
+sub.s -356.484375 0.015625 356.500000
+sub.s 1.031250 0.031250 -1.000000
+sub.s -248585.812500 -248562.750000 23.062500
+sub.s 456.000000 456.000000 0.000000
+sub.s -46242.750000 -45786.500000 456.250000
+sub.s 31.031250 34.031250 3.000000
+sub.s 45787.750000 45786.750000 -1.000000
+sub.s 1750680.500000 1752065.000000 1384.500000
+sub.s 114.000000 107.000000 -7.000000
+sub.s -45767.250000 -45667.250000 100.000000
+sub.s 5779.500000 -7.000000 -5786.500000
+sub.s -349608.500000 -347856.500000 1752.000000
+sub.s 356047.468750 356047.500000 0.015625
+sub.s -1.031250 -1.000000 0.031250
+sub.s 248585.812500 23.062500 -248562.750000
+rounding mode: near
+sub.d 456.250000 0.000000 -456.250000
+sub.d 46242.750000 456.250000 -45786.500000
+sub.d -31.031250 3.000000 34.031250
+sub.d -45787.750000 -1.000000 45786.750000
+sub.d -1750680.500000 1384.500000 1752065.000000
+sub.d -114.250000 -7.250000 107.000000
+sub.d 1000045667.250000 1000000000.000000 -45667.250000
+sub.d -5779.250000 -5786.500000 -7.250000
+sub.d 349608.500000 1752.000000 -347856.500000
+sub.d -356047.484375 0.015625 356047.500000
+sub.d 1.031250 0.031250 -1.000000
+sub.d -248585.812500 -248562.750000 23.062500
+sub.d 456.000000 456.000000 0.000000
+sub.d -46242.750000 -45786.500000 456.250000
+sub.d 31.031250 34.031250 3.000000
+sub.d 45787.750000 45786.750000 -1.000000
+sub.d 1750680.500000 1752065.000000 1384.500000
+sub.d 114.000000 107.000000 -7.000000
+sub.d -1000045667.250000 -45667.250000 1000000000.000000
+sub.d 5779.500000 -7.000000 -5786.500000
+sub.d -349608.500000 -347856.500000 1752.000000
+sub.d 356047.484375 356047.500000 0.015625
+sub.d -1.031250 -1.000000 0.031250
+sub.d 248585.812500 23.062500 -248562.750000
+rounding mode: zero
+sub.d 456.250000 0.000000 -456.250000
+sub.d 46242.750000 456.250000 -45786.500000
+sub.d -31.031250 3.000000 34.031250
+sub.d -45787.750000 -1.000000 45786.750000
+sub.d -1750680.500000 1384.500000 1752065.000000
+sub.d -114.250000 -7.250000 107.000000
+sub.d 1000045667.250000 1000000000.000000 -45667.250000
+sub.d -5779.250000 -5786.500000 -7.250000
+sub.d 349608.500000 1752.000000 -347856.500000
+sub.d -356047.484375 0.015625 356047.500000
+sub.d 1.031250 0.031250 -1.000000
+sub.d -248585.812500 -248562.750000 23.062500
+sub.d 456.000000 456.000000 0.000000
+sub.d -46242.750000 -45786.500000 456.250000
+sub.d 31.031250 34.031250 3.000000
+sub.d 45787.750000 45786.750000 -1.000000
+sub.d 1750680.500000 1752065.000000 1384.500000
+sub.d 114.000000 107.000000 -7.000000
+sub.d -1000045667.250000 -45667.250000 1000000000.000000
+sub.d 5779.500000 -7.000000 -5786.500000
+sub.d -349608.500000 -347856.500000 1752.000000
+sub.d 356047.484375 356047.500000 0.015625
+sub.d -1.031250 -1.000000 0.031250
+sub.d 248585.812500 23.062500 -248562.750000
+rounding mode: +inf
+sub.d 456.250000 0.000000 -456.250000
+sub.d 46242.750000 456.250000 -45786.500000
+sub.d -31.031250 3.000000 34.031250
+sub.d -45787.750000 -1.000000 45786.750000
+sub.d -1750680.500000 1384.500000 1752065.000000
+sub.d -114.250000 -7.250000 107.000000
+sub.d 1000045667.250000 1000000000.000000 -45667.250000
+sub.d -5779.250000 -5786.500000 -7.250000
+sub.d 349608.500000 1752.000000 -347856.500000
+sub.d -356047.484375 0.015625 356047.500000
+sub.d 1.031250 0.031250 -1.000000
+sub.d -248585.812500 -248562.750000 23.062500
+sub.d 456.000000 456.000000 0.000000
+sub.d -46242.750000 -45786.500000 456.250000
+sub.d 31.031250 34.031250 3.000000
+sub.d 45787.750000 45786.750000 -1.000000
+sub.d 1750680.500000 1752065.000000 1384.500000
+sub.d 114.000000 107.000000 -7.000000
+sub.d -1000045667.250000 -45667.250000 1000000000.000000
+sub.d 5779.500000 -7.000000 -5786.500000
+sub.d -349608.500000 -347856.500000 1752.000000
+sub.d 356047.484375 356047.500000 0.015625
+sub.d -1.031250 -1.000000 0.031250
+sub.d 248585.812500 23.062500 -248562.750000
+rounding mode: -inf
+sub.d 456.250000 0.000000 -456.250000
+sub.d 46242.750000 456.250000 -45786.500000
+sub.d -31.031250 3.000000 34.031250
+sub.d -45787.750000 -1.000000 45786.750000
+sub.d -1750680.500000 1384.500000 1752065.000000
+sub.d -114.250000 -7.250000 107.000000
+sub.d 1000045667.250000 1000000000.000000 -45667.250000
+sub.d -5779.250000 -5786.500000 -7.250000
+sub.d 349608.500000 1752.000000 -347856.500000
+sub.d -356047.484375 0.015625 356047.500000
+sub.d 1.031250 0.031250 -1.000000
+sub.d -248585.812500 -248562.750000 23.062500
+sub.d 456.000000 456.000000 0.000000
+sub.d -46242.750000 -45786.500000 456.250000
+sub.d 31.031250 34.031250 3.000000
+sub.d 45787.750000 45786.750000 -1.000000
+sub.d 1750680.500000 1752065.000000 1384.500000
+sub.d 114.000000 107.000000 -7.000000
+sub.d -1000045667.250000 -45667.250000 1000000000.000000
+sub.d 5779.500000 -7.000000 -5786.500000
+sub.d -349608.500000 -347856.500000 1752.000000
+sub.d 356047.484375 356047.500000 0.015625
+sub.d -1.031250 -1.000000 0.031250
+sub.d 248585.812500 23.062500 -248562.750000
+rounding mode: near
+rounding mode: zero
+rounding mode: +inf
+rounding mode: -inf
+rounding mode: near
+rounding mode: zero
+rounding mode: +inf
+rounding mode: -inf
diff --git a/none/tests/mips32/LoadStore.c b/none/tests/mips32/LoadStore.c
index b6408a5..08bc41c 100644
--- a/none/tests/mips32/LoadStore.c
+++ b/none/tests/mips32/LoadStore.c
@@ -80,7 +80,7 @@
m[i+1] = 0;
m[i+2] = 0;
m[i+3] = 0;
- if (i == 2)
+ if (i == 2)
{
m[i] = 0xffffffff;
m[i+1] = 0;
diff --git a/none/tests/mips32/MemCpyTest.c b/none/tests/mips32/MemCpyTest.c
index 831c46e..5507df5 100644
--- a/none/tests/mips32/MemCpyTest.c
+++ b/none/tests/mips32/MemCpyTest.c
@@ -30,7 +30,7 @@
unsigned int mem2[100];
-int main ()
+int main ()
{
int i, out;
for (i = 0; i < 100; i++)
diff --git a/none/tests/mips32/MoveIns.c b/none/tests/mips32/MoveIns.c
index 53ec672..4d14750 100644
--- a/none/tests/mips32/MoveIns.c
+++ b/none/tests/mips32/MoveIns.c
@@ -168,6 +168,7 @@
"mtc1 $t1, $f2\n\t" \
"c.eq.s $f0, $f2\n\t" \
"move $t0, %2\n\t" \
+ "lwc1 $" #FD ", 4($t0)\n\t" \
"lwc1 $" #FS ", "#offset"($t0)\n\t" \
instruction "\n\t" \
"mov.s %0, $" #FD"\n\t" \
@@ -190,8 +191,9 @@
"move $t1, %3\n\t" \
"mtc1 $t0, $f0\n\t" \
"mtc1 $t1, $f2\n\t" \
- "c.eq.s $f0, $f2\n\t" \
"move $t0, %4\n\t" \
+ "ldc1 $f4, 8($t0)\n\t" \
+ "c.eq.s $f0, $f2\n\t" \
"ldc1 $" #FS ", "#offset"($t0)\n\t" \
instruction "\n\t" \
"mov.d %0, $" #FD"\n\t" \
diff --git a/none/tests/mips32/MoveIns.stdout.exp b/none/tests/mips32/MoveIns.stdout.exp
index 70306ee..aebcdba 100644
--- a/none/tests/mips32/MoveIns.stdout.exp
+++ b/none/tests/mips32/MoveIns.stdout.exp
@@ -128,21 +128,21 @@
movf $t0, $t1, $fcc4 :: out: 0x0, RDval: 0xffffffff, RSval: 0x0, cc: 1
movf $t0, $t1, $fcc4 :: out: 0x42, RDval: 0xffffffff, RSval: 0x42, cc: 0
MOVF.S
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
-movf.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
+movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
movf.s $f4, $f6, $fcc0 :: out: 0.000000, cc: 0
movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
movf.s $f4, $f6, $fcc0 :: out: 3.000000, cc: 0
@@ -159,21 +159,21 @@
movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
movf.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
MOVF.D
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0x43e41fde, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
movf.d $f4, $f6, $fcc0 :: out: 0x42026580 0xb750e388, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0x3e45798e 0xe2308c3a, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0x3fbf9add 0x3746f65f, cc: 0
@@ -256,21 +256,21 @@
movt.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 1
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
MOVT.D
movt.d $f4, $f6, $fcc0 :: out: 0x4095a266 0x66666666, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 1
@@ -287,21 +287,21 @@
movt.d $f4, $f6, $fcc0 :: out: 0x252a2e2b 0x262d2d2a, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0xffffffff 0xffffffff, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 1
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0x41d26580 0xb487e5c9, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0xbff00000 0x0, cc: 0
MOVZ.S
movz.s $f0, $f2, $t3 :: fs rt 0x0
movz.s $f0, $f2, $t3 :: fs rt 0x0
diff --git a/none/tests/mips32/MoveIns.stdout.exp-BE b/none/tests/mips32/MoveIns.stdout.exp-BE
index 2ff43c2..4a54959 100644
--- a/none/tests/mips32/MoveIns.stdout.exp-BE
+++ b/none/tests/mips32/MoveIns.stdout.exp-BE
@@ -159,21 +159,21 @@
movf.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
movf.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
MOVF.D
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
-movf.d $f4, $f6, $fcc0 :: out: 0x42080079 0xc732da7a, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
+movf.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
movf.d $f4, $f6, $fcc0 :: out: 0xb750e388 0x42026580, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0xe2308c3a 0x3e45798e, cc: 0
movf.d $f4, $f6, $fcc0 :: out: 0x3746f65f 0x3fbf9add, cc: 0
@@ -256,21 +256,21 @@
movt.s $f4, $f6, $fcc0 :: out: -45786.476562, cc: 1
movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 1
movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 1
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
-movt.s $f4, $f6, $fcc0 :: out: 34.000462, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
+movt.s $f4, $f6, $fcc0 :: out: 456.248962, cc: 0
MOVT.D
movt.d $f4, $f6, $fcc0 :: out: 0x66666666 0x4095a266, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 1
@@ -287,21 +287,21 @@
movt.d $f4, $f6, $fcc0 :: out: 0x262d2d2a 0x252a2e2b, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0xffffffff 0xffffffff, cc: 1
movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 1
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
-movt.d $f4, $f6, $fcc0 :: out: 0xb487e5c9 0x41d26580, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
+movt.d $f4, $f6, $fcc0 :: out: 0x0 0xbff00000, cc: 0
MOVZ.S
movz.s $f0, $f2, $t3 :: fs rt 0x0
movz.s $f0, $f2, $t3 :: fs rt 0x0
diff --git a/none/tests/mips32/SignalException.c b/none/tests/mips32/SignalException.c
index 08b03f6..bc19e04 100644
--- a/none/tests/mips32/SignalException.c
+++ b/none/tests/mips32/SignalException.c
@@ -1,4 +1,4 @@
-/*
+/*
Check that a fault signal handler gets the expected info
*/
#include <signal.h>
diff --git a/none/tests/mips32/branches.c b/none/tests/mips32/branches.c
index 67ce285..f455195 100644
--- a/none/tests/mips32/branches.c
+++ b/none/tests/mips32/branches.c
@@ -241,7 +241,7 @@
out, RSval); \
}
-int main()
+int main()
{
printf("b \n");
TESTINST1(0, v0);
diff --git a/none/tests/mips32/round.c b/none/tests/mips32/round.c
index 0f78541..60c0ad5 100644
--- a/none/tests/mips32/round.c
+++ b/none/tests/mips32/round.c
@@ -32,11 +32,11 @@
};
const double fs_d[] = {
- 0, 456.25, 3, -1,
- 1384.5, -7.25, 1000000000, -5786.25,
- 1752, 0.015625, 0.03125, -248562.75,
- -45786.5, 456, 34.03125, 45786.75,
- 1752065, 107, -45667.25, -7,
+ 0, 456.25, 3, -1,
+ 1384.5, -7.25, 1000000000, -5786.25,
+ 1752, 0.015625, 0.03125, -248562.75,
+ -45786.5, 456, 34.03125, 45786.75,
+ 1752065, 107, -45667.25, -7,
-347856.5, 356047, -1.25, 23.0625
};
@@ -165,7 +165,9 @@
int fd_w = 0;
int i;
int fcsr = 0;
+ round_mode_t rm = TO_NEAREST;
for (i = 0; i < 24; i++) {
+ set_rounding_mode(rm);
switch(op) {
case CEILWS:
UNOPfw("ceil.w.s");
@@ -215,7 +217,7 @@
return 0;
}
-int FCSRRoundingMode(flt_round_op_t op1)
+int FCSRRoundingMode(flt_round_op_t op1)
{
double fd_d = 0;
float fd_f = 0;
@@ -223,7 +225,7 @@
int i;
int fcsr = 0;
round_mode_t rm;
- for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
+ for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
set_rounding_mode(rm);
printf("roundig mode: %s\n", round_mode_name[rm]);
for (i = 0; i < 24; i++) {
@@ -278,7 +280,7 @@
for (op = CEILWS; op <= TRUNCWD; op++) {
directedRoundingMode(op);
}
-
+
printf("-------------------------- %s --------------------------\n",
"test FPU Conversion Operations Using the FCSR Rounding Mode");
for (op1 = CVTDS; op1 <= CVTWD; op1++) {
diff --git a/none/tests/mips32/vfp.c b/none/tests/mips32/vfp.c
index 5f84ef4..5f60a7a 100644
--- a/none/tests/mips32/vfp.c
+++ b/none/tests/mips32/vfp.c
@@ -364,7 +364,7 @@
TESTINST1(64);
ppMem(mem1, 16);
-#if (__mips==32) && (__mips_isa_rev>=2)
+#if (__mips==32) && (__mips_isa_rev>=2)
printf("SDXC1\n");
TESTINST1a(0);
TESTINST1a(8);
@@ -390,7 +390,7 @@
TESTINST2(64);
ppMemF(mem1f, 16);
-#if (__mips==32) && (__mips_isa_rev>=2)
+#if (__mips==32) && (__mips_isa_rev>=2)
printf("SWXC1\n");
TESTINST2a(0);
TESTINST2a(8);
