mips32/64: Save the value of FCSR register at the beginning and restore it
back at the end of dirty helper.
git-svn-id: svn://svn.valgrind.org/vex/trunk@2772 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest_mips_helpers.c b/priv/guest_mips_helpers.c
index 8cb41a2..df19d5f 100644
--- a/priv/guest_mips_helpers.c
+++ b/priv/guest_mips_helpers.c
@@ -1093,24 +1093,28 @@
#endif
#define ASM_VOLATILE_ROUND32(fs, inst) \
- __asm__ volatile("ctc1 %3, $31" "\n\t" \
+ __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ "ctc1 %3, $31" "\n\t" \
"mtc1 %1, $f0" "\n\t" \
"mtc1 %2, $f1" "\n\t" \
""#inst" $f0, $f0" "\n\t" \
"cfc1 %0, $31" "\n\t" \
+ "ctc1 $t0, $31" "\n\t" \
: "=r" (ret) \
: "r" (addr[fs]), "r" (addr[fs+1]), "r" (fcsr) \
- : "$f0", "$f1" \
+ : "t0", "$f0", "$f1" \
);
#define ASM_VOLATILE_ROUND64(fs, inst) \
- __asm__ volatile("ctc1 %2, $31" "\n\t" \
+ __asm__ volatile("cfc1 $t0, $31" "\n\t" \
+ "ctc1 %2, $31" "\n\t" \
"dmtc1 %1, $f0" "\n\t" \
""#inst" $f0, $f0" "\n\t" \
"cfc1 %0, $31" "\n\t" \
+ "ctc1 $t0, $31" "\n\t" \
: "=r" (ret) \
: "r" (addr[fs]), "r" (fcsr) \
- : "$f0" \
+ : "t0", "$f0" \
);
/* TODO: Add cases for all fpu instructions because all fpu instructions are
