Fix algebraic simplification for Iop_AndV256.
git-svn-id: svn://svn.valgrind.org/vex/trunk@2902 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/ir_opt.c b/priv/ir_opt.c
index 03a06e3..ded3018 100644
--- a/priv/ir_opt.c
+++ b/priv/ir_opt.c
@@ -1253,6 +1253,7 @@
case Iop_Xor64: return IRExpr_Const(IRConst_U64(0));
case Iop_XorV128:
case Iop_AndV128: return IRExpr_Const(IRConst_V128(0));
+ case Iop_AndV256: return IRExpr_Const(IRConst_V256(0));
default: vpanic("mkZeroOfPrimopResultType: bad primop");
}
}
@@ -2195,9 +2196,9 @@
}
/* Deal with either arg zero. Could handle other And
cases here too. */
- if (e->Iex.Binop.op == Iop_And64
- && (isZeroU64(e->Iex.Binop.arg1)
- || isZeroU64(e->Iex.Binop.arg2))) {
+ if (e->Iex.Binop.op == Iop_AndV256
+ && (isZeroV256(e->Iex.Binop.arg1)
+ || isZeroV256(e->Iex.Binop.arg2))) {
e2 = mkZeroOfPrimopResultType(e->Iex.Binop.op);
break;
} else if (e->Iex.Binop.op == Iop_AndV128