Fix a few undefined behaviours that were found by compiling valgrind
with GCC 4.9.2 using -fsanitize=undefined and running the testsuite.
git-svn-id: svn://svn.valgrind.org/vex/trunk@3099 8f6e269a-dfd6-0310-a8e1-e2731360e62c
diff --git a/priv/guest_amd64_helpers.c b/priv/guest_amd64_helpers.c
index aa1f2d5..b45a235 100644
--- a/priv/guest_amd64_helpers.c
+++ b/priv/guest_amd64_helpers.c
@@ -151,7 +151,7 @@
static inline Long lshift ( Long x, Int n )
{
if (n >= 0)
- return x << n;
+ return (ULong)x << n;
else
return x >> (-n);
}
@@ -190,8 +190,8 @@
#define ACTIONS_ADD(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, res; \
argL = CC_DEP1; \
argR = CC_DEP2; \
res = argL + argR; \
@@ -211,8 +211,8 @@
#define ACTIONS_SUB(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, res; \
argL = CC_DEP1; \
argR = CC_DEP2; \
res = argL - argR; \
@@ -232,8 +232,8 @@
#define ACTIONS_ADC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, oldC, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, oldC, res; \
oldC = CC_NDEP & AMD64G_CC_MASK_C; \
argL = CC_DEP1; \
argR = CC_DEP2 ^ oldC; \
@@ -257,8 +257,8 @@
#define ACTIONS_SBB(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, oldC, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, oldC, res; \
oldC = CC_NDEP & AMD64G_CC_MASK_C; \
argL = CC_DEP1; \
argR = CC_DEP2 ^ oldC; \
@@ -282,7 +282,7 @@
#define ACTIONS_LOGIC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = 0; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; \
@@ -298,8 +298,8 @@
#define ACTIONS_INC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, res; \
res = CC_DEP1; \
argL = res - 1; \
argR = 1; \
@@ -318,8 +318,8 @@
#define ACTIONS_DEC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
- Long argL, argR, res; \
+ { ULong cf, pf, af, zf, sf, of; \
+ ULong argL, argR, res; \
res = CC_DEP1; \
argL = res + 1; \
argR = 1; \
@@ -339,7 +339,7 @@
#define ACTIONS_SHL(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = (CC_DEP2 >> (DATA_BITS - 1)) & AMD64G_CC_MASK_C; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; /* undefined */ \
@@ -357,7 +357,7 @@
#define ACTIONS_SHR(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = CC_DEP2 & 1; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; /* undefined */ \
@@ -377,7 +377,7 @@
#define ACTIONS_ROL(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long fl \
+ { ULong fl \
= (CC_NDEP & ~(AMD64G_CC_MASK_O | AMD64G_CC_MASK_C)) \
| (AMD64G_CC_MASK_C & CC_DEP1) \
| (AMD64G_CC_MASK_O & (lshift(CC_DEP1, \
@@ -394,7 +394,7 @@
#define ACTIONS_ROR(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long fl \
+ { ULong fl \
= (CC_NDEP & ~(AMD64G_CC_MASK_O | AMD64G_CC_MASK_C)) \
| (AMD64G_CC_MASK_C & (CC_DEP1 >> (DATA_BITS-1))) \
| (AMD64G_CC_MASK_O & (lshift(CC_DEP1, \
@@ -410,7 +410,7 @@
DATA_U2TYPE, NARROWto2U) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
DATA_UTYPE hi; \
DATA_UTYPE lo \
= NARROWtoU( ((DATA_UTYPE)CC_DEP1) \
@@ -436,7 +436,7 @@
DATA_S2TYPE, NARROWto2S) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
DATA_STYPE hi; \
DATA_STYPE lo \
= NARROWtoS( ((DATA_STYPE)CC_DEP1) \
@@ -461,7 +461,7 @@
#define ACTIONS_UMULQ \
{ \
PREAMBLE(64); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
ULong lo, hi; \
mullU64( (ULong)CC_DEP1, (ULong)CC_DEP2, &hi, &lo ); \
cf = (hi != 0); \
@@ -479,7 +479,7 @@
#define ACTIONS_SMULQ \
{ \
PREAMBLE(64); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
Long lo, hi; \
mullS64( (Long)CC_DEP1, (Long)CC_DEP2, &hi, &lo ); \
cf = (hi != (lo >>/*s*/ (64-1))); \
@@ -497,7 +497,7 @@
#define ACTIONS_ANDN(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = 0; \
pf = 0; \
af = 0; \
@@ -513,7 +513,7 @@
#define ACTIONS_BLSI(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = ((DATA_UTYPE)CC_DEP2 != 0); \
pf = 0; \
af = 0; \
@@ -545,7 +545,7 @@
#define ACTIONS_BLSR(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Long cf, pf, af, zf, sf, of; \
+ { ULong cf, pf, af, zf, sf, of; \
cf = ((DATA_UTYPE)CC_DEP2 == 0); \
pf = 0; \
af = 0; \
diff --git a/priv/guest_amd64_toIR.c b/priv/guest_amd64_toIR.c
index 5e9d0bd..f3fe669 100644
--- a/priv/guest_amd64_toIR.c
+++ b/priv/guest_amd64_toIR.c
@@ -474,17 +474,17 @@
static ULong extend_s_8to64 ( UChar x )
{
- return (ULong)((((Long)x) << 56) >> 56);
+ return (ULong)((Long)(((ULong)x) << 56) >> 56);
}
static ULong extend_s_16to64 ( UShort x )
{
- return (ULong)((((Long)x) << 48) >> 48);
+ return (ULong)((Long)(((ULong)x) << 48) >> 48);
}
static ULong extend_s_32to64 ( UInt x )
{
- return (ULong)((((Long)x) << 32) >> 32);
+ return (ULong)((Long)(((ULong)x) << 32) >> 32);
}
/* Figure out whether the mod and rm parts of a modRM byte refer to a
diff --git a/priv/guest_x86_helpers.c b/priv/guest_x86_helpers.c
index 66a571f..ecf6f89 100644
--- a/priv/guest_x86_helpers.c
+++ b/priv/guest_x86_helpers.c
@@ -113,7 +113,7 @@
inline static Int lshift ( Int x, Int n )
{
if (n >= 0)
- return x << n;
+ return (UInt)x << n;
else
return x >> (-n);
}
@@ -130,7 +130,7 @@
= __data_bits==8 ? 0xFF \
: (__data_bits==16 ? 0xFFFF \
: 0xFFFFFFFF); \
- /* const */ UInt SIGN_MASK = 1 << (__data_bits - 1); \
+ /* const */ UInt SIGN_MASK = 1u << (__data_bits - 1); \
/* const */ UInt CC_DEP1 = cc_dep1_formal; \
/* const */ UInt CC_DEP2 = cc_dep2_formal; \
/* const */ UInt CC_NDEP = cc_ndep_formal; \
@@ -148,8 +148,8 @@
#define ACTIONS_ADD(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, res; \
argL = CC_DEP1; \
argR = CC_DEP2; \
res = argL + argR; \
@@ -169,8 +169,8 @@
#define ACTIONS_SUB(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, res; \
argL = CC_DEP1; \
argR = CC_DEP2; \
res = argL - argR; \
@@ -190,8 +190,8 @@
#define ACTIONS_ADC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, oldC, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, oldC, res; \
oldC = CC_NDEP & X86G_CC_MASK_C; \
argL = CC_DEP1; \
argR = CC_DEP2 ^ oldC; \
@@ -215,8 +215,8 @@
#define ACTIONS_SBB(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, oldC, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, oldC, res; \
oldC = CC_NDEP & X86G_CC_MASK_C; \
argL = CC_DEP1; \
argR = CC_DEP2 ^ oldC; \
@@ -240,7 +240,7 @@
#define ACTIONS_LOGIC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
+ { UInt cf, pf, af, zf, sf, of; \
cf = 0; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; \
@@ -256,8 +256,8 @@
#define ACTIONS_INC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, res; \
res = CC_DEP1; \
argL = res - 1; \
argR = 1; \
@@ -276,8 +276,8 @@
#define ACTIONS_DEC(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
- Int argL, argR, res; \
+ { UInt cf, pf, af, zf, sf, of; \
+ UInt argL, argR, res; \
res = CC_DEP1; \
argL = res + 1; \
argR = 1; \
@@ -297,7 +297,7 @@
#define ACTIONS_SHL(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
+ { UInt cf, pf, af, zf, sf, of; \
cf = (CC_DEP2 >> (DATA_BITS - 1)) & X86G_CC_MASK_C; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; /* undefined */ \
@@ -315,7 +315,7 @@
#define ACTIONS_SHR(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
+ { UInt cf, pf, af, zf, sf, of; \
cf = CC_DEP2 & 1; \
pf = parity_table[(UChar)CC_DEP1]; \
af = 0; /* undefined */ \
@@ -335,7 +335,7 @@
#define ACTIONS_ROL(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int fl \
+ { UInt fl \
= (CC_NDEP & ~(X86G_CC_MASK_O | X86G_CC_MASK_C)) \
| (X86G_CC_MASK_C & CC_DEP1) \
| (X86G_CC_MASK_O & (lshift(CC_DEP1, \
@@ -352,7 +352,7 @@
#define ACTIONS_ROR(DATA_BITS,DATA_UTYPE) \
{ \
PREAMBLE(DATA_BITS); \
- { Int fl \
+ { UInt fl \
= (CC_NDEP & ~(X86G_CC_MASK_O | X86G_CC_MASK_C)) \
| (X86G_CC_MASK_C & (CC_DEP1 >> (DATA_BITS-1))) \
| (X86G_CC_MASK_O & (lshift(CC_DEP1, \
@@ -368,7 +368,7 @@
DATA_U2TYPE, NARROWto2U) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
+ { UInt cf, pf, af, zf, sf, of; \
DATA_UTYPE hi; \
DATA_UTYPE lo \
= NARROWtoU( ((DATA_UTYPE)CC_DEP1) \
@@ -394,7 +394,7 @@
DATA_S2TYPE, NARROWto2S) \
{ \
PREAMBLE(DATA_BITS); \
- { Int cf, pf, af, zf, sf, of; \
+ { UInt cf, pf, af, zf, sf, of; \
DATA_STYPE hi; \
DATA_STYPE lo \
= NARROWtoS( ((DATA_STYPE)CC_DEP1) \
diff --git a/priv/guest_x86_toIR.c b/priv/guest_x86_toIR.c
index 9b2294e..c614f65 100644
--- a/priv/guest_x86_toIR.c
+++ b/priv/guest_x86_toIR.c
@@ -326,12 +326,12 @@
static UInt extend_s_8to32( UInt x )
{
- return (UInt)((((Int)x) << 24) >> 24);
+ return (UInt)((Int)(x << 24) >> 24);
}
static UInt extend_s_16to32 ( UInt x )
{
- return (UInt)((((Int)x) << 16) >> 16);
+ return (UInt)((Int)(x << 16) >> 16);
}
/* Fetch a byte from the guest insn stream. */
diff --git a/priv/host_amd64_defs.c b/priv/host_amd64_defs.c
index 4cfd9a4..97215a3 100644
--- a/priv/host_amd64_defs.c
+++ b/priv/host_amd64_defs.c
@@ -2059,16 +2059,15 @@
static Bool fits8bits ( UInt w32 )
{
Int i32 = (Int)w32;
- return toBool(i32 == ((i32 << 24) >> 24));
+ return toBool(i32 == ((Int)(w32 << 24) >> 24));
}
/* Can the lower 32 bits be signedly widened to produce the whole
64-bit value? In other words, are the top 33 bits either all 0 or
all 1 ? */
static Bool fitsIn32Bits ( ULong x )
{
- Long y0 = (Long)x;
- Long y1 = y0;
- y1 <<= 32;
+ Long y1;
+ y1 = x << 32;
y1 >>=/*s*/ 32;
return toBool(x == y1);
}
diff --git a/priv/host_amd64_isel.c b/priv/host_amd64_isel.c
index a10e1fc..8646037 100644
--- a/priv/host_amd64_isel.c
+++ b/priv/host_amd64_isel.c
@@ -283,9 +283,8 @@
all 1 ? */
static Bool fitsIn32Bits ( ULong x )
{
- Long y0 = (Long)x;
- Long y1 = y0;
- y1 <<= 32;
+ Long y1;
+ y1 = x << 32;
y1 >>=/*s*/ 32;
return toBool(x == y1);
}
@@ -348,7 +347,7 @@
/* If uimm64 can be expressed as the sign extension of its
lower 32 bits, we can do it the easy way. */
Long simm64 = (Long)uimm64;
- if ( simm64 == ((simm64 << 32) >> 32) ) {
+ if ( simm64 == ((Long)(uimm64 << 32) >> 32) ) {
addInstr( env, AMD64Instr_Push(AMD64RMI_Imm( (UInt)uimm64 )) );
} else {
HReg tmp = newVRegI(env);
diff --git a/priv/host_generic_simd128.c b/priv/host_generic_simd128.c
index 1008de1..22df708 100644
--- a/priv/host_generic_simd128.c
+++ b/priv/host_generic_simd128.c
@@ -44,7 +44,7 @@
static inline UInt mul32 ( Int xx, Int yy )
{
- Int t = ((Int)xx) * ((Int)yy);
+ Long t = ((Long)xx) * ((Long)yy);
return toUInt(t);
}
diff --git a/priv/host_x86_defs.c b/priv/host_x86_defs.c
index a8a6798..a059b78 100644
--- a/priv/host_x86_defs.c
+++ b/priv/host_x86_defs.c
@@ -1894,7 +1894,7 @@
static Bool fits8bits ( UInt w32 )
{
Int i32 = (Int)w32;
- return toBool(i32 == ((i32 << 24) >> 24));
+ return toBool(i32 == ((Int)(w32 << 24) >> 24));
}
diff --git a/priv/ir_opt.c b/priv/ir_opt.c
index 7207b88..01871bf 100644
--- a/priv/ir_opt.c
+++ b/priv/ir_opt.c
@@ -1414,17 +1414,17 @@
break;
case Iop_8Sto32: {
- /* signed */ Int s32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U8;
- s32 <<= 24;
- s32 >>= 24;
- e2 = IRExpr_Const(IRConst_U32((UInt)s32));
+ UInt u32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U8;
+ u32 <<= 24;
+ u32 = (Int)u32 >> 24; /* signed shift */
+ e2 = IRExpr_Const(IRConst_U32(u32));
break;
}
case Iop_16Sto32: {
- /* signed */ Int s32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
- s32 <<= 16;
- s32 >>= 16;
- e2 = IRExpr_Const(IRConst_U32( (UInt)s32) );
+ UInt u32 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ u32 <<= 16;
+ u32 = (Int)u32 >> 16; /* signed shift */
+ e2 = IRExpr_Const(IRConst_U32(u32));
break;
}
case Iop_8Uto64:
@@ -1440,10 +1440,10 @@
0xFF & e->Iex.Unop.arg->Iex.Const.con->Ico.U8));
break;
case Iop_8Sto16: {
- /* signed */ Short s16 = e->Iex.Unop.arg->Iex.Const.con->Ico.U8;
- s16 <<= 8;
- s16 >>= 8;
- e2 = IRExpr_Const(IRConst_U16( (UShort)s16) );
+ UShort u16 = e->Iex.Unop.arg->Iex.Const.con->Ico.U8;
+ u16 <<= 8;
+ u16 = (Short)u16 >> 8; /* signed shift */
+ e2 = IRExpr_Const(IRConst_U16(u16));
break;
}
case Iop_8Uto16:
@@ -1529,17 +1529,17 @@
& e->Iex.Unop.arg->Iex.Const.con->Ico.U32));
break;
case Iop_16Sto64: {
- /* signed */ Long s64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
- s64 <<= 48;
- s64 >>= 48;
- e2 = IRExpr_Const(IRConst_U64((ULong)s64));
+ ULong u64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U16;
+ u64 <<= 48;
+ u64 = (Long)u64 >> 48; /* signed shift */
+ e2 = IRExpr_Const(IRConst_U64(u64));
break;
}
case Iop_32Sto64: {
- /* signed */ Long s64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U32;
- s64 <<= 32;
- s64 >>= 32;
- e2 = IRExpr_Const(IRConst_U64((ULong)s64));
+ ULong u64 = e->Iex.Unop.arg->Iex.Const.con->Ico.U32;
+ u64 <<= 32;
+ u64 = (Long)u64 >> 32; /* signed shift */
+ e2 = IRExpr_Const(IRConst_U64(u64));
break;
}
