tensorflow/lite/experimental/micro/kernels/cmsis-nn/depthwise_conv.cc - platform/external/tensorflow - Git at Google

 /* Copyright 2019 The TensorFlow Authors. All Rights Reserved.

 Licensed under the Apache License, Version 2.0 (the "License");
 you may not use this file except in compliance with the License.
 You may obtain a copy of the License at

     http://www.apache.org/licenses/LICENSE-2.0

 Unless required by applicable law or agreed to in writing, software
 distributed under the License is distributed on an "AS IS" BASIS,
 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 See the License for the specific language governing permissions and
 limitations under the License.
 ==============================================================================*/

 #include "arm_nnfunctions.h"
 #include "tensorflow/lite/c/builtin_op_data.h"
 #include "tensorflow/lite/c/c_api_internal.h"
 #include "tensorflow/lite/kernels/internal/common.h"
 #include "tensorflow/lite/kernels/internal/quantization_util.h"
 #include "tensorflow/lite/kernels/internal/reference/depthwiseconv_float.h"
 #include "tensorflow/lite/kernels/internal/reference/depthwiseconv_uint8.h"
 #include "tensorflow/lite/kernels/internal/reference/integer_ops/depthwise_conv.h"
 #include "tensorflow/lite/kernels/internal/tensor_ctypes.h"
 #include "tensorflow/lite/kernels/kernel_util.h"
 #include "tensorflow/lite/kernels/padding.h"
 #include "tensorflow/lite/experimental/micro/kernels/cmsis-nn/scratch_buffer.h"

 namespace tflite {
 namespace ops {
 namespace micro {
 namespace depthwise_conv {
 namespace {

 constexpr int kInputTensor = 0;
 constexpr int kFilterTensor = 1;
 constexpr int kBiasTensor = 2;
 constexpr int kOutputTensor = 0;
 constexpr int kMaxChannels = 256;

 struct OpData {
   TfLitePaddingValues padding;
   // The scaling factor from input to output (aka the 'real multiplier') can
   // be represented as a fixed point multiplier plus a left shift.
   int32_t output_multiplier;
   int output_shift;

   // Per channel output multiplier and shift.
   // TODO(b/141139247): Allocate these dynamically when possible.
   int32_t per_channel_output_multiplier[kMaxChannels];
   int32_t per_channel_output_shift[kMaxChannels];

   // The range of the fused activation layer. For example for kNone and
   // uint8_t these would be 0 and 255.
   int32_t output_activation_min;
   int32_t output_activation_max;
 };

 TfLiteStatus CalculateOpData(TfLiteContext* context, TfLiteNode* node,
                              TfLiteDepthwiseConvParams* params, int width,
                              int height, int filter_width, int filter_height,
                              const TfLiteType data_type, OpData* data) {
   bool has_bias = node->inputs->size == 3;
   // Check number of inputs/outputs
   TF_LITE_ENSURE(context, has_bias || node->inputs->size == 2);
   TF_LITE_ENSURE_EQ(context, node->outputs->size, 1);

   int unused_output_height, unused_output_width;
   data->padding = ComputePaddingHeightWidth(
       params->stride_height, params->stride_width, 1, 1, height, width,
       filter_height, filter_width, params->padding, &unused_output_height,
       &unused_output_width);

   // Note that quantized inference requires that all tensors have their
   // parameters set. This is usually done during quantized training.
   if (data_type != kTfLiteFloat32) {
     const TfLiteTensor* input = GetInput(context, node, kInputTensor);
     const TfLiteTensor* filter = GetInput(context, node, kFilterTensor);
     const TfLiteTensor* bias =
         GetOptionalInputTensor(context, node, kBiasTensor);
     TfLiteTensor* output = GetOutput(context, node, kOutputTensor);

     TF_LITE_ENSURE_STATUS(tflite::PopulateConvolutionQuantizationParams(
         context, input, filter, bias, output, params->activation,
         &data->output_multiplier, &data->output_shift,
         &data->output_activation_min, &data->output_activation_max,
         data->per_channel_output_multiplier,
         reinterpret_cast<int*>(data->per_channel_output_shift)));
   }
   return kTfLiteOk;
 }

 }  // namespace

 void* Init(TfLiteContext* context, const char* buffer, size_t length) {
   return nullptr;
 }

 void Free(TfLiteContext* context, void* buffer) {}

 TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
   return kTfLiteOk;
 }

 TfLiteStatus EvalFloat(TfLiteContext* context, TfLiteNode* node,
                        TfLiteDepthwiseConvParams* params, OpData* data,
                        const TfLiteTensor* input, const TfLiteTensor* filter,
                        const TfLiteTensor* bias, TfLiteTensor* output) {
   float output_activation_min, output_activation_max;
   CalculateActivationRange(params->activation, &output_activation_min,
                            &output_activation_max);

   tflite::DepthwiseParams op_params;
   // Padding type is ignored, but still set.
   op_params.padding_type = PaddingType::kSame;
   op_params.padding_values.width = data->padding.width;
   op_params.padding_values.height = data->padding.height;
   op_params.stride_width = params->stride_width;
   op_params.stride_height = params->stride_height;
   op_params.dilation_width_factor = 1;
   op_params.dilation_height_factor = 1;
   op_params.depth_multiplier = params->depth_multiplier;
   op_params.float_activation_min = output_activation_min;
   op_params.float_activation_max = output_activation_max;

   tflite::reference_ops::DepthwiseConv(
       op_params, GetTensorShape(input), GetTensorData<float>(input),
       GetTensorShape(filter), GetTensorData<float>(filter),
       GetTensorShape(bias), GetTensorData<float>(bias), GetTensorShape(output),
       GetTensorData<float>(output));
   return kTfLiteOk;
 }

 TfLiteStatus EvalQuantizedPerChannel(TfLiteContext* context, TfLiteNode* node,
                              TfLiteDepthwiseConvParams* params, OpData* data,
                              const TfLiteTensor* input,
                              const TfLiteTensor* filter,
                              const TfLiteTensor* bias, TfLiteTensor* output) {
 #if defined(ARM_MATH_DSP) && defined(ARM_MATH_LOOPUNROLL)
     DepthwiseParams op_params;
     op_params.padding_type = PaddingType::kSame;
     op_params.padding_values.width = data->padding.width;
     op_params.padding_values.height = data->padding.height;
     op_params.stride_width = params->stride_width;
     op_params.stride_height = params->stride_height;
     op_params.dilation_width_factor = params->dilation_width_factor;
     op_params.dilation_height_factor = params->dilation_height_factor;
     op_params.depth_multiplier = params->depth_multiplier;
     op_params.input_offset = -input->params.zero_point;
     op_params.weights_offset = 0;
     op_params.output_offset = output->params.zero_point;
     // TODO(b/130439627): Use calculated value for clamping.
     op_params.quantized_activation_min = std::numeric_limits<int8_t>::min();
     op_params.quantized_activation_max = std::numeric_limits<int8_t>::max();
     RuntimeShape filter_shape = GetTensorShape(filter);
     const int filter_height = filter_shape.Dims(1);
     const int filter_width = filter_shape.Dims(2);
     RuntimeShape input_shape = GetTensorShape(input);
     const int input_height = input_shape.Dims(1);
     const int input_width = input_shape.Dims(2);
     const int input_depth = input_shape.Dims(3);
     RuntimeShape output_shape = GetTensorShape(output);
     const int output_height = output_shape.Dims(1);
     const int output_width = output_shape.Dims(2);
     RuntimeShape bias_shape = GetTensorShape(bias);

     if (op_params.depth_multiplier == 1) {
       int16_t* buf = nullptr;
       const int32_t buf_size =
         arm_depthwise_conv_s8_opt_get_buffer_size(input_depth,
                                                   filter_width,
                                                   filter_height);
       TF_LITE_ENSURE_OK(context,
                         get_cmsis_scratch_buffer(context, &buf, buf_size));
       TF_LITE_ENSURE_EQ(context,
                         arm_depthwise_conv_s8_opt(
                           GetTensorData<int8_t>(input),
                           input_width, input_height, input_depth,
                           GetTensorData<int8_t>(filter),
                           input_depth,
                           filter_width, filter_height,
                           op_params.padding_values.width,
                           op_params.padding_values.height,
                           op_params.stride_width,
                           op_params.stride_height,
                           GetTensorData<int32>(bias),
                           GetTensorData<int8_t>(output),
                           data->per_channel_output_shift,
                           data->per_channel_output_multiplier,
                           output_width,
                           output_height,
                           op_params.output_offset,
                           op_params.input_offset,
                           op_params.quantized_activation_min,
                           op_params.quantized_activation_max,
                           op_params.dilation_width_factor,
                           op_params.dilation_height_factor,
                           buf),
                         ARM_MATH_SUCCESS);
     } else {
       TF_LITE_ENSURE_EQ(context,
                         arm_depthwise_conv_s8(
                           GetTensorData<int8_t>(input),
                           input_width, input_height, input_depth,
                           GetTensorData<int8_t>(filter),
                           op_params.depth_multiplier * input_depth,
                           op_params.depth_multiplier,
                           filter_width, filter_height,
                           op_params.padding_values.width,
                           op_params.padding_values.height,
                           op_params.stride_width,
                           op_params.stride_height,
                           GetTensorData<int32>(bias),
                           GetTensorData<int8_t>(output),
                           data->per_channel_output_shift,
                           data->per_channel_output_multiplier,
                           output_width,
                           output_height,
                           op_params.output_offset,
                           op_params.input_offset,
                           op_params.quantized_activation_min,
                           op_params.quantized_activation_max,
                           op_params.dilation_width_factor,
                           op_params.dilation_height_factor,
                           nullptr),
                         ARM_MATH_SUCCESS);
     }
 #else
   #error ARM_MATH_DSP and ARM_MATH_LOOPUNROLL must be set
 #endif
   return kTfLiteOk;
 }

 TfLiteStatus EvalQuantized(TfLiteContext* context, TfLiteNode* node,
                           TfLiteDepthwiseConvParams* params, OpData* data,
                           const TfLiteTensor* input, const TfLiteTensor* filter,
                           const TfLiteTensor* bias, TfLiteTensor* output) {
   const int32_t input_offset = -input->params.zero_point;
   const int32_t filter_offset = -filter->params.zero_point;
   const int32_t output_offset = output->params.zero_point;

   tflite::DepthwiseParams op_params;
   // Padding type is ignored, but still set.
   op_params.padding_type = PaddingType::kSame;
   op_params.padding_values.width = data->padding.width;
   op_params.padding_values.height = data->padding.height;
   op_params.stride_width = params->stride_width;
   op_params.stride_height = params->stride_height;
   op_params.dilation_width_factor = 1;
   op_params.dilation_height_factor = 1;
   op_params.depth_multiplier = params->depth_multiplier;
   op_params.quantized_activation_min = data->output_activation_min;
   op_params.quantized_activation_max = data->output_activation_max;
   op_params.input_offset = input_offset;
   op_params.weights_offset = filter_offset;
   op_params.output_offset = output_offset;
   op_params.output_multiplier = data->output_multiplier;
   // Legacy ops used mixed left and right shifts. Now all are +ve-means-left.
   op_params.output_shift = -data->output_shift;

 #if defined(ARM_MATH_DSP)
   // optimizations utilize loop unrolling which requires the following power
   // of two kernel dimensions
   RuntimeShape filter_shape = GetTensorShape(filter);
   const int filter_height = filter_shape.Dims(1);
   const int filter_width = filter_shape.Dims(2);
   if (0 == op_params.depth_multiplier % 2 && 0 == filter_width % 2) {
     RuntimeShape input_shape = GetTensorShape(input);
     const int input_height = input_shape.Dims(1);
     const int input_width = input_shape.Dims(2);
     const int input_depth = input_shape.Dims(3);
     RuntimeShape output_shape = GetTensorShape(output);
     const int output_height = output_shape.Dims(1);
     const int output_width = output_shape.Dims(2);
     arm_depthwise_conv_u8_basic_ver1(
         GetTensorData<uint8_t>(input), input_width, input_height, input_depth,
         GetTensorData<uint8_t>(filter), filter_width, filter_height,
         op_params.depth_multiplier, op_params.padding_values.width,
         op_params.padding_values.height, op_params.stride_width,
         op_params.stride_height, op_params.dilation_width_factor,
         op_params.dilation_height_factor, GetTensorData<int32_t>(bias),
         op_params.input_offset, op_params.weights_offset,
         op_params.output_offset, GetTensorData<uint8_t>(output), output_width,
         output_height, op_params.quantized_activation_min,
         op_params.quantized_activation_max, op_params.output_shift,
         op_params.output_multiplier);
   } else
 #endif
   {
     tflite::reference_ops::DepthwiseConv(
         op_params, GetTensorShape(input), GetTensorData<uint8_t>(input),
         GetTensorShape(filter), GetTensorData<uint8_t>(filter),
         GetTensorShape(bias), GetTensorData<int32_t>(bias),
         GetTensorShape(output), GetTensorData<uint8_t>(output));
   }
   return kTfLiteOk;
 }

 TfLiteStatus Eval(TfLiteContext* context, TfLiteNode* node) {
   auto* params =
       reinterpret_cast<TfLiteDepthwiseConvParams*>(node->builtin_data);

   TfLiteTensor* output = GetOutput(context, node, kOutputTensor);
   const TfLiteTensor* input = GetInput(context, node, kInputTensor);
   const TfLiteTensor* filter = GetInput(context, node, kFilterTensor);
   const TfLiteTensor* bias =
       (NumInputs(node) == 3) ? GetInput(context, node, kBiasTensor) : nullptr;

   const TfLiteType data_type = input->type;
   int width = SizeOfDimension(input, 2);
   int height = SizeOfDimension(input, 1);
   int filter_width = SizeOfDimension(filter, 2);
   int filter_height = SizeOfDimension(filter, 1);

   OpData data;

   if (input->type != kTfLiteFloat32) {
     TF_LITE_ENSURE_EQ(context, filter->quantization.type,
                       kTfLiteAffineQuantization);

     const auto* affine_quantization =
         reinterpret_cast<TfLiteAffineQuantization*>(
             filter->quantization.params);
     TF_LITE_ENSURE(context, affine_quantization);
     TF_LITE_ENSURE(context, affine_quantization->scale);
   }

   TF_LITE_ENSURE_STATUS(CalculateOpData(context, node, params, width, height,
                                         filter_width, filter_height, data_type,
                                         &data));

   // TODO(aselle): Consider whether float conv and quantized conv should be
   // separate ops to avoid dispatch overhead here.
   switch (input->type) {  // Already know in/out types are same.
     case kTfLiteFloat32:
       return EvalFloat(context, node, params, &data, input, filter, bias,
                        output);
       break;
     case kTfLiteInt8:
       return EvalQuantizedPerChannel(context, node, params, &data, input,
                                      filter, bias, output);
       break;
     case kTfLiteUInt8:
       return EvalQuantized(context, node, params, &data, input, filter, bias,
                            output);
       break;
     default:
       context->ReportError(context, "Type %s (%d) not supported.",
                            TfLiteTypeGetName(input->type), input->type);
       return kTfLiteError;
   }
   return kTfLiteOk;
 }

 }  // namespace depthwise_conv

 TfLiteRegistration* Register_DEPTHWISE_CONV_2D() {
   static TfLiteRegistration r = {depthwise_conv::Init, depthwise_conv::Free,
                                  depthwise_conv::Prepare, depthwise_conv::Eval};
   return &r;
 }

 }  // namespace micro
 }  // namespace ops
 }  // namespace tflite
	/* Copyright 2019 The TensorFlow Authors. All Rights Reserved.

	Licensed under the Apache License, Version 2.0 (the "License");
	you may not use this file except in compliance with the License.
	You may obtain a copy of the License at

	http://www.apache.org/licenses/LICENSE-2.0

	Unless required by applicable law or agreed to in writing, software
	distributed under the License is distributed on an "AS IS" BASIS,
	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	See the License for the specific language governing permissions and
	limitations under the License.
	==============================================================================*/

	#include "arm_nnfunctions.h"
	#include "tensorflow/lite/c/builtin_op_data.h"
	#include "tensorflow/lite/c/c_api_internal.h"
	#include "tensorflow/lite/kernels/internal/common.h"
	#include "tensorflow/lite/kernels/internal/quantization_util.h"
	#include "tensorflow/lite/kernels/internal/reference/depthwiseconv_float.h"
	#include "tensorflow/lite/kernels/internal/reference/depthwiseconv_uint8.h"
	#include "tensorflow/lite/kernels/internal/reference/integer_ops/depthwise_conv.h"
	#include "tensorflow/lite/kernels/internal/tensor_ctypes.h"
	#include "tensorflow/lite/kernels/kernel_util.h"
	#include "tensorflow/lite/kernels/padding.h"
	#include "tensorflow/lite/experimental/micro/kernels/cmsis-nn/scratch_buffer.h"

	namespace tflite {
	namespace ops {
	namespace micro {
	namespace depthwise_conv {
	namespace {

	constexpr int kInputTensor = 0;
	constexpr int kFilterTensor = 1;
	constexpr int kBiasTensor = 2;
	constexpr int kOutputTensor = 0;
	constexpr int kMaxChannels = 256;

	struct OpData {
	TfLitePaddingValues padding;
	// The scaling factor from input to output (aka the 'real multiplier') can
	// be represented as a fixed point multiplier plus a left shift.
	int32_t output_multiplier;
	int output_shift;

	// Per channel output multiplier and shift.
	// TODO(b/141139247): Allocate these dynamically when possible.
	int32_t per_channel_output_multiplier[kMaxChannels];
	int32_t per_channel_output_shift[kMaxChannels];

	// The range of the fused activation layer. For example for kNone and
	// uint8_t these would be 0 and 255.
	int32_t output_activation_min;
	int32_t output_activation_max;
	};

	TfLiteStatus CalculateOpData(TfLiteContext* context, TfLiteNode* node,
	TfLiteDepthwiseConvParams* params, int width,
	int height, int filter_width, int filter_height,
	const TfLiteType data_type, OpData* data) {
	bool has_bias = node->inputs->size == 3;
	// Check number of inputs/outputs
	TF_LITE_ENSURE(context, has_bias \|\| node->inputs->size == 2);
	TF_LITE_ENSURE_EQ(context, node->outputs->size, 1);

	int unused_output_height, unused_output_width;
	data->padding = ComputePaddingHeightWidth(
	params->stride_height, params->stride_width, 1, 1, height, width,
	filter_height, filter_width, params->padding, &unused_output_height,
	&unused_output_width);

	// Note that quantized inference requires that all tensors have their
	// parameters set. This is usually done during quantized training.
	if (data_type != kTfLiteFloat32) {
	const TfLiteTensor* input = GetInput(context, node, kInputTensor);
	const TfLiteTensor* filter = GetInput(context, node, kFilterTensor);
	const TfLiteTensor* bias =
	GetOptionalInputTensor(context, node, kBiasTensor);
	TfLiteTensor* output = GetOutput(context, node, kOutputTensor);

	TF_LITE_ENSURE_STATUS(tflite::PopulateConvolutionQuantizationParams(
	context, input, filter, bias, output, params->activation,
	&data->output_multiplier, &data->output_shift,
	&data->output_activation_min, &data->output_activation_max,
	data->per_channel_output_multiplier,
	reinterpret_cast<int*>(data->per_channel_output_shift)));
	}
	return kTfLiteOk;
	}

	} // namespace

	void* Init(TfLiteContext* context, const char* buffer, size_t length) {
	return nullptr;
	}

	void Free(TfLiteContext* context, void* buffer) {}

	TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
	return kTfLiteOk;
	}

	TfLiteStatus EvalFloat(TfLiteContext* context, TfLiteNode* node,
	TfLiteDepthwiseConvParams* params, OpData* data,
	const TfLiteTensor* input, const TfLiteTensor* filter,
	const TfLiteTensor* bias, TfLiteTensor* output) {
	float output_activation_min, output_activation_max;
	CalculateActivationRange(params->activation, &output_activation_min,
	&output_activation_max);

	tflite::DepthwiseParams op_params;
	// Padding type is ignored, but still set.
	op_params.padding_type = PaddingType::kSame;
	op_params.padding_values.width = data->padding.width;
	op_params.padding_values.height = data->padding.height;
	op_params.stride_width = params->stride_width;
	op_params.stride_height = params->stride_height;
	op_params.dilation_width_factor = 1;
	op_params.dilation_height_factor = 1;
	op_params.depth_multiplier = params->depth_multiplier;
	op_params.float_activation_min = output_activation_min;
	op_params.float_activation_max = output_activation_max;

	tflite::reference_ops::DepthwiseConv(
	op_params, GetTensorShape(input), GetTensorData<float>(input),
	GetTensorShape(filter), GetTensorData<float>(filter),
	GetTensorShape(bias), GetTensorData<float>(bias), GetTensorShape(output),
	GetTensorData<float>(output));
	return kTfLiteOk;
	}

	TfLiteStatus EvalQuantizedPerChannel(TfLiteContext* context, TfLiteNode* node,
	TfLiteDepthwiseConvParams* params, OpData* data,
	const TfLiteTensor* input,
	const TfLiteTensor* filter,
	const TfLiteTensor* bias, TfLiteTensor* output) {
	#if defined(ARM_MATH_DSP) && defined(ARM_MATH_LOOPUNROLL)
	DepthwiseParams op_params;
	op_params.padding_type = PaddingType::kSame;
	op_params.padding_values.width = data->padding.width;
	op_params.padding_values.height = data->padding.height;
	op_params.stride_width = params->stride_width;
	op_params.stride_height = params->stride_height;
	op_params.dilation_width_factor = params->dilation_width_factor;
	op_params.dilation_height_factor = params->dilation_height_factor;
	op_params.depth_multiplier = params->depth_multiplier;
	op_params.input_offset = -input->params.zero_point;
	op_params.weights_offset = 0;
	op_params.output_offset = output->params.zero_point;
	// TODO(b/130439627): Use calculated value for clamping.
	op_params.quantized_activation_min = std::numeric_limits<int8_t>::min();
	op_params.quantized_activation_max = std::numeric_limits<int8_t>::max();
	RuntimeShape filter_shape = GetTensorShape(filter);
	const int filter_height = filter_shape.Dims(1);
	const int filter_width = filter_shape.Dims(2);
	RuntimeShape input_shape = GetTensorShape(input);
	const int input_height = input_shape.Dims(1);
	const int input_width = input_shape.Dims(2);
	const int input_depth = input_shape.Dims(3);
	RuntimeShape output_shape = GetTensorShape(output);
	const int output_height = output_shape.Dims(1);
	const int output_width = output_shape.Dims(2);
	RuntimeShape bias_shape = GetTensorShape(bias);

	if (op_params.depth_multiplier == 1) {
	int16_t* buf = nullptr;
	const int32_t buf_size =
	arm_depthwise_conv_s8_opt_get_buffer_size(input_depth,
	filter_width,
	filter_height);
	TF_LITE_ENSURE_OK(context,
	get_cmsis_scratch_buffer(context, &buf, buf_size));
	TF_LITE_ENSURE_EQ(context,
	arm_depthwise_conv_s8_opt(
	GetTensorData<int8_t>(input),
	input_width, input_height, input_depth,
	GetTensorData<int8_t>(filter),
	input_depth,
	filter_width, filter_height,
	op_params.padding_values.width,
	op_params.padding_values.height,
	op_params.stride_width,
	op_params.stride_height,
	GetTensorData<int32>(bias),
	GetTensorData<int8_t>(output),
	data->per_channel_output_shift,
	data->per_channel_output_multiplier,
	output_width,
	output_height,
	op_params.output_offset,
	op_params.input_offset,
	op_params.quantized_activation_min,
	op_params.quantized_activation_max,
	op_params.dilation_width_factor,
	op_params.dilation_height_factor,
	buf),
	ARM_MATH_SUCCESS);
	} else {
	TF_LITE_ENSURE_EQ(context,
	arm_depthwise_conv_s8(
	GetTensorData<int8_t>(input),
	input_width, input_height, input_depth,
	GetTensorData<int8_t>(filter),
	op_params.depth_multiplier * input_depth,
	op_params.depth_multiplier,
	filter_width, filter_height,
	op_params.padding_values.width,
	op_params.padding_values.height,
	op_params.stride_width,
	op_params.stride_height,
	GetTensorData<int32>(bias),
	GetTensorData<int8_t>(output),
	data->per_channel_output_shift,
	data->per_channel_output_multiplier,
	output_width,
	output_height,
	op_params.output_offset,
	op_params.input_offset,
	op_params.quantized_activation_min,
	op_params.quantized_activation_max,
	op_params.dilation_width_factor,
	op_params.dilation_height_factor,
	nullptr),
	ARM_MATH_SUCCESS);
	}
	#else
	#error ARM_MATH_DSP and ARM_MATH_LOOPUNROLL must be set
	#endif
	return kTfLiteOk;
	}

	TfLiteStatus EvalQuantized(TfLiteContext* context, TfLiteNode* node,
	TfLiteDepthwiseConvParams* params, OpData* data,
	const TfLiteTensor* input, const TfLiteTensor* filter,
	const TfLiteTensor* bias, TfLiteTensor* output) {
	const int32_t input_offset = -input->params.zero_point;
	const int32_t filter_offset = -filter->params.zero_point;
	const int32_t output_offset = output->params.zero_point;

	tflite::DepthwiseParams op_params;
	// Padding type is ignored, but still set.
	op_params.padding_type = PaddingType::kSame;
	op_params.padding_values.width = data->padding.width;
	op_params.padding_values.height = data->padding.height;
	op_params.stride_width = params->stride_width;
	op_params.stride_height = params->stride_height;
	op_params.dilation_width_factor = 1;
	op_params.dilation_height_factor = 1;
	op_params.depth_multiplier = params->depth_multiplier;
	op_params.quantized_activation_min = data->output_activation_min;
	op_params.quantized_activation_max = data->output_activation_max;
	op_params.input_offset = input_offset;
	op_params.weights_offset = filter_offset;
	op_params.output_offset = output_offset;
	op_params.output_multiplier = data->output_multiplier;
	// Legacy ops used mixed left and right shifts. Now all are +ve-means-left.
	op_params.output_shift = -data->output_shift;

	#if defined(ARM_MATH_DSP)
	// optimizations utilize loop unrolling which requires the following power
	// of two kernel dimensions
	RuntimeShape filter_shape = GetTensorShape(filter);
	const int filter_height = filter_shape.Dims(1);
	const int filter_width = filter_shape.Dims(2);
	if (0 == op_params.depth_multiplier % 2 && 0 == filter_width % 2) {
	RuntimeShape input_shape = GetTensorShape(input);
	const int input_height = input_shape.Dims(1);
	const int input_width = input_shape.Dims(2);
	const int input_depth = input_shape.Dims(3);
	RuntimeShape output_shape = GetTensorShape(output);
	const int output_height = output_shape.Dims(1);
	const int output_width = output_shape.Dims(2);
	arm_depthwise_conv_u8_basic_ver1(
	GetTensorData<uint8_t>(input), input_width, input_height, input_depth,
	GetTensorData<uint8_t>(filter), filter_width, filter_height,
	op_params.depth_multiplier, op_params.padding_values.width,
	op_params.padding_values.height, op_params.stride_width,
	op_params.stride_height, op_params.dilation_width_factor,
	op_params.dilation_height_factor, GetTensorData<int32_t>(bias),
	op_params.input_offset, op_params.weights_offset,
	op_params.output_offset, GetTensorData<uint8_t>(output), output_width,
	output_height, op_params.quantized_activation_min,
	op_params.quantized_activation_max, op_params.output_shift,
	op_params.output_multiplier);
	} else
	#endif
	{
	tflite::reference_ops::DepthwiseConv(
	op_params, GetTensorShape(input), GetTensorData<uint8_t>(input),
	GetTensorShape(filter), GetTensorData<uint8_t>(filter),
	GetTensorShape(bias), GetTensorData<int32_t>(bias),
	GetTensorShape(output), GetTensorData<uint8_t>(output));
	}
	return kTfLiteOk;
	}

	TfLiteStatus Eval(TfLiteContext* context, TfLiteNode* node) {
	auto* params =
	reinterpret_cast<TfLiteDepthwiseConvParams*>(node->builtin_data);

	TfLiteTensor* output = GetOutput(context, node, kOutputTensor);
	const TfLiteTensor* input = GetInput(context, node, kInputTensor);
	const TfLiteTensor* filter = GetInput(context, node, kFilterTensor);
	const TfLiteTensor* bias =
	(NumInputs(node) == 3) ? GetInput(context, node, kBiasTensor) : nullptr;

	const TfLiteType data_type = input->type;
	int width = SizeOfDimension(input, 2);
	int height = SizeOfDimension(input, 1);
	int filter_width = SizeOfDimension(filter, 2);
	int filter_height = SizeOfDimension(filter, 1);

	OpData data;

	if (input->type != kTfLiteFloat32) {
	TF_LITE_ENSURE_EQ(context, filter->quantization.type,
	kTfLiteAffineQuantization);

	const auto* affine_quantization =
	reinterpret_cast<TfLiteAffineQuantization*>(
	filter->quantization.params);
	TF_LITE_ENSURE(context, affine_quantization);
	TF_LITE_ENSURE(context, affine_quantization->scale);
	}

	TF_LITE_ENSURE_STATUS(CalculateOpData(context, node, params, width, height,
	filter_width, filter_height, data_type,
	&data));

	// TODO(aselle): Consider whether float conv and quantized conv should be
	// separate ops to avoid dispatch overhead here.
	switch (input->type) { // Already know in/out types are same.
	case kTfLiteFloat32:
	return EvalFloat(context, node, params, &data, input, filter, bias,
	output);
	break;
	case kTfLiteInt8:
	return EvalQuantizedPerChannel(context, node, params, &data, input,
	filter, bias, output);
	break;
	case kTfLiteUInt8:
	return EvalQuantized(context, node, params, &data, input, filter, bias,
	output);
	break;
	default:
	context->ReportError(context, "Type %s (%d) not supported.",
	TfLiteTypeGetName(input->type), input->type);
	return kTfLiteError;
	}
	return kTfLiteOk;
	}

	} // namespace depthwise_conv

	TfLiteRegistration* Register_DEPTHWISE_CONV_2D() {
	static TfLiteRegistration r = {depthwise_conv::Init, depthwise_conv::Free,
	depthwise_conv::Prepare, depthwise_conv::Eval};
	return &r;
	}

	} // namespace micro
	} // namespace ops
	} // namespace tflite