Adjust SP before content is written below it.
From Valgrind:
I/valgrind( 1837): ==1838== Invalid write of size 4
I/valgrind( 1837): ==1838== at 0x4E312A4: sha1_block_data_order
(sha1-armv4-large.s:109)
I/valgrind( 1837): ==1838== Address 0xbdd6abb8 is just below the stack
ptr. To suppress, use: --workaround-gcc296-bugs=yes
This is probably just a cosmetic fix to make Valgrind happy.
BUG: 5505776
Change-Id: Ice2fa65ab753a7c4cb92f531179db8b200f8b2c5
diff --git a/crypto/sha/asm/sha1-armv4-large.pl b/crypto/sha/asm/sha1-armv4-large.pl
index 6e65fe3..79e3f61 100644
--- a/crypto/sha/asm/sha1-armv4-large.pl
+++ b/crypto/sha/asm/sha1-armv4-large.pl
@@ -161,6 +161,7 @@
$code.=<<___;
teq $Xi,sp
bne .L_00_15 @ [((11+4)*5+2)*3]
+ sub sp,sp,#5*4
___
&BODY_00_15(@V); unshift(@V,pop(@V));
&BODY_16_19(@V); unshift(@V,pop(@V));
@@ -170,7 +171,7 @@
$code.=<<___;
ldr $K,.LK_20_39 @ [+15+16*4]
- sub sp,sp,#25*4
+ sub sp,sp,#20*4
cmn sp,#0 @ [+3], clear carry to denote 20_39
.L_20_39_or_60_79:
___
diff --git a/crypto/sha/asm/sha1-armv4-large.s b/crypto/sha/asm/sha1-armv4-large.s
index 8833c1e..7f687d9 100644
--- a/crypto/sha/asm/sha1-armv4-large.s
+++ b/crypto/sha/asm/sha1-armv4-large.s
@@ -93,6 +93,7 @@
add r3,r3,r10 @ E+=F_00_19(B,C,D)
teq r14,sp
bne .L_00_15 @ [((11+4)*5+2)*3]
+ sub sp,sp,#5*4
ldrb r9,[r1],#4
ldrb r10,[r1,#-1]
ldrb r11,[r1,#-2]
@@ -178,7 +179,7 @@
add r3,r3,r10 @ E+=F_00_19(B,C,D)
ldr r8,.LK_20_39 @ [+15+16*4]
- sub sp,sp,#25*4
+ sub sp,sp,#20*4
cmn sp,#0 @ [+3], clear carry to denote 20_39
.L_20_39_or_60_79:
ldr r9,[r14,#15*4]
diff --git a/openssl.config b/openssl.config
index 27078ea..293c744 100644
--- a/openssl.config
+++ b/openssl.config
@@ -189,6 +189,7 @@
jsse.patch \
npn.patch \
sslv3_uninit_padding.patch \
+sha1_armv4_large.patch \
"
OPENSSL_PATCHES_progs_SOURCES="\
diff --git a/patches/README b/patches/README
index 0634d54..54b6e06 100644
--- a/patches/README
+++ b/patches/README
@@ -33,3 +33,7 @@
sslv3_uninit_padding.patch
This patch sets the padding for SSLv3 block ciphers to zero.
+
+sha1_armv4_large.patch
+
+This patch eliminates memory stores to addresses below SP.
diff --git a/patches/sha1_armv4_large.patch b/patches/sha1_armv4_large.patch
new file mode 100644
index 0000000..359ff94
--- /dev/null
+++ b/patches/sha1_armv4_large.patch
@@ -0,0 +1,21 @@
+diff --git a/crypto/sha/asm/sha1-armv4-large.pl b/crypto/sha/asm/sha1-armv4-large.pl
+index 6e65fe3..79e3f61 100644
+--- a/crypto/sha/asm/sha1-armv4-large.pl
++++ b/crypto/sha/asm/sha1-armv4-large.pl
+@@ -161,6 +161,7 @@ for($i=0;$i<5;$i++) {
+ $code.=<<___;
+ teq $Xi,sp
+ bne .L_00_15 @ [((11+4)*5+2)*3]
++ sub sp,sp,#5*4
+ ___
+ &BODY_00_15(@V); unshift(@V,pop(@V));
+ &BODY_16_19(@V); unshift(@V,pop(@V));
+@@ -170,7 +171,7 @@ ___
+ $code.=<<___;
+
+ ldr $K,.LK_20_39 @ [+15+16*4]
+- sub sp,sp,#25*4
++ sub sp,sp,#20*4
+ cmn sp,#0 @ [+3], clear carry to denote 20_39
+ .L_20_39_or_60_79:
+ ___
