commit f897036978b42619ce27ea4f41886cc0002f33ef
author Ilia Mirkin <imirkin@alum.mit.edu> Thu Jan 12 21:06:40 2017 -0500
committer Ilia Mirkin <imirkin@alum.mit.edu> Thu Jan 12 21:08:42 2017 -0500
tree 8543c97fb8ad64477689c3c1d478b59cfbe5b3e5
parent eb60a89bc3ac2b43faf52d06e05670bbbca7292d

nvc0/ir: only try to check for zero LOD if we aren't already forcing it

There's a levelZero flag which forces texturing to pick level zero (and
not consume an explicit LOD argument). This is set for MS targets, but
could also be set for any other incoming instruction. As that is what
determines whether a LOD argument is present, check that rather than the
more indirect isMS logic.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index ff253af..95de87c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -118,7 +118,7 @@
 void
 NVC0LegalizeSSA::handleTEXLOD(TexInstruction *i)
 {
-   if (i->tex.target.isMS())
+   if (i->tex.levelZero)
       return;
 
    ImmediateValue lod;