| commit | eaf27eb512c5ffdedf8106e006448c5aabdfe447 | [log] [tgz] |
|---|---|---|
| author | Matt Turner <mattst88@gmail.com> | Wed Jul 15 23:05:30 2020 -0700 |
| committer | Matt Turner <mattst88@gmail.com> | Fri Jul 31 12:59:24 2020 -0700 |
| tree | 844bca0e26a917962486750501320537e48623fe | |
| parent | ac7ecd205b2ea98c57edd98633fc260523219296 [diff] |
intel/tools: Test notification subregisters Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>
diff --git a/src/intel/tools/tests/gen7.5/wait.asm b/src/intel/tools/tests/gen7.5/wait.asm index ea69c7e..f94845c 100644 --- a/src/intel/tools/tests/gen7.5/wait.asm +++ b/src/intel/tools/tests/gen7.5/wait.asm
@@ -1 +1,3 @@ wait(1) n0<0>.xUD { align16 WE_all 1N }; +wait(1) n0<0>.yUD { align16 WE_all 1N }; +wait(1) n0<0>.zUD { align16 WE_all 1N };
diff --git a/src/intel/tools/tests/gen7.5/wait.expected b/src/intel/tools/tests/gen7.5/wait.expected index c227101..036512e 100644 --- a/src/intel/tools/tests/gen7.5/wait.expected +++ b/src/intel/tools/tests/gen7.5/wait.expected
@@ -1 +1,3 @@ 30 03 00 00 00 70 01 32 00 12 00 00 04 00 6e 00 +30 03 00 00 00 70 02 32 05 12 05 00 04 00 6e 00 +30 03 00 00 00 70 04 32 0a 12 0a 00 04 00 6e 00
diff --git a/src/intel/tools/tests/gen7/wait.asm b/src/intel/tools/tests/gen7/wait.asm index ea69c7e..f94845c 100644 --- a/src/intel/tools/tests/gen7/wait.asm +++ b/src/intel/tools/tests/gen7/wait.asm
@@ -1 +1,3 @@ wait(1) n0<0>.xUD { align16 WE_all 1N }; +wait(1) n0<0>.yUD { align16 WE_all 1N }; +wait(1) n0<0>.zUD { align16 WE_all 1N };
diff --git a/src/intel/tools/tests/gen7/wait.expected b/src/intel/tools/tests/gen7/wait.expected index c227101..036512e 100644 --- a/src/intel/tools/tests/gen7/wait.expected +++ b/src/intel/tools/tests/gen7/wait.expected
@@ -1 +1,3 @@ 30 03 00 00 00 70 01 32 00 12 00 00 04 00 6e 00 +30 03 00 00 00 70 02 32 05 12 05 00 04 00 6e 00 +30 03 00 00 00 70 04 32 0a 12 0a 00 04 00 6e 00
diff --git a/src/intel/tools/tests/gen8/wait.asm b/src/intel/tools/tests/gen8/wait.asm index 0c8fbc3..14c0b67 100644 --- a/src/intel/tools/tests/gen8/wait.asm +++ b/src/intel/tools/tests/gen8/wait.asm
@@ -1 +1,3 @@ -wait(1) n0<0>UD { align1 WE_all 1N }; +wait(1) n0.0<0>UD { align1 WE_all 1N }; +wait(1) n0.1<0>UD { align1 WE_all 1N }; +wait(1) n0.2<0>UD { align1 WE_all 1N };
diff --git a/src/intel/tools/tests/gen8/wait.expected b/src/intel/tools/tests/gen8/wait.expected index 81603b0..31565e5 100644 --- a/src/intel/tools/tests/gen8/wait.expected +++ b/src/intel/tools/tests/gen8/wait.expected
@@ -1 +1,3 @@ 30 00 00 00 04 00 00 32 00 12 00 38 00 00 8d 00 +30 00 00 00 04 00 04 32 04 12 00 38 00 00 8d 00 +30 00 00 00 04 00 08 32 08 12 00 38 00 00 8d 00
diff --git a/src/intel/tools/tests/gen9/wait.asm b/src/intel/tools/tests/gen9/wait.asm index 0c8fbc3..14c0b67 100644 --- a/src/intel/tools/tests/gen9/wait.asm +++ b/src/intel/tools/tests/gen9/wait.asm
@@ -1 +1,3 @@ -wait(1) n0<0>UD { align1 WE_all 1N }; +wait(1) n0.0<0>UD { align1 WE_all 1N }; +wait(1) n0.1<0>UD { align1 WE_all 1N }; +wait(1) n0.2<0>UD { align1 WE_all 1N };
diff --git a/src/intel/tools/tests/gen9/wait.expected b/src/intel/tools/tests/gen9/wait.expected index 81603b0..31565e5 100644 --- a/src/intel/tools/tests/gen9/wait.expected +++ b/src/intel/tools/tests/gen9/wait.expected
@@ -1 +1,3 @@ 30 00 00 00 04 00 00 32 00 12 00 38 00 00 8d 00 +30 00 00 00 04 00 04 32 04 12 00 38 00 00 8d 00 +30 00 00 00 04 00 08 32 08 12 00 38 00 00 8d 00