nir: Support sysval tess levels in SPIR-V to NIR

This commit adds a tess_levels_are_sysvals flag to
spirv_to_nir_options similar to GLSLTessLevelsAsInputs in the GLSL to
NIR compiler options. This will be used by turnip as the tess IR3
lowering pass (ir3_nir_lower_tess) operates on TessLevelInner and
TessLevelOuter in the DS as sysvals.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5059>
diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
index 3d6f74e..acfcc08 100644
--- a/src/compiler/spirv/nir_spirv.h
+++ b/src/compiler/spirv/nir_spirv.h
@@ -64,6 +64,11 @@
     */
    bool frag_coord_is_sysval;
 
+   /* Whether to lower TessLevelInner and TessLevelOuter to system values.
+    * This is the inverse of GLSLTessLevelsAsInputs in GLSL.
+    */
+   bool tess_levels_are_sysvals;
+
    struct spirv_supported_capabilities caps;
 
    /* Address format for various kinds of pointers. */
diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c
index afe2aa8..b36edba 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1354,10 +1354,22 @@
          vtn_fail("invalid stage for SpvBuiltInViewportIndex");
       break;
    case SpvBuiltInTessLevelOuter:
-      *location = VARYING_SLOT_TESS_LEVEL_OUTER;
+      if (b->options && b->options->tess_levels_are_sysvals &&
+          *mode == nir_var_shader_in) {
+         *location = SYSTEM_VALUE_TESS_LEVEL_OUTER;
+         set_mode_system_value(b, mode);
+      } else {
+         *location = VARYING_SLOT_TESS_LEVEL_OUTER;
+      }
       break;
    case SpvBuiltInTessLevelInner:
-      *location = VARYING_SLOT_TESS_LEVEL_INNER;
+      if (b->options && b->options->tess_levels_are_sysvals &&
+          *mode == nir_var_shader_in) {
+         *location = SYSTEM_VALUE_TESS_LEVEL_INNER;
+         set_mode_system_value(b, mode);
+      } else {
+         *location = VARYING_SLOT_TESS_LEVEL_INNER;
+      }
       break;
    case SpvBuiltInTessCoord:
       *location = SYSTEM_VALUE_TESS_COORD;