radv: Use correct alignment for SQTT buffer sizes.
Otherwise we can miss the start of the buffer, which
results in RGP missing the initial (and only) timestamp
packet and results in RGP completely ignoring the second
SE, causing messy issues and missed events.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
diff --git a/src/amd/vulkan/radv_sqtt.c b/src/amd/vulkan/radv_sqtt.c
index da18ce6..a1de66e 100644
--- a/src/amd/vulkan/radv_sqtt.c
+++ b/src/amd/vulkan/radv_sqtt.c
@@ -496,6 +496,12 @@
struct radeon_winsys *ws = device->ws;
uint64_t size;
+ /* The buffer size and address need to be aligned in HW regs. Align the
+ * size as early as possible so that we do all the allocation & addressing
+ * correctly. */
+ device->thread_trace_buffer_size = align64(device->thread_trace_buffer_size,
+ 1u << SQTT_BUFFER_ALIGN_SHIFT);
+
/* Compute total size of the thread trace BO for 4 SEs. */
size = align64(sizeof(struct radv_thread_trace_info) * 4,
1 << SQTT_BUFFER_ALIGN_SHIFT);
