intel/vec4: Remove leftover code from Gen8+ removal.
Remove code missed in commit 2a49007411bb ("intel/vec4: Remove all
support for Gen8+ [v2]").
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE)
dead_error_begin: Execution cannot reach this statement:
mcs.swizzle = 80U;
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6927>
diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp
index e91f91f..448f48a 100644
--- a/src/intel/compiler/brw_vec4_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_visitor.cpp
@@ -944,16 +944,7 @@
} else if (op == ir_txf_ms) {
emit(MOV(dst_reg(MRF, param_base + 1, sample_index.type, WRITEMASK_X),
sample_index));
- if (opcode == SHADER_OPCODE_TXF_CMS_W) {
- /* MCS data is stored in the first two channels of ‘mcs’, but we
- * need to get it into the .y and .z channels of the second vec4
- * of params.
- */
- mcs.swizzle = BRW_SWIZZLE4(0, 0, 1, 1);
- emit(MOV(dst_reg(MRF, param_base + 1,
- glsl_type::uint_type, WRITEMASK_YZ),
- mcs));
- } else if (devinfo->gen >= 7) {
+ if (devinfo->gen >= 7) {
/* MCS data is in the first channel of `mcs`, but we need to get it into
* the .y channel of the second vec4 of params, so replicate .x across
* the whole vec4 and then mask off everything except .y