commit 760ba65733d7915a61eaaebd073ce7c06cafec2e
author Dave Airlie <airlied@redhat.com> Tue Sep 29 17:10:07 2020 +1000
committer Dave Airlie <airlied@redhat.com> Wed Sep 30 16:54:07 2020 +1000
tree 0233f64aa25e186794ce66b37cd4e0a2ba6fd488
parent 5d4502c085521ba149048c958f56ee4a62b8484c

gallivm/nir: handle non-32-bit mul high

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6928>

src/gallium/auxiliary/gallivm/lp_bld_nir.c

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
index 9387996..612a4ff 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c
@@ -699,7 +699,7 @@
       break;
    case nir_op_imul_high: {
       LLVMValueRef hi_bits;
-      lp_build_mul_32_lohi(&bld_base->int_bld, src[0], src[1], &hi_bits);
+      lp_build_mul_32_lohi(get_int_bld(bld_base, false, src_bit_size[0]), src[0], src[1], &hi_bits);
       result = hi_bits;
       break;
    }
@@ -818,7 +818,7 @@
       break;
    case nir_op_umul_high: {
       LLVMValueRef hi_bits;
-      lp_build_mul_32_lohi(&bld_base->uint_bld, src[0], src[1], &hi_bits);
+      lp_build_mul_32_lohi(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1], &hi_bits);
       result = hi_bits;
       break;
    }