i965/vec4/gs: fix input loading for 64bit data
v2 (Iago):
- Adapt 64-bit path to component packing changes.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
index 16d2410..ed8c03b 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
@@ -64,23 +64,40 @@
* be constant. We should handle indirects someday.
*/
nir_const_value *vertex = nir_src_as_const_value(instr->src[0]);
- nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
+ nir_const_value *offset_reg = nir_src_as_const_value(instr->src[1]);
- /* Make up a type...we have no way of knowing... */
- const glsl_type *const type = glsl_type::ivec(instr->num_components);
+ if (nir_dest_bit_size(instr->dest) == 64) {
+ src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] +
+ instr->const_index[0] + offset_reg->u32[0],
+ glsl_type::dvec4_type);
- src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] +
- instr->const_index[0] + offset->u32[0],
- type);
- src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr));
+ dst_reg tmp = dst_reg(this, glsl_type::dvec4_type);
+ shuffle_64bit_data(tmp, src, false);
- /* gl_PointSize is passed in the .w component of the VUE header */
- if (instr->const_index[0] == VARYING_SLOT_PSIZ)
- src.swizzle = BRW_SWIZZLE_WWWW;
+ src = src_reg(tmp);
+ src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr) / 2);
- dest = get_nir_dest(instr->dest, src.type);
- dest.writemask = brw_writemask_for_size(instr->num_components);
- emit(MOV(dest, src));
+ /* Write to dst reg taking into account original writemask */
+ dest = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_DF);
+ dest.writemask = brw_writemask_for_size(instr->num_components);
+ emit(MOV(dest, src));
+ } else {
+ /* Make up a type...we have no way of knowing... */
+ const glsl_type *const type = glsl_type::ivec(instr->num_components);
+
+ src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] +
+ instr->const_index[0] + offset_reg->u32[0],
+ type);
+ src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr));
+
+ /* gl_PointSize is passed in the .w component of the VUE header */
+ if (instr->const_index[0] == VARYING_SLOT_PSIZ)
+ src.swizzle = BRW_SWIZZLE_WWWW;
+
+ dest = get_nir_dest(instr->dest, src.type);
+ dest.writemask = brw_writemask_for_size(instr->num_components);
+ emit(MOV(dest, src));
+ }
break;
}