freedreno/registers: Add a couple things used on kernel side

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6900>
diff --git a/src/freedreno/.gitlab-ci/reference/afuc_test.asm b/src/freedreno/.gitlab-ci/reference/afuc_test.asm
index e955d6a..90ad19f 100644
--- a/src/freedreno/.gitlab-ci/reference/afuc_test.asm
+++ b/src/freedreno/.gitlab-ci/reference/afuc_test.asm
@@ -207,7 +207,7 @@
 CP_SET_PROTECTED_MODE:
 UNKN96:
 UNKN97:
-UNKN98:
+CP_WHERE_AM_I:
 CP_SET_MODE:
 CP_SET_VISIBILITY_OVERRIDE:
 CP_SET_MARKER:
diff --git a/src/freedreno/registers/adreno/a5xx.xml b/src/freedreno/registers/adreno/a5xx.xml
index 34ae474..e298c15 100644
--- a/src/freedreno/registers/adreno/a5xx.xml
+++ b/src/freedreno/registers/adreno/a5xx.xml
@@ -1538,7 +1538,9 @@
 	<reg32 offset="0x0e55" name="VFD_PERFCTR_VFD_SEL_5" type="a5xx_vfd_perfcounter_select"/>
 	<reg32 offset="0x0e56" name="VFD_PERFCTR_VFD_SEL_6" type="a5xx_vfd_perfcounter_select"/>
 	<reg32 offset="0x0e57" name="VFD_PERFCTR_VFD_SEL_7" type="a5xx_vfd_perfcounter_select"/>
-	<reg32 offset="0x0e60" name="VPC_DBG_ECO_CNTL"/> <!-- always 00000400? -->
+	<reg32 offset="0x0e60" name="VPC_DBG_ECO_CNTL">
+		<bitfield name="ALLFLATOPTDIS" pos="10" type="boolean"/>
+	</reg32>
 	<reg32 offset="0x0e61" name="VPC_ADDR_MODE_CNTL" type="a5xx_address_mode"/>
 	<reg32 offset="0x0e62" name="VPC_MODE_CNTL">
 		<bitfield name="BINNING_PASS" pos="0" type="boolean"/>
@@ -1549,6 +1551,7 @@
 	<reg32 offset="0x0e67" name="VPC_PERFCTR_VPC_SEL_3" type="a5xx_vpc_perfcounter_select"/>
 
 	<reg32 offset="0x0e80" name="UCHE_ADDR_MODE_CNTL" type="a5xx_address_mode"/>
+	<reg32 offset="0x0e81" name="UCHE_MODE_CNTL"/>
 	<reg32 offset="0x0e82" name="UCHE_SVM_CNTL"/>
 	<reg32 offset="0x0e87" name="UCHE_WRITE_THRU_BASE_LO"/>
 	<reg32 offset="0x0e88" name="UCHE_WRITE_THRU_BASE_HI"/>
diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml
index 02dd453..c25bff4 100644
--- a/src/freedreno/registers/adreno/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno/adreno_pm4.xml
@@ -383,6 +383,7 @@
 	<value name="CP_SKIP_IB2_ENABLE_GLOBAL" value="0x1d" varset="chip" variants="A5XX-"/>
 	<value name="CP_SKIP_IB2_ENABLE_LOCAL" value="0x23" varset="chip" variants="A5XX-"/>
 	<value name="CP_SET_SUBDRAW_SIZE" value="0x35" varset="chip" variants="A5XX-"/>
+	<value name="CP_WHERE_AM_I" value="0x62" varset="chip" variants="A5XX-"/>
 	<value name="CP_SET_VISIBILITY_OVERRIDE" value="0x64" varset="chip" variants="A5XX-"/>
 	<!-- Enable/Disable/Defer A5x global preemption model -->
 	<value name="CP_PREEMPT_ENABLE_GLOBAL" value="0x69" varset="chip" variants="A5XX"/>