commit | 713c123bfa90fa845cf603a2d82a338b363cb4ee | [log] [tgz] |
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author | Matt Turner <mattst88@gmail.com> | Tue Jan 21 10:44:59 2020 -0800 |
committer | Marge Bot <eric+marge@anholt.net> | Wed Jan 22 00:19:20 2020 +0000 |
tree | 7cb849098205a48bb50680180e17923f8e2edd61 | |
parent | 49c21802cbca8240b272318759b1e472142929e6 [diff] |
intel/compiler: Don't disassemble align1 3-src operands on Gen < 10 Since the platforms don't support align1 3-src instructions, the contents of these operands are not going to be meaningful. Just don't print them to avoid hitting some assertions in brw_inst functions. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>