freedreno/registers: Rename SP_2D_SRC_FORMAT
This register contains information about the destination format, so
let's rename to SP_2D_DST_FORMAT.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5717>
diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml
index 6c74e19..56e1746 100644
--- a/src/freedreno/registers/a6xx.xml
+++ b/src/freedreno/registers/a6xx.xml
@@ -3217,10 +3217,7 @@
<reg32 offset="0xab1b" name="SP_IBO_HI"/>
<reg32 offset="0xab20" name="SP_IBO_COUNT" type="uint"/>
- <!--
- not really src, COLOR_FORMAT/SRGB seem to be related to ifmt which is for dst
- -->
- <reg32 offset="0xacc0" name="SP_2D_SRC_FORMAT">
+ <reg32 offset="0xacc0" name="SP_2D_DST_FORMAT">
<bitfield name="NORM" pos="0" type="boolean"/>
<bitfield name="SINT" pos="1" type="boolean"/>
<bitfield name="UINT" pos="2" type="boolean"/>
diff --git a/src/freedreno/vulkan/tu_clear_blit.c b/src/freedreno/vulkan/tu_clear_blit.c
index ccf67b4..29b9525 100644
--- a/src/freedreno/vulkan/tu_clear_blit.c
+++ b/src/freedreno/vulkan/tu_clear_blit.c
@@ -288,7 +288,7 @@
if (format == FMT6_10_10_10_2_UNORM_DEST)
format = FMT6_16_16_16_16_FLOAT;
- tu_cs_emit_regs(cs, A6XX_SP_2D_SRC_FORMAT(
+ tu_cs_emit_regs(cs, A6XX_SP_2D_DST_FORMAT(
.sint = vk_format_is_sint(vk_format),
.uint = vk_format_is_uint(vk_format),
.color_format = format,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 4e4153e..e711ff6 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -267,21 +267,21 @@
* controlling the internal/accumulator format or something like
* that. It's certainly not tied to only the src format.
*/
- OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
- OUT_RING(ring, A6XX_SP_2D_SRC_FORMAT_COLOR_FORMAT(fmt) |
+ OUT_PKT4(ring, REG_A6XX_SP_2D_DST_FORMAT, 1);
+ OUT_RING(ring, A6XX_SP_2D_DST_FORMAT_COLOR_FORMAT(fmt) |
COND(util_format_is_pure_sint(pfmt),
- A6XX_SP_2D_SRC_FORMAT_SINT) |
+ A6XX_SP_2D_DST_FORMAT_SINT) |
COND(util_format_is_pure_uint(pfmt),
- A6XX_SP_2D_SRC_FORMAT_UINT) |
+ A6XX_SP_2D_DST_FORMAT_UINT) |
COND(util_format_is_snorm(pfmt),
- A6XX_SP_2D_SRC_FORMAT_SINT |
- A6XX_SP_2D_SRC_FORMAT_NORM) |
+ A6XX_SP_2D_DST_FORMAT_SINT |
+ A6XX_SP_2D_DST_FORMAT_NORM) |
COND(util_format_is_unorm(pfmt),
// TODO sometimes blob uses UINT+NORM but dEQP seems unhappy about that
-// A6XX_SP_2D_SRC_FORMAT_UINT |
- A6XX_SP_2D_SRC_FORMAT_NORM) |
- COND(is_srgb, A6XX_SP_2D_SRC_FORMAT_SRGB) |
- A6XX_SP_2D_SRC_FORMAT_MASK(0xf));
+// A6XX_SP_2D_DST_FORMAT_UINT |
+ A6XX_SP_2D_DST_FORMAT_NORM) |
+ COND(is_srgb, A6XX_SP_2D_DST_FORMAT_SRGB) |
+ A6XX_SP_2D_DST_FORMAT_MASK(0xf));
OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8C01, 1);
OUT_RING(ring, 0);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 05a6829..4fa32b5 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -382,7 +382,7 @@
OUT_RING(ring, 0x00000000);
OUT_RING(ring, 0x00000000);
- OUT_PKT4(ring, REG_A6XX_SP_2D_SRC_FORMAT, 1);
+ OUT_PKT4(ring, REG_A6XX_SP_2D_DST_FORMAT, 1);
OUT_RING(ring, 0x0000f410);
OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
