panfrost: Free hash_to_temp map
No need to put it on the context, we can keep it local in mir_squeeze
and drop when we're done.
15.77KB leaked over 85 calls from:
0xffffaed3bfc3
in ??
_mesa_hash_table_rehash
at ../src/util/hash_table.c:368
in /home/alyssa/rockchip_dri.so
hash_table_insert
at ../src/util/hash_table.c:403
in /home/alyssa/rockchip_dri.so
find_or_allocate_temp
at ../src/panfrost/midgard/mir_squeeze.c:48
in /home/alyssa/rockchip_dri.so
find_or_allocate_temp
at ../src/panfrost/midgard/mir_squeeze.c:35
in /home/alyssa/rockchip_dri.so
mir_squeeze_index
at ../src/panfrost/midgard/mir_squeeze.c:76
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: mesa-stable
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6373>
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h
index ec28c48..f621840 100644
--- a/src/panfrost/midgard/compiler.h
+++ b/src/panfrost/midgard/compiler.h
@@ -293,8 +293,6 @@
/* Constants which have been loaded, for later inlining */
struct hash_table_u64 *ssa_constants;
- /* Mapping of hashes computed from NIR indices to the sequential temp indices ultimately used in MIR */
- struct hash_table_u64 *hash_to_temp;
int temp_count;
int max_hash;
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index d8d1852..239434d 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -2855,7 +2855,6 @@
/* Initialize at a global (not block) level hash tables */
ctx->ssa_constants = _mesa_hash_table_u64_create(NULL);
- ctx->hash_to_temp = _mesa_hash_table_u64_create(NULL);
/* Lower gl_Position pre-optimisation, but after lowering vars to ssa
* (so we don't accidentally duplicate the epilogue since mesa/st has
diff --git a/src/panfrost/midgard/mir_squeeze.c b/src/panfrost/midgard/mir_squeeze.c
index 07ba6b3..10fa9a6 100644
--- a/src/panfrost/midgard/mir_squeeze.c
+++ b/src/panfrost/midgard/mir_squeeze.c
@@ -30,13 +30,14 @@
* as such */
static unsigned
-find_or_allocate_temp(compiler_context *ctx, unsigned hash)
+find_or_allocate_temp(compiler_context *ctx, struct hash_table_u64 *map,
+ unsigned hash)
{
if (hash >= SSA_FIXED_MINIMUM)
return hash;
unsigned temp = (uintptr_t) _mesa_hash_table_u64_search(
- ctx->hash_to_temp, hash + 1);
+ map, hash + 1);
if (temp)
return temp - 1;
@@ -45,7 +46,7 @@
temp = ctx->temp_count++;
ctx->max_hash = MAX2(ctx->max_hash, hash);
- _mesa_hash_table_u64_insert(ctx->hash_to_temp,
+ _mesa_hash_table_u64_insert(map,
hash + 1, (void *) ((uintptr_t) temp + 1));
return temp;
@@ -57,10 +58,10 @@
void
mir_squeeze_index(compiler_context *ctx)
{
+ struct hash_table_u64 *map = _mesa_hash_table_u64_create(NULL);
+
/* Reset */
ctx->temp_count = 0;
- /* TODO don't leak old hash_to_temp */
- ctx->hash_to_temp = _mesa_hash_table_u64_create(NULL);
/* We need to prioritize texture registers on older GPUs so we don't
* fail RA trying to assign to work registers r0/r1 when a work
@@ -68,17 +69,19 @@
mir_foreach_instr_global(ctx, ins) {
if (ins->type == TAG_TEXTURE_4)
- ins->dest = find_or_allocate_temp(ctx, ins->dest);
+ ins->dest = find_or_allocate_temp(ctx, map, ins->dest);
}
mir_foreach_instr_global(ctx, ins) {
if (ins->type != TAG_TEXTURE_4)
- ins->dest = find_or_allocate_temp(ctx, ins->dest);
+ ins->dest = find_or_allocate_temp(ctx, map, ins->dest);
for (unsigned i = 0; i < ARRAY_SIZE(ins->src); ++i)
- ins->src[i] = find_or_allocate_temp(ctx, ins->src[i]);
+ ins->src[i] = find_or_allocate_temp(ctx, map, ins->src[i]);
}
- ctx->blend_input = find_or_allocate_temp(ctx, ctx->blend_input);
- ctx->blend_src1 = find_or_allocate_temp(ctx, ctx->blend_src1);
+ ctx->blend_input = find_or_allocate_temp(ctx, map, ctx->blend_input);
+ ctx->blend_src1 = find_or_allocate_temp(ctx, map, ctx->blend_src1);
+
+ _mesa_hash_table_u64_destroy(map, NULL);
}
