commit 4e5c85526b1c66a004d14e7b8ffa13b2bb0e706d
author Rhys Perry <pendingchaos02@gmail.com> Thu Oct 29 10:52:25 2020 +0000
committer Marge Bot <eric+marge@anholt.net> Wed Nov 04 11:50:37 2020 +0000
tree 997e0b973d0216934be282bb0d2a486ef52829cd
parent 7d3df69914d015ffd397ec1349b06aaa0cf03973

nir: add shader_info::bit_sizes_used

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>

src/compiler/nir/nir_gather_info.c

diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gather_info.c
index 29c8aac..2271f8b 100644
--- a/src/compiler/nir/nir_gather_info.c
+++ b/src/compiler/nir/nir_gather_info.c
@@ -712,11 +712,18 @@
       break;
    }
 
-   shader->info.uses_64bit |= instr->dest.dest.ssa.bit_size == 64;
-   unsigned num_srcs = nir_op_infos[instr->op].num_inputs;
-   for (unsigned i = 0; i < num_srcs; i++) {
-      shader->info.uses_64bit |= nir_src_bit_size(instr->src[i].src) == 64;
+   const nir_op_info *info = &nir_op_infos[instr->op];
+
+   for (unsigned i = 0; i < info->num_inputs; i++) {
+      if (nir_alu_type_get_base_type(info->input_types[i]) == nir_type_float)
+         shader->info.bit_sizes_float |= nir_src_bit_size(instr->src[i].src);
+      else
+         shader->info.bit_sizes_int |= nir_src_bit_size(instr->src[i].src);
    }
+   if (nir_alu_type_get_base_type(info->output_type) == nir_type_float)
+      shader->info.bit_sizes_float |= nir_dest_bit_size(instr->dest.dest);
+   else
+      shader->info.bit_sizes_int |= nir_dest_bit_size(instr->dest.dest);
 }
 
 static void
@@ -749,6 +756,8 @@
    shader->info.num_images = 0;
    shader->info.image_buffers = 0;
    shader->info.msaa_images = 0;
+   shader->info.bit_sizes_float = 0;
+   shader->info.bit_sizes_int = 0;
 
    nir_foreach_uniform_variable(var, shader) {
       /* Bindless textures and images don't use non-bindless slots.

src/compiler/shader_info.h

diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index f7c3904..59d9541 100644
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -187,10 +187,9 @@
     */
    bool uses_fddx_fddy:1;
 
-   /**
-    * True if this shader uses 64-bit ALU operations
-    */
-   bool uses_64bit:1;
+   /* Bitmask of bit-sizes used with ALU instructions. */
+   uint8_t bit_sizes_float;
+   uint8_t bit_sizes_int;
 
    /* Whether the first UBO is the default uniform buffer, i.e. uniforms. */
    bool first_ubo_is_default_ubo:1;

src/mesa/drivers/dri/i965/brw_program.c

diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index b3db2cc..df3400a 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -119,7 +119,7 @@
 
    nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
 
-   if (!ctx->SoftFP64 && nir->info.uses_64bit &&
+   if (!ctx->SoftFP64 && ((nir->info.bit_sizes_int | nir->info.bit_sizes_float) & 64) &&
        (options->lower_doubles_options & nir_lower_fp64_full_software)) {
       ctx->SoftFP64 = glsl_float64_funcs_to_nir(ctx, options);
    }

src/mesa/state_tracker/st_glsl_to_nir.cpp

diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 91eaf8e..8c835e5 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -370,7 +370,7 @@
    }
 
    nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
-   if (!st->ctx->SoftFP64 && nir->info.uses_64bit &&
+   if (!st->ctx->SoftFP64 && ((nir->info.bit_sizes_int | nir->info.bit_sizes_float) & 64) &&
        (options->lower_doubles_options & nir_lower_fp64_full_software) != 0) {
       st->ctx->SoftFP64 = glsl_float64_funcs_to_nir(st->ctx, options);
    }