freedreno/a6xx: Add multiview registers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5720>
diff --git a/src/freedreno/.gitlab-ci/reference/crash.log b/src/freedreno/.gitlab-ci/reference/crash.log
index 5abe5f4..1cef3af 100644
--- a/src/freedreno/.gitlab-ci/reference/crash.log
+++ b/src/freedreno/.gitlab-ci/reference/crash.log
@@ -7272,10 +7272,10 @@
 	00000000	VPC_SO[0x3].FLUSH_BASE+0x1: 0
 	00000000	VPC_POINT_COORD_INVERT: { 0 }
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
     - context: 1
@@ -7334,19 +7334,19 @@
 	00000000	VPC_SO[0x3].FLUSH_BASE+0x1: 0
 	00000000	VPC_POINT_COORD_INVERT: { 0 }
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
   - cluster-name: CLUSTER_FE
     - context: 0
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
 	00000000	PC_TESS_NUM_VERTEX: 0
@@ -7363,16 +7363,16 @@
 	00000001	PC_DS_OUT_CNTL: { STRIDE_IN_VPC = 1 | CLIP_MASK = 0 }
 	00000000	PC_PRIMITIVE_CNTL_5: { GS_VERTICES_OUT = 0 | GS_INVOCATIONS = 0 | GS_OUTPUT = TESS_POINTS }
 	00000000	PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
-	00000000	PC_UNKNOWN_9B07: 0
+	00000000	PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 	00000000	VFD_CONTROL_0: { FETCH_CNT = 0 | DECODE_CNT = 0 }
-	fcfcfcfc	VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+	fcfcfcfc	VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 	0000fcfc	VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 	fcfcfcfc	VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 	000000fc	VFD_CONTROL_4: 0xfc
 	0000fcfc	VFD_CONTROL_5: { REGID_GSHEADER = r63.x | 0xfc00 }
 	00000000	VFD_CONTROL_6: { 0 }
 	00000000	VFD_MODE_CNTL: { 0 }
-	00000000	VFD_UNKNOWN_A008: 0
+	00000000	VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 	00000000	VFD_ADD_OFFSET: { 0 }
 	00000000	VFD_INDEX_OFFSET: 0
 	00000000	VFD_INSTANCE_START_OFFSET: 0
@@ -7603,10 +7603,10 @@
 	00000001	SP_UNKNOWN_A0F8: 0x1
     - context: 1
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
 	00000000	PC_TESS_NUM_VERTEX: 0
@@ -7623,16 +7623,16 @@
 	00000001	PC_DS_OUT_CNTL: { STRIDE_IN_VPC = 1 | CLIP_MASK = 0 }
 	00000000	PC_PRIMITIVE_CNTL_5: { GS_VERTICES_OUT = 0 | GS_INVOCATIONS = 0 | GS_OUTPUT = TESS_POINTS }
 	00000000	PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
-	00000000	PC_UNKNOWN_9B07: 0
+	00000000	PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 	00000000	VFD_CONTROL_0: { FETCH_CNT = 0 | DECODE_CNT = 0 }
-	fcfcfcfc	VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+	fcfcfcfc	VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 	0000fcfc	VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 	fcfcfcfc	VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 	000000fc	VFD_CONTROL_4: 0xfc
 	0000fcfc	VFD_CONTROL_5: { REGID_GSHEADER = r63.x | 0xfc00 }
 	00000000	VFD_CONTROL_6: { 0 }
 	00000000	VFD_MODE_CNTL: { 0 }
-	00000000	VFD_UNKNOWN_A008: 0
+	00000000	VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 	00000000	VFD_ADD_OFFSET: { 0 }
 	00000000	VFD_INDEX_OFFSET: 0
 	00000000	VFD_INSTANCE_START_OFFSET: 0
@@ -7873,10 +7873,10 @@
 	00000000	VPC_UNKNOWN_9107: 0
 	00000003	VPC_POLYGON_MODE: { MODE = POLYMODE6_TRIANGLES }
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
 	00000000	PC_UNKNOWN_9980: 0
@@ -7888,7 +7888,7 @@
 	00000001	PC_DS_OUT_CNTL: { STRIDE_IN_VPC = 1 | CLIP_MASK = 0 }
 	00000000	PC_PRIMITIVE_CNTL_5: { GS_VERTICES_OUT = 0 | GS_INVOCATIONS = 0 | GS_OUTPUT = TESS_POINTS }
 	00000000	PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
-	00000000	PC_UNKNOWN_9B07: 0
+	00000000	PC_MULTIVIEW_CNTL: { VIEWS = 0 }
     - context: 1
 	000000ff	VPC_UNKNOWN_9100: 0xff
 	00ffff00	VPC_VS_CLIP_CNTL: { CLIP_MASK = 0 | CLIP_DIST_03_LOC = 255 | CLIP_DIST_47_LOC = 255 }
@@ -7900,10 +7900,10 @@
 	00000000	VPC_UNKNOWN_9107: 0
 	00000003	VPC_POLYGON_MODE: { MODE = POLYMODE6_TRIANGLES }
 	00000000	VPC_UNKNOWN_9300: 0
-	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 }
-	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+	00ff0001	VPC_VS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_GS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	00ff0001	VPC_DS_PACK: { STRIDE_IN_VPC = 1 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+	ff00ff00	VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 	00000000	VPC_SO_BUF_CNTL: { 0 }
 	00000000	VPC_SO_DISABLE: { 0 }
 	00000000	PC_UNKNOWN_9980: 0
@@ -7915,7 +7915,7 @@
 	00000001	PC_DS_OUT_CNTL: { STRIDE_IN_VPC = 1 | CLIP_MASK = 0 }
 	00000000	PC_PRIMITIVE_CNTL_5: { GS_VERTICES_OUT = 0 | GS_INVOCATIONS = 0 | GS_OUTPUT = TESS_POINTS }
 	00000000	PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
-	00000000	PC_UNKNOWN_9B07: 0
+	00000000	PC_MULTIVIEW_CNTL: { VIEWS = 0 }
   - cluster-name: CLUSTER_SP_VS
     - context: 0
 	00000140	HLSQ_VS_CNTL: { CONSTLEN = 256 | ENABLED }
diff --git a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
index 600f512..99ef25f 100644
--- a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
+++ b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
@@ -144,8 +144,8 @@
 t4		write PC_PRIMITIVE_CNTL_6 (9b06)
 			PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
 000000000105816c:		0000: 409b0601 00000000
-t4		write PC_UNKNOWN_9B07 (9b07)
-			PC_UNKNOWN_9B07: 0
+t4		write PC_MULTIVIEW_CNTL (9b07)
+			PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001058174:		0000: 489b0701 00000000
 t4		write SP_UNKNOWN_A81B (a81b)
 			SP_UNKNOWN_A81B: 0
@@ -183,8 +183,8 @@
 t4		write VFD_MODE_CNTL (a007)
 			VFD_MODE_CNTL: { 0 }
 00000000010581d4:		0000: 40a00701 00000000
-t4		write VFD_UNKNOWN_A008 (a008)
-			VFD_UNKNOWN_A008: 0
+t4		write VFD_MULTIVIEW_CNTL (a008)
+			VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 00000000010581dc:		0000: 40a00801 00000000
 t4		write PC_MODE_CNTL (9804)
 			PC_MODE_CNTL: 0x1f
@@ -335,10 +335,10 @@
 !+	0000001f		PC_MODE_CNTL: 0x1f
  +	00000000		PC_UNKNOWN_9980: 0
  +	00000000		PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
- +	00000000		PC_UNKNOWN_9B07: 0
+ +	00000000		PC_MULTIVIEW_CNTL: { VIEWS = 0 }
  +	00000000		PC_UNKNOWN_9E72: 0
  +	00000000		VFD_MODE_CNTL: { 0 }
- +	00000000		VFD_UNKNOWN_A008: 0
+ +	00000000		VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 !+	00000001		VFD_ADD_OFFSET: { VERTEX }
  +	00000000		SP_UNKNOWN_A81B: 0
  +	00000000		SP_HS_CTRL_REG0: { HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 0 | BRANCHSTACK = 0 | THREADSIZE = TWO_QUADS }
@@ -952,7 +952,7 @@
 						SP_HS_UNKNOWN_A831: 0
 0000000001054258:					0000: 48a83101 00000000
 t4					write VFD_CONTROL_1 (a001)
-						VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+						VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 						VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 						VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 						VFD_CONTROL_4: 0xfc
@@ -976,7 +976,7 @@
 						SP_VS_VPC_DST[0].REG: { OUTLOC0 = 0 | OUTLOC1 = 4 | OUTLOC2 = 0 | OUTLOC3 = 0 }
 00000000010542ac:					0000: 48a81301 00000400
 t4					write VPC_VS_PACK (9301)
-						VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 }
+						VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 | EXTRAPOS = 0 }
 00000000010542b4:					0000: 40930101 00ff0408
 t4					write VPC_VS_CLIP_CNTL (9101)
 						VPC_VS_CLIP_CNTL: { CLIP_MASK = 0 | CLIP_DIST_03_LOC = 255 | CLIP_DIST_47_LOC = 255 }
@@ -1000,7 +1000,7 @@
 						PC_PRIMID_PASSTHRU: FALSE
 00000000010542ec:					0000: 40980601 00000000
 t4					write VPC_CNTL_0 (9304)
-						VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | UNKLOC = 255 }
+						VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 }
 00000000010542f4:					0000: 40930401 ff01ff04
 t4					write VPC_VARYING_INTERP[0].MODE (9200)
 						VPC_VARYING_INTERP[0].MODE: 0
@@ -1447,8 +1447,8 @@
 !+	ffffffff			VPC_VAR[0x2].DISABLE: 0xffffffff
 !+	ffffffff			VPC_VAR[0x3].DISABLE: 0xffffffff
  +	00000000			VPC_SO_CNTL: { 0 }
-!+	00ff0408			VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 }
-!+	ff01ff04			VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | UNKLOC = 255 }
+!+	00ff0408			VPC_VS_PACK: { STRIDE_IN_VPC = 8 | POSITIONLOC = 4 | PSIZELOC = 255 | EXTRAPOS = 0 }
+!+	ff01ff04			VPC_CNTL_0: { NUMNONPOSVAR = 4 | PRIMIDLOC = 255 | VARYING | VIEWIDLOC = 255 }
  +	00000000			VPC_SO_BUF_CNTL: { 0 }
 !+	ffffffff			PC_RESTART_INDEX: 4294967295
  +	00000000			PC_PRIMID_PASSTHRU: FALSE
@@ -1456,7 +1456,7 @@
  +	00000000			PC_PRIMITIVE_CNTL_0: { 0 }
 !+	00000008			PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 8 | CLIP_MASK = 0 }
 !+	00000303			VFD_CONTROL_0: { FETCH_CNT = 3 | DECODE_CNT = 3 }
-!+	fcfcfc09			VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+!+	fcfcfc09			VFD_CONTROL_1: { REGID4VTX = r2.y | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 !+	0000fcfc			VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 !+	fcfcfcfc			VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 !+	000000fc			VFD_CONTROL_4: 0xfc
diff --git a/src/freedreno/.gitlab-ci/reference/fd-clouds.log b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
index 302d1af..2797eee 100644
--- a/src/freedreno/.gitlab-ci/reference/fd-clouds.log
+++ b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
@@ -132,8 +132,8 @@
 t4		write PC_UNKNOWN_9980 (9980)
 			PC_UNKNOWN_9980: 0
 0000000001d9114c:		0000: 40998001 00000000
-t4		write PC_UNKNOWN_9B07 (9b07)
-			PC_UNKNOWN_9B07: 0
+t4		write PC_MULTIVIEW_CNTL (9b07)
+			PC_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001d91154:		0000: 489b0701 00000000
 t4		write SP_UNKNOWN_A81B (a81b)
 			SP_UNKNOWN_A81B: 0
@@ -213,8 +213,8 @@
 t4		write VFD_MODE_CNTL (a007)
 			VFD_MODE_CNTL: { 0 }
 0000000001d91220:		0000: 40a00701 00000000
-t4		write VFD_UNKNOWN_A008 (a008)
-			VFD_UNKNOWN_A008: 0
+t4		write VFD_MULTIVIEW_CNTL (a008)
+			VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 0000000001d91228:		0000: 40a00801 00000000
 t4		write PC_MODE_CNTL (9804)
 			PC_MODE_CNTL: 0x1f
@@ -688,7 +688,7 @@
 						SP_VS_PRIMITIVE_CNTL: { OUT = 1 }
 0000000001121080:					0000: 48a80201 00000001
 t4					write VPC_CNTL_0 (9304)
-						VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+						VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 0000000001121088:					0000: 40930401 ff00ff00
 t4					write PC_VS_OUT_CNTL (9b01)
 						PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
@@ -743,7 +743,7 @@
 0000000001121104:					0000: 48a98e08 000000fc 000000fc 000000fc 000000fc 000000fc 000000fc 000000fc
 0000000001121124:					0020: 000000fc
 t4					write VPC_VS_PACK (9301)
-						VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
+						VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
 0000000001121128:					0000: 40930101 00ff0004
 t4					write PC_PRIMITIVE_CNTL_6 (9b06)
 						PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
@@ -758,7 +758,7 @@
 						VPC_UNKNOWN_9107: 0
 0000000001121148:					0000: 48910701 00000000
 t4					write VFD_CONTROL_1 (a001)
-						VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+						VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 						VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 						VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 						VFD_CONTROL_4: 0xfc
@@ -1051,8 +1051,8 @@
 !+	ffffffff			VPC_VAR[0x3].DISABLE: 0xffffffff
  +	00000000			VPC_POINT_COORD_INVERT: { 0 }
  +	00000000			VPC_UNKNOWN_9300: 0
-!+	00ff0004			VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
-!+	ff00ff00			VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+!+	00ff0004			VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+!+	ff00ff00			VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
  +	00000000			VPC_SO_BUF_CNTL: { 0 }
  +	00000000			VPC_SO_DISABLE: { 0 }
  +	00000000			VPC_UNKNOWN_9600: 0
@@ -1068,17 +1068,17 @@
 !+	00000004			PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
  +	00000000			PC_PRIMITIVE_CNTL_3: 0
  +	00000000			PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
- +	00000000			PC_UNKNOWN_9B07: 0
+ +	00000000			PC_MULTIVIEW_CNTL: { VIEWS = 0 }
  +	00000000			PC_UNKNOWN_9E72: 0
 !+	00000101			VFD_CONTROL_0: { FETCH_CNT = 1 | DECODE_CNT = 1 }
-!+	fcfcfcfc			VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+!+	fcfcfcfc			VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 !+	0000fcfc			VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 !+	fcfcfcfc			VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 !+	000000fc			VFD_CONTROL_4: 0xfc
 !+	0000fcfc			VFD_CONTROL_5: { REGID_GSHEADER = r63.x | 0xfc00 }
  +	00000000			VFD_CONTROL_6: { 0 }
 !+	00000001			VFD_MODE_CNTL: { BINNING_PASS }
- +	00000000			VFD_UNKNOWN_A008: 0
+ +	00000000			VFD_MULTIVIEW_CNTL: { VIEWS = 0 }
 !+	00000001			VFD_ADD_OFFSET: { VERTEX }
  +	00000000			VFD_INDEX_OFFSET: 0
  +	00000000			VFD_INSTANCE_START_OFFSET: 0
@@ -2003,7 +2003,7 @@
 						SP_VS_PRIMITIVE_CNTL: { OUT = 1 }
 0000000001120080:					0000: 48a80201 00000001
 t4					write VPC_CNTL_0 (9304)
-						VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+						VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
 0000000001120088:					0000: 40930401 ff00ff00
 t4					write PC_VS_OUT_CNTL (9b01)
 						PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
@@ -2058,7 +2058,7 @@
 0000000001120104:					0000: 48a98e08 00000004 00000004 00000004 00000004 00000004 00000004 00000004
 0000000001120124:					0020: 00000004
 t4					write VPC_VS_PACK (9301)
-						VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
+						VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
 0000000001120128:					0000: 40930101 00ff0004
 t4					write PC_PRIMITIVE_CNTL_6 (9b06)
 						PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
@@ -4929,7 +4929,7 @@
 						- shaderdb: 140 (ss), 0 (sy)
 0000000001120164:					0000: 70348003 16320000 01013000 00000000
 t4					write VFD_CONTROL_1 (a001)
-						VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+						VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
 						VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
 						VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
 						VFD_CONTROL_4: 0xfc
@@ -5293,15 +5293,15 @@
  +	ffffffff			VPC_VAR[0x1].DISABLE: 0xffffffff
  +	ffffffff			VPC_VAR[0x2].DISABLE: 0xffffffff
  +	ffffffff			VPC_VAR[0x3].DISABLE: 0xffffffff
- +	00ff0004			VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 }
- +	ff00ff00			VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | UNKLOC = 255 }
+ +	00ff0004			VPC_VS_PACK: { STRIDE_IN_VPC = 4 | POSITIONLOC = 0 | PSIZELOC = 255 | EXTRAPOS = 0 }
+ +	ff00ff00			VPC_CNTL_0: { NUMNONPOSVAR = 0 | PRIMIDLOC = 255 | VIEWIDLOC = 255 }
  +	ffffffff			PC_RESTART_INDEX: 4294967295
  +	00000002			PC_PRIMITIVE_CNTL_0: { PROVOKING_VTX_LAST }
  +	00000004			PC_VS_OUT_CNTL: { STRIDE_IN_VPC = 4 | CLIP_MASK = 0 }
  +	00000000			PC_PRIMITIVE_CNTL_3: 0
  +	00000000			PC_PRIMITIVE_CNTL_6: { STRIDE_IN_VPC = 0 }
  +	00000101			VFD_CONTROL_0: { FETCH_CNT = 1 | DECODE_CNT = 1 }
- +	fcfcfcfc			VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | 0xfc000000 }
+ +	fcfcfcfc			VFD_CONTROL_1: { REGID4VTX = r63.x | REGID4INST = r63.x | REGID4PRIMID = r63.x | REGID4VIEWID = r63.x }
  +	0000fcfc			VFD_CONTROL_2: { REGID_HSPATCHID = r63.x | REGID_INVOCATIONID = r63.x }
  +	fcfcfcfc			VFD_CONTROL_3: { REGID_DSPATCHID = r63.x | REGID_TESSX = r63.x | REGID_TESSY = r63.x | 0xfc }
  +	000000fc			VFD_CONTROL_4: 0xfc
diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml
index 8c5d61c..7327ba6d 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -1921,7 +1921,14 @@
 		<bitfield name="POLY_OFFSET" pos="11" type="boolean"/>
 		<bitfield name="UNK12" pos="12"/>
 		<bitfield name="MSAA_ENABLE" pos="13" type="boolean"/>
-		<bitfield name="UNK15" low="15" high="22"/>
+		<bitfield name="UNK15" low="15" high="16"/>
+		<!--
+		This is set by the blob when multiview is enabled, but doesn't seem
+		to do anything.
+		-->
+		<bitfield name="UNK17" pos="17" type="boolean"/>
+		<bitfield name="MULTIVIEW_ENABLE" pos="18" type="boolean"/>
+		<bitfield name="UNK19" low="19" high="22"/>
 	</reg32>
 	<reg32 offset="0x8091" name="GRAS_SU_POINT_MINMAX">
 		<bitfield name="MIN" low="0" high="15" type="ufixed" radix="4"/>
@@ -2731,7 +2738,13 @@
 		<bitfield name="STRIDE_IN_VPC" low="0" high="7" type="uint"/>
 		<bitfield name="POSITIONLOC" low="8" high="15" type="uint"/>
 		<bitfield name="PSIZELOC" low="16" high="23" type="uint"/>
-		<bitfield name="UNK24" low="24" high="27"/>
+		<bitfield name="EXTRAPOS" low="24" high="27" type="uint">
+			<doc>
+				The number of extra copies of POSITION, i.e.
+				number of views minus one when multi-position
+				output is enabled, otherwise 0.
+			</doc>
+		</bitfield>
 	</bitset>
 	<reg32 offset="0x9301" name="VPC_VS_PACK" type="a6xx_vpc_xs_pack"/>
 	<reg32 offset="0x9302" name="VPC_GS_PACK" type="a6xx_vpc_xs_pack"/>
@@ -2742,7 +2755,18 @@
 		<!-- for fixed-function (i.e. no GS) gl_PrimitiveID in FS -->
 		<bitfield name="PRIMIDLOC" low="8" high="15" type="uint"/>
 		<bitfield name="VARYING" pos="16" type="boolean"/>
-		<bitfield name="UNKLOC" low="24" high="31" type="uint"/>
+		<bitfield name="VIEWIDLOC" low="24" high="31" type="uint">
+			<doc>
+				This VPC location will be overwritten with
+				ViewID when multiview is enabled. It's used when
+				fragment shaders read ViewID. It's only
+				strictly required for multi-position output,
+				where the same VS invocation is used for all the
+				views at once, but it can be used when multi-pos
+				output is disabled too, to avoid having to pass
+				ViewID through the VS.
+			</doc>
+		</bitfield>
 	</reg32>
 
 	<reg32 offset="0x9305" name="VPC_SO_BUF_CNTL">
@@ -2877,10 +2901,24 @@
 		</doc>
 		<bitfield name="STRIDE_IN_VPC" low="0" high="10" type="uint"/>
 	</reg32>
-	<!-- something gs related: -->
-	<reg32 offset="0x9b07" name="PC_UNKNOWN_9B07" low="0" high="6"/>
 
-	<reg32 offset="0x9b08" name="PC_UNKNOWN_9B08" low="0" high="15"/>
+	<bitset name="a6xx_multiview_cntl" inline="yes">
+		<bitfield name="ENABLE" pos="0" type="boolean"/>
+		<bitfield name="DISABLEMULTIPOS" pos="1" type="boolean">
+			<doc>
+				Multi-position output lets the last geometry
+				stage shader write multiple copies of
+				gl_Position. If disabled then the VS is run once
+				for each view, and ViewID is passed as a
+				register to the VS.
+			</doc>
+		</bitfield>
+		<bitfield name="VIEWS" low="2" high="6" type="uint"/>
+	</bitset>
+
+	<reg32 offset="0x9b07" name="PC_MULTIVIEW_CNTL" type="a6xx_multiview_cntl"/>
+	<!-- mask of enabled views, doesn't exist on A630 -->
+	<reg32 offset="0x9b08" name="PC_MULTIVIEW_MASK" type="hex" low="0" high="15"/>
 	<!-- 0x9b09-0x9bff invalid -->
 	<reg32 offset="0x9c00" name="PC_2D_EVENT_CMD">
 		<!-- special register (but note first 8 bits can be written/read) -->
@@ -2924,6 +2962,8 @@
 		<bitfield name="REGID4VTX" low="0" high="7" type="a3xx_regid"/>
 		<bitfield name="REGID4INST" low="8" high="15" type="a3xx_regid"/>
 		<bitfield name="REGID4PRIMID" low="16" high="23" type="a3xx_regid"/>
+		<!-- only used for VS in non-multi-position-output case -->
+		<bitfield name="REGID4VIEWID" low="24" high="31" type="a3xx_regid"/>
 	</reg32>
 	<reg32 offset="0xa002" name="VFD_CONTROL_2">
 		<bitfield name="REGID_HSPATCHID" low="0" high="7" type="a3xx_regid"/>
@@ -2952,8 +2992,7 @@
 		<bitfield name="BINNING_PASS" pos="0" type="boolean"/>
 	</reg32>
 
-	<!-- always 0x0 ? -->
-	<reg32 offset="0xa008" name="VFD_UNKNOWN_A008"/>
+	<reg32 offset="0xa008" name="VFD_MULTIVIEW_CNTL" type="a6xx_multiview_cntl"/>
 	<reg32 offset="0xa009" name="VFD_ADD_OFFSET">
 		<!-- add VFD_INDEX_OFFSET to REGID4VTX -->
 		<bitfield name="VERTEX" pos="0" type="boolean"/>
diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml
index f2720b9..02dd453 100644
--- a/src/freedreno/registers/adreno/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno/adreno_pm4.xml
@@ -1725,7 +1725,7 @@
 		<doc>
 			Do a mysterious CP_EVENT_WRITE 0x3f when the low bit of
 			the data to write is 0. Used by the Vulkan blob with
-			PC_UNKNOWN_9B07, but this isn't predicated on particular
+			PC_MULTIVIEW_CNTL, but this isn't predicated on particular
 			register(s) like the others.
 		</doc>
 		<value name="UNK_EVENT_WRITE" value="0x4"/>
diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c
index d647cb1..fe1ddd8 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -858,7 +858,7 @@
    tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9980, 0);
 
    tu_cs_emit_write_reg(cs, REG_A6XX_PC_PRIMITIVE_CNTL_6, 0);
-   tu_cs_emit_write_reg(cs, REG_A6XX_PC_UNKNOWN_9B07, 0);
+   tu_cs_emit_write_reg(cs, REG_A6XX_PC_MULTIVIEW_CNTL, 0);
 
    tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_A81B, 0);
 
@@ -876,7 +876,7 @@
 
    tu_cs_emit_write_reg(cs, REG_A6XX_VFD_MODE_CNTL, 0x00000000);
 
-   tu_cs_emit_write_reg(cs, REG_A6XX_VFD_UNKNOWN_A008, 0);
+   tu_cs_emit_write_reg(cs, REG_A6XX_VFD_MULTIVIEW_CNTL, 0);
 
    tu_cs_emit_write_reg(cs, REG_A6XX_PC_MODE_CNTL, 0x0000001f);
 
diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index 922586b..3049fdc 100644
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -905,7 +905,7 @@
    tu_cs_emit(cs, A6XX_VPC_CNTL_0_NUMNONPOSVAR(fs ? fs->total_in : 0) |
                   COND(fs && fs->total_in, A6XX_VPC_CNTL_0_VARYING) |
                   A6XX_VPC_CNTL_0_PRIMIDLOC(linkage.primid_loc) |
-                  A6XX_VPC_CNTL_0_UNKLOC(0xff));
+                  A6XX_VPC_CNTL_0_VIEWIDLOC(0xff));
 
    if (hs) {
       shader_info *hs_info = &hs->shader->nir->info;
@@ -1010,7 +1010,7 @@
       tu_cs_emit_pkt4(cs, REG_A6XX_PC_PRIMITIVE_CNTL_6, 1);
       tu_cs_emit(cs, A6XX_PC_PRIMITIVE_CNTL_6_STRIDE_IN_VPC(vec4_size));
 
-      tu_cs_emit_pkt4(cs, REG_A6XX_PC_UNKNOWN_9B07, 1);
+      tu_cs_emit_pkt4(cs, REG_A6XX_PC_MULTIVIEW_CNTL, 1);
       tu_cs_emit(cs, 0);
 
       tu_cs_emit_pkt4(cs, REG_A6XX_SP_GS_PRIM_SIZE, 1);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index c055ac0..fc1ea40 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1200,7 +1200,7 @@
 
 	WRITE(REG_A6XX_PC_UNKNOWN_9980, 0);
 
-	WRITE(REG_A6XX_PC_UNKNOWN_9B07, 0);
+	WRITE(REG_A6XX_PC_MULTIVIEW_CNTL, 0);
 
 	WRITE(REG_A6XX_SP_UNKNOWN_A81B, 0);
 
@@ -1230,7 +1230,7 @@
 	OUT_PKT4(ring, REG_A6XX_VFD_MODE_CNTL, 1);
 	OUT_RING(ring, 0x00000000);   /* VFD_MODE_CNTL */
 
-	WRITE(REG_A6XX_VFD_UNKNOWN_A008, 0);
+	WRITE(REG_A6XX_VFD_MULTIVIEW_CNTL, 0);
 
 	OUT_PKT4(ring, REG_A6XX_PC_MODE_CNTL, 1);
 	OUT_RING(ring, 0x0000001f);   /* PC_MODE_CNTL */
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 7221243..bf8aadc 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -644,7 +644,7 @@
 	OUT_RING(ring, A6XX_VPC_CNTL_0_NUMNONPOSVAR(fs->total_in) |
 			 COND(enable_varyings, A6XX_VPC_CNTL_0_VARYING) |
 			 A6XX_VPC_CNTL_0_PRIMIDLOC(l.primid_loc) |
-			 A6XX_VPC_CNTL_0_UNKLOC(0xff));
+			 A6XX_VPC_CNTL_0_VIEWIDLOC(0xff));
 
 	OUT_PKT4(ring, REG_A6XX_PC_VS_OUT_CNTL, 1);
 	OUT_RING(ring, A6XX_PC_VS_OUT_CNTL_STRIDE_IN_VPC(l.max_loc) |
@@ -825,7 +825,7 @@
 		OUT_PKT4(ring, REG_A6XX_PC_PRIMITIVE_CNTL_6, 1);
 		OUT_RING(ring, A6XX_PC_PRIMITIVE_CNTL_6_STRIDE_IN_VPC(vec4_size));
 
-		OUT_PKT4(ring, REG_A6XX_PC_UNKNOWN_9B07, 1);
+		OUT_PKT4(ring, REG_A6XX_PC_MULTIVIEW_CNTL, 1);
 		OUT_RING(ring, 0);
 
 		OUT_PKT4(ring, REG_A6XX_SP_GS_PRIM_SIZE, 1);