commit 21e3f2f24c45e76d66c520173ced26158ef079fc
author Dave Airlie <airlied@redhat.com> Tue Feb 28 16:26:55 2017 +1000
committer Emil Velikov <emil.l.velikov@gmail.com> Wed Mar 01 13:37:30 2017 +0000
tree 09cd05fa2e39fde64fbd8e73c9bb5a5d8c5852b8
parent bc07622467cf382c3d5c0e673f2b183e8093d231

radv: fix txs for sampler buffers

I messed this up when I wrote it, this fixes:
dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit e66be3d3bb40160c7b7d57c596e4a25da168f1e6)

src/amd/common/ac_nir_to_llvm.c

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4d29099..fc84f9b 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3234,7 +3234,7 @@
 	}
 
 	if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
-		result = get_buffer_size(ctx, res_ptr, false);
+		result = get_buffer_size(ctx, res_ptr, true);
 		goto write_result;
 	}