commit 1b3b4196f08bf825d031cdf6bfcbc7dd3ccf3172
author Samuel Pitoiset <samuel.pitoiset@gmail.com> Fri Dec 16 14:22:16 2016 +0100
committer Samuel Pitoiset <samuel.pitoiset@gmail.com> Thu Jan 12 15:21:47 2017 +0100
tree 3bf1fd7eec9a3223384898b194239a9ca24e01c0
parent 75968a668e44b3fd7c9b9277937c005366fca116

nv50/ir: do not insert texture barriers on gm107

It's actually useless to insert those texture barriers post RA
because the current control code (ie. st 0x0) will wait for all
dependencies before issuing a new instruction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>

src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index fe18f47..ff253af 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -190,7 +190,8 @@
    : rZero(NULL),
      carry(NULL),
      pOne(NULL),
-     needTexBar(prog->getTarget()->getChipset() >= 0xe0)
+     needTexBar(prog->getTarget()->getChipset() >= 0xe0 &&
+                prog->getTarget()->getChipset() < 0x110)
 {
 }