| { |
| "enums": { |
| "BinMapMode": { |
| "entries": [ |
| {"name": "BIN_MAP_MODE_NONE", "value": 0}, |
| {"name": "BIN_MAP_MODE_RTA_INDEX", "value": 1}, |
| {"name": "BIN_MAP_MODE_POPS", "value": 2} |
| ] |
| }, |
| "BinSizeExtend": { |
| "entries": [ |
| {"name": "BIN_SIZE_32_PIXELS", "value": 0}, |
| {"name": "BIN_SIZE_64_PIXELS", "value": 1}, |
| {"name": "BIN_SIZE_128_PIXELS", "value": 2}, |
| {"name": "BIN_SIZE_256_PIXELS", "value": 3}, |
| {"name": "BIN_SIZE_512_PIXELS", "value": 4} |
| ] |
| }, |
| "BinningMode": { |
| "entries": [ |
| {"name": "BINNING_ALLOWED", "value": 0}, |
| {"name": "FORCE_BINNING_ON", "value": 1}, |
| {"name": "DISABLE_BINNING_USE_NEW_SC", "value": 2}, |
| {"name": "DISABLE_BINNING_USE_LEGACY_SC", "value": 3} |
| ] |
| }, |
| "BlendOp": { |
| "entries": [ |
| {"name": "BLEND_ZERO", "value": 0}, |
| {"name": "BLEND_ONE", "value": 1}, |
| {"name": "BLEND_SRC_COLOR", "value": 2}, |
| {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3}, |
| {"name": "BLEND_SRC_ALPHA", "value": 4}, |
| {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5}, |
| {"name": "BLEND_DST_ALPHA", "value": 6}, |
| {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7}, |
| {"name": "BLEND_DST_COLOR", "value": 8}, |
| {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9}, |
| {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10}, |
| {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11}, |
| {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12}, |
| {"name": "BLEND_CONSTANT_COLOR", "value": 13}, |
| {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14}, |
| {"name": "BLEND_SRC1_COLOR", "value": 15}, |
| {"name": "BLEND_INV_SRC1_COLOR", "value": 16}, |
| {"name": "BLEND_SRC1_ALPHA", "value": 17}, |
| {"name": "BLEND_INV_SRC1_ALPHA", "value": 18}, |
| {"name": "BLEND_CONSTANT_ALPHA", "value": 19}, |
| {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20} |
| ] |
| }, |
| "BlendOpt": { |
| "entries": [ |
| {"name": "FORCE_OPT_AUTO", "value": 0}, |
| {"name": "FORCE_OPT_DISABLE", "value": 1}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6}, |
| {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7} |
| ] |
| }, |
| "CBMode": { |
| "entries": [ |
| {"name": "CB_DISABLE", "value": 0}, |
| {"name": "CB_NORMAL", "value": 1}, |
| {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2}, |
| {"name": "CB_RESOLVE", "value": 3}, |
| {"name": "CB_DECOMPRESS", "value": 4}, |
| {"name": "CB_FMASK_DECOMPRESS", "value": 5}, |
| {"name": "CB_DCC_DECOMPRESS", "value": 6}, |
| {"name": "CB_RESERVED", "value": 7} |
| ] |
| }, |
| "CBPerfClearFilterSel": { |
| "entries": [ |
| {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0}, |
| {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1} |
| ] |
| }, |
| "CBPerfOpFilterSel": { |
| "entries": [ |
| {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0}, |
| {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1}, |
| {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2}, |
| {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3}, |
| {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4}, |
| {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5} |
| ] |
| }, |
| "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE": { |
| "entries": [ |
| {"name": "MAX_BLOCK_SIZE_64B", "value": 0}, |
| {"name": "MAX_BLOCK_SIZE_128B", "value": 1}, |
| {"name": "MAX_BLOCK_SIZE_256B", "value": 2} |
| ] |
| }, |
| "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE": { |
| "entries": [ |
| {"name": "MIN_BLOCK_SIZE_32B", "value": 0}, |
| {"name": "MIN_BLOCK_SIZE_64B", "value": 1} |
| ] |
| }, |
| "CLIP_RULE": { |
| "entries": [ |
| {"name": "OUT", "value": 1}, |
| {"name": "IN_0", "value": 2}, |
| {"name": "IN_1", "value": 4}, |
| {"name": "IN_10", "value": 8}, |
| {"name": "IN_2", "value": 16}, |
| {"name": "IN_20", "value": 32}, |
| {"name": "IN_21", "value": 64}, |
| {"name": "IN_210", "value": 128}, |
| {"name": "IN_3", "value": 256}, |
| {"name": "IN_30", "value": 512}, |
| {"name": "IN_31", "value": 1024}, |
| {"name": "IN_310", "value": 2048}, |
| {"name": "IN_32", "value": 4096}, |
| {"name": "IN_320", "value": 8192}, |
| {"name": "IN_321", "value": 16384}, |
| {"name": "IN_3210", "value": 32768} |
| ] |
| }, |
| "CP_PERFMON_ENABLE_MODE": { |
| "entries": [ |
| {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0}, |
| {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1}, |
| {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2}, |
| {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3} |
| ] |
| }, |
| "CP_PERFMON_STATE": { |
| "entries": [ |
| {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0}, |
| {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1}, |
| {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2}, |
| {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3}, |
| {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4}, |
| {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5} |
| ] |
| }, |
| "CmaskAddr": { |
| "entries": [ |
| {"name": "CMASK_ADDR_TILED", "value": 0}, |
| {"name": "CMASK_ADDR_LINEAR", "value": 1}, |
| {"name": "CMASK_ADDR_COMPATIBLE", "value": 2} |
| ] |
| }, |
| "ColorFormat": { |
| "entries": [ |
| {"name": "COLOR_INVALID", "value": 0}, |
| {"name": "COLOR_8", "value": 1}, |
| {"name": "COLOR_16", "value": 2}, |
| {"name": "COLOR_8_8", "value": 3}, |
| {"name": "COLOR_32", "value": 4}, |
| {"name": "COLOR_16_16", "value": 5}, |
| {"name": "COLOR_10_11_11", "value": 6}, |
| {"name": "COLOR_11_11_10", "value": 7}, |
| {"name": "COLOR_10_10_10_2", "value": 8}, |
| {"name": "COLOR_2_10_10_10", "value": 9}, |
| {"name": "COLOR_8_8_8_8", "value": 10}, |
| {"name": "COLOR_32_32", "value": 11}, |
| {"name": "COLOR_16_16_16_16", "value": 12}, |
| {"name": "COLOR_32_32_32_32", "value": 14}, |
| {"name": "COLOR_5_6_5", "value": 16}, |
| {"name": "COLOR_1_5_5_5", "value": 17}, |
| {"name": "COLOR_5_5_5_1", "value": 18}, |
| {"name": "COLOR_4_4_4_4", "value": 19}, |
| {"name": "COLOR_8_24", "value": 20}, |
| {"name": "COLOR_24_8", "value": 21}, |
| {"name": "COLOR_X24_8_32_FLOAT", "value": 22}, |
| {"name": "COLOR_5_9_9_9", "value": 24} |
| ] |
| }, |
| "CombFunc": { |
| "entries": [ |
| {"name": "COMB_DST_PLUS_SRC", "value": 0}, |
| {"name": "COMB_SRC_MINUS_DST", "value": 1}, |
| {"name": "COMB_MIN_DST_SRC", "value": 2}, |
| {"name": "COMB_MAX_DST_SRC", "value": 3}, |
| {"name": "COMB_DST_MINUS_SRC", "value": 4} |
| ] |
| }, |
| "CompareFrag": { |
| "entries": [ |
| {"name": "FRAG_NEVER", "value": 0}, |
| {"name": "FRAG_LESS", "value": 1}, |
| {"name": "FRAG_EQUAL", "value": 2}, |
| {"name": "FRAG_LEQUAL", "value": 3}, |
| {"name": "FRAG_GREATER", "value": 4}, |
| {"name": "FRAG_NOTEQUAL", "value": 5}, |
| {"name": "FRAG_GEQUAL", "value": 6}, |
| {"name": "FRAG_ALWAYS", "value": 7} |
| ] |
| }, |
| "ConservativeZExport": { |
| "entries": [ |
| {"name": "EXPORT_ANY_Z", "value": 0}, |
| {"name": "EXPORT_LESS_THAN_Z", "value": 1}, |
| {"name": "EXPORT_GREATER_THAN_Z", "value": 2}, |
| {"name": "EXPORT_RESERVED", "value": 3} |
| ] |
| }, |
| "CovToShaderSel": { |
| "entries": [ |
| {"name": "INPUT_COVERAGE", "value": 0}, |
| {"name": "INPUT_INNER_COVERAGE", "value": 1}, |
| {"name": "INPUT_DEPTH_COVERAGE", "value": 2}, |
| {"name": "RAW", "value": 3} |
| ] |
| }, |
| "DB_DFSM_CONTROL__PUNCHOUT_MODE": { |
| "entries": [ |
| {"name": "AUTO", "value": 0}, |
| {"name": "FORCE_ON", "value": 1}, |
| {"name": "FORCE_OFF", "value": 2}, |
| {"name": "RESERVED", "value": 3} |
| ] |
| }, |
| "DbPRTFaultBehavior": { |
| "entries": [ |
| {"name": "FAULT_ZERO", "value": 0}, |
| {"name": "FAULT_ONE", "value": 1}, |
| {"name": "FAULT_FAIL", "value": 2}, |
| {"name": "FAULT_PASS", "value": 3} |
| ] |
| }, |
| "DbPSLControl": { |
| "entries": [ |
| {"name": "PSLC_AUTO", "value": 0}, |
| {"name": "PSLC_ON_HANG_ONLY", "value": 1}, |
| {"name": "PSLC_ASAP", "value": 2}, |
| {"name": "PSLC_COUNTDOWN", "value": 3} |
| ] |
| }, |
| "EXCP_EN": { |
| "entries": [ |
| {"name": "INVALID", "value": 1}, |
| {"name": "INPUT_DENORMAL", "value": 2}, |
| {"name": "DIVIDE_BY_ZERO", "value": 4}, |
| {"name": "OVERFLOW", "value": 8}, |
| {"name": "UNDERFLOW", "value": 16}, |
| {"name": "INEXACT", "value": 32}, |
| {"name": "INT_DIVIDE_BY_ZERO", "value": 64}, |
| {"name": "ADDRESS_WATCH", "value": 128}, |
| {"name": "MEMORY_VIOLATION", "value": 256} |
| ] |
| }, |
| "FLOAT_MODE": { |
| "entries": [ |
| {"name": "FP_32_DENORMS", "value": 48}, |
| {"name": "FP_64_DENORMS", "value": 192}, |
| {"name": "FP_ALL_DENORMS", "value": 240} |
| ] |
| }, |
| "ForceControl": { |
| "entries": [ |
| {"name": "FORCE_OFF", "value": 0}, |
| {"name": "FORCE_ENABLE", "value": 1}, |
| {"name": "FORCE_DISABLE", "value": 2}, |
| {"name": "FORCE_RESERVED", "value": 3} |
| ] |
| }, |
| "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": { |
| "entries": [ |
| {"name": "X_DRAW_POINTS", "value": 0}, |
| {"name": "X_DRAW_LINES", "value": 1}, |
| {"name": "X_DRAW_TRIANGLES", "value": 2} |
| ] |
| }, |
| "PA_SU_SC_MODE_CNTL__POLY_MODE": { |
| "entries": [ |
| {"name": "X_DISABLE_POLY_MODE", "value": 0}, |
| {"name": "X_DUAL_MODE", "value": 1} |
| ] |
| }, |
| "PA_SU_VTX_CNTL__ROUND_MODE": { |
| "entries": [ |
| {"name": "X_TRUNCATE", "value": 0}, |
| {"name": "X_ROUND", "value": 1}, |
| {"name": "X_ROUND_TO_EVEN", "value": 2}, |
| {"name": "X_ROUND_TO_ODD", "value": 3} |
| ] |
| }, |
| "PkrMap": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0}, |
| {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1}, |
| {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2}, |
| {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3} |
| ] |
| }, |
| "PkrXsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0}, |
| {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1}, |
| {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2}, |
| {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3} |
| ] |
| }, |
| "PkrXsel2": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0}, |
| {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1}, |
| {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2}, |
| {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3} |
| ] |
| }, |
| "PkrYsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0}, |
| {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1}, |
| {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2}, |
| {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3} |
| ] |
| }, |
| "QUANT_MODE": { |
| "entries": [ |
| {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0}, |
| {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1}, |
| {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2}, |
| {"name": "X_16_8_FIXED_POINT_1_2", "value": 3}, |
| {"name": "X_16_8_FIXED_POINT_1", "value": 4}, |
| {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5}, |
| {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6}, |
| {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7} |
| ] |
| }, |
| "ROP3": { |
| "entries": [ |
| {"name": "ROP3_CLEAR", "value": 0}, |
| {"name": "X_0X05", "value": 5}, |
| {"name": "X_0X0A", "value": 10}, |
| {"name": "X_0X0F", "value": 15}, |
| {"name": "ROP3_NOR", "value": 17}, |
| {"name": "ROP3_AND_INVERTED", "value": 34}, |
| {"name": "ROP3_COPY_INVERTED", "value": 51}, |
| {"name": "ROP3_AND_REVERSE", "value": 68}, |
| {"name": "X_0X50", "value": 80}, |
| {"name": "ROP3_INVERT", "value": 85}, |
| {"name": "X_0X5A", "value": 90}, |
| {"name": "X_0X5F", "value": 95}, |
| {"name": "ROP3_XOR", "value": 102}, |
| {"name": "ROP3_NAND", "value": 119}, |
| {"name": "ROP3_AND", "value": 136}, |
| {"name": "ROP3_EQUIVALENT", "value": 153}, |
| {"name": "X_0XA0", "value": 160}, |
| {"name": "X_0XA5", "value": 165}, |
| {"name": "ROP3_NO_OP", "value": 170}, |
| {"name": "X_0XAF", "value": 175}, |
| {"name": "ROP3_OR_INVERTED", "value": 187}, |
| {"name": "ROP3_COPY", "value": 204}, |
| {"name": "ROP3_OR_REVERSE", "value": 221}, |
| {"name": "ROP3_OR", "value": 238}, |
| {"name": "X_0XF0", "value": 240}, |
| {"name": "X_0XF5", "value": 245}, |
| {"name": "X_0XFA", "value": 250}, |
| {"name": "ROP3_SET", "value": 255} |
| ] |
| }, |
| "RbMap": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0}, |
| {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1}, |
| {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2}, |
| {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3} |
| ] |
| }, |
| "RbXsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0}, |
| {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1} |
| ] |
| }, |
| "RbXsel2": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0}, |
| {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1}, |
| {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2}, |
| {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3} |
| ] |
| }, |
| "RbYsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0}, |
| {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1} |
| ] |
| }, |
| "ReadPolicy": { |
| "entries": [ |
| {"name": "CACHE_LRU_RD", "value": 0}, |
| {"name": "CACHE_NOA", "value": 1}, |
| {"name": "UNCACHED_RD", "value": 2}, |
| {"name": "RESERVED_RDPOLICY", "value": 3} |
| ] |
| }, |
| "SPI_PNT_SPRITE_OVERRIDE": { |
| "entries": [ |
| {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0}, |
| {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1}, |
| {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2}, |
| {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3}, |
| {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4} |
| ] |
| }, |
| "SPI_SHADER_EX_FORMAT": { |
| "entries": [ |
| {"name": "SPI_SHADER_ZERO", "value": 0}, |
| {"name": "SPI_SHADER_32_R", "value": 1}, |
| {"name": "SPI_SHADER_32_GR", "value": 2}, |
| {"name": "SPI_SHADER_32_AR", "value": 3}, |
| {"name": "SPI_SHADER_FP16_ABGR", "value": 4}, |
| {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5}, |
| {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6}, |
| {"name": "SPI_SHADER_UINT16_ABGR", "value": 7}, |
| {"name": "SPI_SHADER_SINT16_ABGR", "value": 8}, |
| {"name": "SPI_SHADER_32_ABGR", "value": 9} |
| ] |
| }, |
| "SPI_SHADER_FORMAT": { |
| "entries": [ |
| {"name": "SPI_SHADER_NONE", "value": 0}, |
| {"name": "SPI_SHADER_1COMP", "value": 1}, |
| {"name": "SPI_SHADER_2COMP", "value": 2}, |
| {"name": "SPI_SHADER_4COMPRESS", "value": 3}, |
| {"name": "SPI_SHADER_4COMP", "value": 4} |
| ] |
| }, |
| "SPM_PERFMON_STATE": { |
| "entries": [ |
| {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0}, |
| {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1}, |
| {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2}, |
| {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3}, |
| {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4}, |
| {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5} |
| ] |
| }, |
| "SX_BLEND_OPT": { |
| "entries": [ |
| {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL", "value": 0}, |
| {"name": "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE", "value": 1}, |
| {"name": "BLEND_OPT_PRESERVE_C1_IGNORE_C0", "value": 2}, |
| {"name": "BLEND_OPT_PRESERVE_C0_IGNORE_C1", "value": 3}, |
| {"name": "BLEND_OPT_PRESERVE_A1_IGNORE_A0", "value": 4}, |
| {"name": "BLEND_OPT_PRESERVE_A0_IGNORE_A1", "value": 5}, |
| {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_A0", "value": 6}, |
| {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE", "value": 7} |
| ] |
| }, |
| "SX_BLEND_OPT_EPSILON__MRT0_EPSILON": { |
| "entries": [ |
| {"name": "EXACT", "value": 0}, |
| {"name": "11BIT_FORMAT", "value": 1}, |
| {"name": "10BIT_FORMAT", "value": 3}, |
| {"name": "8BIT_FORMAT", "value": 6}, |
| {"name": "6BIT_FORMAT", "value": 11}, |
| {"name": "5BIT_FORMAT", "value": 13}, |
| {"name": "4BIT_FORMAT", "value": 15} |
| ] |
| }, |
| "SX_DOWNCONVERT_FORMAT": { |
| "entries": [ |
| {"name": "SX_RT_EXPORT_NO_CONVERSION", "value": 0}, |
| {"name": "SX_RT_EXPORT_32_R", "value": 1}, |
| {"name": "SX_RT_EXPORT_32_A", "value": 2}, |
| {"name": "SX_RT_EXPORT_10_11_11", "value": 3}, |
| {"name": "SX_RT_EXPORT_2_10_10_10", "value": 4}, |
| {"name": "SX_RT_EXPORT_8_8_8_8", "value": 5}, |
| {"name": "SX_RT_EXPORT_5_6_5", "value": 6}, |
| {"name": "SX_RT_EXPORT_1_5_5_5", "value": 7}, |
| {"name": "SX_RT_EXPORT_4_4_4_4", "value": 8}, |
| {"name": "SX_RT_EXPORT_16_16_GR", "value": 9}, |
| {"name": "SX_RT_EXPORT_16_16_AR", "value": 10}, |
| {"name": "SX_RT_EXPORT_9_9_9_E5", "value": 11} |
| ] |
| }, |
| "SX_OPT_COMB_FCN": { |
| "entries": [ |
| {"name": "OPT_COMB_NONE", "value": 0}, |
| {"name": "OPT_COMB_ADD", "value": 1}, |
| {"name": "OPT_COMB_SUBTRACT", "value": 2}, |
| {"name": "OPT_COMB_MIN", "value": 3}, |
| {"name": "OPT_COMB_MAX", "value": 4}, |
| {"name": "OPT_COMB_REVSUBTRACT", "value": 5}, |
| {"name": "OPT_COMB_BLEND_DISABLED", "value": 6}, |
| {"name": "OPT_COMB_SAFE_ADD", "value": 7} |
| ] |
| }, |
| "ScMap": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0}, |
| {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1}, |
| {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2}, |
| {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3} |
| ] |
| }, |
| "ScUncertaintyRegionMode": { |
| "entries": [ |
| {"name": "SC_HALF_LSB", "value": 0}, |
| {"name": "SC_LSB_ONE_SIDED", "value": 1}, |
| {"name": "SC_LSB_TWO_SIDED", "value": 2} |
| ] |
| }, |
| "ScXsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "ScYsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "SeMap": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3} |
| ] |
| }, |
| "SePairMap": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3} |
| ] |
| }, |
| "SePairXsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "SePairYsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "SeXsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "SeYsel": { |
| "entries": [ |
| {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0}, |
| {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1}, |
| {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2}, |
| {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3} |
| ] |
| }, |
| "StencilFormat": { |
| "entries": [ |
| {"name": "STENCIL_INVALID", "value": 0}, |
| {"name": "STENCIL_8", "value": 1} |
| ] |
| }, |
| "StencilOp": { |
| "entries": [ |
| {"name": "STENCIL_KEEP", "value": 0}, |
| {"name": "STENCIL_ZERO", "value": 1}, |
| {"name": "STENCIL_ONES", "value": 2}, |
| {"name": "STENCIL_REPLACE_TEST", "value": 3}, |
| {"name": "STENCIL_REPLACE_OP", "value": 4}, |
| {"name": "STENCIL_ADD_CLAMP", "value": 5}, |
| {"name": "STENCIL_SUB_CLAMP", "value": 6}, |
| {"name": "STENCIL_INVERT", "value": 7}, |
| {"name": "STENCIL_ADD_WRAP", "value": 8}, |
| {"name": "STENCIL_SUB_WRAP", "value": 9}, |
| {"name": "STENCIL_AND", "value": 10}, |
| {"name": "STENCIL_OR", "value": 11}, |
| {"name": "STENCIL_XOR", "value": 12}, |
| {"name": "STENCIL_NAND", "value": 13}, |
| {"name": "STENCIL_NOR", "value": 14}, |
| {"name": "STENCIL_XNOR", "value": 15} |
| ] |
| }, |
| "SurfaceEndian": { |
| "entries": [ |
| {"name": "ENDIAN_NONE", "value": 0}, |
| {"name": "ENDIAN_8IN16", "value": 1}, |
| {"name": "ENDIAN_8IN32", "value": 2}, |
| {"name": "ENDIAN_8IN64", "value": 3} |
| ] |
| }, |
| "SurfaceNumber": { |
| "entries": [ |
| {"name": "NUMBER_UNORM", "value": 0}, |
| {"name": "NUMBER_SNORM", "value": 1}, |
| {"name": "NUMBER_USCALED", "value": 2}, |
| {"name": "NUMBER_SSCALED", "value": 3}, |
| {"name": "NUMBER_UINT", "value": 4}, |
| {"name": "NUMBER_SINT", "value": 5}, |
| {"name": "NUMBER_SRGB", "value": 6}, |
| {"name": "NUMBER_FLOAT", "value": 7} |
| ] |
| }, |
| "SurfaceSwap": { |
| "entries": [ |
| {"name": "SWAP_STD", "value": 0}, |
| {"name": "SWAP_ALT", "value": 1}, |
| {"name": "SWAP_STD_REV", "value": 2}, |
| {"name": "SWAP_ALT_REV", "value": 3} |
| ] |
| }, |
| "ThreadTraceRegInclude": { |
| "entries": [ |
| {"name": "REG_INCLUDE_SQDEC", "value": 1}, |
| {"name": "REG_INCLUDE_SHDEC", "value": 2}, |
| {"name": "REG_INCLUDE_GFXUDEC", "value": 4}, |
| {"name": "REG_INCLUDE_COMP", "value": 8}, |
| {"name": "REG_INCLUDE_CONTEXT", "value": 16}, |
| {"name": "REG_INCLUDE_CONFIG", "value": 32}, |
| {"name": "REG_INCLUDE_OTHER", "value": 64}, |
| {"name": "REG_INCLUDE_READS", "value": 128} |
| ] |
| }, |
| "ThreadTraceTokenExclude": { |
| "entries": [ |
| {"name": "TOKEN_EXCLUDE_VMEMEXEC", "value": 1}, |
| {"name": "TOKEN_EXCLUDE_ALUEXEC", "value": 2}, |
| {"name": "TOKEN_EXCLUDE_VALUINST", "value": 4}, |
| {"name": "TOKEN_EXCLUDE_WAVERDY", "value": 8}, |
| {"name": "TOKEN_EXCLUDE_IMMED1", "value": 16}, |
| {"name": "TOKEN_EXCLUDE_IMMEDIATE", "value": 32}, |
| {"name": "TOKEN_EXCLUDE_REG", "value": 64}, |
| {"name": "TOKEN_EXCLUDE_EVENT", "value": 128}, |
| {"name": "TOKEN_EXCLUDE_INST", "value": 256}, |
| {"name": "TOKEN_EXCLUDE_UTILCTR", "value": 512}, |
| {"name": "TOKEN_EXCLUDE_WAVEALLOC", "value": 1024}, |
| {"name": "TOKEN_EXCLUDE_PERF", "value": 2048} |
| ] |
| }, |
| "VGT_DETECT_ONE": { |
| "entries": [ |
| {"name": "PRE_CLAMP_TF1", "value": 0}, |
| {"name": "POST_CLAMP_TF1", "value": 1}, |
| {"name": "DISABLE_TF1", "value": 2} |
| ] |
| }, |
| "VGT_DETECT_ZERO": { |
| "entries": [ |
| {"name": "PRE_CLAMP_TF0", "value": 0}, |
| {"name": "POST_CLAMP_TF0", "value": 1}, |
| {"name": "DISABLE_TF0", "value": 2} |
| ] |
| }, |
| "VGT_DIST_MODE": { |
| "entries": [ |
| {"name": "NO_DIST", "value": 0}, |
| {"name": "PATCHES", "value": 1}, |
| {"name": "DONUTS", "value": 2}, |
| {"name": "TRAPEZOIDS", "value": 3} |
| ] |
| }, |
| "VGT_DI_MAJOR_MODE_SELECT": { |
| "entries": [ |
| {"name": "DI_MAJOR_MODE_0", "value": 0}, |
| {"name": "DI_MAJOR_MODE_1", "value": 1} |
| ] |
| }, |
| "VGT_DI_PRIM_TYPE": { |
| "entries": [ |
| {"name": "DI_PT_NONE", "value": 0}, |
| {"name": "DI_PT_POINTLIST", "value": 1}, |
| {"name": "DI_PT_LINELIST", "value": 2}, |
| {"name": "DI_PT_LINESTRIP", "value": 3}, |
| {"name": "DI_PT_TRILIST", "value": 4}, |
| {"name": "DI_PT_TRIFAN", "value": 5}, |
| {"name": "DI_PT_TRISTRIP", "value": 6}, |
| {"name": "DI_PT_2D_RECTANGLE", "value": 7}, |
| {"name": "DI_PT_UNUSED_1", "value": 8}, |
| {"name": "DI_PT_PATCH", "value": 9}, |
| {"name": "DI_PT_LINELIST_ADJ", "value": 10}, |
| {"name": "DI_PT_LINESTRIP_ADJ", "value": 11}, |
| {"name": "DI_PT_TRILIST_ADJ", "value": 12}, |
| {"name": "DI_PT_TRISTRIP_ADJ", "value": 13}, |
| {"name": "DI_PT_UNUSED_3", "value": 14}, |
| {"name": "DI_PT_UNUSED_4", "value": 15}, |
| {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16}, |
| {"name": "DI_PT_RECTLIST", "value": 17}, |
| {"name": "DI_PT_LINELOOP", "value": 18}, |
| {"name": "DI_PT_QUADLIST", "value": 19}, |
| {"name": "DI_PT_QUADSTRIP", "value": 20}, |
| {"name": "DI_PT_POLYGON", "value": 21} |
| ] |
| }, |
| "VGT_DI_SOURCE_SELECT": { |
| "entries": [ |
| {"name": "DI_SRC_SEL_DMA", "value": 0}, |
| {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1}, |
| {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2}, |
| {"name": "DI_SRC_SEL_RESERVED", "value": 3} |
| ] |
| }, |
| "VGT_DMA_BUF_TYPE": { |
| "entries": [ |
| {"name": "VGT_DMA_BUF_MEM", "value": 0}, |
| {"name": "VGT_DMA_BUF_RING", "value": 1}, |
| {"name": "VGT_DMA_BUF_SETUP", "value": 2}, |
| {"name": "VGT_DMA_PTR_UPDATE", "value": 3} |
| ] |
| }, |
| "VGT_DMA_SWAP_MODE": { |
| "entries": [ |
| {"name": "VGT_DMA_SWAP_NONE", "value": 0}, |
| {"name": "VGT_DMA_SWAP_16_BIT", "value": 1}, |
| {"name": "VGT_DMA_SWAP_32_BIT", "value": 2}, |
| {"name": "VGT_DMA_SWAP_WORD", "value": 3} |
| ] |
| }, |
| "VGT_EVENT_TYPE": { |
| "entries": [ |
| {"name": "Reserved_0x00", "value": 0}, |
| {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1}, |
| {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2}, |
| {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3}, |
| {"name": "CACHE_FLUSH_TS", "value": 4}, |
| {"name": "CONTEXT_DONE", "value": 5}, |
| {"name": "CACHE_FLUSH", "value": 6}, |
| {"name": "CS_PARTIAL_FLUSH", "value": 7}, |
| {"name": "VGT_STREAMOUT_SYNC", "value": 8}, |
| {"name": "SET_FE_ID", "value": 9}, |
| {"name": "VGT_STREAMOUT_RESET", "value": 10}, |
| {"name": "END_OF_PIPE_INCR_DE", "value": 11}, |
| {"name": "END_OF_PIPE_IB_END", "value": 12}, |
| {"name": "RST_PIX_CNT", "value": 13}, |
| {"name": "BREAK_BATCH", "value": 14}, |
| {"name": "VS_PARTIAL_FLUSH", "value": 15}, |
| {"name": "PS_PARTIAL_FLUSH", "value": 16}, |
| {"name": "FLUSH_HS_OUTPUT", "value": 17}, |
| {"name": "FLUSH_DFSM", "value": 18}, |
| {"name": "RESET_TO_LOWEST_VGT", "value": 19}, |
| {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20}, |
| {"name": "ZPASS_DONE", "value": 21}, |
| {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22}, |
| {"name": "PERFCOUNTER_START", "value": 23}, |
| {"name": "PERFCOUNTER_STOP", "value": 24}, |
| {"name": "PIPELINESTAT_START", "value": 25}, |
| {"name": "PIPELINESTAT_STOP", "value": 26}, |
| {"name": "PERFCOUNTER_SAMPLE", "value": 27}, |
| {"name": "FLUSH_ES_OUTPUT", "value": 28}, |
| {"name": "BIN_CONF_OVERRIDE_CHECK", "value": 29}, |
| {"name": "SAMPLE_PIPELINESTAT", "value": 30}, |
| {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31}, |
| {"name": "SAMPLE_STREAMOUTSTATS", "value": 32}, |
| {"name": "RESET_VTX_CNT", "value": 33}, |
| {"name": "BLOCK_CONTEXT_DONE", "value": 34}, |
| {"name": "CS_CONTEXT_DONE", "value": 35}, |
| {"name": "VGT_FLUSH", "value": 36}, |
| {"name": "TGID_ROLLOVER", "value": 37}, |
| {"name": "SQ_NON_EVENT", "value": 38}, |
| {"name": "SC_SEND_DB_VPZ", "value": 39}, |
| {"name": "BOTTOM_OF_PIPE_TS", "value": 40}, |
| {"name": "FLUSH_SX_TS", "value": 41}, |
| {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42}, |
| {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43}, |
| {"name": "FLUSH_AND_INV_DB_META", "value": 44}, |
| {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45}, |
| {"name": "FLUSH_AND_INV_CB_META", "value": 46}, |
| {"name": "CS_DONE", "value": 47}, |
| {"name": "PS_DONE", "value": 48}, |
| {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49}, |
| {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50}, |
| {"name": "THREAD_TRACE_START", "value": 51}, |
| {"name": "THREAD_TRACE_STOP", "value": 52}, |
| {"name": "THREAD_TRACE_MARKER", "value": 53}, |
| {"name": "THREAD_TRACE_DRAW", "value": 54}, |
| {"name": "THREAD_TRACE_FINISH", "value": 55}, |
| {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56}, |
| {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57}, |
| {"name": "PIXEL_PIPE_STAT_RESET", "value": 58}, |
| {"name": "CONTEXT_SUSPEND", "value": 59}, |
| {"name": "OFFCHIP_HS_DEALLOC", "value": 60}, |
| {"name": "ENABLE_NGG_PIPELINE", "value": 61}, |
| {"name": "ENABLE_LEGACY_PIPELINE", "value": 62}, |
| {"name": "DRAW_DONE", "value": 63} |
| ] |
| }, |
| "VGT_GS_CUT_MODE": { |
| "entries": [ |
| {"name": "GS_CUT_1024", "value": 0}, |
| {"name": "GS_CUT_512", "value": 1}, |
| {"name": "GS_CUT_256", "value": 2}, |
| {"name": "GS_CUT_128", "value": 3} |
| ] |
| }, |
| "VGT_GS_MODE_TYPE": { |
| "entries": [ |
| {"name": "GS_OFF", "value": 0}, |
| {"name": "GS_SCENARIO_A", "value": 1}, |
| {"name": "GS_SCENARIO_B", "value": 2}, |
| {"name": "GS_SCENARIO_G", "value": 3}, |
| {"name": "GS_SCENARIO_C", "value": 4}, |
| {"name": "SPRITE_EN", "value": 5} |
| ] |
| }, |
| "VGT_GS_OUTPRIM_TYPE": { |
| "entries": [ |
| {"name": "POINTLIST", "value": 0}, |
| {"name": "LINESTRIP", "value": 1}, |
| {"name": "TRISTRIP", "value": 2}, |
| {"name": "RECTLIST", "value": 3} |
| ] |
| }, |
| "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": { |
| "entries": [ |
| {"name": "X_8K_DWORDS", "value": 0}, |
| {"name": "X_4K_DWORDS", "value": 1}, |
| {"name": "X_2K_DWORDS", "value": 2}, |
| {"name": "X_1K_DWORDS", "value": 3} |
| ] |
| }, |
| "VGT_INDEX_TYPE_MODE": { |
| "entries": [ |
| {"name": "VGT_INDEX_16", "value": 0}, |
| {"name": "VGT_INDEX_32", "value": 1}, |
| {"name": "VGT_INDEX_8", "value": 2} |
| ] |
| }, |
| "VGT_RDREQ_POLICY": { |
| "entries": [ |
| {"name": "VGT_POLICY_LRU", "value": 0}, |
| {"name": "VGT_POLICY_STREAM", "value": 1}, |
| {"name": "VGT_POLICY_BYPASS", "value": 2} |
| ] |
| }, |
| "VGT_STAGES_ES_EN": { |
| "entries": [ |
| {"name": "ES_STAGE_OFF", "value": 0}, |
| {"name": "ES_STAGE_DS", "value": 1}, |
| {"name": "ES_STAGE_REAL", "value": 2}, |
| {"name": "RESERVED_ES", "value": 3} |
| ] |
| }, |
| "VGT_STAGES_GS_EN": { |
| "entries": [ |
| {"name": "GS_STAGE_OFF", "value": 0}, |
| {"name": "GS_STAGE_ON", "value": 1} |
| ] |
| }, |
| "VGT_STAGES_HS_EN": { |
| "entries": [ |
| {"name": "HS_STAGE_OFF", "value": 0}, |
| {"name": "HS_STAGE_ON", "value": 1} |
| ] |
| }, |
| "VGT_STAGES_LS_EN": { |
| "entries": [ |
| {"name": "LS_STAGE_OFF", "value": 0}, |
| {"name": "LS_STAGE_ON", "value": 1}, |
| {"name": "CS_STAGE_ON", "value": 2}, |
| {"name": "RESERVED_LS", "value": 3} |
| ] |
| }, |
| "VGT_STAGES_VS_EN": { |
| "entries": [ |
| {"name": "VS_STAGE_REAL", "value": 0}, |
| {"name": "VS_STAGE_DS", "value": 1}, |
| {"name": "VS_STAGE_COPY_SHADER", "value": 2}, |
| {"name": "RESERVED_VS", "value": 3} |
| ] |
| }, |
| "VGT_TESS_PARTITION": { |
| "entries": [ |
| {"name": "PART_INTEGER", "value": 0}, |
| {"name": "PART_POW2", "value": 1}, |
| {"name": "PART_FRAC_ODD", "value": 2}, |
| {"name": "PART_FRAC_EVEN", "value": 3} |
| ] |
| }, |
| "VGT_TESS_TOPOLOGY": { |
| "entries": [ |
| {"name": "OUTPUT_POINT", "value": 0}, |
| {"name": "OUTPUT_LINE", "value": 1}, |
| {"name": "OUTPUT_TRIANGLE_CW", "value": 2}, |
| {"name": "OUTPUT_TRIANGLE_CCW", "value": 3} |
| ] |
| }, |
| "VGT_TESS_TYPE": { |
| "entries": [ |
| {"name": "TESS_ISOLINE", "value": 0}, |
| {"name": "TESS_TRIANGLE", "value": 1}, |
| {"name": "TESS_QUAD", "value": 2} |
| ] |
| }, |
| "WritePolicy": { |
| "entries": [ |
| {"name": "CACHE_LRU_WR", "value": 0}, |
| {"name": "CACHE_STREAM", "value": 1}, |
| {"name": "CACHE_BYPASS", "value": 2}, |
| {"name": "UNCACHED_WR", "value": 3} |
| ] |
| }, |
| "ZFormat": { |
| "entries": [ |
| {"name": "Z_INVALID", "value": 0}, |
| {"name": "Z_16", "value": 1}, |
| {"name": "Z_24", "value": 2}, |
| {"name": "Z_32_FLOAT", "value": 3} |
| ] |
| }, |
| "ZLimitSumm": { |
| "entries": [ |
| {"name": "FORCE_SUMM_OFF", "value": 0}, |
| {"name": "FORCE_SUMM_MINZ", "value": 1}, |
| {"name": "FORCE_SUMM_MAXZ", "value": 2}, |
| {"name": "FORCE_SUMM_BOTH", "value": 3} |
| ] |
| }, |
| "ZOrder": { |
| "entries": [ |
| {"name": "LATE_Z", "value": 0}, |
| {"name": "EARLY_Z_THEN_LATE_Z", "value": 1}, |
| {"name": "RE_Z", "value": 2}, |
| {"name": "EARLY_Z_THEN_RE_Z", "value": 3} |
| ] |
| } |
| }, |
| "register_mappings": [ |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 40, "to": "mm"}, |
| "name": "SQ_WAVE_ACTIVE", |
| "type_ref": "SQ_WAVE_ACTIVE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 44, "to": "mm"}, |
| "name": "SQ_WAVE_VALID_AND_IDLE", |
| "type_ref": "SQ_WAVE_ACTIVE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1028, "to": "mm"}, |
| "name": "SQ_WAVE_MODE", |
| "type_ref": "SQ_WAVE_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1032, "to": "mm"}, |
| "name": "SQ_WAVE_STATUS", |
| "type_ref": "SQ_WAVE_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1036, "to": "mm"}, |
| "name": "SQ_WAVE_TRAPSTS", |
| "type_ref": "SQ_WAVE_TRAPSTS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1040, "to": "mm"}, |
| "name": "SQ_WAVE_HW_ID_LEGACY", |
| "type_ref": "SQ_WAVE_HW_ID_LEGACY" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1044, "to": "mm"}, |
| "name": "SQ_WAVE_GPR_ALLOC", |
| "type_ref": "SQ_WAVE_GPR_ALLOC" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1048, "to": "mm"}, |
| "name": "SQ_WAVE_LDS_ALLOC", |
| "type_ref": "SQ_WAVE_LDS_ALLOC" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1052, "to": "mm"}, |
| "name": "SQ_WAVE_IB_STS", |
| "type_ref": "SQ_WAVE_IB_STS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1056, "to": "mm"}, |
| "name": "SQ_WAVE_PC_LO", |
| "type_ref": "SQ_WAVE_PC_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1060, "to": "mm"}, |
| "name": "SQ_WAVE_PC_HI", |
| "type_ref": "SQ_WAVE_PC_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1064, "to": "mm"}, |
| "name": "SQ_WAVE_INST_DW0", |
| "type_ref": "SQ_WAVE_INST_DW0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1076, "to": "mm"}, |
| "name": "SQ_WAVE_IB_DBG1", |
| "type_ref": "SQ_WAVE_IB_DBG1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1080, "to": "mm"}, |
| "name": "SQ_WAVE_FLUSH_IB", |
| "type_ref": "SQ_WAVE_FLUSH_IB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1104, "to": "mm"}, |
| "name": "SQ_WAVE_FLAT_SCRATCH_LO", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1108, "to": "mm"}, |
| "name": "SQ_WAVE_FLAT_SCRATCH_HI", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1116, "to": "mm"}, |
| "name": "SQ_WAVE_HW_ID1", |
| "type_ref": "SQ_WAVE_HW_ID1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1120, "to": "mm"}, |
| "name": "SQ_WAVE_HW_ID2", |
| "type_ref": "SQ_WAVE_HW_ID2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1124, "to": "mm"}, |
| "name": "SQ_WAVE_POPS_PACKER", |
| "type_ref": "SQ_WAVE_POPS_PACKER" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1128, "to": "mm"}, |
| "name": "SQ_WAVE_SCHED_MODE", |
| "type_ref": "SQ_WAVE_SCHED_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1132, "to": "mm"}, |
| "name": "SQ_WAVE_VGPR_OFFSET", |
| "type_ref": "SQ_WAVE_VGPR_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1136, "to": "mm"}, |
| "name": "SQ_WAVE_IB_STS2", |
| "type_ref": "SQ_WAVE_IB_STS2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 1140, "to": "mm"}, |
| "name": "SQ_WAVE_SHADER_CYCLES", |
| "type_ref": "SQ_WAVE_SHADER_CYCLES" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2480, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2484, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2488, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2492, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2496, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2500, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2504, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2508, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2512, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2516, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2520, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2524, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2528, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2532, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2536, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2540, "to": "mm"}, |
| "name": "SQ_WAVE_TTMP15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2544, "to": "mm"}, |
| "name": "SQ_WAVE_M0", |
| "type_ref": "SQ_WAVE_M0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2552, "to": "mm"}, |
| "name": "SQ_WAVE_EXEC_LO", |
| "type_ref": "SQ_WAVE_EXEC_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 2556, "to": "mm"}, |
| "name": "SQ_WAVE_EXEC_HI", |
| "type_ref": "SQ_WAVE_EXEC_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32776, "to": "mm"}, |
| "name": "GRBM_STATUS2", |
| "type_ref": "GRBM_STATUS2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32784, "to": "mm"}, |
| "name": "GRBM_STATUS", |
| "type_ref": "GRBM_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32788, "to": "mm"}, |
| "name": "GRBM_STATUS_SE0", |
| "type_ref": "GRBM_STATUS_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32792, "to": "mm"}, |
| "name": "GRBM_STATUS_SE1", |
| "type_ref": "GRBM_STATUS_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32796, "to": "mm"}, |
| "name": "GRBM_STATUS3", |
| "type_ref": "GRBM_STATUS3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32824, "to": "mm"}, |
| "name": "GRBM_STATUS_SE2", |
| "type_ref": "GRBM_STATUS_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 32828, "to": "mm"}, |
| "name": "GRBM_STATUS_SE3", |
| "type_ref": "GRBM_STATUS_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33296, "to": "mm"}, |
| "name": "CP_CPC_STATUS", |
| "type_ref": "CP_CPC_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33300, "to": "mm"}, |
| "name": "CP_CPC_BUSY_STAT", |
| "type_ref": "CP_CPC_BUSY_STAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33304, "to": "mm"}, |
| "name": "CP_CPC_STALLED_STAT1", |
| "type_ref": "CP_CPC_STALLED_STAT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33308, "to": "mm"}, |
| "name": "CP_CPF_STATUS", |
| "type_ref": "CP_CPF_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33312, "to": "mm"}, |
| "name": "CP_CPF_BUSY_STAT", |
| "type_ref": "CP_CPF_BUSY_STAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33316, "to": "mm"}, |
| "name": "CP_CPF_STALLED_STAT1", |
| "type_ref": "CP_CPF_STALLED_STAT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33320, "to": "mm"}, |
| "name": "CP_CPC_BUSY_STAT2", |
| "type_ref": "CP_CPC_BUSY_STAT2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33324, "to": "mm"}, |
| "name": "CP_CPC_GRBM_FREE_COUNT", |
| "type_ref": "CP_CPC_GRBM_FREE_COUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33328, "to": "mm"}, |
| "name": "CP_CPC_PRIV_VIOLATION_ADDR", |
| "type_ref": "CP_CPC_PRIV_VIOLATION_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33344, "to": "mm"}, |
| "name": "CP_CPC_SCRATCH_INDEX", |
| "type_ref": "CP_CPC_SCRATCH_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33348, "to": "mm"}, |
| "name": "CP_CPC_SCRATCH_DATA", |
| "type_ref": "CP_CPC_SCRATCH_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33352, "to": "mm"}, |
| "name": "CP_CPF_GRBM_FREE_COUNT", |
| "type_ref": "CP_CPF_GRBM_FREE_COUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33356, "to": "mm"}, |
| "name": "CP_CPF_BUSY_STAT2", |
| "type_ref": "CP_CPF_BUSY_STAT2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 33436, "to": "mm"}, |
| "name": "CP_CPC_HALT_HYST_COUNT", |
| "type_ref": "CP_CPC_HALT_HYST_COUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36096, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_BUF0_BASE", |
| "type_ref": "SQ_THREAD_TRACE_BUF0_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36100, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_BUF0_SIZE", |
| "type_ref": "SQ_THREAD_TRACE_BUF0_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36104, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_BUF1_BASE", |
| "type_ref": "SQ_THREAD_TRACE_BUF0_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36108, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_BUF1_SIZE", |
| "type_ref": "SQ_THREAD_TRACE_BUF0_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36112, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_WPTR", |
| "type_ref": "SQ_THREAD_TRACE_WPTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36116, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_MASK", |
| "type_ref": "SQ_THREAD_TRACE_MASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36120, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_TOKEN_MASK", |
| "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36124, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_CTRL", |
| "type_ref": "SQ_THREAD_TRACE_CTRL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36128, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_STATUS", |
| "type_ref": "SQ_THREAD_TRACE_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36132, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_DROPPED_CNTR", |
| "type_ref": "SQ_THREAD_TRACE_DROPPED_CNTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36140, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_GFX_DRAW_CNTR", |
| "type_ref": "SQ_THREAD_TRACE_DROPPED_CNTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36144, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_GFX_MARKER_CNTR", |
| "type_ref": "SQ_THREAD_TRACE_DROPPED_CNTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36148, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_HP3D_DRAW_CNTR", |
| "type_ref": "SQ_THREAD_TRACE_DROPPED_CNTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36152, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_HP3D_MARKER_CNTR", |
| "type_ref": "SQ_THREAD_TRACE_DROPPED_CNTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 36156, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_STATUS2", |
| "type_ref": "SQ_THREAD_TRACE_STATUS2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 37168, "to": "mm"}, |
| "name": "SPI_CONFIG_CNTL", |
| "type_ref": "SPI_CONFIG_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 39160, "to": "mm"}, |
| "name": "GB_ADDR_CONFIG", |
| "type_ref": "GB_ADDR_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45060, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC4_PS", |
| "type_ref": "SPI_SHADER_PGM_RSRC4_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45080, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_CHKSUM_PS", |
| "type_ref": "SPI_SHADER_PGM_CHKSUM_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45084, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC3_PS", |
| "type_ref": "SPI_SHADER_PGM_RSRC3_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45088, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_PS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45092, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_PS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45096, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC1_PS", |
| "type_ref": "SPI_SHADER_PGM_RSRC1_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45100, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC2_PS", |
| "type_ref": "SPI_SHADER_PGM_RSRC2_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45104, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45108, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45112, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45116, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45120, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45124, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45128, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45132, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45136, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45140, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45144, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45148, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45152, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45156, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45160, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45164, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45168, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_16", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45172, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_17", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45176, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_18", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45180, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_19", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45184, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_20", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45188, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_21", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45192, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_22", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45196, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_23", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45200, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_24", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45204, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_25", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45208, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_26", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45212, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_27", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45216, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_28", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45220, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_29", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45224, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_30", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45228, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_PS_31", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45248, "to": "mm"}, |
| "name": "SPI_SHADER_REQ_CTRL_PS", |
| "type_ref": "SPI_SHADER_REQ_CTRL_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45256, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_PS_0", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45260, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_PS_1", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45264, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_PS_2", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45268, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_PS_3", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45316, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC4_VS", |
| "type_ref": "SPI_SHADER_PGM_RSRC4_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45332, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_CHKSUM_VS", |
| "type_ref": "SPI_SHADER_PGM_CHKSUM_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45336, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC3_VS", |
| "type_ref": "SPI_SHADER_PGM_RSRC3_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45340, "to": "mm"}, |
| "name": "SPI_SHADER_LATE_ALLOC_VS", |
| "type_ref": "SPI_SHADER_LATE_ALLOC_VS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45344, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_VS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45348, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_VS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45352, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC1_VS", |
| "type_ref": "SPI_SHADER_PGM_RSRC1_VS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45356, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC2_VS", |
| "type_ref": "SPI_SHADER_PGM_RSRC2_VS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45360, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45364, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45368, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45372, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45376, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45380, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45384, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45388, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45392, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45396, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45400, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45404, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45408, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45412, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45416, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45420, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45424, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_16", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45428, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_17", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45432, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_18", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45436, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_19", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45440, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_20", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45444, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_21", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45448, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_22", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45452, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_23", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45456, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_24", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45460, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_25", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45464, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_26", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45468, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_27", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45472, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_28", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45476, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_29", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45480, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_30", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45484, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_VS_31", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45504, "to": "mm"}, |
| "name": "SPI_SHADER_REQ_CTRL_VS", |
| "type_ref": "SPI_SHADER_REQ_CTRL_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45512, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_VS_0", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45516, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_VS_1", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45520, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_VS_2", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45524, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_VS_3", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45548, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC2_GS_VS", |
| "type_ref": "SPI_SHADER_PGM_RSRC2_GS_VS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45568, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_CHKSUM_GS", |
| "type_ref": "SPI_SHADER_PGM_CHKSUM_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45572, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC4_GS", |
| "type_ref": "SPI_SHADER_PGM_RSRC4_GS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45576, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_ADDR_LO_GS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45580, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_ADDR_HI_GS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45584, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_ES_GS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45588, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_ES_GS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45596, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC3_GS", |
| "type_ref": "SPI_SHADER_PGM_RSRC3_GS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45600, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_GS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45604, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_GS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45608, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC1_GS", |
| "type_ref": "SPI_SHADER_PGM_RSRC1_GS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45612, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC2_GS", |
| "type_ref": "SPI_SHADER_PGM_RSRC2_GS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45616, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45620, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45624, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45628, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45632, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45636, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45640, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45644, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45648, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45652, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45656, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45660, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45664, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45668, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45672, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45676, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45680, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_16", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45684, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_17", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45688, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_18", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45692, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_19", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45696, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_20", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45700, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_21", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45704, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_22", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45708, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_23", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45712, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_24", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45716, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_25", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45720, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_26", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45724, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_27", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45728, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_28", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45732, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_29", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45736, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_30", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45740, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_GS_31", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45760, "to": "mm"}, |
| "name": "SPI_SHADER_REQ_CTRL_ESGS", |
| "type_ref": "SPI_SHADER_REQ_CTRL_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45768, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_ESGS_0", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45772, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_ESGS_1", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45776, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_ESGS_2", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45780, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_ESGS_3", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45856, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_ES", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 45860, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_ES", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46080, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_CHKSUM_HS", |
| "type_ref": "SPI_SHADER_PGM_CHKSUM_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46084, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC4_HS", |
| "type_ref": "SPI_SHADER_PGM_RSRC4_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46088, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_ADDR_LO_HS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46092, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_ADDR_HI_HS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46096, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_LS_HS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46100, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_LS_HS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46108, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC3_HS", |
| "type_ref": "SPI_SHADER_PGM_RSRC3_HS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46112, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_HS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46116, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_HS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46120, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC1_HS", |
| "type_ref": "SPI_SHADER_PGM_RSRC1_HS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46124, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_RSRC2_HS", |
| "type_ref": "SPI_SHADER_PGM_RSRC2_HS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46128, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46132, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46136, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46140, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46144, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46148, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46152, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46156, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46160, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46164, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46168, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46172, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46176, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46180, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46184, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46188, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46192, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_16", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46196, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_17", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46200, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_18", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46204, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_19", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46208, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_20", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46212, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_21", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46216, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_22", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46220, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_23", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46224, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_24", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46228, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_25", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46232, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_26", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46236, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_27", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46240, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_28", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46244, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_29", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46248, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_30", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46252, "to": "mm"}, |
| "name": "SPI_SHADER_USER_DATA_HS_31", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46272, "to": "mm"}, |
| "name": "SPI_SHADER_REQ_CTRL_LSHS", |
| "type_ref": "SPI_SHADER_REQ_CTRL_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46280, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_LSHS_0", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46284, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_LSHS_1", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46288, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_LSHS_2", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46292, "to": "mm"}, |
| "name": "SPI_SHADER_USER_ACCUM_LSHS_3", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46368, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_LO_LS", |
| "type_ref": "SPI_SHADER_PGM_LO_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 46372, "to": "mm"}, |
| "name": "SPI_SHADER_PGM_HI_LS", |
| "type_ref": "SPI_SHADER_PGM_HI_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47104, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_INITIATOR", |
| "type_ref": "COMPUTE_DISPATCH_INITIATOR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47108, "to": "mm"}, |
| "name": "COMPUTE_DIM_X", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47112, "to": "mm"}, |
| "name": "COMPUTE_DIM_Y", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47116, "to": "mm"}, |
| "name": "COMPUTE_DIM_Z", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47120, "to": "mm"}, |
| "name": "COMPUTE_START_X", |
| "type_ref": "COMPUTE_START_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47124, "to": "mm"}, |
| "name": "COMPUTE_START_Y", |
| "type_ref": "COMPUTE_START_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47128, "to": "mm"}, |
| "name": "COMPUTE_START_Z", |
| "type_ref": "COMPUTE_START_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47132, "to": "mm"}, |
| "name": "COMPUTE_NUM_THREAD_X", |
| "type_ref": "COMPUTE_NUM_THREAD_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47136, "to": "mm"}, |
| "name": "COMPUTE_NUM_THREAD_Y", |
| "type_ref": "COMPUTE_NUM_THREAD_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47140, "to": "mm"}, |
| "name": "COMPUTE_NUM_THREAD_Z", |
| "type_ref": "COMPUTE_NUM_THREAD_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47144, "to": "mm"}, |
| "name": "COMPUTE_PIPELINESTAT_ENABLE", |
| "type_ref": "COMPUTE_PIPELINESTAT_ENABLE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47148, "to": "mm"}, |
| "name": "COMPUTE_PERFCOUNT_ENABLE", |
| "type_ref": "COMPUTE_PERFCOUNT_ENABLE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47152, "to": "mm"}, |
| "name": "COMPUTE_PGM_LO", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47156, "to": "mm"}, |
| "name": "COMPUTE_PGM_HI", |
| "type_ref": "COMPUTE_PGM_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47160, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_PKT_ADDR_LO", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47164, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_PKT_ADDR_HI", |
| "type_ref": "COMPUTE_PGM_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47168, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_SCRATCH_BASE_LO", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47172, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_SCRATCH_BASE_HI", |
| "type_ref": "COMPUTE_PGM_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47176, "to": "mm"}, |
| "name": "COMPUTE_PGM_RSRC1", |
| "type_ref": "COMPUTE_PGM_RSRC1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47180, "to": "mm"}, |
| "name": "COMPUTE_PGM_RSRC2", |
| "type_ref": "COMPUTE_PGM_RSRC2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47184, "to": "mm"}, |
| "name": "COMPUTE_VMID", |
| "type_ref": "COMPUTE_VMID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47188, "to": "mm"}, |
| "name": "COMPUTE_RESOURCE_LIMITS", |
| "type_ref": "COMPUTE_RESOURCE_LIMITS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47192, "to": "mm"}, |
| "name": "COMPUTE_DESTINATION_EN_SE0", |
| "type_ref": "COMPUTE_DESTINATION_EN_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47196, "to": "mm"}, |
| "name": "COMPUTE_DESTINATION_EN_SE1", |
| "type_ref": "COMPUTE_DESTINATION_EN_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47200, "to": "mm"}, |
| "name": "COMPUTE_TMPRING_SIZE", |
| "type_ref": "COMPUTE_TMPRING_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47204, "to": "mm"}, |
| "name": "COMPUTE_DESTINATION_EN_SE2", |
| "type_ref": "COMPUTE_DESTINATION_EN_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47208, "to": "mm"}, |
| "name": "COMPUTE_DESTINATION_EN_SE3", |
| "type_ref": "COMPUTE_DESTINATION_EN_SE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47212, "to": "mm"}, |
| "name": "COMPUTE_RESTART_X", |
| "type_ref": "COMPUTE_RESTART_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47216, "to": "mm"}, |
| "name": "COMPUTE_RESTART_Y", |
| "type_ref": "COMPUTE_RESTART_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47220, "to": "mm"}, |
| "name": "COMPUTE_RESTART_Z", |
| "type_ref": "COMPUTE_RESTART_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47224, "to": "mm"}, |
| "name": "COMPUTE_THREAD_TRACE_ENABLE", |
| "type_ref": "COMPUTE_THREAD_TRACE_ENABLE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47228, "to": "mm"}, |
| "name": "COMPUTE_MISC_RESERVED", |
| "type_ref": "COMPUTE_MISC_RESERVED" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47232, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_ID", |
| "type_ref": "COMPUTE_DISPATCH_ID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47236, "to": "mm"}, |
| "name": "COMPUTE_THREADGROUP_ID", |
| "type_ref": "COMPUTE_THREADGROUP_ID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47240, "to": "mm"}, |
| "name": "COMPUTE_REQ_CTRL", |
| "type_ref": "COMPUTE_REQ_CTRL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47248, "to": "mm"}, |
| "name": "COMPUTE_USER_ACCUM_0", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47252, "to": "mm"}, |
| "name": "COMPUTE_USER_ACCUM_1", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47256, "to": "mm"}, |
| "name": "COMPUTE_USER_ACCUM_2", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47260, "to": "mm"}, |
| "name": "COMPUTE_USER_ACCUM_3", |
| "type_ref": "SPI_SHADER_USER_ACCUM_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47264, "to": "mm"}, |
| "name": "COMPUTE_PGM_RSRC3", |
| "type_ref": "COMPUTE_PGM_RSRC3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47268, "to": "mm"}, |
| "name": "COMPUTE_DDID_INDEX", |
| "type_ref": "COMPUTE_DDID_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47272, "to": "mm"}, |
| "name": "COMPUTE_SHADER_CHKSUM", |
| "type_ref": "SPI_SHADER_PGM_CHKSUM_PS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47276, "to": "mm"}, |
| "name": "COMPUTE_RELAUNCH", |
| "type_ref": "COMPUTE_RELAUNCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47280, "to": "mm"}, |
| "name": "COMPUTE_WAVE_RESTORE_ADDR_LO", |
| "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47284, "to": "mm"}, |
| "name": "COMPUTE_WAVE_RESTORE_ADDR_HI", |
| "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47288, "to": "mm"}, |
| "name": "COMPUTE_RELAUNCH2", |
| "type_ref": "COMPUTE_RELAUNCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47360, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47364, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47368, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47372, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47376, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47380, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47384, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47388, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47392, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_8", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47396, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_9", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47400, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_10", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47404, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_11", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47408, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_12", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47412, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_13", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47416, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_14", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47420, "to": "mm"}, |
| "name": "COMPUTE_USER_DATA_15", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47604, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_TUNNEL", |
| "type_ref": "COMPUTE_DISPATCH_TUNNEL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47608, "to": "mm"}, |
| "name": "COMPUTE_DISPATCH_END", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47612, "to": "mm"}, |
| "name": "COMPUTE_NOWHERE", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47616, "to": "mm"}, |
| "name": "SH_RESERVED_REG0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 47620, "to": "mm"}, |
| "name": "SH_RESERVED_REG1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163840, "to": "mm"}, |
| "name": "DB_RENDER_CONTROL", |
| "type_ref": "DB_RENDER_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163844, "to": "mm"}, |
| "name": "DB_COUNT_CONTROL", |
| "type_ref": "DB_COUNT_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163848, "to": "mm"}, |
| "name": "DB_DEPTH_VIEW", |
| "type_ref": "DB_DEPTH_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163852, "to": "mm"}, |
| "name": "DB_RENDER_OVERRIDE", |
| "type_ref": "DB_RENDER_OVERRIDE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163856, "to": "mm"}, |
| "name": "DB_RENDER_OVERRIDE2", |
| "type_ref": "DB_RENDER_OVERRIDE2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163860, "to": "mm"}, |
| "name": "DB_HTILE_DATA_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163868, "to": "mm"}, |
| "name": "DB_DEPTH_SIZE_XY", |
| "type_ref": "DB_DEPTH_SIZE_XY" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163872, "to": "mm"}, |
| "name": "DB_DEPTH_BOUNDS_MIN", |
| "type_ref": "DB_DEPTH_BOUNDS_MIN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163876, "to": "mm"}, |
| "name": "DB_DEPTH_BOUNDS_MAX", |
| "type_ref": "DB_DEPTH_BOUNDS_MAX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163880, "to": "mm"}, |
| "name": "DB_STENCIL_CLEAR", |
| "type_ref": "DB_STENCIL_CLEAR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163884, "to": "mm"}, |
| "name": "DB_DEPTH_CLEAR", |
| "type_ref": "DB_DEPTH_CLEAR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163888, "to": "mm"}, |
| "name": "PA_SC_SCREEN_SCISSOR_TL", |
| "type_ref": "PA_SC_SCREEN_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163892, "to": "mm"}, |
| "name": "PA_SC_SCREEN_SCISSOR_BR", |
| "type_ref": "PA_SC_SCREEN_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163896, "to": "mm"}, |
| "name": "DB_DFSM_CONTROL", |
| "type_ref": "DB_DFSM_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163900, "to": "mm"}, |
| "name": "DB_RESERVED_REG_2", |
| "type_ref": "DB_RESERVED_REG_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163904, "to": "mm"}, |
| "name": "DB_Z_INFO", |
| "type_ref": "DB_Z_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163908, "to": "mm"}, |
| "name": "DB_STENCIL_INFO", |
| "type_ref": "DB_STENCIL_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163912, "to": "mm"}, |
| "name": "DB_Z_READ_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163916, "to": "mm"}, |
| "name": "DB_STENCIL_READ_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163920, "to": "mm"}, |
| "name": "DB_Z_WRITE_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163924, "to": "mm"}, |
| "name": "DB_STENCIL_WRITE_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163928, "to": "mm"}, |
| "name": "DB_RESERVED_REG_1", |
| "type_ref": "DB_RESERVED_REG_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163932, "to": "mm"}, |
| "name": "DB_RESERVED_REG_3", |
| "type_ref": "DB_RESERVED_REG_3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163940, "to": "mm"}, |
| "name": "DB_VRS_OVERRIDE_CNTL", |
| "type_ref": "DB_VRS_OVERRIDE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163944, "to": "mm"}, |
| "name": "DB_Z_READ_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163948, "to": "mm"}, |
| "name": "DB_STENCIL_READ_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163952, "to": "mm"}, |
| "name": "DB_Z_WRITE_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163956, "to": "mm"}, |
| "name": "DB_STENCIL_WRITE_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163960, "to": "mm"}, |
| "name": "DB_HTILE_DATA_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163964, "to": "mm"}, |
| "name": "DB_RMI_L2_CACHE_CONTROL", |
| "type_ref": "DB_RMI_L2_CACHE_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163968, "to": "mm"}, |
| "name": "TA_BC_BASE_ADDR", |
| "type_ref": "TA_BC_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 163972, "to": "mm"}, |
| "name": "TA_BC_BASE_ADDR_HI", |
| "type_ref": "TA_BC_BASE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164328, "to": "mm"}, |
| "name": "COHER_DEST_BASE_HI_0", |
| "type_ref": "COHER_DEST_BASE_HI_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164332, "to": "mm"}, |
| "name": "COHER_DEST_BASE_HI_1", |
| "type_ref": "COHER_DEST_BASE_HI_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164336, "to": "mm"}, |
| "name": "COHER_DEST_BASE_HI_2", |
| "type_ref": "COHER_DEST_BASE_HI_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164340, "to": "mm"}, |
| "name": "COHER_DEST_BASE_HI_3", |
| "type_ref": "COHER_DEST_BASE_HI_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164344, "to": "mm"}, |
| "name": "COHER_DEST_BASE_2", |
| "type_ref": "COHER_DEST_BASE_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164348, "to": "mm"}, |
| "name": "COHER_DEST_BASE_3", |
| "type_ref": "COHER_DEST_BASE_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164352, "to": "mm"}, |
| "name": "PA_SC_WINDOW_OFFSET", |
| "type_ref": "PA_SC_WINDOW_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164356, "to": "mm"}, |
| "name": "PA_SC_WINDOW_SCISSOR_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164360, "to": "mm"}, |
| "name": "PA_SC_WINDOW_SCISSOR_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164364, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_RULE", |
| "type_ref": "PA_SC_CLIPRECT_RULE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164368, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_0_TL", |
| "type_ref": "PA_SC_CLIPRECT_0_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164372, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_0_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164376, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_1_TL", |
| "type_ref": "PA_SC_CLIPRECT_0_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164380, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_1_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164384, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_2_TL", |
| "type_ref": "PA_SC_CLIPRECT_0_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164388, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_2_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164392, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_3_TL", |
| "type_ref": "PA_SC_CLIPRECT_0_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164396, "to": "mm"}, |
| "name": "PA_SC_CLIPRECT_3_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164400, "to": "mm"}, |
| "name": "PA_SC_EDGERULE", |
| "type_ref": "PA_SC_EDGERULE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164404, "to": "mm"}, |
| "name": "PA_SU_HARDWARE_SCREEN_OFFSET", |
| "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164408, "to": "mm"}, |
| "name": "CB_TARGET_MASK", |
| "type_ref": "CB_TARGET_MASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164412, "to": "mm"}, |
| "name": "CB_SHADER_MASK", |
| "type_ref": "CB_SHADER_MASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164416, "to": "mm"}, |
| "name": "PA_SC_GENERIC_SCISSOR_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164420, "to": "mm"}, |
| "name": "PA_SC_GENERIC_SCISSOR_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164424, "to": "mm"}, |
| "name": "COHER_DEST_BASE_0", |
| "type_ref": "COHER_DEST_BASE_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164428, "to": "mm"}, |
| "name": "COHER_DEST_BASE_1", |
| "type_ref": "COHER_DEST_BASE_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164432, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_0_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164436, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_0_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164440, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_1_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164444, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_1_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164448, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_2_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164452, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_2_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164456, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_3_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164460, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_3_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164464, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_4_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164468, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_4_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164472, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_5_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164476, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_5_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164480, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_6_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164484, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_6_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164488, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_7_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164492, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_7_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164496, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_8_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164500, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_8_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164504, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_9_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164508, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_9_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164512, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_10_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164516, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_10_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164520, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_11_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164524, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_11_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164528, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_12_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164532, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_12_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164536, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_13_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164540, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_13_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164544, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_14_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164548, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_14_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164552, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_15_TL", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_TL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164556, "to": "mm"}, |
| "name": "PA_SC_VPORT_SCISSOR_15_BR", |
| "type_ref": "PA_SC_WINDOW_SCISSOR_BR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164560, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_0", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164564, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_0", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164568, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_1", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164572, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_1", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164576, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_2", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164580, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_2", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164584, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_3", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164588, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_3", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164592, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_4", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164596, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_4", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164600, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_5", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164604, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_5", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164608, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_6", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164612, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_6", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164616, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_7", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164620, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_7", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164624, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_8", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164628, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_8", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164632, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_9", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164636, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_9", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164640, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_10", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164644, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_10", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164648, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_11", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164652, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_11", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164656, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_12", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164660, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_12", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164664, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_13", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164668, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_13", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164672, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_14", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164676, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_14", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164680, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMIN_15", |
| "type_ref": "PA_SC_VPORT_ZMIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164684, "to": "mm"}, |
| "name": "PA_SC_VPORT_ZMAX_15", |
| "type_ref": "PA_SC_VPORT_ZMAX_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164688, "to": "mm"}, |
| "name": "PA_SC_RASTER_CONFIG", |
| "type_ref": "PA_SC_RASTER_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164692, "to": "mm"}, |
| "name": "PA_SC_RASTER_CONFIG_1", |
| "type_ref": "PA_SC_RASTER_CONFIG_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164696, "to": "mm"}, |
| "name": "PA_SC_SCREEN_EXTENT_CONTROL", |
| "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164700, "to": "mm"}, |
| "name": "PA_SC_TILE_STEERING_OVERRIDE", |
| "type_ref": "PA_SC_TILE_STEERING_OVERRIDE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164704, "to": "mm"}, |
| "name": "CP_PERFMON_CNTX_CNTL", |
| "type_ref": "CP_PERFMON_CNTX_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164708, "to": "mm"}, |
| "name": "CP_PIPEID", |
| "type_ref": "CP_PIPEID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164712, "to": "mm"}, |
| "name": "CP_VMID", |
| "type_ref": "CP_VMID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164716, "to": "mm"}, |
| "name": "CONTEXT_RESERVED_REG0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164720, "to": "mm"}, |
| "name": "CONTEXT_RESERVED_REG1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164864, "to": "mm"}, |
| "name": "VGT_MAX_VTX_INDX", |
| "type_ref": "VGT_MAX_VTX_INDX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164868, "to": "mm"}, |
| "name": "VGT_MIN_VTX_INDX", |
| "type_ref": "VGT_MIN_VTX_INDX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164872, "to": "mm"}, |
| "name": "VGT_INDX_OFFSET", |
| "type_ref": "VGT_INDX_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164876, "to": "mm"}, |
| "name": "VGT_MULTI_PRIM_IB_RESET_INDX", |
| "type_ref": "VGT_MULTI_PRIM_IB_RESET_INDX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164880, "to": "mm"}, |
| "name": "CB_RMI_GL2_CACHE_CONTROL", |
| "type_ref": "CB_RMI_GL2_CACHE_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164884, "to": "mm"}, |
| "name": "CB_BLEND_RED", |
| "type_ref": "CB_BLEND_RED" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164888, "to": "mm"}, |
| "name": "CB_BLEND_GREEN", |
| "type_ref": "CB_BLEND_GREEN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164892, "to": "mm"}, |
| "name": "CB_BLEND_BLUE", |
| "type_ref": "CB_BLEND_BLUE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164896, "to": "mm"}, |
| "name": "CB_BLEND_ALPHA", |
| "type_ref": "CB_BLEND_ALPHA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164900, "to": "mm"}, |
| "name": "CB_DCC_CONTROL", |
| "type_ref": "CB_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164904, "to": "mm"}, |
| "name": "CB_COVERAGE_OUT_CONTROL", |
| "type_ref": "CB_COVERAGE_OUT_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164908, "to": "mm"}, |
| "name": "DB_STENCIL_CONTROL", |
| "type_ref": "DB_STENCIL_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164912, "to": "mm"}, |
| "name": "DB_STENCILREFMASK", |
| "type_ref": "DB_STENCILREFMASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164916, "to": "mm"}, |
| "name": "DB_STENCILREFMASK_BF", |
| "type_ref": "DB_STENCILREFMASK_BF" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164924, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164928, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164932, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164936, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164940, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164944, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164948, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_1", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164952, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_1", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164956, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_1", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164960, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_1", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164964, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_1", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164968, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_1", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164972, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_2", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164976, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_2", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164980, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_2", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164984, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_2", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164988, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_2", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164992, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_2", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 164996, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_3", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165000, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_3", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165004, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_3", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165008, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_3", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165012, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_3", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165016, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_3", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165020, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_4", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165024, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_4", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165028, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_4", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165032, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_4", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165036, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_4", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165040, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_4", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165044, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_5", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165048, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_5", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165052, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_5", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165056, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_5", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165060, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_5", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165064, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_5", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165068, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_6", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165072, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_6", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165076, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_6", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165080, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_6", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165084, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_6", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165088, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_6", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165092, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_7", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165096, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_7", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165100, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_7", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165104, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_7", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165108, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_7", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165112, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_7", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165116, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_8", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165120, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_8", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165124, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_8", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165128, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_8", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165132, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_8", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165136, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_8", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165140, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_9", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165144, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_9", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165148, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_9", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165152, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_9", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165156, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_9", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165160, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_9", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165164, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_10", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165168, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_10", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165172, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_10", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165176, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_10", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165180, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_10", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165184, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_10", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165188, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_11", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165192, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_11", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165196, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_11", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165200, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_11", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165204, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_11", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165208, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_11", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165212, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_12", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165216, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_12", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165220, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_12", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165224, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_12", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165228, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_12", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165232, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_12", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165236, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_13", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165240, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_13", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165244, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_13", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165248, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_13", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165252, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_13", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165256, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_13", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165260, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_14", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165264, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_14", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165268, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_14", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165272, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_14", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165276, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_14", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165280, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_14", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165284, "to": "mm"}, |
| "name": "PA_CL_VPORT_XSCALE_15", |
| "type_ref": "PA_CL_VPORT_XSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165288, "to": "mm"}, |
| "name": "PA_CL_VPORT_XOFFSET_15", |
| "type_ref": "PA_CL_VPORT_XOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165292, "to": "mm"}, |
| "name": "PA_CL_VPORT_YSCALE_15", |
| "type_ref": "PA_CL_VPORT_YSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165296, "to": "mm"}, |
| "name": "PA_CL_VPORT_YOFFSET_15", |
| "type_ref": "PA_CL_VPORT_YOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165300, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZSCALE_15", |
| "type_ref": "PA_CL_VPORT_ZSCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165304, "to": "mm"}, |
| "name": "PA_CL_VPORT_ZOFFSET_15", |
| "type_ref": "PA_CL_VPORT_ZOFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165308, "to": "mm"}, |
| "name": "PA_CL_UCP_0_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165312, "to": "mm"}, |
| "name": "PA_CL_UCP_0_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165316, "to": "mm"}, |
| "name": "PA_CL_UCP_0_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165320, "to": "mm"}, |
| "name": "PA_CL_UCP_0_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165324, "to": "mm"}, |
| "name": "PA_CL_UCP_1_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165328, "to": "mm"}, |
| "name": "PA_CL_UCP_1_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165332, "to": "mm"}, |
| "name": "PA_CL_UCP_1_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165336, "to": "mm"}, |
| "name": "PA_CL_UCP_1_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165340, "to": "mm"}, |
| "name": "PA_CL_UCP_2_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165344, "to": "mm"}, |
| "name": "PA_CL_UCP_2_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165348, "to": "mm"}, |
| "name": "PA_CL_UCP_2_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165352, "to": "mm"}, |
| "name": "PA_CL_UCP_2_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165356, "to": "mm"}, |
| "name": "PA_CL_UCP_3_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165360, "to": "mm"}, |
| "name": "PA_CL_UCP_3_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165364, "to": "mm"}, |
| "name": "PA_CL_UCP_3_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165368, "to": "mm"}, |
| "name": "PA_CL_UCP_3_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165372, "to": "mm"}, |
| "name": "PA_CL_UCP_4_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165376, "to": "mm"}, |
| "name": "PA_CL_UCP_4_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165380, "to": "mm"}, |
| "name": "PA_CL_UCP_4_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165384, "to": "mm"}, |
| "name": "PA_CL_UCP_4_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165388, "to": "mm"}, |
| "name": "PA_CL_UCP_5_X", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165392, "to": "mm"}, |
| "name": "PA_CL_UCP_5_Y", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165396, "to": "mm"}, |
| "name": "PA_CL_UCP_5_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165400, "to": "mm"}, |
| "name": "PA_CL_UCP_5_W", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165404, "to": "mm"}, |
| "name": "PA_CL_PROG_NEAR_CLIP_Z", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165444, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_0", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165448, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_1", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165452, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_2", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165456, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_3", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165460, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_4", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165464, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_5", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165468, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_6", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165472, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_7", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165476, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_8", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165480, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_9", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165484, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_10", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165488, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_11", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165492, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_12", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165496, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_13", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165500, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_14", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165504, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_15", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165508, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_16", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165512, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_17", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165516, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_18", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165520, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_19", |
| "type_ref": "SPI_PS_INPUT_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165524, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_20", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165528, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_21", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165532, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_22", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165536, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_23", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165540, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_24", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165544, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_25", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165548, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_26", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165552, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_27", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165556, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_28", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165560, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_29", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165564, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_30", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165568, "to": "mm"}, |
| "name": "SPI_PS_INPUT_CNTL_31", |
| "type_ref": "SPI_PS_INPUT_CNTL_20" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165572, "to": "mm"}, |
| "name": "SPI_VS_OUT_CONFIG", |
| "type_ref": "SPI_VS_OUT_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165580, "to": "mm"}, |
| "name": "SPI_PS_INPUT_ENA", |
| "type_ref": "SPI_PS_INPUT_ENA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165584, "to": "mm"}, |
| "name": "SPI_PS_INPUT_ADDR", |
| "type_ref": "SPI_PS_INPUT_ENA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165588, "to": "mm"}, |
| "name": "SPI_INTERP_CONTROL_0", |
| "type_ref": "SPI_INTERP_CONTROL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165592, "to": "mm"}, |
| "name": "SPI_PS_IN_CONTROL", |
| "type_ref": "SPI_PS_IN_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165600, "to": "mm"}, |
| "name": "SPI_BARYC_CNTL", |
| "type_ref": "SPI_BARYC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165608, "to": "mm"}, |
| "name": "SPI_TMPRING_SIZE", |
| "type_ref": "COMPUTE_TMPRING_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165640, "to": "mm"}, |
| "name": "SPI_SHADER_IDX_FORMAT", |
| "type_ref": "SPI_SHADER_IDX_FORMAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165644, "to": "mm"}, |
| "name": "SPI_SHADER_POS_FORMAT", |
| "type_ref": "SPI_SHADER_POS_FORMAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165648, "to": "mm"}, |
| "name": "SPI_SHADER_Z_FORMAT", |
| "type_ref": "SPI_SHADER_Z_FORMAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165652, "to": "mm"}, |
| "name": "SPI_SHADER_COL_FORMAT", |
| "type_ref": "SPI_SHADER_COL_FORMAT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165712, "to": "mm"}, |
| "name": "SX_PS_DOWNCONVERT_CONTROL", |
| "type_ref": "SX_PS_DOWNCONVERT_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165716, "to": "mm"}, |
| "name": "SX_PS_DOWNCONVERT", |
| "type_ref": "SX_PS_DOWNCONVERT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165720, "to": "mm"}, |
| "name": "SX_BLEND_OPT_EPSILON", |
| "type_ref": "SX_BLEND_OPT_EPSILON" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165724, "to": "mm"}, |
| "name": "SX_BLEND_OPT_CONTROL", |
| "type_ref": "SX_BLEND_OPT_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165728, "to": "mm"}, |
| "name": "SX_MRT0_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165732, "to": "mm"}, |
| "name": "SX_MRT1_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165736, "to": "mm"}, |
| "name": "SX_MRT2_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165740, "to": "mm"}, |
| "name": "SX_MRT3_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165744, "to": "mm"}, |
| "name": "SX_MRT4_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165748, "to": "mm"}, |
| "name": "SX_MRT5_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165752, "to": "mm"}, |
| "name": "SX_MRT6_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165756, "to": "mm"}, |
| "name": "SX_MRT7_BLEND_OPT", |
| "type_ref": "SX_MRT0_BLEND_OPT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165760, "to": "mm"}, |
| "name": "CB_BLEND0_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165764, "to": "mm"}, |
| "name": "CB_BLEND1_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165768, "to": "mm"}, |
| "name": "CB_BLEND2_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165772, "to": "mm"}, |
| "name": "CB_BLEND3_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165776, "to": "mm"}, |
| "name": "CB_BLEND4_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165780, "to": "mm"}, |
| "name": "CB_BLEND5_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165784, "to": "mm"}, |
| "name": "CB_BLEND6_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165788, "to": "mm"}, |
| "name": "CB_BLEND7_CONTROL", |
| "type_ref": "CB_BLEND0_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165836, "to": "mm"}, |
| "name": "CS_COPY_STATE", |
| "type_ref": "CS_COPY_STATE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165840, "to": "mm"}, |
| "name": "GFX_COPY_STATE", |
| "type_ref": "CS_COPY_STATE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165844, "to": "mm"}, |
| "name": "PA_CL_POINT_X_RAD", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165848, "to": "mm"}, |
| "name": "PA_CL_POINT_Y_RAD", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165852, "to": "mm"}, |
| "name": "PA_CL_POINT_SIZE", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165856, "to": "mm"}, |
| "name": "PA_CL_POINT_CULL_RAD", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165860, "to": "mm"}, |
| "name": "VGT_DMA_BASE_HI", |
| "type_ref": "VGT_DMA_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165864, "to": "mm"}, |
| "name": "VGT_DMA_BASE", |
| "type_ref": "VGT_DMA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165872, "to": "mm"}, |
| "name": "VGT_DRAW_INITIATOR", |
| "type_ref": "VGT_DRAW_INITIATOR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165876, "to": "mm"}, |
| "name": "VGT_IMMED_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165880, "to": "mm"}, |
| "name": "VGT_EVENT_ADDRESS_REG", |
| "type_ref": "VGT_EVENT_ADDRESS_REG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165884, "to": "mm"}, |
| "name": "GE_MAX_OUTPUT_PER_SUBGROUP", |
| "type_ref": "GE_MAX_OUTPUT_PER_SUBGROUP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165888, "to": "mm"}, |
| "name": "DB_DEPTH_CONTROL", |
| "type_ref": "DB_DEPTH_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165892, "to": "mm"}, |
| "name": "DB_EQAA", |
| "type_ref": "DB_EQAA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165896, "to": "mm"}, |
| "name": "CB_COLOR_CONTROL", |
| "type_ref": "CB_COLOR_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165900, "to": "mm"}, |
| "name": "DB_SHADER_CONTROL", |
| "type_ref": "DB_SHADER_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165904, "to": "mm"}, |
| "name": "PA_CL_CLIP_CNTL", |
| "type_ref": "PA_CL_CLIP_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165908, "to": "mm"}, |
| "name": "PA_SU_SC_MODE_CNTL", |
| "type_ref": "PA_SU_SC_MODE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165912, "to": "mm"}, |
| "name": "PA_CL_VTE_CNTL", |
| "type_ref": "PA_CL_VTE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165916, "to": "mm"}, |
| "name": "PA_CL_VS_OUT_CNTL", |
| "type_ref": "PA_CL_VS_OUT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165920, "to": "mm"}, |
| "name": "PA_CL_NANINF_CNTL", |
| "type_ref": "PA_CL_NANINF_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165924, "to": "mm"}, |
| "name": "PA_SU_LINE_STIPPLE_CNTL", |
| "type_ref": "PA_SU_LINE_STIPPLE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165928, "to": "mm"}, |
| "name": "PA_SU_LINE_STIPPLE_SCALE", |
| "type_ref": "PA_SU_LINE_STIPPLE_SCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165932, "to": "mm"}, |
| "name": "PA_SU_PRIM_FILTER_CNTL", |
| "type_ref": "PA_SU_PRIM_FILTER_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165936, "to": "mm"}, |
| "name": "PA_SU_SMALL_PRIM_FILTER_CNTL", |
| "type_ref": "PA_SU_SMALL_PRIM_FILTER_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165944, "to": "mm"}, |
| "name": "PA_CL_NGG_CNTL", |
| "type_ref": "PA_CL_NGG_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165948, "to": "mm"}, |
| "name": "PA_SU_OVER_RASTERIZATION_CNTL", |
| "type_ref": "PA_SU_OVER_RASTERIZATION_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165952, "to": "mm"}, |
| "name": "PA_STEREO_CNTL", |
| "type_ref": "PA_STEREO_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165956, "to": "mm"}, |
| "name": "PA_STATE_STEREO_X", |
| "type_ref": "PA_STATE_STEREO_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 165960, "to": "mm"}, |
| "name": "PA_CL_VRS_CNTL", |
| "type_ref": "PA_CL_VRS_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166400, "to": "mm"}, |
| "name": "PA_SU_POINT_SIZE", |
| "type_ref": "PA_SU_POINT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166404, "to": "mm"}, |
| "name": "PA_SU_POINT_MINMAX", |
| "type_ref": "PA_SU_POINT_MINMAX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166408, "to": "mm"}, |
| "name": "PA_SU_LINE_CNTL", |
| "type_ref": "PA_SU_LINE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166412, "to": "mm"}, |
| "name": "PA_SC_LINE_STIPPLE", |
| "type_ref": "PA_SC_LINE_STIPPLE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166416, "to": "mm"}, |
| "name": "VGT_OUTPUT_PATH_CNTL", |
| "type_ref": "VGT_OUTPUT_PATH_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166420, "to": "mm"}, |
| "name": "VGT_HOS_CNTL", |
| "type_ref": "VGT_HOS_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166424, "to": "mm"}, |
| "name": "VGT_HOS_MAX_TESS_LEVEL", |
| "type_ref": "VGT_HOS_MAX_TESS_LEVEL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166428, "to": "mm"}, |
| "name": "VGT_HOS_MIN_TESS_LEVEL", |
| "type_ref": "VGT_HOS_MIN_TESS_LEVEL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166432, "to": "mm"}, |
| "name": "VGT_HOS_REUSE_DEPTH", |
| "type_ref": "VGT_HOS_REUSE_DEPTH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166436, "to": "mm"}, |
| "name": "VGT_GROUP_PRIM_TYPE", |
| "type_ref": "VGT_GROUP_PRIM_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166440, "to": "mm"}, |
| "name": "VGT_GROUP_FIRST_DECR", |
| "type_ref": "VGT_GROUP_FIRST_DECR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166444, "to": "mm"}, |
| "name": "VGT_GROUP_DECR", |
| "type_ref": "VGT_GROUP_DECR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166448, "to": "mm"}, |
| "name": "VGT_GROUP_VECT_0_CNTL", |
| "type_ref": "VGT_GROUP_VECT_0_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166452, "to": "mm"}, |
| "name": "VGT_GROUP_VECT_1_CNTL", |
| "type_ref": "VGT_GROUP_VECT_0_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166456, "to": "mm"}, |
| "name": "VGT_GROUP_VECT_0_FMT_CNTL", |
| "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166460, "to": "mm"}, |
| "name": "VGT_GROUP_VECT_1_FMT_CNTL", |
| "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166464, "to": "mm"}, |
| "name": "VGT_GS_MODE", |
| "type_ref": "VGT_GS_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166468, "to": "mm"}, |
| "name": "VGT_GS_ONCHIP_CNTL", |
| "type_ref": "VGT_GS_ONCHIP_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166472, "to": "mm"}, |
| "name": "PA_SC_MODE_CNTL_0", |
| "type_ref": "PA_SC_MODE_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166476, "to": "mm"}, |
| "name": "PA_SC_MODE_CNTL_1", |
| "type_ref": "PA_SC_MODE_CNTL_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166480, "to": "mm"}, |
| "name": "VGT_ENHANCE", |
| "type_ref": "VGT_ENHANCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166484, "to": "mm"}, |
| "name": "VGT_GS_PER_ES", |
| "type_ref": "VGT_GS_PER_ES" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166488, "to": "mm"}, |
| "name": "VGT_ES_PER_GS", |
| "type_ref": "VGT_ES_PER_GS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166492, "to": "mm"}, |
| "name": "VGT_GS_PER_VS", |
| "type_ref": "VGT_GS_PER_VS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166496, "to": "mm"}, |
| "name": "VGT_GSVS_RING_OFFSET_1", |
| "type_ref": "VGT_GSVS_RING_OFFSET_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166500, "to": "mm"}, |
| "name": "VGT_GSVS_RING_OFFSET_2", |
| "type_ref": "VGT_GSVS_RING_OFFSET_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166504, "to": "mm"}, |
| "name": "VGT_GSVS_RING_OFFSET_3", |
| "type_ref": "VGT_GSVS_RING_OFFSET_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166508, "to": "mm"}, |
| "name": "VGT_GS_OUT_PRIM_TYPE", |
| "type_ref": "VGT_GS_OUT_PRIM_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166512, "to": "mm"}, |
| "name": "IA_ENHANCE", |
| "type_ref": "VGT_ENHANCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166516, "to": "mm"}, |
| "name": "VGT_DMA_SIZE", |
| "type_ref": "VGT_DMA_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166520, "to": "mm"}, |
| "name": "VGT_DMA_MAX_SIZE", |
| "type_ref": "VGT_DMA_MAX_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166524, "to": "mm"}, |
| "name": "VGT_DMA_INDEX_TYPE", |
| "type_ref": "VGT_DMA_INDEX_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166528, "to": "mm"}, |
| "name": "WD_ENHANCE", |
| "type_ref": "VGT_ENHANCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166532, "to": "mm"}, |
| "name": "VGT_PRIMITIVEID_EN", |
| "type_ref": "VGT_PRIMITIVEID_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166536, "to": "mm"}, |
| "name": "VGT_DMA_NUM_INSTANCES", |
| "type_ref": "VGT_DMA_NUM_INSTANCES" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166540, "to": "mm"}, |
| "name": "VGT_PRIMITIVEID_RESET", |
| "type_ref": "VGT_PRIMITIVEID_RESET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166544, "to": "mm"}, |
| "name": "VGT_EVENT_INITIATOR", |
| "type_ref": "VGT_EVENT_INITIATOR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166548, "to": "mm"}, |
| "name": "VGT_MULTI_PRIM_IB_RESET_EN", |
| "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166552, "to": "mm"}, |
| "name": "VGT_DRAW_PAYLOAD_CNTL", |
| "type_ref": "VGT_DRAW_PAYLOAD_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166560, "to": "mm"}, |
| "name": "VGT_INSTANCE_STEP_RATE_0", |
| "type_ref": "VGT_INSTANCE_STEP_RATE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166564, "to": "mm"}, |
| "name": "VGT_INSTANCE_STEP_RATE_1", |
| "type_ref": "VGT_INSTANCE_STEP_RATE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166568, "to": "mm"}, |
| "name": "IA_MULTI_VGT_PARAM", |
| "type_ref": "IA_MULTI_VGT_PARAM" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166572, "to": "mm"}, |
| "name": "VGT_ESGS_RING_ITEMSIZE", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166576, "to": "mm"}, |
| "name": "VGT_GSVS_RING_ITEMSIZE", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166580, "to": "mm"}, |
| "name": "VGT_REUSE_OFF", |
| "type_ref": "VGT_REUSE_OFF" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166584, "to": "mm"}, |
| "name": "VGT_VTX_CNT_EN", |
| "type_ref": "VGT_VTX_CNT_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166588, "to": "mm"}, |
| "name": "DB_HTILE_SURFACE", |
| "type_ref": "DB_HTILE_SURFACE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166592, "to": "mm"}, |
| "name": "DB_SRESULTS_COMPARE_STATE0", |
| "type_ref": "DB_SRESULTS_COMPARE_STATE0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166596, "to": "mm"}, |
| "name": "DB_SRESULTS_COMPARE_STATE1", |
| "type_ref": "DB_SRESULTS_COMPARE_STATE1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166600, "to": "mm"}, |
| "name": "DB_PRELOAD_CONTROL", |
| "type_ref": "DB_PRELOAD_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166608, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_SIZE_0", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166612, "to": "mm"}, |
| "name": "VGT_STRMOUT_VTX_STRIDE_0", |
| "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166620, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_OFFSET_0", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166624, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_SIZE_1", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166628, "to": "mm"}, |
| "name": "VGT_STRMOUT_VTX_STRIDE_1", |
| "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166636, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_OFFSET_1", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166640, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_SIZE_2", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166644, "to": "mm"}, |
| "name": "VGT_STRMOUT_VTX_STRIDE_2", |
| "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166652, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_OFFSET_2", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166656, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_SIZE_3", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166660, "to": "mm"}, |
| "name": "VGT_STRMOUT_VTX_STRIDE_3", |
| "type_ref": "VGT_STRMOUT_VTX_STRIDE_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166668, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_OFFSET_3", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166696, "to": "mm"}, |
| "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166700, "to": "mm"}, |
| "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166704, "to": "mm"}, |
| "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE", |
| "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166712, "to": "mm"}, |
| "name": "VGT_GS_MAX_VERT_OUT", |
| "type_ref": "VGT_GS_MAX_VERT_OUT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166732, "to": "mm"}, |
| "name": "GE_NGG_SUBGRP_CNTL", |
| "type_ref": "GE_NGG_SUBGRP_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166736, "to": "mm"}, |
| "name": "VGT_TESS_DISTRIBUTION", |
| "type_ref": "VGT_TESS_DISTRIBUTION" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166740, "to": "mm"}, |
| "name": "VGT_SHADER_STAGES_EN", |
| "type_ref": "VGT_SHADER_STAGES_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166744, "to": "mm"}, |
| "name": "VGT_LS_HS_CONFIG", |
| "type_ref": "VGT_LS_HS_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166748, "to": "mm"}, |
| "name": "VGT_GS_VERT_ITEMSIZE", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166752, "to": "mm"}, |
| "name": "VGT_GS_VERT_ITEMSIZE_1", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166756, "to": "mm"}, |
| "name": "VGT_GS_VERT_ITEMSIZE_2", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166760, "to": "mm"}, |
| "name": "VGT_GS_VERT_ITEMSIZE_3", |
| "type_ref": "VGT_ESGS_RING_ITEMSIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166764, "to": "mm"}, |
| "name": "VGT_TF_PARAM", |
| "type_ref": "VGT_TF_PARAM" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166768, "to": "mm"}, |
| "name": "DB_ALPHA_TO_MASK", |
| "type_ref": "DB_ALPHA_TO_MASK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166772, "to": "mm"}, |
| "name": "VGT_DISPATCH_DRAW_INDEX", |
| "type_ref": "VGT_DISPATCH_DRAW_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166776, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL", |
| "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166780, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_CLAMP", |
| "type_ref": "PA_SU_POLY_OFFSET_CLAMP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166784, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_FRONT_SCALE", |
| "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166788, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166792, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_BACK_SCALE", |
| "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166796, "to": "mm"}, |
| "name": "PA_SU_POLY_OFFSET_BACK_OFFSET", |
| "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166800, "to": "mm"}, |
| "name": "VGT_GS_INSTANCE_CNT", |
| "type_ref": "VGT_GS_INSTANCE_CNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166804, "to": "mm"}, |
| "name": "VGT_STRMOUT_CONFIG", |
| "type_ref": "VGT_STRMOUT_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166808, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_CONFIG", |
| "type_ref": "VGT_STRMOUT_BUFFER_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166812, "to": "mm"}, |
| "name": "VGT_DMA_EVENT_INITIATOR", |
| "type_ref": "VGT_EVENT_INITIATOR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166868, "to": "mm"}, |
| "name": "PA_SC_CENTROID_PRIORITY_0", |
| "type_ref": "PA_SC_CENTROID_PRIORITY_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166872, "to": "mm"}, |
| "name": "PA_SC_CENTROID_PRIORITY_1", |
| "type_ref": "PA_SC_CENTROID_PRIORITY_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166876, "to": "mm"}, |
| "name": "PA_SC_LINE_CNTL", |
| "type_ref": "PA_SC_LINE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166880, "to": "mm"}, |
| "name": "PA_SC_AA_CONFIG", |
| "type_ref": "PA_SC_AA_CONFIG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166884, "to": "mm"}, |
| "name": "PA_SU_VTX_CNTL", |
| "type_ref": "PA_SU_VTX_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166888, "to": "mm"}, |
| "name": "PA_CL_GB_VERT_CLIP_ADJ", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166892, "to": "mm"}, |
| "name": "PA_CL_GB_VERT_DISC_ADJ", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166896, "to": "mm"}, |
| "name": "PA_CL_GB_HORZ_CLIP_ADJ", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166900, "to": "mm"}, |
| "name": "PA_CL_GB_HORZ_DISC_ADJ", |
| "type_ref": "PA_CL_UCP_0_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166904, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166908, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166912, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166916, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166920, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166924, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166928, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166932, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166936, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166940, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166944, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166948, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166952, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166956, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166960, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166964, "to": "mm"}, |
| "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3", |
| "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166968, "to": "mm"}, |
| "name": "PA_SC_AA_MASK_X0Y0_X1Y0", |
| "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166972, "to": "mm"}, |
| "name": "PA_SC_AA_MASK_X0Y1_X1Y1", |
| "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166976, "to": "mm"}, |
| "name": "PA_SC_SHADER_CONTROL", |
| "type_ref": "PA_SC_SHADER_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166980, "to": "mm"}, |
| "name": "PA_SC_BINNER_CNTL_0", |
| "type_ref": "PA_SC_BINNER_CNTL_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166984, "to": "mm"}, |
| "name": "PA_SC_BINNER_CNTL_1", |
| "type_ref": "PA_SC_BINNER_CNTL_1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166988, "to": "mm"}, |
| "name": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL", |
| "type_ref": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 166992, "to": "mm"}, |
| "name": "PA_SC_NGG_MODE_CNTL", |
| "type_ref": "PA_SC_NGG_MODE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167000, "to": "mm"}, |
| "name": "VGT_VERTEX_REUSE_BLOCK_CNTL", |
| "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167004, "to": "mm"}, |
| "name": "VGT_OUT_DEALLOC_CNTL", |
| "type_ref": "VGT_OUT_DEALLOC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167008, "to": "mm"}, |
| "name": "CB_COLOR0_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167012, "to": "mm"}, |
| "name": "CB_COLOR0_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167016, "to": "mm"}, |
| "name": "CB_COLOR0_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167020, "to": "mm"}, |
| "name": "CB_COLOR0_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167024, "to": "mm"}, |
| "name": "CB_COLOR0_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167028, "to": "mm"}, |
| "name": "CB_COLOR0_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167032, "to": "mm"}, |
| "name": "CB_COLOR0_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167036, "to": "mm"}, |
| "name": "CB_COLOR0_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167040, "to": "mm"}, |
| "name": "CB_COLOR0_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167044, "to": "mm"}, |
| "name": "CB_COLOR0_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167048, "to": "mm"}, |
| "name": "CB_COLOR0_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167052, "to": "mm"}, |
| "name": "CB_COLOR0_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167056, "to": "mm"}, |
| "name": "CB_COLOR0_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167060, "to": "mm"}, |
| "name": "CB_COLOR0_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167068, "to": "mm"}, |
| "name": "CB_COLOR1_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167072, "to": "mm"}, |
| "name": "CB_COLOR1_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167076, "to": "mm"}, |
| "name": "CB_COLOR1_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167080, "to": "mm"}, |
| "name": "CB_COLOR1_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167084, "to": "mm"}, |
| "name": "CB_COLOR1_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167088, "to": "mm"}, |
| "name": "CB_COLOR1_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167092, "to": "mm"}, |
| "name": "CB_COLOR1_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167096, "to": "mm"}, |
| "name": "CB_COLOR1_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167100, "to": "mm"}, |
| "name": "CB_COLOR1_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167104, "to": "mm"}, |
| "name": "CB_COLOR1_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167108, "to": "mm"}, |
| "name": "CB_COLOR1_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167112, "to": "mm"}, |
| "name": "CB_COLOR1_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167116, "to": "mm"}, |
| "name": "CB_COLOR1_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167120, "to": "mm"}, |
| "name": "CB_COLOR1_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167128, "to": "mm"}, |
| "name": "CB_COLOR2_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167132, "to": "mm"}, |
| "name": "CB_COLOR2_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167136, "to": "mm"}, |
| "name": "CB_COLOR2_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167140, "to": "mm"}, |
| "name": "CB_COLOR2_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167144, "to": "mm"}, |
| "name": "CB_COLOR2_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167148, "to": "mm"}, |
| "name": "CB_COLOR2_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167152, "to": "mm"}, |
| "name": "CB_COLOR2_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167156, "to": "mm"}, |
| "name": "CB_COLOR2_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167160, "to": "mm"}, |
| "name": "CB_COLOR2_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167164, "to": "mm"}, |
| "name": "CB_COLOR2_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167168, "to": "mm"}, |
| "name": "CB_COLOR2_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167172, "to": "mm"}, |
| "name": "CB_COLOR2_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167176, "to": "mm"}, |
| "name": "CB_COLOR2_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167180, "to": "mm"}, |
| "name": "CB_COLOR2_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167188, "to": "mm"}, |
| "name": "CB_COLOR3_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167192, "to": "mm"}, |
| "name": "CB_COLOR3_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167196, "to": "mm"}, |
| "name": "CB_COLOR3_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167200, "to": "mm"}, |
| "name": "CB_COLOR3_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167204, "to": "mm"}, |
| "name": "CB_COLOR3_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167208, "to": "mm"}, |
| "name": "CB_COLOR3_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167212, "to": "mm"}, |
| "name": "CB_COLOR3_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167216, "to": "mm"}, |
| "name": "CB_COLOR3_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167220, "to": "mm"}, |
| "name": "CB_COLOR3_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167224, "to": "mm"}, |
| "name": "CB_COLOR3_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167228, "to": "mm"}, |
| "name": "CB_COLOR3_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167232, "to": "mm"}, |
| "name": "CB_COLOR3_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167236, "to": "mm"}, |
| "name": "CB_COLOR3_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167240, "to": "mm"}, |
| "name": "CB_COLOR3_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167248, "to": "mm"}, |
| "name": "CB_COLOR4_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167252, "to": "mm"}, |
| "name": "CB_COLOR4_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167256, "to": "mm"}, |
| "name": "CB_COLOR4_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167260, "to": "mm"}, |
| "name": "CB_COLOR4_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167264, "to": "mm"}, |
| "name": "CB_COLOR4_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167268, "to": "mm"}, |
| "name": "CB_COLOR4_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167272, "to": "mm"}, |
| "name": "CB_COLOR4_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167276, "to": "mm"}, |
| "name": "CB_COLOR4_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167280, "to": "mm"}, |
| "name": "CB_COLOR4_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167284, "to": "mm"}, |
| "name": "CB_COLOR4_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167288, "to": "mm"}, |
| "name": "CB_COLOR4_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167292, "to": "mm"}, |
| "name": "CB_COLOR4_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167296, "to": "mm"}, |
| "name": "CB_COLOR4_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167300, "to": "mm"}, |
| "name": "CB_COLOR4_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167308, "to": "mm"}, |
| "name": "CB_COLOR5_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167312, "to": "mm"}, |
| "name": "CB_COLOR5_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167316, "to": "mm"}, |
| "name": "CB_COLOR5_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167320, "to": "mm"}, |
| "name": "CB_COLOR5_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167324, "to": "mm"}, |
| "name": "CB_COLOR5_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167328, "to": "mm"}, |
| "name": "CB_COLOR5_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167332, "to": "mm"}, |
| "name": "CB_COLOR5_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167336, "to": "mm"}, |
| "name": "CB_COLOR5_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167340, "to": "mm"}, |
| "name": "CB_COLOR5_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167344, "to": "mm"}, |
| "name": "CB_COLOR5_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167348, "to": "mm"}, |
| "name": "CB_COLOR5_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167352, "to": "mm"}, |
| "name": "CB_COLOR5_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167356, "to": "mm"}, |
| "name": "CB_COLOR5_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167360, "to": "mm"}, |
| "name": "CB_COLOR5_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167368, "to": "mm"}, |
| "name": "CB_COLOR6_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167372, "to": "mm"}, |
| "name": "CB_COLOR6_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167376, "to": "mm"}, |
| "name": "CB_COLOR6_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167380, "to": "mm"}, |
| "name": "CB_COLOR6_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167384, "to": "mm"}, |
| "name": "CB_COLOR6_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167388, "to": "mm"}, |
| "name": "CB_COLOR6_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167392, "to": "mm"}, |
| "name": "CB_COLOR6_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167396, "to": "mm"}, |
| "name": "CB_COLOR6_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167400, "to": "mm"}, |
| "name": "CB_COLOR6_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167404, "to": "mm"}, |
| "name": "CB_COLOR6_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167408, "to": "mm"}, |
| "name": "CB_COLOR6_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167412, "to": "mm"}, |
| "name": "CB_COLOR6_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167416, "to": "mm"}, |
| "name": "CB_COLOR6_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167420, "to": "mm"}, |
| "name": "CB_COLOR6_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167428, "to": "mm"}, |
| "name": "CB_COLOR7_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167432, "to": "mm"}, |
| "name": "CB_COLOR7_PITCH", |
| "type_ref": "CB_COLOR0_PITCH" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167436, "to": "mm"}, |
| "name": "CB_COLOR7_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167440, "to": "mm"}, |
| "name": "CB_COLOR7_VIEW", |
| "type_ref": "CB_COLOR0_VIEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167444, "to": "mm"}, |
| "name": "CB_COLOR7_INFO", |
| "type_ref": "CB_COLOR0_INFO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167448, "to": "mm"}, |
| "name": "CB_COLOR7_ATTRIB", |
| "type_ref": "CB_COLOR0_ATTRIB" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167452, "to": "mm"}, |
| "name": "CB_COLOR7_DCC_CONTROL", |
| "type_ref": "CB_COLOR0_DCC_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167456, "to": "mm"}, |
| "name": "CB_COLOR7_CMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167460, "to": "mm"}, |
| "name": "CB_COLOR7_CMASK_SLICE", |
| "type_ref": "CB_COLOR0_CMASK_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167464, "to": "mm"}, |
| "name": "CB_COLOR7_FMASK", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167468, "to": "mm"}, |
| "name": "CB_COLOR7_FMASK_SLICE", |
| "type_ref": "CB_COLOR0_SLICE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167472, "to": "mm"}, |
| "name": "CB_COLOR7_CLEAR_WORD0", |
| "type_ref": "CB_COLOR0_CLEAR_WORD0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167476, "to": "mm"}, |
| "name": "CB_COLOR7_CLEAR_WORD1", |
| "type_ref": "CB_COLOR0_CLEAR_WORD1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167480, "to": "mm"}, |
| "name": "CB_COLOR7_DCC_BASE", |
| "type_ref": "DB_HTILE_DATA_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167488, "to": "mm"}, |
| "name": "CB_COLOR0_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167492, "to": "mm"}, |
| "name": "CB_COLOR1_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167496, "to": "mm"}, |
| "name": "CB_COLOR2_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167500, "to": "mm"}, |
| "name": "CB_COLOR3_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167504, "to": "mm"}, |
| "name": "CB_COLOR4_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167508, "to": "mm"}, |
| "name": "CB_COLOR5_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167512, "to": "mm"}, |
| "name": "CB_COLOR6_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167516, "to": "mm"}, |
| "name": "CB_COLOR7_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167520, "to": "mm"}, |
| "name": "CB_COLOR0_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167524, "to": "mm"}, |
| "name": "CB_COLOR1_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167528, "to": "mm"}, |
| "name": "CB_COLOR2_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167532, "to": "mm"}, |
| "name": "CB_COLOR3_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167536, "to": "mm"}, |
| "name": "CB_COLOR4_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167540, "to": "mm"}, |
| "name": "CB_COLOR5_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167544, "to": "mm"}, |
| "name": "CB_COLOR6_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167548, "to": "mm"}, |
| "name": "CB_COLOR7_CMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167552, "to": "mm"}, |
| "name": "CB_COLOR0_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167556, "to": "mm"}, |
| "name": "CB_COLOR1_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167560, "to": "mm"}, |
| "name": "CB_COLOR2_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167564, "to": "mm"}, |
| "name": "CB_COLOR3_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167568, "to": "mm"}, |
| "name": "CB_COLOR4_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167572, "to": "mm"}, |
| "name": "CB_COLOR5_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167576, "to": "mm"}, |
| "name": "CB_COLOR6_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167580, "to": "mm"}, |
| "name": "CB_COLOR7_FMASK_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167584, "to": "mm"}, |
| "name": "CB_COLOR0_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167588, "to": "mm"}, |
| "name": "CB_COLOR1_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167592, "to": "mm"}, |
| "name": "CB_COLOR2_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167596, "to": "mm"}, |
| "name": "CB_COLOR3_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167600, "to": "mm"}, |
| "name": "CB_COLOR4_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167604, "to": "mm"}, |
| "name": "CB_COLOR5_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167608, "to": "mm"}, |
| "name": "CB_COLOR6_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167612, "to": "mm"}, |
| "name": "CB_COLOR7_DCC_BASE_EXT", |
| "type_ref": "CB_COLOR0_BASE_EXT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167616, "to": "mm"}, |
| "name": "CB_COLOR0_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167620, "to": "mm"}, |
| "name": "CB_COLOR1_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167624, "to": "mm"}, |
| "name": "CB_COLOR2_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167628, "to": "mm"}, |
| "name": "CB_COLOR3_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167632, "to": "mm"}, |
| "name": "CB_COLOR4_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167636, "to": "mm"}, |
| "name": "CB_COLOR5_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167640, "to": "mm"}, |
| "name": "CB_COLOR6_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167644, "to": "mm"}, |
| "name": "CB_COLOR7_ATTRIB2", |
| "type_ref": "CB_COLOR0_ATTRIB2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167648, "to": "mm"}, |
| "name": "CB_COLOR0_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167652, "to": "mm"}, |
| "name": "CB_COLOR1_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167656, "to": "mm"}, |
| "name": "CB_COLOR2_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167660, "to": "mm"}, |
| "name": "CB_COLOR3_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167664, "to": "mm"}, |
| "name": "CB_COLOR4_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167668, "to": "mm"}, |
| "name": "CB_COLOR5_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167672, "to": "mm"}, |
| "name": "CB_COLOR6_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 167676, "to": "mm"}, |
| "name": "CB_COLOR7_ATTRIB3", |
| "type_ref": "CB_COLOR0_ATTRIB3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196608, "to": "mm"}, |
| "name": "CP_EOP_DONE_ADDR_LO", |
| "type_ref": "CP_EOP_DONE_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196612, "to": "mm"}, |
| "name": "CP_EOP_DONE_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196616, "to": "mm"}, |
| "name": "CP_EOP_DONE_DATA_LO", |
| "type_ref": "CP_EOP_DONE_DATA_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196620, "to": "mm"}, |
| "name": "CP_EOP_DONE_DATA_HI", |
| "type_ref": "CP_EOP_DONE_DATA_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196624, "to": "mm"}, |
| "name": "CP_EOP_LAST_FENCE_LO", |
| "type_ref": "CP_EOP_LAST_FENCE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196628, "to": "mm"}, |
| "name": "CP_EOP_LAST_FENCE_HI", |
| "type_ref": "CP_EOP_LAST_FENCE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196632, "to": "mm"}, |
| "name": "CP_STREAM_OUT_ADDR_LO", |
| "type_ref": "CP_STREAM_OUT_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196636, "to": "mm"}, |
| "name": "CP_STREAM_OUT_ADDR_HI", |
| "type_ref": "CP_STREAM_OUT_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196640, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196644, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196648, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196652, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196656, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196660, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196664, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196668, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196672, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196676, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196680, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196684, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196688, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196692, "to": "mm"}, |
| "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI", |
| "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196696, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196700, "to": "mm"}, |
| "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI", |
| "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196704, "to": "mm"}, |
| "name": "CP_PIPE_STATS_ADDR_LO", |
| "type_ref": "CP_PIPE_STATS_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196708, "to": "mm"}, |
| "name": "CP_PIPE_STATS_ADDR_HI", |
| "type_ref": "CP_PIPE_STATS_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196712, "to": "mm"}, |
| "name": "CP_VGT_IAVERT_COUNT_LO", |
| "type_ref": "CP_VGT_IAVERT_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196716, "to": "mm"}, |
| "name": "CP_VGT_IAVERT_COUNT_HI", |
| "type_ref": "CP_VGT_IAVERT_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196720, "to": "mm"}, |
| "name": "CP_VGT_IAPRIM_COUNT_LO", |
| "type_ref": "CP_VGT_IAPRIM_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196724, "to": "mm"}, |
| "name": "CP_VGT_IAPRIM_COUNT_HI", |
| "type_ref": "CP_VGT_IAPRIM_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196728, "to": "mm"}, |
| "name": "CP_VGT_GSPRIM_COUNT_LO", |
| "type_ref": "CP_VGT_GSPRIM_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196732, "to": "mm"}, |
| "name": "CP_VGT_GSPRIM_COUNT_HI", |
| "type_ref": "CP_VGT_GSPRIM_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196736, "to": "mm"}, |
| "name": "CP_VGT_VSINVOC_COUNT_LO", |
| "type_ref": "CP_VGT_VSINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196740, "to": "mm"}, |
| "name": "CP_VGT_VSINVOC_COUNT_HI", |
| "type_ref": "CP_VGT_VSINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196744, "to": "mm"}, |
| "name": "CP_VGT_GSINVOC_COUNT_LO", |
| "type_ref": "CP_VGT_GSINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196748, "to": "mm"}, |
| "name": "CP_VGT_GSINVOC_COUNT_HI", |
| "type_ref": "CP_VGT_GSINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196752, "to": "mm"}, |
| "name": "CP_VGT_HSINVOC_COUNT_LO", |
| "type_ref": "CP_VGT_HSINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196756, "to": "mm"}, |
| "name": "CP_VGT_HSINVOC_COUNT_HI", |
| "type_ref": "CP_VGT_HSINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196760, "to": "mm"}, |
| "name": "CP_VGT_DSINVOC_COUNT_LO", |
| "type_ref": "CP_VGT_DSINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196764, "to": "mm"}, |
| "name": "CP_VGT_DSINVOC_COUNT_HI", |
| "type_ref": "CP_VGT_DSINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196768, "to": "mm"}, |
| "name": "CP_PA_CINVOC_COUNT_LO", |
| "type_ref": "CP_PA_CINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196772, "to": "mm"}, |
| "name": "CP_PA_CINVOC_COUNT_HI", |
| "type_ref": "CP_PA_CINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196776, "to": "mm"}, |
| "name": "CP_PA_CPRIM_COUNT_LO", |
| "type_ref": "CP_PA_CPRIM_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196780, "to": "mm"}, |
| "name": "CP_PA_CPRIM_COUNT_HI", |
| "type_ref": "CP_PA_CPRIM_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196784, "to": "mm"}, |
| "name": "CP_SC_PSINVOC_COUNT0_LO", |
| "type_ref": "CP_SC_PSINVOC_COUNT0_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196788, "to": "mm"}, |
| "name": "CP_SC_PSINVOC_COUNT0_HI", |
| "type_ref": "CP_SC_PSINVOC_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196792, "to": "mm"}, |
| "name": "CP_SC_PSINVOC_COUNT1_LO", |
| "type_ref": "CP_SC_PSINVOC_COUNT1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196796, "to": "mm"}, |
| "name": "CP_SC_PSINVOC_COUNT1_HI", |
| "type_ref": "CP_SC_PSINVOC_COUNT1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196800, "to": "mm"}, |
| "name": "CP_VGT_CSINVOC_COUNT_LO", |
| "type_ref": "CP_VGT_CSINVOC_COUNT_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196804, "to": "mm"}, |
| "name": "CP_VGT_CSINVOC_COUNT_HI", |
| "type_ref": "CP_VGT_CSINVOC_COUNT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196852, "to": "mm"}, |
| "name": "CP_PIPE_STATS_CONTROL", |
| "type_ref": "CP_PIPE_STATS_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196856, "to": "mm"}, |
| "name": "CP_STREAM_OUT_CONTROL", |
| "type_ref": "CP_PIPE_STATS_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196860, "to": "mm"}, |
| "name": "CP_STRMOUT_CNTL", |
| "type_ref": "CP_STRMOUT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196864, "to": "mm"}, |
| "name": "SCRATCH_REG0", |
| "type_ref": "SCRATCH_REG0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196868, "to": "mm"}, |
| "name": "SCRATCH_REG1", |
| "type_ref": "SCRATCH_REG1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196872, "to": "mm"}, |
| "name": "SCRATCH_REG2", |
| "type_ref": "SCRATCH_REG2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196876, "to": "mm"}, |
| "name": "SCRATCH_REG3", |
| "type_ref": "SCRATCH_REG3" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196880, "to": "mm"}, |
| "name": "SCRATCH_REG4", |
| "type_ref": "SCRATCH_REG4" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196884, "to": "mm"}, |
| "name": "SCRATCH_REG5", |
| "type_ref": "SCRATCH_REG5" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196888, "to": "mm"}, |
| "name": "SCRATCH_REG6", |
| "type_ref": "SCRATCH_REG6" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196892, "to": "mm"}, |
| "name": "SCRATCH_REG7", |
| "type_ref": "SCRATCH_REG7" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196896, "to": "mm"}, |
| "name": "SCRATCH_REG_ATOMIC", |
| "type_ref": "SCRATCH_REG_ATOMIC" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196908, "to": "mm"}, |
| "name": "CP_APPEND_DDID_CNT", |
| "type_ref": "COMPUTE_PGM_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196912, "to": "mm"}, |
| "name": "CP_APPEND_DATA_HI", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196916, "to": "mm"}, |
| "name": "CP_APPEND_LAST_CS_FENCE_HI", |
| "type_ref": "CP_APPEND_LAST_CS_FENCE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196920, "to": "mm"}, |
| "name": "CP_APPEND_LAST_PS_FENCE_HI", |
| "type_ref": "CP_APPEND_LAST_CS_FENCE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196928, "to": "mm"}, |
| "name": "SCRATCH_UMSK", |
| "type_ref": "SCRATCH_UMSK" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196932, "to": "mm"}, |
| "name": "SCRATCH_ADDR", |
| "type_ref": "SCRATCH_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196936, "to": "mm"}, |
| "name": "CP_PFP_ATOMIC_PREOP_LO", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196940, "to": "mm"}, |
| "name": "CP_PFP_ATOMIC_PREOP_HI", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196944, "to": "mm"}, |
| "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196948, "to": "mm"}, |
| "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196952, "to": "mm"}, |
| "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196956, "to": "mm"}, |
| "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196960, "to": "mm"}, |
| "name": "CP_APPEND_ADDR_LO", |
| "type_ref": "CP_APPEND_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196964, "to": "mm"}, |
| "name": "CP_APPEND_ADDR_HI", |
| "type_ref": "CP_APPEND_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196968, "to": "mm"}, |
| "name": "CP_APPEND_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196972, "to": "mm"}, |
| "name": "CP_APPEND_LAST_CS_FENCE", |
| "type_ref": "CP_APPEND_LAST_CS_FENCE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196976, "to": "mm"}, |
| "name": "CP_APPEND_LAST_PS_FENCE", |
| "type_ref": "CP_APPEND_LAST_CS_FENCE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196980, "to": "mm"}, |
| "name": "CP_ATOMIC_PREOP_LO", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196984, "to": "mm"}, |
| "name": "CP_ATOMIC_PREOP_HI", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196988, "to": "mm"}, |
| "name": "CP_GDS_ATOMIC0_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196992, "to": "mm"}, |
| "name": "CP_GDS_ATOMIC0_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 196996, "to": "mm"}, |
| "name": "CP_GDS_ATOMIC1_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197000, "to": "mm"}, |
| "name": "CP_GDS_ATOMIC1_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197028, "to": "mm"}, |
| "name": "CP_ME_MC_WADDR_LO", |
| "type_ref": "CP_ME_MC_WADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197032, "to": "mm"}, |
| "name": "CP_ME_MC_WADDR_HI", |
| "type_ref": "CP_ME_MC_WADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197036, "to": "mm"}, |
| "name": "CP_ME_MC_WDATA_LO", |
| "type_ref": "CP_ME_MC_WDATA_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197040, "to": "mm"}, |
| "name": "CP_ME_MC_WDATA_HI", |
| "type_ref": "CP_ME_MC_WDATA_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197044, "to": "mm"}, |
| "name": "CP_ME_MC_RADDR_LO", |
| "type_ref": "CP_ME_MC_RADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197048, "to": "mm"}, |
| "name": "CP_ME_MC_RADDR_HI", |
| "type_ref": "CP_ME_MC_RADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197052, "to": "mm"}, |
| "name": "CP_SEM_WAIT_TIMER", |
| "type_ref": "CP_SEM_WAIT_TIMER" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197056, "to": "mm"}, |
| "name": "CP_SIG_SEM_ADDR_LO", |
| "type_ref": "CP_SIG_SEM_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197060, "to": "mm"}, |
| "name": "CP_SIG_SEM_ADDR_HI", |
| "type_ref": "CP_SIG_SEM_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197072, "to": "mm"}, |
| "name": "CP_WAIT_REG_MEM_TIMEOUT", |
| "type_ref": "CP_WAIT_REG_MEM_TIMEOUT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197076, "to": "mm"}, |
| "name": "CP_WAIT_SEM_ADDR_LO", |
| "type_ref": "CP_SIG_SEM_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197080, "to": "mm"}, |
| "name": "CP_WAIT_SEM_ADDR_HI", |
| "type_ref": "CP_SIG_SEM_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197084, "to": "mm"}, |
| "name": "CP_DMA_PFP_CONTROL", |
| "type_ref": "CP_DMA_PFP_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197088, "to": "mm"}, |
| "name": "CP_DMA_ME_CONTROL", |
| "type_ref": "CP_DMA_PFP_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197092, "to": "mm"}, |
| "name": "CP_COHER_BASE_HI", |
| "type_ref": "CP_COHER_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197100, "to": "mm"}, |
| "name": "CP_COHER_START_DELAY", |
| "type_ref": "CP_COHER_START_DELAY" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197104, "to": "mm"}, |
| "name": "CP_COHER_CNTL", |
| "type_ref": "CP_COHER_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197108, "to": "mm"}, |
| "name": "CP_COHER_SIZE", |
| "type_ref": "CP_COHER_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197112, "to": "mm"}, |
| "name": "CP_COHER_BASE", |
| "type_ref": "CP_COHER_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197116, "to": "mm"}, |
| "name": "CP_COHER_STATUS", |
| "type_ref": "CP_COHER_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197120, "to": "mm"}, |
| "name": "CP_DMA_ME_SRC_ADDR", |
| "type_ref": "CP_DMA_ME_SRC_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197124, "to": "mm"}, |
| "name": "CP_DMA_ME_SRC_ADDR_HI", |
| "type_ref": "CP_DMA_ME_SRC_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197128, "to": "mm"}, |
| "name": "CP_DMA_ME_DST_ADDR", |
| "type_ref": "CP_DMA_ME_DST_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197132, "to": "mm"}, |
| "name": "CP_DMA_ME_DST_ADDR_HI", |
| "type_ref": "CP_DMA_ME_DST_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197136, "to": "mm"}, |
| "name": "CP_DMA_ME_COMMAND", |
| "type_ref": "CP_DMA_ME_COMMAND" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197140, "to": "mm"}, |
| "name": "CP_DMA_PFP_SRC_ADDR", |
| "type_ref": "CP_DMA_ME_SRC_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197144, "to": "mm"}, |
| "name": "CP_DMA_PFP_SRC_ADDR_HI", |
| "type_ref": "CP_DMA_ME_SRC_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197148, "to": "mm"}, |
| "name": "CP_DMA_PFP_DST_ADDR", |
| "type_ref": "CP_DMA_ME_DST_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197152, "to": "mm"}, |
| "name": "CP_DMA_PFP_DST_ADDR_HI", |
| "type_ref": "CP_DMA_ME_DST_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197156, "to": "mm"}, |
| "name": "CP_DMA_PFP_COMMAND", |
| "type_ref": "CP_DMA_ME_COMMAND" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197160, "to": "mm"}, |
| "name": "CP_DMA_CNTL", |
| "type_ref": "CP_DMA_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197164, "to": "mm"}, |
| "name": "CP_DMA_READ_TAGS", |
| "type_ref": "CP_DMA_READ_TAGS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197168, "to": "mm"}, |
| "name": "CP_COHER_SIZE_HI", |
| "type_ref": "CP_COHER_SIZE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197172, "to": "mm"}, |
| "name": "CP_PFP_IB_CONTROL", |
| "type_ref": "CP_PFP_IB_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197176, "to": "mm"}, |
| "name": "CP_PFP_LOAD_CONTROL", |
| "type_ref": "CP_PFP_LOAD_CONTROL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197180, "to": "mm"}, |
| "name": "CP_SCRATCH_INDEX", |
| "type_ref": "CP_CPC_SCRATCH_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197184, "to": "mm"}, |
| "name": "CP_SCRATCH_DATA", |
| "type_ref": "CP_CPC_SCRATCH_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197188, "to": "mm"}, |
| "name": "CP_RB_OFFSET", |
| "type_ref": "CP_RB_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197196, "to": "mm"}, |
| "name": "CP_IB2_OFFSET", |
| "type_ref": "CP_IB2_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197208, "to": "mm"}, |
| "name": "CP_IB2_PREAMBLE_BEGIN", |
| "type_ref": "CP_IB2_PREAMBLE_BEGIN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197212, "to": "mm"}, |
| "name": "CP_IB2_PREAMBLE_END", |
| "type_ref": "CP_IB2_PREAMBLE_END" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197216, "to": "mm"}, |
| "name": "CP_CE_IB1_OFFSET", |
| "type_ref": "CP_CE_IB1_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197220, "to": "mm"}, |
| "name": "CP_CE_IB2_OFFSET", |
| "type_ref": "CP_IB2_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197224, "to": "mm"}, |
| "name": "CP_CE_COUNTER", |
| "type_ref": "CP_CE_COUNTER" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197232, "to": "mm"}, |
| "name": "CP_DMA_ME_CMD_ADDR_LO", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197236, "to": "mm"}, |
| "name": "CP_DMA_ME_CMD_ADDR_HI", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197240, "to": "mm"}, |
| "name": "CP_DMA_PFP_CMD_ADDR_LO", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197244, "to": "mm"}, |
| "name": "CP_DMA_PFP_CMD_ADDR_HI", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197248, "to": "mm"}, |
| "name": "CP_APPEND_CMD_ADDR_LO", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197252, "to": "mm"}, |
| "name": "CP_APPEND_CMD_ADDR_HI", |
| "type_ref": "CP_DMA_ME_CMD_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197256, "to": "mm"}, |
| "name": "UCONFIG_RESERVED_REG0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197260, "to": "mm"}, |
| "name": "UCONFIG_RESERVED_REG1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197280, "to": "mm"}, |
| "name": "CP_CE_ATOMIC_PREOP_LO", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197284, "to": "mm"}, |
| "name": "CP_CE_ATOMIC_PREOP_HI", |
| "type_ref": "CP_PFP_ATOMIC_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197288, "to": "mm"}, |
| "name": "CP_CE_GDS_ATOMIC0_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197292, "to": "mm"}, |
| "name": "CP_CE_GDS_ATOMIC0_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197296, "to": "mm"}, |
| "name": "CP_CE_GDS_ATOMIC1_PREOP_LO", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197300, "to": "mm"}, |
| "name": "CP_CE_GDS_ATOMIC1_PREOP_HI", |
| "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197364, "to": "mm"}, |
| "name": "CP_CE_INIT_CMD_BUFSZ", |
| "type_ref": "CP_CE_INIT_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197368, "to": "mm"}, |
| "name": "CP_CE_IB1_CMD_BUFSZ", |
| "type_ref": "CP_CE_IB1_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197372, "to": "mm"}, |
| "name": "CP_CE_IB2_CMD_BUFSZ", |
| "type_ref": "CP_CE_IB2_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197380, "to": "mm"}, |
| "name": "CP_IB2_CMD_BUFSZ", |
| "type_ref": "CP_CE_IB2_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197384, "to": "mm"}, |
| "name": "CP_ST_CMD_BUFSZ", |
| "type_ref": "CP_ST_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197388, "to": "mm"}, |
| "name": "CP_CE_INIT_BASE_LO", |
| "type_ref": "CP_CE_INIT_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197392, "to": "mm"}, |
| "name": "CP_CE_INIT_BASE_HI", |
| "type_ref": "CP_CE_INIT_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197396, "to": "mm"}, |
| "name": "CP_CE_INIT_BUFSZ", |
| "type_ref": "CP_CE_INIT_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197400, "to": "mm"}, |
| "name": "CP_CE_IB1_BASE_LO", |
| "type_ref": "CP_CE_IB1_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197404, "to": "mm"}, |
| "name": "CP_CE_IB1_BASE_HI", |
| "type_ref": "CP_CE_IB1_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197408, "to": "mm"}, |
| "name": "CP_CE_IB1_BUFSZ", |
| "type_ref": "CP_CE_IB1_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197412, "to": "mm"}, |
| "name": "CP_CE_IB2_BASE_LO", |
| "type_ref": "CP_CE_IB2_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197416, "to": "mm"}, |
| "name": "CP_CE_IB2_BASE_HI", |
| "type_ref": "CP_CE_IB2_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197420, "to": "mm"}, |
| "name": "CP_CE_IB2_BUFSZ", |
| "type_ref": "CP_CE_IB2_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197436, "to": "mm"}, |
| "name": "CP_IB2_BASE_LO", |
| "type_ref": "CP_CE_IB2_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197440, "to": "mm"}, |
| "name": "CP_IB2_BASE_HI", |
| "type_ref": "CP_CE_IB2_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197444, "to": "mm"}, |
| "name": "CP_IB2_BUFSZ", |
| "type_ref": "CP_CE_IB2_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197448, "to": "mm"}, |
| "name": "CP_ST_BASE_LO", |
| "type_ref": "CP_ST_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197452, "to": "mm"}, |
| "name": "CP_ST_BASE_HI", |
| "type_ref": "CP_ST_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197456, "to": "mm"}, |
| "name": "CP_ST_BUFSZ", |
| "type_ref": "CP_ST_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197460, "to": "mm"}, |
| "name": "CP_EOP_DONE_EVENT_CNTL", |
| "type_ref": "CP_EOP_DONE_EVENT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197464, "to": "mm"}, |
| "name": "CP_EOP_DONE_DATA_CNTL", |
| "type_ref": "CP_EOP_DONE_DATA_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197468, "to": "mm"}, |
| "name": "CP_EOP_DONE_CNTX_ID", |
| "type_ref": "CP_EOP_DONE_CNTX_ID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197472, "to": "mm"}, |
| "name": "CP_DB_BASE_LO", |
| "type_ref": "CP_DB_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197476, "to": "mm"}, |
| "name": "CP_DB_BASE_HI", |
| "type_ref": "CP_DB_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197480, "to": "mm"}, |
| "name": "CP_DB_BUFSZ", |
| "type_ref": "CP_DB_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197484, "to": "mm"}, |
| "name": "CP_DB_CMD_BUFSZ", |
| "type_ref": "CP_DB_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197488, "to": "mm"}, |
| "name": "CP_CE_DB_BASE_LO", |
| "type_ref": "CP_DB_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197492, "to": "mm"}, |
| "name": "CP_CE_DB_BASE_HI", |
| "type_ref": "CP_DB_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197496, "to": "mm"}, |
| "name": "CP_CE_DB_BUFSZ", |
| "type_ref": "CP_DB_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197500, "to": "mm"}, |
| "name": "CP_CE_DB_CMD_BUFSZ", |
| "type_ref": "CP_DB_CMD_BUFSZ" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197552, "to": "mm"}, |
| "name": "CP_PFP_COMPLETION_STATUS", |
| "type_ref": "CP_PFP_COMPLETION_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197556, "to": "mm"}, |
| "name": "CP_CE_COMPLETION_STATUS", |
| "type_ref": "CP_PFP_COMPLETION_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197560, "to": "mm"}, |
| "name": "CP_PRED_NOT_VISIBLE", |
| "type_ref": "CP_PRED_NOT_VISIBLE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197568, "to": "mm"}, |
| "name": "CP_PFP_METADATA_BASE_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197572, "to": "mm"}, |
| "name": "CP_PFP_METADATA_BASE_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197576, "to": "mm"}, |
| "name": "CP_CE_METADATA_BASE_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197580, "to": "mm"}, |
| "name": "CP_CE_METADATA_BASE_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197584, "to": "mm"}, |
| "name": "CP_DRAW_INDX_INDR_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197588, "to": "mm"}, |
| "name": "CP_DRAW_INDX_INDR_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197592, "to": "mm"}, |
| "name": "CP_DISPATCH_INDR_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197596, "to": "mm"}, |
| "name": "CP_DISPATCH_INDR_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197600, "to": "mm"}, |
| "name": "CP_INDEX_BASE_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197604, "to": "mm"}, |
| "name": "CP_INDEX_BASE_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197608, "to": "mm"}, |
| "name": "CP_INDEX_TYPE", |
| "type_ref": "CP_INDEX_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197612, "to": "mm"}, |
| "name": "CP_GDS_BKUP_ADDR", |
| "type_ref": "CP_PFP_METADATA_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197616, "to": "mm"}, |
| "name": "CP_GDS_BKUP_ADDR_HI", |
| "type_ref": "CP_EOP_DONE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197620, "to": "mm"}, |
| "name": "CP_SAMPLE_STATUS", |
| "type_ref": "CP_SAMPLE_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197624, "to": "mm"}, |
| "name": "CP_ME_COHER_CNTL", |
| "type_ref": "CP_ME_COHER_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197628, "to": "mm"}, |
| "name": "CP_ME_COHER_SIZE", |
| "type_ref": "CP_COHER_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197632, "to": "mm"}, |
| "name": "CP_ME_COHER_SIZE_HI", |
| "type_ref": "CP_COHER_SIZE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197636, "to": "mm"}, |
| "name": "CP_ME_COHER_BASE", |
| "type_ref": "CP_COHER_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197640, "to": "mm"}, |
| "name": "CP_ME_COHER_BASE_HI", |
| "type_ref": "CP_COHER_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197644, "to": "mm"}, |
| "name": "CP_ME_COHER_STATUS", |
| "type_ref": "CP_ME_COHER_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197888, "to": "mm"}, |
| "name": "RLC_GPM_PERF_COUNT_0", |
| "type_ref": "RLC_GPM_PERF_COUNT_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 197892, "to": "mm"}, |
| "name": "RLC_GPM_PERF_COUNT_1", |
| "type_ref": "RLC_GPM_PERF_COUNT_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198656, "to": "mm"}, |
| "name": "GRBM_GFX_INDEX", |
| "type_ref": "GRBM_GFX_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198912, "to": "mm"}, |
| "name": "VGT_ESGS_RING_SIZE_UMD", |
| "type_ref": "VGT_ESGS_RING_SIZE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198916, "to": "mm"}, |
| "name": "VGT_GSVS_RING_SIZE_UMD", |
| "type_ref": "VGT_ESGS_RING_SIZE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198920, "to": "mm"}, |
| "name": "VGT_PRIMITIVE_TYPE", |
| "type_ref": "VGT_PRIMITIVE_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198924, "to": "mm"}, |
| "name": "VGT_INDEX_TYPE", |
| "type_ref": "VGT_INDEX_TYPE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198928, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198932, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198936, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198940, "to": "mm"}, |
| "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3", |
| "type_ref": "COMPUTE_DIM_X" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198948, "to": "mm"}, |
| "name": "GE_MIN_VTX_INDX", |
| "type_ref": "VGT_MIN_VTX_INDX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198952, "to": "mm"}, |
| "name": "GE_INDX_OFFSET", |
| "type_ref": "VGT_INDX_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198956, "to": "mm"}, |
| "name": "GE_MULTI_PRIM_IB_RESET_EN", |
| "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198960, "to": "mm"}, |
| "name": "VGT_NUM_INDICES", |
| "type_ref": "VGT_DMA_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198964, "to": "mm"}, |
| "name": "VGT_NUM_INSTANCES", |
| "type_ref": "VGT_DMA_NUM_INSTANCES" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198968, "to": "mm"}, |
| "name": "VGT_TF_RING_SIZE_UMD", |
| "type_ref": "VGT_TF_RING_SIZE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198972, "to": "mm"}, |
| "name": "VGT_HS_OFFCHIP_PARAM_UMD", |
| "type_ref": "VGT_HS_OFFCHIP_PARAM_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198976, "to": "mm"}, |
| "name": "VGT_TF_MEMORY_BASE_UMD", |
| "type_ref": "VGT_TF_MEMORY_BASE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198980, "to": "mm"}, |
| "name": "GE_DMA_FIRST_INDEX", |
| "type_ref": "GE_DMA_FIRST_INDEX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198984, "to": "mm"}, |
| "name": "WD_POS_BUF_BASE", |
| "type_ref": "VGT_TF_MEMORY_BASE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198988, "to": "mm"}, |
| "name": "WD_POS_BUF_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198992, "to": "mm"}, |
| "name": "WD_CNTL_SB_BUF_BASE", |
| "type_ref": "VGT_TF_MEMORY_BASE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 198996, "to": "mm"}, |
| "name": "WD_CNTL_SB_BUF_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199000, "to": "mm"}, |
| "name": "WD_INDEX_BUF_BASE", |
| "type_ref": "VGT_TF_MEMORY_BASE_UMD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199004, "to": "mm"}, |
| "name": "WD_INDEX_BUF_BASE_HI", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199008, "to": "mm"}, |
| "name": "IA_MULTI_VGT_PARAM_PIPED", |
| "type_ref": "IA_MULTI_VGT_PARAM_PIPED" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199012, "to": "mm"}, |
| "name": "GE_MAX_VTX_INDX", |
| "type_ref": "VGT_MAX_VTX_INDX" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199016, "to": "mm"}, |
| "name": "VGT_INSTANCE_BASE_ID", |
| "type_ref": "VGT_INSTANCE_BASE_ID" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199020, "to": "mm"}, |
| "name": "GE_CNTL", |
| "type_ref": "GE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199024, "to": "mm"}, |
| "name": "GE_USER_VGPR1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199028, "to": "mm"}, |
| "name": "GE_USER_VGPR2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199032, "to": "mm"}, |
| "name": "GE_USER_VGPR3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199036, "to": "mm"}, |
| "name": "GE_STEREO_CNTL", |
| "type_ref": "GE_STEREO_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199040, "to": "mm"}, |
| "name": "GE_PC_ALLOC", |
| "type_ref": "GE_PC_ALLOC" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199044, "to": "mm"}, |
| "name": "VGT_TF_MEMORY_BASE_HI_UMD", |
| "type_ref": "DB_Z_READ_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199048, "to": "mm"}, |
| "name": "GE_USER_VGPR_EN", |
| "type_ref": "GE_USER_VGPR_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199168, "to": "mm"}, |
| "name": "PA_SU_LINE_STIPPLE_VALUE", |
| "type_ref": "PA_SU_LINE_STIPPLE_VALUE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199172, "to": "mm"}, |
| "name": "PA_SC_LINE_STIPPLE_STATE", |
| "type_ref": "PA_SC_LINE_STIPPLE_STATE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199184, "to": "mm"}, |
| "name": "PA_SC_SCREEN_EXTENT_MIN_0", |
| "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199188, "to": "mm"}, |
| "name": "PA_SC_SCREEN_EXTENT_MAX_0", |
| "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199192, "to": "mm"}, |
| "name": "PA_SC_SCREEN_EXTENT_MIN_1", |
| "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199212, "to": "mm"}, |
| "name": "PA_SC_SCREEN_EXTENT_MAX_1", |
| "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199296, "to": "mm"}, |
| "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199300, "to": "mm"}, |
| "name": "PA_SC_P3D_TRAP_SCREEN_H", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199304, "to": "mm"}, |
| "name": "PA_SC_P3D_TRAP_SCREEN_V", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199308, "to": "mm"}, |
| "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199312, "to": "mm"}, |
| "name": "PA_SC_P3D_TRAP_SCREEN_COUNT", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199328, "to": "mm"}, |
| "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199332, "to": "mm"}, |
| "name": "PA_SC_HP3D_TRAP_SCREEN_H", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199336, "to": "mm"}, |
| "name": "PA_SC_HP3D_TRAP_SCREEN_V", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199340, "to": "mm"}, |
| "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199344, "to": "mm"}, |
| "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199360, "to": "mm"}, |
| "name": "PA_SC_TRAP_SCREEN_HV_EN", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199364, "to": "mm"}, |
| "name": "PA_SC_TRAP_SCREEN_H", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_H" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199368, "to": "mm"}, |
| "name": "PA_SC_TRAP_SCREEN_V", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_V" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199372, "to": "mm"}, |
| "name": "PA_SC_TRAP_SCREEN_OCCURRENCE", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199376, "to": "mm"}, |
| "name": "PA_SC_TRAP_SCREEN_COUNT", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199936, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199940, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199944, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_2", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199948, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_3", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199952, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_4", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199956, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_5", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199960, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_6", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199964, "to": "mm"}, |
| "name": "SQ_THREAD_TRACE_USERDATA_7", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 199968, "to": "mm"}, |
| "name": "SQC_CACHES", |
| "type_ref": "SQC_CACHES" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200192, "to": "mm"}, |
| "name": "TA_CS_BC_BASE_ADDR", |
| "type_ref": "TA_BC_BASE_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200196, "to": "mm"}, |
| "name": "TA_CS_BC_BASE_ADDR_HI", |
| "type_ref": "TA_BC_BASE_ADDR_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200448, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT0_LOW", |
| "type_ref": "DB_OCCLUSION_COUNT0_LOW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200452, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT0_HI", |
| "type_ref": "DB_OCCLUSION_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200456, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT1_LOW", |
| "type_ref": "DB_OCCLUSION_COUNT0_LOW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200460, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT1_HI", |
| "type_ref": "DB_OCCLUSION_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200464, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT2_LOW", |
| "type_ref": "DB_OCCLUSION_COUNT0_LOW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200468, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT2_HI", |
| "type_ref": "DB_OCCLUSION_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200472, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT3_LOW", |
| "type_ref": "DB_OCCLUSION_COUNT0_LOW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200476, "to": "mm"}, |
| "name": "DB_OCCLUSION_COUNT3_HI", |
| "type_ref": "DB_OCCLUSION_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200696, "to": "mm"}, |
| "name": "DB_ZPASS_COUNT_LOW", |
| "type_ref": "DB_OCCLUSION_COUNT0_LOW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200700, "to": "mm"}, |
| "name": "DB_ZPASS_COUNT_HI", |
| "type_ref": "DB_OCCLUSION_COUNT0_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200704, "to": "mm"}, |
| "name": "GDS_RD_ADDR", |
| "type_ref": "GDS_RD_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200708, "to": "mm"}, |
| "name": "GDS_RD_DATA", |
| "type_ref": "GDS_RD_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200712, "to": "mm"}, |
| "name": "GDS_RD_BURST_ADDR", |
| "type_ref": "GDS_RD_BURST_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200716, "to": "mm"}, |
| "name": "GDS_RD_BURST_COUNT", |
| "type_ref": "GDS_RD_BURST_COUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200720, "to": "mm"}, |
| "name": "GDS_RD_BURST_DATA", |
| "type_ref": "GDS_RD_BURST_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200724, "to": "mm"}, |
| "name": "GDS_WR_ADDR", |
| "type_ref": "GDS_WR_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200728, "to": "mm"}, |
| "name": "GDS_WR_DATA", |
| "type_ref": "GDS_WR_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200732, "to": "mm"}, |
| "name": "GDS_WR_BURST_ADDR", |
| "type_ref": "GDS_WR_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200736, "to": "mm"}, |
| "name": "GDS_WR_BURST_DATA", |
| "type_ref": "GDS_WR_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200740, "to": "mm"}, |
| "name": "GDS_WRITE_COMPLETE", |
| "type_ref": "GDS_WRITE_COMPLETE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200744, "to": "mm"}, |
| "name": "GDS_ATOM_CNTL", |
| "type_ref": "GDS_ATOM_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200748, "to": "mm"}, |
| "name": "GDS_ATOM_COMPLETE", |
| "type_ref": "GDS_ATOM_COMPLETE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200752, "to": "mm"}, |
| "name": "GDS_ATOM_BASE", |
| "type_ref": "GDS_ATOM_BASE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200756, "to": "mm"}, |
| "name": "GDS_ATOM_SIZE", |
| "type_ref": "GDS_ATOM_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200760, "to": "mm"}, |
| "name": "GDS_ATOM_OFFSET0", |
| "type_ref": "GDS_ATOM_OFFSET0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200764, "to": "mm"}, |
| "name": "GDS_ATOM_OFFSET1", |
| "type_ref": "GDS_ATOM_OFFSET1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200768, "to": "mm"}, |
| "name": "GDS_ATOM_DST", |
| "type_ref": "GDS_ATOM_DST" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200772, "to": "mm"}, |
| "name": "GDS_ATOM_OP", |
| "type_ref": "GDS_ATOM_OP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200776, "to": "mm"}, |
| "name": "GDS_ATOM_SRC0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200780, "to": "mm"}, |
| "name": "GDS_ATOM_SRC0_U", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200784, "to": "mm"}, |
| "name": "GDS_ATOM_SRC1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200788, "to": "mm"}, |
| "name": "GDS_ATOM_SRC1_U", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200792, "to": "mm"}, |
| "name": "GDS_ATOM_READ0", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200796, "to": "mm"}, |
| "name": "GDS_ATOM_READ0_U", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200800, "to": "mm"}, |
| "name": "GDS_ATOM_READ1", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200804, "to": "mm"}, |
| "name": "GDS_ATOM_READ1_U", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200808, "to": "mm"}, |
| "name": "GDS_GWS_RESOURCE_CNTL", |
| "type_ref": "GDS_GWS_RESOURCE_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200812, "to": "mm"}, |
| "name": "GDS_GWS_RESOURCE", |
| "type_ref": "GDS_GWS_RESOURCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200816, "to": "mm"}, |
| "name": "GDS_GWS_RESOURCE_CNT", |
| "type_ref": "GDS_GWS_RESOURCE_CNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200820, "to": "mm"}, |
| "name": "GDS_OA_CNTL", |
| "type_ref": "GDS_OA_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200824, "to": "mm"}, |
| "name": "GDS_OA_COUNTER", |
| "type_ref": "GDS_OA_COUNTER" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200828, "to": "mm"}, |
| "name": "GDS_OA_ADDRESS", |
| "type_ref": "GDS_OA_ADDRESS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200832, "to": "mm"}, |
| "name": "GDS_OA_INCDEC", |
| "type_ref": "GDS_OA_INCDEC" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200836, "to": "mm"}, |
| "name": "GDS_OA_RING_SIZE", |
| "type_ref": "GDS_OA_RING_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200960, "to": "mm"}, |
| "name": "SPI_CONFIG_CNTL_REMAP", |
| "type_ref": "SPI_CONFIG_CNTL_REMAP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200964, "to": "mm"}, |
| "name": "SPI_CONFIG_CNTL_1_REMAP", |
| "type_ref": "SPI_CONFIG_CNTL_REMAP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200968, "to": "mm"}, |
| "name": "SPI_CONFIG_CNTL_2_REMAP", |
| "type_ref": "SPI_CONFIG_CNTL_REMAP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 200972, "to": "mm"}, |
| "name": "SPI_WAVE_LIMIT_CNTL_REMAP", |
| "type_ref": "SPI_CONFIG_CNTL_REMAP" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 212992, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 212996, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213000, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213004, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213008, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213012, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213016, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213020, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213024, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213028, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213032, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213036, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213040, "to": "mm"}, |
| "name": "CPF_LATENCY_STATS_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213044, "to": "mm"}, |
| "name": "CPG_LATENCY_STATS_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213048, "to": "mm"}, |
| "name": "CPC_LATENCY_STATS_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213248, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213252, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213260, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213264, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213268, "to": "mm"}, |
| "name": "GRBM_SE0_PERFCOUNTER_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213272, "to": "mm"}, |
| "name": "GRBM_SE0_PERFCOUNTER_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213276, "to": "mm"}, |
| "name": "GRBM_SE1_PERFCOUNTER_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213280, "to": "mm"}, |
| "name": "GRBM_SE1_PERFCOUNTER_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213284, "to": "mm"}, |
| "name": "GRBM_SE2_PERFCOUNTER_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213288, "to": "mm"}, |
| "name": "GRBM_SE2_PERFCOUNTER_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213292, "to": "mm"}, |
| "name": "GRBM_SE3_PERFCOUNTER_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213296, "to": "mm"}, |
| "name": "GRBM_SE3_PERFCOUNTER_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213648, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213652, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213656, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213660, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213664, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213668, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213672, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213676, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213680, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213684, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213688, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213692, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213696, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213700, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213704, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213708, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213712, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213716, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213720, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213724, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213728, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213732, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213736, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 213740, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214016, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214020, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214024, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214028, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214032, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214036, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214040, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214044, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214272, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214276, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214280, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214284, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214288, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214292, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214296, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214300, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214304, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER4_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214308, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER4_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214312, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER5_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214316, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER5_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214320, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER6_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214324, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER6_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214328, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER7_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214332, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER7_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214528, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214532, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214536, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214540, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214544, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214548, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214552, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214556, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214560, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER4_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214564, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER4_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214568, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER5_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214572, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER5_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214784, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214788, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214792, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214796, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214800, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214804, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214808, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214812, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214816, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER4_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214820, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER4_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214824, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER5_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214828, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER5_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214832, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER6_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214836, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER6_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214840, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER7_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214844, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER7_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214848, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER8_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214852, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER8_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214856, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER9_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214860, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER9_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214864, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER10_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214868, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER10_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214872, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER11_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214876, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER11_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214880, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER12_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214884, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER12_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214888, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER13_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214892, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER13_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214896, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER14_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214900, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER14_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214904, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER15_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 214908, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER15_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215296, "to": "mm"}, |
| "name": "SX_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215300, "to": "mm"}, |
| "name": "SX_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215304, "to": "mm"}, |
| "name": "SX_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215308, "to": "mm"}, |
| "name": "SX_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215312, "to": "mm"}, |
| "name": "SX_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215316, "to": "mm"}, |
| "name": "SX_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215320, "to": "mm"}, |
| "name": "SX_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215324, "to": "mm"}, |
| "name": "SX_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215424, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215428, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215432, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215436, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215552, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215556, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215560, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215564, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215568, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215572, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215576, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215580, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215808, "to": "mm"}, |
| "name": "TA_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215812, "to": "mm"}, |
| "name": "TA_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215816, "to": "mm"}, |
| "name": "TA_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 215820, "to": "mm"}, |
| "name": "TA_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216064, "to": "mm"}, |
| "name": "TD_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216068, "to": "mm"}, |
| "name": "TD_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216072, "to": "mm"}, |
| "name": "TD_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216076, "to": "mm"}, |
| "name": "TD_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216320, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216324, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216328, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216332, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216336, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216340, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216344, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216348, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216576, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216580, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216584, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216588, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216592, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216596, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216600, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216604, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216640, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216644, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216648, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216652, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216656, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216660, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216664, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216668, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216704, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216708, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216712, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216716, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216720, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216724, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216728, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216732, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216832, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216836, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216840, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216844, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216848, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216852, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216856, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216860, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216864, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216868, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216872, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216876, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216880, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216884, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216888, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 216892, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217112, "to": "mm"}, |
| "name": "CB_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217116, "to": "mm"}, |
| "name": "CB_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217120, "to": "mm"}, |
| "name": "CB_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217124, "to": "mm"}, |
| "name": "CB_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217128, "to": "mm"}, |
| "name": "CB_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217132, "to": "mm"}, |
| "name": "CB_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217136, "to": "mm"}, |
| "name": "CB_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217140, "to": "mm"}, |
| "name": "CB_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217344, "to": "mm"}, |
| "name": "DB_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217348, "to": "mm"}, |
| "name": "DB_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217352, "to": "mm"}, |
| "name": "DB_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217356, "to": "mm"}, |
| "name": "DB_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217360, "to": "mm"}, |
| "name": "DB_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217364, "to": "mm"}, |
| "name": "DB_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217368, "to": "mm"}, |
| "name": "DB_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217372, "to": "mm"}, |
| "name": "DB_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217600, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217604, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217608, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217612, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217856, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217860, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217864, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217868, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217872, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217876, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217880, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 217884, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218016, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218020, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218024, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218028, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218080, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218084, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218088, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218092, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218224, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218228, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218232, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218236, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218240, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218244, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218248, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218252, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218624, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218628, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218632, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218636, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218640, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218644, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218648, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218652, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218656, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER4_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218660, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER4_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218664, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER5_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218668, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER5_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218672, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER6_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218676, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER6_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218680, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER7_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218684, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER7_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218880, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218884, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218888, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218892, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218896, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218900, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218904, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 218908, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219136, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219140, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219144, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219148, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219152, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219156, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219160, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER3_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219164, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER3_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219392, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER2_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219396, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER2_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219400, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219404, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219520, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219524, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219528, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219532, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219536, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219540, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219568, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219572, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219576, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219580, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219584, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219588, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219616, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219620, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219624, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219628, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219632, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219636, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219664, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_PERFCOUNTER_LO", |
| "type_ref": "GCEA_PERFCOUNTER_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219668, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_PERFCOUNTER_HI", |
| "type_ref": "GCEA_PERFCOUNTER_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219672, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER0_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219676, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER0_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219680, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER1_LO", |
| "type_ref": "CPG_PERFCOUNTER1_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 219684, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER1_HI", |
| "type_ref": "CPG_PERFCOUNTER1_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221184, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER1_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221188, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER0_SELECT1", |
| "type_ref": "CPG_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221192, "to": "mm"}, |
| "name": "CPG_PERFCOUNTER0_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221196, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER1_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221200, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER0_SELECT1", |
| "type_ref": "CPG_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221204, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER1_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221208, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER0_SELECT1", |
| "type_ref": "CPG_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221212, "to": "mm"}, |
| "name": "CPF_PERFCOUNTER0_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221216, "to": "mm"}, |
| "name": "CP_PERFMON_CNTL", |
| "type_ref": "CP_PERFMON_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221220, "to": "mm"}, |
| "name": "CPC_PERFCOUNTER0_SELECT", |
| "type_ref": "CPG_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221224, "to": "mm"}, |
| "name": "CPF_TC_PERF_COUNTER_WINDOW_SELECT", |
| "type_ref": "CPF_TC_PERF_COUNTER_WINDOW_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221228, "to": "mm"}, |
| "name": "CPG_TC_PERF_COUNTER_WINDOW_SELECT", |
| "type_ref": "CPG_TC_PERF_COUNTER_WINDOW_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221232, "to": "mm"}, |
| "name": "CPF_LATENCY_STATS_SELECT", |
| "type_ref": "CPF_LATENCY_STATS_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221236, "to": "mm"}, |
| "name": "CPG_LATENCY_STATS_SELECT", |
| "type_ref": "CPG_LATENCY_STATS_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221240, "to": "mm"}, |
| "name": "CPC_LATENCY_STATS_SELECT", |
| "type_ref": "CPF_LATENCY_STATS_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221248, "to": "mm"}, |
| "name": "CP_DRAW_OBJECT", |
| "type_ref": "CP_DRAW_OBJECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221252, "to": "mm"}, |
| "name": "CP_DRAW_OBJECT_COUNTER", |
| "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221256, "to": "mm"}, |
| "name": "CP_DRAW_WINDOW_MASK_HI", |
| "type_ref": "CP_DRAW_WINDOW_MASK_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221260, "to": "mm"}, |
| "name": "CP_DRAW_WINDOW_HI", |
| "type_ref": "CP_DRAW_WINDOW_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221264, "to": "mm"}, |
| "name": "CP_DRAW_WINDOW_LO", |
| "type_ref": "CP_DRAW_WINDOW_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221268, "to": "mm"}, |
| "name": "CP_DRAW_WINDOW_CNTL", |
| "type_ref": "CP_DRAW_WINDOW_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221440, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER0_SELECT", |
| "type_ref": "GRBM_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221444, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER1_SELECT", |
| "type_ref": "GRBM_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221448, "to": "mm"}, |
| "name": "GRBM_SE0_PERFCOUNTER_SELECT", |
| "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221452, "to": "mm"}, |
| "name": "GRBM_SE1_PERFCOUNTER_SELECT", |
| "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221456, "to": "mm"}, |
| "name": "GRBM_SE2_PERFCOUNTER_SELECT", |
| "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221460, "to": "mm"}, |
| "name": "GRBM_SE3_PERFCOUNTER_SELECT", |
| "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221492, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER0_SELECT_HI", |
| "type_ref": "GRBM_PERFCOUNTER0_SELECT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221496, "to": "mm"}, |
| "name": "GRBM_PERFCOUNTER1_SELECT_HI", |
| "type_ref": "GRBM_PERFCOUNTER0_SELECT_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221840, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER0_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221844, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221848, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER1_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221852, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER1_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221856, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER2_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221860, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER2_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221864, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER3_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221868, "to": "mm"}, |
| "name": "GE1_PERFCOUNTER3_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221872, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER0_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221876, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221880, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER1_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221884, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER1_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221888, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER2_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221892, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER2_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221896, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER3_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221900, "to": "mm"}, |
| "name": "GE2_DIST_PERFCOUNTER3_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221904, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER0_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221908, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221912, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER1_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221916, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER1_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221920, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER2_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221924, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER2_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221928, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER3_SELECT", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 221932, "to": "mm"}, |
| "name": "GE2_SE_PERFCOUNTER3_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222208, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222212, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222216, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222220, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222224, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222228, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222232, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222236, "to": "mm"}, |
| "name": "PA_SU_PERFCOUNTER3_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222464, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222468, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222472, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222476, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222480, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222484, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER4_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222488, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER5_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222492, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER6_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222496, "to": "mm"}, |
| "name": "PA_SC_PERFCOUNTER7_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222720, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222724, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222728, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222732, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222736, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222740, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222744, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222748, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER3_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222752, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER4_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222756, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER5_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222760, "to": "mm"}, |
| "name": "SPI_PERFCOUNTER_BINS", |
| "type_ref": "SPI_PERFCOUNTER_BINS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222976, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER0_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222980, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER1_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222984, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER2_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222988, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER3_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222992, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER4_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 222996, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER5_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223000, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER6_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223004, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER7_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223008, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER8_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223012, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER9_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223016, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER10_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223020, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER11_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223024, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER12_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223028, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER13_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223032, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER14_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223036, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER15_SELECT", |
| "type_ref": "SQ_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223104, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER_CTRL", |
| "type_ref": "SQ_PERFCOUNTER_CTRL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223112, "to": "mm"}, |
| "name": "SQ_PERFCOUNTER_CTRL2", |
| "type_ref": "SQ_PERFCOUNTER_CTRL2" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223232, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223236, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223240, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER2_MODE", |
| "type_ref": "GCEA_PERFCOUNTER2_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223244, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223248, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223252, "to": "mm"}, |
| "name": "GCEA_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223488, "to": "mm"}, |
| "name": "SX_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223492, "to": "mm"}, |
| "name": "SX_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223496, "to": "mm"}, |
| "name": "SX_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223500, "to": "mm"}, |
| "name": "SX_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223504, "to": "mm"}, |
| "name": "SX_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223508, "to": "mm"}, |
| "name": "SX_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223744, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223748, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223752, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223756, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223760, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223764, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223768, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 223772, "to": "mm"}, |
| "name": "GDS_PERFCOUNTER3_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224000, "to": "mm"}, |
| "name": "TA_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224004, "to": "mm"}, |
| "name": "TA_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224008, "to": "mm"}, |
| "name": "TA_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224256, "to": "mm"}, |
| "name": "TD_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224260, "to": "mm"}, |
| "name": "TD_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224264, "to": "mm"}, |
| "name": "TD_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224512, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224516, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224520, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224524, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224528, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224532, "to": "mm"}, |
| "name": "TCP_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224768, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224772, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224776, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224780, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER1_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224784, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224788, "to": "mm"}, |
| "name": "GL2C_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224832, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224836, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224840, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224844, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER1_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224848, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224852, "to": "mm"}, |
| "name": "GL2A_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224896, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224900, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224904, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224908, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 224912, "to": "mm"}, |
| "name": "GL1C_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225024, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225028, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225032, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225036, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225040, "to": "mm"}, |
| "name": "CHC_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225048, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225052, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225056, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225060, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225064, "to": "mm"}, |
| "name": "CHCG_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225280, "to": "mm"}, |
| "name": "CB_PERFCOUNTER_FILTER", |
| "type_ref": "CB_PERFCOUNTER_FILTER" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225284, "to": "mm"}, |
| "name": "CB_PERFCOUNTER0_SELECT", |
| "type_ref": "CB_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225288, "to": "mm"}, |
| "name": "CB_PERFCOUNTER0_SELECT1", |
| "type_ref": "CB_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225292, "to": "mm"}, |
| "name": "CB_PERFCOUNTER1_SELECT", |
| "type_ref": "CB_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225296, "to": "mm"}, |
| "name": "CB_PERFCOUNTER2_SELECT", |
| "type_ref": "CB_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225300, "to": "mm"}, |
| "name": "CB_PERFCOUNTER3_SELECT", |
| "type_ref": "CB_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225536, "to": "mm"}, |
| "name": "DB_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225540, "to": "mm"}, |
| "name": "DB_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225544, "to": "mm"}, |
| "name": "DB_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225548, "to": "mm"}, |
| "name": "DB_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225552, "to": "mm"}, |
| "name": "DB_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225560, "to": "mm"}, |
| "name": "DB_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225792, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_CNTL", |
| "type_ref": "RLC_SPM_PERFMON_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225796, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_RING_BASE_LO", |
| "type_ref": "RLC_SPM_PERFMON_RING_BASE_LO" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225800, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_RING_BASE_HI", |
| "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225804, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_RING_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_RING_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225808, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225812, "to": "mm"}, |
| "name": "RLC_SPM_RING_RDPTR", |
| "type_ref": "RLC_SPM_RING_RDPTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225816, "to": "mm"}, |
| "name": "RLC_SPM_SEGMENT_THRESHOLD", |
| "type_ref": "RLC_SPM_SEGMENT_THRESHOLD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225820, "to": "mm"}, |
| "name": "RLC_SPM_SE_MUXSEL_ADDR", |
| "type_ref": "RLC_SPM_SE_MUXSEL_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225824, "to": "mm"}, |
| "name": "RLC_SPM_SE_MUXSEL_DATA", |
| "type_ref": "RLC_SPM_SE_MUXSEL_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225828, "to": "mm"}, |
| "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR", |
| "type_ref": "RLC_SPM_GLOBAL_MUXSEL_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225832, "to": "mm"}, |
| "name": "RLC_SPM_GLOBAL_MUXSEL_DATA", |
| "type_ref": "RLC_SPM_SE_MUXSEL_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225836, "to": "mm"}, |
| "name": "RLC_SPM_DESER_START_SKEW", |
| "type_ref": "RLC_SPM_DESER_START_SKEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225840, "to": "mm"}, |
| "name": "RLC_SPM_GLOBALS_SAMPLE_SKEW", |
| "type_ref": "RLC_SPM_GLOBALS_SAMPLE_SKEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225844, "to": "mm"}, |
| "name": "RLC_SPM_GLOBALS_MUXSEL_SKEW", |
| "type_ref": "RLC_SPM_GLOBALS_MUXSEL_SKEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225848, "to": "mm"}, |
| "name": "RLC_SPM_SE_SAMPLE_SKEW", |
| "type_ref": "RLC_SPM_SE_SAMPLE_SKEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225852, "to": "mm"}, |
| "name": "RLC_SPM_SE_MUXSEL_SKEW", |
| "type_ref": "RLC_SPM_SE_MUXSEL_SKEW" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225856, "to": "mm"}, |
| "name": "RLC_SPM_GLB_SAMPLEDELAY_IND_ADDR", |
| "type_ref": "RLC_SPM_GLB_SAMPLEDELAY_IND_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225860, "to": "mm"}, |
| "name": "RLC_SPM_GLB_SAMPLEDELAY_IND_DATA", |
| "type_ref": "RLC_SPM_GLB_SAMPLEDELAY_IND_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225864, "to": "mm"}, |
| "name": "RLC_SPM_SE_SAMPLEDELAY_IND_ADDR", |
| "type_ref": "RLC_SPM_SE_SAMPLEDELAY_IND_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225868, "to": "mm"}, |
| "name": "RLC_SPM_SE_SAMPLEDELAY_IND_DATA", |
| "type_ref": "RLC_SPM_GLB_SAMPLEDELAY_IND_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225872, "to": "mm"}, |
| "name": "RLC_SPM_RING_WRPTR", |
| "type_ref": "RLC_SPM_RING_WRPTR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225876, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_DATARAM_ADDR", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225880, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_DATARAM_DATA", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225884, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_CTRLRAM_ADDR", |
| "type_ref": "RLC_SPM_ACCUM_CTRLRAM_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225888, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_CTRLRAM_DATA", |
| "type_ref": "RLC_SPM_ACCUM_CTRLRAM_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225892, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_STATUS", |
| "type_ref": "RLC_SPM_ACCUM_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225896, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_CTRL", |
| "type_ref": "RLC_SPM_ACCUM_CTRL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225900, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_MODE", |
| "type_ref": "RLC_SPM_ACCUM_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225904, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_THRESHOLD", |
| "type_ref": "RLC_SPM_ACCUM_THRESHOLD" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225908, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_SAMPLES_REQUESTED", |
| "type_ref": "RLC_SPM_ACCUM_SAMPLES_REQUESTED" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225912, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_DATARAM_WRCOUNT", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_WRCOUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225916, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225920, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_GLB_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_GLB_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225924, "to": "mm"}, |
| "name": "RLC_SPM_VIRT_CTRL", |
| "type_ref": "RLC_SPM_VIRT_CTRL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225928, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_SWA_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225932, "to": "mm"}, |
| "name": "RLC_SPM_VIRT_STATUS", |
| "type_ref": "RLC_SPM_VIRT_STATUS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225936, "to": "mm"}, |
| "name": "RLC_SPM_GFXCLOCK_HIGHCOUNT", |
| "type_ref": "RLC_SPM_GFXCLOCK_HIGHCOUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225940, "to": "mm"}, |
| "name": "RLC_SPM_GFXCLOCK_LOWCOUNT", |
| "type_ref": "RLC_SPM_GFXCLOCK_LOWCOUNT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225944, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_SWA_SE3TO0_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225948, "to": "mm"}, |
| "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET", |
| "type_ref": "RLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225952, "to": "mm"}, |
| "name": "RLC_SPM_SE_MUXSEL_ADDR_OFFSET", |
| "type_ref": "RLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225956, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_SWA_DATARAM_ADDR", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225960, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_SWA_DATARAM_DATA", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_DATA" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225964, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_CTRLRAM_ADDR_OFFSET", |
| "type_ref": "RLC_SPM_ACCUM_CTRLRAM_ADDR_OFFSET" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225968, "to": "mm"}, |
| "name": "RLC_SPM_PERFMON_SWA_GLB_SEGMENT_SIZE", |
| "type_ref": "RLC_SPM_PERFMON_GLB_SEGMENT_SIZE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 225972, "to": "mm"}, |
| "name": "RLC_SPM_ACCUM_DATARAM_32BITCNTRS_REGIONS", |
| "type_ref": "RLC_SPM_ACCUM_DATARAM_32BITCNTRS_REGIONS" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226048, "to": "mm"}, |
| "name": "RLC_PERFMON_CNTL", |
| "type_ref": "RLC_PERFMON_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226052, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER0_SELECT", |
| "type_ref": "RLC_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226056, "to": "mm"}, |
| "name": "RLC_PERFCOUNTER1_SELECT", |
| "type_ref": "RLC_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226060, "to": "mm"}, |
| "name": "RLC_GPU_IOV_PERF_CNT_CNTL", |
| "type_ref": "RLC_GPU_IOV_PERF_CNT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226064, "to": "mm"}, |
| "name": "RLC_GPU_IOV_PERF_CNT_WR_ADDR", |
| "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226068, "to": "mm"}, |
| "name": "RLC_GPU_IOV_PERF_CNT_WR_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226072, "to": "mm"}, |
| "name": "RLC_GPU_IOV_PERF_CNT_RD_ADDR", |
| "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226076, "to": "mm"}, |
| "name": "RLC_GPU_IOV_PERF_CNT_RD_DATA", |
| "type_ref": "SPI_SHADER_USER_DATA_PS_0" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226192, "to": "mm"}, |
| "name": "RLC_PERFMON_CLK_CNTL", |
| "type_ref": "RLC_PERFMON_CLK_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226304, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER0_SELECT", |
| "type_ref": "CB_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226308, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER0_SELECT1", |
| "type_ref": "CB_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226312, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER1_SELECT", |
| "type_ref": "CB_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226316, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER2_SELECT", |
| "type_ref": "CB_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226320, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER2_SELECT1", |
| "type_ref": "CB_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226324, "to": "mm"}, |
| "name": "RMI_PERFCOUNTER3_SELECT", |
| "type_ref": "CB_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226328, "to": "mm"}, |
| "name": "RMI_PERF_COUNTER_CNTL", |
| "type_ref": "RMI_PERF_COUNTER_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226480, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226484, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226488, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER2_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226492, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER3_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226496, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER4_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226500, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER5_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226504, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER6_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226508, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER7_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226512, "to": "mm"}, |
| "name": "GCMC_VM_L2_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226516, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226520, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226524, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER2_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226528, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER3_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226532, "to": "mm"}, |
| "name": "GCUTCL2_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226544, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226548, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226552, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226556, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226560, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_0_MODE", |
| "type_ref": "GCEA_PERFCOUNTER2_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226564, "to": "mm"}, |
| "name": "GCVML2_PERFCOUNTER2_1_MODE", |
| "type_ref": "GCEA_PERFCOUNTER2_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226688, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER0_SELECT", |
| "type_ref": "CB_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226692, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER0_SELECT1", |
| "type_ref": "CB_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226696, "to": "mm"}, |
| "name": "GCR_PERFCOUNTER1_SELECT", |
| "type_ref": "GCR_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226700, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER0_SELECT", |
| "type_ref": "UTCL1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226704, "to": "mm"}, |
| "name": "UTCL1_PERFCOUNTER1_SELECT", |
| "type_ref": "UTCL1_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226816, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226820, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226824, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226828, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226832, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER3_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226836, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER4_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226840, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER5_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226844, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER6_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226848, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER7_SELECT", |
| "type_ref": "PA_SC_PERFCOUNTER1_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226880, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226884, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 226888, "to": "mm"}, |
| "name": "PA_PH_PERFCOUNTER3_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227072, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227076, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227080, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227084, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227088, "to": "mm"}, |
| "name": "GL1A_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227200, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227204, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER0_SELECT1", |
| "type_ref": "GE1_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227208, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER1_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227212, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER2_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227216, "to": "mm"}, |
| "name": "CHA_PERFCOUNTER3_SELECT", |
| "type_ref": "SX_PERFCOUNTER2_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227328, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER2_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227332, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER2_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227336, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER2_MODE", |
| "type_ref": "GCEA_PERFCOUNTER2_MODE" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227340, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227344, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227348, "to": "mm"}, |
| "name": "GUS_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227456, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227460, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227464, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227468, "to": "mm"}, |
| "name": "SDMA0_PERFCNT_MISC_CNTL", |
| "type_ref": "SDMA0_PERFCNT_MISC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227472, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227476, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227480, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227484, "to": "mm"}, |
| "name": "SDMA0_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227504, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227508, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227512, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227516, "to": "mm"}, |
| "name": "SDMA1_PERFCNT_MISC_CNTL", |
| "type_ref": "SDMA0_PERFCNT_MISC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227520, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227524, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227528, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227532, "to": "mm"}, |
| "name": "SDMA1_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227552, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227556, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227560, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227564, "to": "mm"}, |
| "name": "SDMA2_PERFCNT_MISC_CNTL", |
| "type_ref": "SDMA0_PERFCNT_MISC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227568, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227572, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227576, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227580, "to": "mm"}, |
| "name": "SDMA2_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227600, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_PERFCOUNTER0_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227604, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_PERFCOUNTER1_CFG", |
| "type_ref": "GCEA_PERFCOUNTER0_CFG" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227608, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_PERFCOUNTER_RSLT_CNTL", |
| "type_ref": "GCEA_PERFCOUNTER_RSLT_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227612, "to": "mm"}, |
| "name": "SDMA3_PERFCNT_MISC_CNTL", |
| "type_ref": "SDMA0_PERFCNT_MISC_CNTL" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227616, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER0_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227620, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER0_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227624, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER1_SELECT", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT" |
| }, |
| { |
| "chips": ["gfx103"], |
| "map": {"at": 227628, "to": "mm"}, |
| "name": "SDMA3_PERFCOUNTER1_SELECT1", |
| "type_ref": "PA_SU_PERFCOUNTER0_SELECT1" |
| } |
| ], |
| "register_types": { |
| "CB_BLEND0_CONTROL": { |
| "fields": [ |
| {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"}, |
| {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"}, |
| {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"}, |
| {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"}, |
| {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"}, |
| {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"}, |
| {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"}, |
| {"bits": [30, 30], "name": "ENABLE"}, |
| {"bits": [31, 31], "name": "DISABLE_ROP3"} |
| ] |
| }, |
| "CB_BLEND_ALPHA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BLEND_ALPHA"} |
| ] |
| }, |
| "CB_BLEND_BLUE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BLEND_BLUE"} |
| ] |
| }, |
| "CB_BLEND_GREEN": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BLEND_GREEN"} |
| ] |
| }, |
| "CB_BLEND_RED": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BLEND_RED"} |
| ] |
| }, |
| "CB_COLOR0_ATTRIB": { |
| "fields": [ |
| {"bits": [0, 4], "name": "TILE_MODE_INDEX"}, |
| {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"}, |
| {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"}, |
| {"bits": [12, 14], "name": "NUM_SAMPLES"}, |
| {"bits": [15, 16], "name": "NUM_FRAGMENTS"}, |
| {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}, |
| {"bits": [18, 18], "name": "DISABLE_FMASK_NOFETCH_OPT"}, |
| {"bits": [19, 19], "name": "LIMIT_COLOR_FETCH_TO_256B_MAX"} |
| ] |
| }, |
| "CB_COLOR0_ATTRIB2": { |
| "fields": [ |
| {"bits": [0, 13], "name": "MIP0_HEIGHT"}, |
| {"bits": [14, 27], "name": "MIP0_WIDTH"}, |
| {"bits": [28, 31], "name": "MAX_MIP"} |
| ] |
| }, |
| "CB_COLOR0_ATTRIB3": { |
| "fields": [ |
| {"bits": [0, 12], "name": "MIP0_DEPTH"}, |
| {"bits": [13, 13], "name": "META_LINEAR"}, |
| {"bits": [14, 18], "name": "COLOR_SW_MODE"}, |
| {"bits": [19, 23], "name": "FMASK_SW_MODE"}, |
| {"bits": [24, 25], "name": "RESOURCE_TYPE"}, |
| {"bits": [26, 26], "name": "CMASK_PIPE_ALIGNED"}, |
| {"bits": [27, 29], "name": "RESOURCE_LEVEL"}, |
| {"bits": [30, 30], "name": "DCC_PIPE_ALIGNED"}, |
| {"bits": [31, 31], "name": "VRS_RATE_HINT_ENABLE"} |
| ] |
| }, |
| "CB_COLOR0_BASE_EXT": { |
| "fields": [ |
| {"bits": [0, 7], "name": "BASE_256B"} |
| ] |
| }, |
| "CB_COLOR0_CLEAR_WORD0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CLEAR_WORD0"} |
| ] |
| }, |
| "CB_COLOR0_CLEAR_WORD1": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CLEAR_WORD1"} |
| ] |
| }, |
| "CB_COLOR0_CMASK_SLICE": { |
| "fields": [ |
| {"bits": [0, 13], "name": "TILE_MAX"} |
| ] |
| }, |
| "CB_COLOR0_DCC_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, |
| {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"}, |
| {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"}, |
| {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"}, |
| {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"}, |
| {"bits": [7, 8], "name": "COLOR_TRANSFORM"}, |
| {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"}, |
| {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"}, |
| {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}, |
| {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"}, |
| {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"}, |
| {"bits": [20, 20], "name": "INDEPENDENT_128B_BLOCKS"}, |
| {"bits": [21, 21], "name": "SKIP_LOW_COMP_RATIO"}, |
| {"bits": [22, 22], "name": "DCC_COMPRESS_DISABLE"} |
| ] |
| }, |
| "CB_COLOR0_INFO": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"}, |
| {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"}, |
| {"bits": [7, 7], "name": "LINEAR_GENERAL"}, |
| {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"}, |
| {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"}, |
| {"bits": [13, 13], "name": "FAST_CLEAR"}, |
| {"bits": [14, 14], "name": "COMPRESSION"}, |
| {"bits": [15, 15], "name": "BLEND_CLAMP"}, |
| {"bits": [16, 16], "name": "BLEND_BYPASS"}, |
| {"bits": [17, 17], "name": "SIMPLE_FLOAT"}, |
| {"bits": [18, 18], "name": "ROUND_MODE"}, |
| {"bits": [19, 19], "name": "CMASK_IS_LINEAR"}, |
| {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"}, |
| {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"}, |
| {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"}, |
| {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"}, |
| {"bits": [28, 28], "name": "DCC_ENABLE"}, |
| {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}, |
| {"bits": [31, 31], "name": "NBC_TILING"} |
| ] |
| }, |
| "CB_COLOR0_PITCH": { |
| "fields": [ |
| {"bits": [0, 10], "name": "TILE_MAX"}, |
| {"bits": [20, 30], "name": "FMASK_TILE_MAX"} |
| ] |
| }, |
| "CB_COLOR0_SLICE": { |
| "fields": [ |
| {"bits": [0, 21], "name": "TILE_MAX"} |
| ] |
| }, |
| "CB_COLOR0_VIEW": { |
| "fields": [ |
| {"bits": [0, 12], "name": "SLICE_START"}, |
| {"bits": [13, 25], "name": "SLICE_MAX"}, |
| {"bits": [26, 29], "name": "MIP_LEVEL"} |
| ] |
| }, |
| "CB_COLOR_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"}, |
| {"bits": [1, 1], "name": "ENABLE_1FRAG_PS_INVOKE"}, |
| {"bits": [3, 3], "name": "DEGAMMA_ENABLE"}, |
| {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"}, |
| {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"} |
| ] |
| }, |
| "CB_COVERAGE_OUT_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "COVERAGE_OUT_ENABLE"}, |
| {"bits": [1, 3], "name": "COVERAGE_OUT_MRT"}, |
| {"bits": [4, 5], "name": "COVERAGE_OUT_CHANNEL"}, |
| {"bits": [8, 11], "name": "COVERAGE_OUT_SAMPLES"} |
| ] |
| }, |
| "CB_DCC_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"}, |
| {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}, |
| {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"}, |
| {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"}, |
| {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"}, |
| {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"}, |
| {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"}, |
| {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"} |
| ] |
| }, |
| "CB_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERF_SEL"}, |
| {"bits": [10, 18], "name": "PERF_SEL1"}, |
| {"bits": [20, 23], "name": "CNTR_MODE"}, |
| {"bits": [24, 27], "name": "PERF_MODE1"}, |
| {"bits": [28, 31], "name": "PERF_MODE"} |
| ] |
| }, |
| "CB_PERFCOUNTER0_SELECT1": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERF_SEL2"}, |
| {"bits": [10, 18], "name": "PERF_SEL3"}, |
| {"bits": [24, 27], "name": "PERF_MODE3"}, |
| {"bits": [28, 31], "name": "PERF_MODE2"} |
| ] |
| }, |
| "CB_PERFCOUNTER1_SELECT": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERF_SEL"}, |
| {"bits": [28, 31], "name": "PERF_MODE"} |
| ] |
| }, |
| "CB_PERFCOUNTER_FILTER": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OP_FILTER_ENABLE"}, |
| {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"}, |
| {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"}, |
| {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"}, |
| {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"}, |
| {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"}, |
| {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"}, |
| {"bits": [13, 15], "name": "MRT_FILTER_SEL"}, |
| {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"}, |
| {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"}, |
| {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"}, |
| {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"} |
| ] |
| }, |
| "CB_RMI_GL2_CACHE_CONTROL": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "WritePolicy", "name": "CMASK_WR_POLICY"}, |
| {"bits": [2, 3], "enum_ref": "WritePolicy", "name": "FMASK_WR_POLICY"}, |
| {"bits": [4, 5], "enum_ref": "WritePolicy", "name": "DCC_WR_POLICY"}, |
| {"bits": [6, 7], "enum_ref": "WritePolicy", "name": "COLOR_WR_POLICY"}, |
| {"bits": [16, 17], "enum_ref": "ReadPolicy", "name": "CMASK_RD_POLICY"}, |
| {"bits": [18, 19], "enum_ref": "ReadPolicy", "name": "FMASK_RD_POLICY"}, |
| {"bits": [20, 21], "enum_ref": "ReadPolicy", "name": "DCC_RD_POLICY"}, |
| {"bits": [22, 23], "enum_ref": "ReadPolicy", "name": "COLOR_RD_POLICY"}, |
| {"bits": [24, 24], "name": "CMASK_L3_BYPASS"}, |
| {"bits": [25, 25], "name": "FMASK_L3_BYPASS"}, |
| {"bits": [26, 26], "name": "DCC_L3_BYPASS"}, |
| {"bits": [27, 27], "name": "COLOR_L3_BYPASS"}, |
| {"bits": [30, 30], "name": "FMASK_BIG_PAGE"}, |
| {"bits": [31, 31], "name": "COLOR_BIG_PAGE"} |
| ] |
| }, |
| "CB_SHADER_MASK": { |
| "fields": [ |
| {"bits": [0, 3], "name": "OUTPUT0_ENABLE"}, |
| {"bits": [4, 7], "name": "OUTPUT1_ENABLE"}, |
| {"bits": [8, 11], "name": "OUTPUT2_ENABLE"}, |
| {"bits": [12, 15], "name": "OUTPUT3_ENABLE"}, |
| {"bits": [16, 19], "name": "OUTPUT4_ENABLE"}, |
| {"bits": [20, 23], "name": "OUTPUT5_ENABLE"}, |
| {"bits": [24, 27], "name": "OUTPUT6_ENABLE"}, |
| {"bits": [28, 31], "name": "OUTPUT7_ENABLE"} |
| ] |
| }, |
| "CB_TARGET_MASK": { |
| "fields": [ |
| {"bits": [0, 3], "name": "TARGET0_ENABLE"}, |
| {"bits": [4, 7], "name": "TARGET1_ENABLE"}, |
| {"bits": [8, 11], "name": "TARGET2_ENABLE"}, |
| {"bits": [12, 15], "name": "TARGET3_ENABLE"}, |
| {"bits": [16, 19], "name": "TARGET4_ENABLE"}, |
| {"bits": [20, 23], "name": "TARGET5_ENABLE"}, |
| {"bits": [24, 27], "name": "TARGET6_ENABLE"}, |
| {"bits": [28, 31], "name": "TARGET7_ENABLE"} |
| ] |
| }, |
| "COHER_DEST_BASE_2": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DEST_BASE_256B"} |
| ] |
| }, |
| "COHER_DEST_BASE_HI_0": { |
| "fields": [ |
| {"bits": [0, 7], "name": "DEST_BASE_HI_256B"} |
| ] |
| }, |
| "COMPUTE_DDID_INDEX": { |
| "fields": [ |
| {"bits": [0, 10], "name": "INDEX"} |
| ] |
| }, |
| "COMPUTE_DESTINATION_EN_SE0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CU_EN"} |
| ] |
| }, |
| "COMPUTE_DIM_X": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SIZE"} |
| ] |
| }, |
| "COMPUTE_DISPATCH_ID": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DISPATCH_ID"} |
| ] |
| }, |
| "COMPUTE_DISPATCH_INITIATOR": { |
| "fields": [ |
| {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"}, |
| {"bits": [1, 1], "name": "PARTIAL_TG_EN"}, |
| {"bits": [2, 2], "name": "FORCE_START_AT_000"}, |
| {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"}, |
| {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"}, |
| {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"}, |
| {"bits": [6, 6], "name": "ORDER_MODE"}, |
| {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"}, |
| {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"}, |
| {"bits": [12, 12], "name": "RESERVED"}, |
| {"bits": [13, 13], "name": "TUNNEL_ENABLE"}, |
| {"bits": [14, 14], "name": "RESTORE"}, |
| {"bits": [15, 15], "name": "CS_W32_EN"} |
| ] |
| }, |
| "COMPUTE_DISPATCH_TUNNEL": { |
| "fields": [ |
| {"bits": [0, 9], "name": "OFF_DELAY"}, |
| {"bits": [10, 10], "name": "IMMEDIATE"} |
| ] |
| }, |
| "COMPUTE_MISC_RESERVED": { |
| "fields": [ |
| {"bits": [0, 1], "name": "SEND_SEID"}, |
| {"bits": [2, 2], "name": "RESERVED2"}, |
| {"bits": [3, 3], "name": "RESERVED3"}, |
| {"bits": [4, 4], "name": "RESERVED4"}, |
| {"bits": [5, 16], "name": "WAVE_ID_BASE"} |
| ] |
| }, |
| "COMPUTE_NUM_THREAD_X": { |
| "fields": [ |
| {"bits": [0, 15], "name": "NUM_THREAD_FULL"}, |
| {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"} |
| ] |
| }, |
| "COMPUTE_PERFCOUNT_ENABLE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"} |
| ] |
| }, |
| "COMPUTE_PGM_HI": { |
| "fields": [ |
| {"bits": [0, 7], "name": "DATA"} |
| ] |
| }, |
| "COMPUTE_PGM_RSRC1": { |
| "fields": [ |
| {"bits": [0, 5], "name": "VGPRS"}, |
| {"bits": [6, 9], "name": "SGPRS"}, |
| {"bits": [10, 11], "name": "PRIORITY"}, |
| {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, |
| {"bits": [20, 20], "name": "PRIV"}, |
| {"bits": [21, 21], "name": "DX10_CLAMP"}, |
| {"bits": [23, 23], "name": "IEEE_MODE"}, |
| {"bits": [24, 24], "name": "BULKY"}, |
| {"bits": [26, 26], "name": "FP16_OVFL"}, |
| {"bits": [29, 29], "name": "WGP_MODE"}, |
| {"bits": [30, 30], "name": "MEM_ORDERED"}, |
| {"bits": [31, 31], "name": "FWD_PROGRESS"} |
| ] |
| }, |
| "COMPUTE_PGM_RSRC2": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 7], "name": "TGID_X_EN"}, |
| {"bits": [8, 8], "name": "TGID_Y_EN"}, |
| {"bits": [9, 9], "name": "TGID_Z_EN"}, |
| {"bits": [10, 10], "name": "TG_SIZE_EN"}, |
| {"bits": [11, 12], "name": "TIDIG_COMP_CNT"}, |
| {"bits": [13, 14], "name": "EXCP_EN_MSB"}, |
| {"bits": [15, 23], "name": "LDS_SIZE"}, |
| {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"} |
| ] |
| }, |
| "COMPUTE_PGM_RSRC3": { |
| "fields": [ |
| {"bits": [0, 3], "name": "SHARED_VGPR_CNT"} |
| ] |
| }, |
| "COMPUTE_PIPELINESTAT_ENABLE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"} |
| ] |
| }, |
| "COMPUTE_RELAUNCH": { |
| "fields": [ |
| {"bits": [0, 29], "name": "PAYLOAD"}, |
| {"bits": [30, 30], "name": "IS_EVENT"}, |
| {"bits": [31, 31], "name": "IS_STATE"} |
| ] |
| }, |
| "COMPUTE_REQ_CTRL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SOFT_GROUPING_EN"}, |
| {"bits": [1, 4], "name": "NUMBER_OF_REQUESTS_PER_CU"}, |
| {"bits": [5, 8], "name": "SOFT_GROUPING_ALLOCATION_TIMEOUT"}, |
| {"bits": [9, 9], "name": "HARD_LOCK_HYSTERESIS"}, |
| {"bits": [10, 14], "name": "HARD_LOCK_LOW_THRESHOLD"}, |
| {"bits": [15, 15], "name": "PRODUCER_REQUEST_LOCKOUT"}, |
| {"bits": [16, 16], "name": "GLOBAL_SCANNING_EN"}, |
| {"bits": [17, 19], "name": "ALLOCATION_RATE_THROTTLING_THRESHOLD"}, |
| {"bits": [20, 26], "name": "DEDICATED_PREALLOCATION_BUFFER_LIMIT"} |
| ] |
| }, |
| "COMPUTE_RESOURCE_LIMITS": { |
| "fields": [ |
| {"bits": [0, 9], "name": "WAVES_PER_SH"}, |
| {"bits": [12, 15], "name": "TG_PER_CU"}, |
| {"bits": [16, 21], "name": "LOCK_THRESHOLD"}, |
| {"bits": [22, 22], "name": "SIMD_DEST_CNTL"}, |
| {"bits": [23, 23], "name": "FORCE_SIMD_DIST"}, |
| {"bits": [24, 26], "name": "CU_GROUP_COUNT"} |
| ] |
| }, |
| "COMPUTE_RESTART_X": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RESTART"} |
| ] |
| }, |
| "COMPUTE_START_X": { |
| "fields": [ |
| {"bits": [0, 31], "name": "START"} |
| ] |
| }, |
| "COMPUTE_THREADGROUP_ID": { |
| "fields": [ |
| {"bits": [0, 31], "name": "THREADGROUP_ID"} |
| ] |
| }, |
| "COMPUTE_THREAD_TRACE_ENABLE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"} |
| ] |
| }, |
| "COMPUTE_TMPRING_SIZE": { |
| "fields": [ |
| {"bits": [0, 11], "name": "WAVES"}, |
| {"bits": [12, 24], "name": "WAVESIZE"} |
| ] |
| }, |
| "COMPUTE_VMID": { |
| "fields": [ |
| {"bits": [0, 3], "name": "DATA"} |
| ] |
| }, |
| "COMPUTE_WAVE_RESTORE_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ADDR"} |
| ] |
| }, |
| "COMPUTE_WAVE_RESTORE_ADDR_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ADDR"} |
| ] |
| }, |
| "CPF_LATENCY_STATS_SELECT": { |
| "fields": [ |
| {"bits": [0, 3], "name": "INDEX"}, |
| {"bits": [30, 30], "name": "CLEAR"}, |
| {"bits": [31, 31], "name": "ENABLE"} |
| ] |
| }, |
| "CPF_TC_PERF_COUNTER_WINDOW_SELECT": { |
| "fields": [ |
| {"bits": [0, 2], "name": "INDEX"}, |
| {"bits": [30, 30], "name": "ALWAYS"}, |
| {"bits": [31, 31], "name": "ENABLE"} |
| ] |
| }, |
| "CPG_LATENCY_STATS_SELECT": { |
| "fields": [ |
| {"bits": [0, 4], "name": "INDEX"}, |
| {"bits": [30, 30], "name": "CLEAR"}, |
| {"bits": [31, 31], "name": "ENABLE"} |
| ] |
| }, |
| "CPG_PERFCOUNTER0_SELECT1": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL2"}, |
| {"bits": [10, 19], "name": "PERF_SEL3"}, |
| {"bits": [24, 27], "name": "CNTR_MODE3"}, |
| {"bits": [28, 31], "name": "CNTR_MODE2"} |
| ] |
| }, |
| "CPG_PERFCOUNTER1_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PERFCOUNTER_HI"} |
| ] |
| }, |
| "CPG_PERFCOUNTER1_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PERFCOUNTER_LO"} |
| ] |
| }, |
| "CPG_PERFCOUNTER1_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL"}, |
| {"bits": [10, 19], "name": "PERF_SEL1"}, |
| {"bits": [20, 23], "name": "SPM_MODE"}, |
| {"bits": [24, 27], "name": "CNTR_MODE1"}, |
| {"bits": [28, 31], "name": "CNTR_MODE0"} |
| ] |
| }, |
| "CPG_TC_PERF_COUNTER_WINDOW_SELECT": { |
| "fields": [ |
| {"bits": [0, 4], "name": "INDEX"}, |
| {"bits": [30, 30], "name": "ALWAYS"}, |
| {"bits": [31, 31], "name": "ENABLE"} |
| ] |
| }, |
| "CP_APPEND_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "MEM_ADDR_HI"}, |
| {"bits": [16, 16], "name": "CS_PS_SEL"}, |
| {"bits": [25, 26], "name": "CACHE_POLICY"}, |
| {"bits": [29, 31], "name": "COMMAND"} |
| ] |
| }, |
| "CP_APPEND_ADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "MEM_ADDR_LO"} |
| ] |
| }, |
| "CP_APPEND_LAST_CS_FENCE_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "LAST_FENCE"} |
| ] |
| }, |
| "CP_CE_COUNTER": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"} |
| ] |
| }, |
| "CP_CE_IB1_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "IB1_BASE_HI"} |
| ] |
| }, |
| "CP_CE_IB1_BASE_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "IB1_BASE_LO"} |
| ] |
| }, |
| "CP_CE_IB1_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB1_BUFSZ"} |
| ] |
| }, |
| "CP_CE_IB1_CMD_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB1_CMD_REQSZ"} |
| ] |
| }, |
| "CP_CE_IB1_OFFSET": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB1_OFFSET"} |
| ] |
| }, |
| "CP_CE_IB2_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "IB2_BASE_HI"} |
| ] |
| }, |
| "CP_CE_IB2_BASE_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "IB2_BASE_LO"} |
| ] |
| }, |
| "CP_CE_IB2_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB2_BUFSZ"} |
| ] |
| }, |
| "CP_CE_IB2_CMD_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB2_CMD_REQSZ"} |
| ] |
| }, |
| "CP_CE_INIT_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "INIT_BASE_HI"} |
| ] |
| }, |
| "CP_CE_INIT_BASE_LO": { |
| "fields": [ |
| {"bits": [5, 31], "name": "INIT_BASE_LO"} |
| ] |
| }, |
| "CP_CE_INIT_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 11], "name": "INIT_BUFSZ"} |
| ] |
| }, |
| "CP_CE_INIT_CMD_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 11], "name": "INIT_CMD_REQSZ"} |
| ] |
| }, |
| "CP_COHER_BASE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "COHER_BASE_256B"} |
| ] |
| }, |
| "CP_COHER_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 7], "name": "COHER_BASE_HI_256B"} |
| ] |
| }, |
| "CP_COHER_CNTL": { |
| "fields": [ |
| {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"}, |
| {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"}, |
| {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"}, |
| {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"}, |
| {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"}, |
| {"bits": [22, 22], "name": "TCL1_ACTION_ENA"}, |
| {"bits": [23, 23], "name": "TC_ACTION_ENA"}, |
| {"bits": [25, 25], "name": "CB_ACTION_ENA"}, |
| {"bits": [26, 26], "name": "DB_ACTION_ENA"}, |
| {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"}, |
| {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"}, |
| {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"}, |
| {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"} |
| ] |
| }, |
| "CP_COHER_SIZE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "COHER_SIZE_256B"} |
| ] |
| }, |
| "CP_COHER_SIZE_HI": { |
| "fields": [ |
| {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"} |
| ] |
| }, |
| "CP_COHER_START_DELAY": { |
| "fields": [ |
| {"bits": [0, 5], "name": "START_DELAY_COUNT"} |
| ] |
| }, |
| "CP_COHER_STATUS": { |
| "fields": [ |
| {"bits": [24, 25], "name": "MEID"}, |
| {"bits": [31, 31], "name": "STATUS"} |
| ] |
| }, |
| "CP_CPC_BUSY_STAT": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"}, |
| {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"}, |
| {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"}, |
| {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"}, |
| {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"}, |
| {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"}, |
| {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"}, |
| {"bits": [7, 7], "name": "MEC1_TC_BUSY"}, |
| {"bits": [8, 8], "name": "MEC1_DMA_BUSY"}, |
| {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"}, |
| {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"}, |
| {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"}, |
| {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"}, |
| {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"}, |
| {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"}, |
| {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"}, |
| {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"}, |
| {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"}, |
| {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"}, |
| {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"}, |
| {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"}, |
| {"bits": [23, 23], "name": "MEC2_TC_BUSY"}, |
| {"bits": [24, 24], "name": "MEC2_DMA_BUSY"}, |
| {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"}, |
| {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"}, |
| {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"}, |
| {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"}, |
| {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"} |
| ] |
| }, |
| "CP_CPC_BUSY_STAT2": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MES_LOAD_BUSY"}, |
| {"bits": [2, 2], "name": "MES_MUTEX_BUSY"}, |
| {"bits": [3, 3], "name": "MES_MESSAGE_BUSY"}, |
| {"bits": [7, 7], "name": "MES_TC_BUSY"}, |
| {"bits": [8, 8], "name": "MES_DMA_BUSY"}, |
| {"bits": [10, 10], "name": "MES_PIPE0_BUSY"}, |
| {"bits": [11, 11], "name": "MES_PIPE1_BUSY"}, |
| {"bits": [12, 12], "name": "MES_PIPE2_BUSY"}, |
| {"bits": [13, 13], "name": "MES_PIPE3_BUSY"} |
| ] |
| }, |
| "CP_CPC_GRBM_FREE_COUNT": { |
| "fields": [ |
| {"bits": [0, 5], "name": "FREE_COUNT"} |
| ] |
| }, |
| "CP_CPC_HALT_HYST_COUNT": { |
| "fields": [ |
| {"bits": [0, 3], "name": "COUNT"} |
| ] |
| }, |
| "CP_CPC_PRIV_VIOLATION_ADDR": { |
| "fields": [ |
| {"bits": [0, 15], "name": "PRIV_VIOLATION_ADDR"} |
| ] |
| }, |
| "CP_CPC_SCRATCH_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_DATA"} |
| ] |
| }, |
| "CP_CPC_SCRATCH_INDEX": { |
| "fields": [ |
| {"bits": [0, 8], "name": "SCRATCH_INDEX"}, |
| {"bits": [31, 31], "name": "SCRATCH_INDEX_64BIT_MODE"} |
| ] |
| }, |
| "CP_CPC_STALLED_STAT1": { |
| "fields": [ |
| {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"}, |
| {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"}, |
| {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"}, |
| {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"}, |
| {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"}, |
| {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"}, |
| {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"}, |
| {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"}, |
| {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"}, |
| {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"}, |
| {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"}, |
| {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"}, |
| {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"}, |
| {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"}, |
| {"bits": [25, 25], "name": "GCRIU_WAITING_ON_FREE"} |
| ] |
| }, |
| "CP_CPC_STATUS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MEC1_BUSY"}, |
| {"bits": [1, 1], "name": "MEC2_BUSY"}, |
| {"bits": [2, 2], "name": "DC0_BUSY"}, |
| {"bits": [3, 3], "name": "DC1_BUSY"}, |
| {"bits": [4, 4], "name": "RCIU1_BUSY"}, |
| {"bits": [5, 5], "name": "RCIU2_BUSY"}, |
| {"bits": [6, 6], "name": "ROQ1_BUSY"}, |
| {"bits": [7, 7], "name": "ROQ2_BUSY"}, |
| {"bits": [10, 10], "name": "TCIU_BUSY"}, |
| {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"}, |
| {"bits": [12, 12], "name": "QU_BUSY"}, |
| {"bits": [13, 13], "name": "UTCL2IU_BUSY"}, |
| {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"}, |
| {"bits": [15, 15], "name": "GCRIU_BUSY"}, |
| {"bits": [16, 16], "name": "MES_BUSY"}, |
| {"bits": [17, 17], "name": "MES_SCRATCH_RAM_BUSY"}, |
| {"bits": [18, 18], "name": "RCIU3_BUSY"}, |
| {"bits": [19, 19], "name": "MES_INSTRUCTION_CACHE_BUSY"}, |
| {"bits": [29, 29], "name": "CPG_CPC_BUSY"}, |
| {"bits": [30, 30], "name": "CPF_CPC_BUSY"}, |
| {"bits": [31, 31], "name": "CPC_BUSY"} |
| ] |
| }, |
| "CP_CPF_BUSY_STAT": { |
| "fields": [ |
| {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"}, |
| {"bits": [1, 1], "name": "CSF_RING_BUSY"}, |
| {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"}, |
| {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"}, |
| {"bits": [4, 4], "name": "CSF_STATE_BUSY"}, |
| {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"}, |
| {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"}, |
| {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"}, |
| {"bits": [8, 8], "name": "CSF_INPUT_BUSY"}, |
| {"bits": [9, 9], "name": "CSF_DATA_BUSY"}, |
| {"bits": [10, 10], "name": "CSF_CE_DATA_BUSY"}, |
| {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"}, |
| {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"}, |
| {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"}, |
| {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"}, |
| {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"}, |
| {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"}, |
| {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"}, |
| {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"}, |
| {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"}, |
| {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"}, |
| {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"}, |
| {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"}, |
| {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"}, |
| {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"}, |
| {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"}, |
| {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"}, |
| {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"}, |
| {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"}, |
| {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"}, |
| {"bits": [30, 30], "name": "HQD_PQ_BUSY"}, |
| {"bits": [31, 31], "name": "HQD_IB_BUSY"} |
| ] |
| }, |
| "CP_CPF_BUSY_STAT2": { |
| "fields": [ |
| {"bits": [12, 12], "name": "MES_HQD_DISPATCH_BUSY"}, |
| {"bits": [14, 14], "name": "MES_HQD_DMA_OFFLOAD_BUSY"}, |
| {"bits": [17, 17], "name": "MES_HQD_MESSAGE_BUSY"}, |
| {"bits": [18, 18], "name": "MES_HQD_PQ_FETCHER_BUSY"}, |
| {"bits": [22, 22], "name": "MES_HQD_CONSUMED_RPTR_BUSY"}, |
| {"bits": [23, 23], "name": "MES_HQD_FETCHER_ARB_BUSY"}, |
| {"bits": [24, 24], "name": "MES_HQD_ROQ_ALIGN_BUSY"}, |
| {"bits": [27, 27], "name": "MES_HQD_ROQ_PQ_BUSY"}, |
| {"bits": [30, 30], "name": "MES_HQD_PQ_BUSY"} |
| ] |
| }, |
| "CP_CPF_GRBM_FREE_COUNT": { |
| "fields": [ |
| {"bits": [0, 2], "name": "FREE_COUNT"} |
| ] |
| }, |
| "CP_CPF_STALLED_STAT1": { |
| "fields": [ |
| {"bits": [0, 0], "name": "RING_FETCHING_DATA"}, |
| {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"}, |
| {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"}, |
| {"bits": [3, 3], "name": "STATE_FETCHING_DATA"}, |
| {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"}, |
| {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"}, |
| {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"}, |
| {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"}, |
| {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"}, |
| {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"}, |
| {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"}, |
| {"bits": [12, 12], "name": "DATA_FETCHING_DATA"}, |
| {"bits": [13, 13], "name": "GCRIU_WAIT_ON_FREE"} |
| ] |
| }, |
| "CP_CPF_STATUS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"}, |
| {"bits": [1, 1], "name": "CSF_BUSY"}, |
| {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"}, |
| {"bits": [5, 5], "name": "ROQ_RING_BUSY"}, |
| {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"}, |
| {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"}, |
| {"bits": [8, 8], "name": "ROQ_STATE_BUSY"}, |
| {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"}, |
| {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"}, |
| {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"}, |
| {"bits": [12, 12], "name": "SEMAPHORE_BUSY"}, |
| {"bits": [13, 13], "name": "INTERRUPT_BUSY"}, |
| {"bits": [14, 14], "name": "TCIU_BUSY"}, |
| {"bits": [15, 15], "name": "HQD_BUSY"}, |
| {"bits": [16, 16], "name": "PRT_BUSY"}, |
| {"bits": [17, 17], "name": "UTCL2IU_BUSY"}, |
| {"bits": [18, 18], "name": "RCIU_BUSY"}, |
| {"bits": [19, 19], "name": "RCIU_GFX_BUSY"}, |
| {"bits": [20, 20], "name": "RCIU_CMP_BUSY"}, |
| {"bits": [21, 21], "name": "ROQ_DATA_BUSY"}, |
| {"bits": [22, 22], "name": "ROQ_CE_DATA_BUSY"}, |
| {"bits": [23, 23], "name": "GCRIU_BUSY"}, |
| {"bits": [24, 24], "name": "MES_HQD_BUSY"}, |
| {"bits": [26, 26], "name": "CPF_GFX_BUSY"}, |
| {"bits": [27, 27], "name": "CPF_CMP_BUSY"}, |
| {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"}, |
| {"bits": [30, 30], "name": "CPC_CPF_BUSY"}, |
| {"bits": [31, 31], "name": "CPF_BUSY"} |
| ] |
| }, |
| "CP_DB_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "DB_BASE_HI"} |
| ] |
| }, |
| "CP_DB_BASE_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "DB_BASE_LO"} |
| ] |
| }, |
| "CP_DB_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "DB_BUFSZ"} |
| ] |
| }, |
| "CP_DB_CMD_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "DB_CMD_REQSZ"} |
| ] |
| }, |
| "CP_DMA_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"}, |
| {"bits": [1, 1], "name": "WATCH_CONTROL"}, |
| {"bits": [4, 5], "name": "MIN_AVAILSZ"}, |
| {"bits": [16, 24], "name": "BUFFER_DEPTH"}, |
| {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"}, |
| {"bits": [29, 29], "name": "PIO_FIFO_FULL"}, |
| {"bits": [30, 31], "name": "PIO_COUNT"} |
| ] |
| }, |
| "CP_DMA_ME_CMD_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ADDR_HI"}, |
| {"bits": [16, 31], "name": "RSVD"} |
| ] |
| }, |
| "CP_DMA_ME_CMD_ADDR_LO": { |
| "fields": [ |
| {"bits": [0, 1], "name": "RSVD"}, |
| {"bits": [2, 31], "name": "ADDR_LO"} |
| ] |
| }, |
| "CP_DMA_ME_COMMAND": { |
| "fields": [ |
| {"bits": [0, 25], "name": "BYTE_COUNT"}, |
| {"bits": [26, 26], "name": "SAS"}, |
| {"bits": [27, 27], "name": "DAS"}, |
| {"bits": [28, 28], "name": "SAIC"}, |
| {"bits": [29, 29], "name": "DAIC"}, |
| {"bits": [30, 30], "name": "RAW_WAIT"}, |
| {"bits": [31, 31], "name": "DIS_WC"} |
| ] |
| }, |
| "CP_DMA_ME_DST_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DST_ADDR"} |
| ] |
| }, |
| "CP_DMA_ME_DST_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "DST_ADDR_HI"} |
| ] |
| }, |
| "CP_DMA_ME_SRC_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SRC_ADDR"} |
| ] |
| }, |
| "CP_DMA_ME_SRC_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "SRC_ADDR_HI"} |
| ] |
| }, |
| "CP_DMA_PFP_CONTROL": { |
| "fields": [ |
| {"bits": [10, 10], "name": "MEMLOG_CLEAR"}, |
| {"bits": [13, 14], "name": "SRC_CACHE_POLICY"}, |
| {"bits": [15, 15], "name": "SRC_VOLATLE"}, |
| {"bits": [20, 21], "name": "DST_SELECT"}, |
| {"bits": [25, 26], "name": "DST_CACHE_POLICY"}, |
| {"bits": [27, 27], "name": "DST_VOLATLE"}, |
| {"bits": [29, 30], "name": "SRC_SELECT"} |
| ] |
| }, |
| "CP_DMA_READ_TAGS": { |
| "fields": [ |
| {"bits": [0, 25], "name": "DMA_READ_TAG"}, |
| {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"} |
| ] |
| }, |
| "CP_DRAW_OBJECT": { |
| "fields": [ |
| {"bits": [0, 31], "name": "OBJECT"} |
| ] |
| }, |
| "CP_DRAW_WINDOW_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"}, |
| {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"}, |
| {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"}, |
| {"bits": [8, 8], "name": "MODE"} |
| ] |
| }, |
| "CP_DRAW_WINDOW_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WINDOW_HI"} |
| ] |
| }, |
| "CP_DRAW_WINDOW_LO": { |
| "fields": [ |
| {"bits": [0, 15], "name": "MIN"}, |
| {"bits": [16, 31], "name": "MAX"} |
| ] |
| }, |
| "CP_DRAW_WINDOW_MASK_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WINDOW_MASK_HI"} |
| ] |
| }, |
| "CP_EOP_DONE_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ADDR_HI"} |
| ] |
| }, |
| "CP_EOP_DONE_ADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "ADDR_LO"} |
| ] |
| }, |
| "CP_EOP_DONE_CNTX_ID": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CNTX_ID"} |
| ] |
| }, |
| "CP_EOP_DONE_DATA_CNTL": { |
| "fields": [ |
| {"bits": [16, 17], "name": "DST_SEL"}, |
| {"bits": [20, 21], "name": "ACTION_PIPE_ID"}, |
| {"bits": [22, 23], "name": "ACTION_ID"}, |
| {"bits": [24, 26], "name": "INT_SEL"}, |
| {"bits": [29, 31], "name": "DATA_SEL"} |
| ] |
| }, |
| "CP_EOP_DONE_DATA_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DATA_HI"} |
| ] |
| }, |
| "CP_EOP_DONE_DATA_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DATA_LO"} |
| ] |
| }, |
| "CP_EOP_DONE_EVENT_CNTL": { |
| "fields": [ |
| {"bits": [12, 23], "name": "GCR_CNTL"}, |
| {"bits": [25, 26], "name": "CACHE_POLICY"}, |
| {"bits": [27, 27], "name": "EOP_VOLATILE"}, |
| {"bits": [28, 28], "name": "EXECUTE"} |
| ] |
| }, |
| "CP_EOP_LAST_FENCE_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "LAST_FENCE_HI"} |
| ] |
| }, |
| "CP_EOP_LAST_FENCE_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "LAST_FENCE_LO"} |
| ] |
| }, |
| "CP_IB2_OFFSET": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB2_OFFSET"} |
| ] |
| }, |
| "CP_IB2_PREAMBLE_BEGIN": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"} |
| ] |
| }, |
| "CP_IB2_PREAMBLE_END": { |
| "fields": [ |
| {"bits": [0, 19], "name": "IB2_PREAMBLE_END"} |
| ] |
| }, |
| "CP_INDEX_TYPE": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"} |
| ] |
| }, |
| "CP_ME_COHER_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "DEST_BASE_0_ENA"}, |
| {"bits": [1, 1], "name": "DEST_BASE_1_ENA"}, |
| {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"}, |
| {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"}, |
| {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"}, |
| {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"}, |
| {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"}, |
| {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"}, |
| {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"}, |
| {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"}, |
| {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"}, |
| {"bits": [19, 19], "name": "DEST_BASE_2_ENA"}, |
| {"bits": [21, 21], "name": "DEST_BASE_3_ENA"} |
| ] |
| }, |
| "CP_ME_COHER_STATUS": { |
| "fields": [ |
| {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"}, |
| {"bits": [31, 31], "name": "STATUS"} |
| ] |
| }, |
| "CP_ME_MC_RADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ME_MC_RADDR_HI"}, |
| {"bits": [22, 23], "name": "CACHE_POLICY"} |
| ] |
| }, |
| "CP_ME_MC_RADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "ME_MC_RADDR_LO"} |
| ] |
| }, |
| "CP_ME_MC_WADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ME_MC_WADDR_HI"}, |
| {"bits": [22, 23], "name": "CACHE_POLICY"} |
| ] |
| }, |
| "CP_ME_MC_WADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "ME_MC_WADDR_LO"} |
| ] |
| }, |
| "CP_ME_MC_WDATA_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ME_MC_WDATA_HI"} |
| ] |
| }, |
| "CP_ME_MC_WDATA_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ME_MC_WDATA_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT0_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT0_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT1_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT1_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT2_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT2_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT3_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_NEEDED_COUNT3_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT0_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT0_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT1_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT1_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT2_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT2_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT3_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"} |
| ] |
| }, |
| "CP_NUM_PRIM_WRITTEN_COUNT3_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"} |
| ] |
| }, |
| "CP_PA_CINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_PA_CINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_PA_CPRIM_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CPRIM_COUNT_HI"} |
| ] |
| }, |
| "CP_PA_CPRIM_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CPRIM_COUNT_LO"} |
| ] |
| }, |
| "CP_PERFMON_CNTL": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, |
| {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"}, |
| {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"}, |
| {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} |
| ] |
| }, |
| "CP_PERFMON_CNTX_CNTL": { |
| "fields": [ |
| {"bits": [31, 31], "name": "PERFMON_ENABLE"} |
| ] |
| }, |
| "CP_PFP_ATOMIC_PREOP_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"} |
| ] |
| }, |
| "CP_PFP_ATOMIC_PREOP_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"} |
| ] |
| }, |
| "CP_PFP_COMPLETION_STATUS": { |
| "fields": [ |
| {"bits": [0, 1], "name": "STATUS"} |
| ] |
| }, |
| "CP_PFP_GDS_ATOMIC0_PREOP_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"} |
| ] |
| }, |
| "CP_PFP_GDS_ATOMIC0_PREOP_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"} |
| ] |
| }, |
| "CP_PFP_GDS_ATOMIC1_PREOP_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"} |
| ] |
| }, |
| "CP_PFP_GDS_ATOMIC1_PREOP_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"} |
| ] |
| }, |
| "CP_PFP_IB_CONTROL": { |
| "fields": [ |
| {"bits": [0, 7], "name": "IB_EN"} |
| ] |
| }, |
| "CP_PFP_LOAD_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "CONFIG_REG_EN"}, |
| {"bits": [1, 1], "name": "CNTX_REG_EN"}, |
| {"bits": [15, 15], "name": "UCONFIG_REG_EN"}, |
| {"bits": [16, 16], "name": "SH_GFX_REG_EN"}, |
| {"bits": [24, 24], "name": "SH_CS_REG_EN"} |
| ] |
| }, |
| "CP_PFP_METADATA_BASE_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ADDR_LO"} |
| ] |
| }, |
| "CP_PIPEID": { |
| "fields": [ |
| {"bits": [0, 1], "name": "PIPE_ID"} |
| ] |
| }, |
| "CP_PIPE_STATS_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"} |
| ] |
| }, |
| "CP_PIPE_STATS_ADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"} |
| ] |
| }, |
| "CP_PIPE_STATS_CONTROL": { |
| "fields": [ |
| {"bits": [25, 26], "name": "CACHE_POLICY"} |
| ] |
| }, |
| "CP_PRED_NOT_VISIBLE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "NOT_VISIBLE"} |
| ] |
| }, |
| "CP_RB_OFFSET": { |
| "fields": [ |
| {"bits": [0, 19], "name": "RB_OFFSET"} |
| ] |
| }, |
| "CP_SAMPLE_STATUS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "Z_PASS_ACITVE"}, |
| {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"}, |
| {"bits": [2, 2], "name": "PIPELINE_ACTIVE"}, |
| {"bits": [3, 3], "name": "STIPPLE_ACTIVE"}, |
| {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"}, |
| {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"}, |
| {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"}, |
| {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"} |
| ] |
| }, |
| "CP_SC_PSINVOC_COUNT0_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"} |
| ] |
| }, |
| "CP_SC_PSINVOC_COUNT0_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"} |
| ] |
| }, |
| "CP_SC_PSINVOC_COUNT1_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "OBSOLETE"} |
| ] |
| }, |
| "CP_SEM_WAIT_TIMER": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SEM_WAIT_TIMER"} |
| ] |
| }, |
| "CP_SIG_SEM_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "SEM_ADDR_HI"}, |
| {"bits": [16, 16], "name": "SEM_USE_MAILBOX"}, |
| {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"}, |
| {"bits": [24, 25], "name": "SEM_CLIENT_CODE"}, |
| {"bits": [29, 31], "name": "SEM_SELECT"} |
| ] |
| }, |
| "CP_SIG_SEM_ADDR_LO": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SEM_PRIV"}, |
| {"bits": [3, 31], "name": "SEM_ADDR_LO"} |
| ] |
| }, |
| "CP_STREAM_OUT_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"} |
| ] |
| }, |
| "CP_STREAM_OUT_ADDR_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"} |
| ] |
| }, |
| "CP_STRMOUT_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"} |
| ] |
| }, |
| "CP_ST_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "ST_BASE_HI"} |
| ] |
| }, |
| "CP_ST_BASE_LO": { |
| "fields": [ |
| {"bits": [2, 31], "name": "ST_BASE_LO"} |
| ] |
| }, |
| "CP_ST_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "ST_BUFSZ"} |
| ] |
| }, |
| "CP_ST_CMD_BUFSZ": { |
| "fields": [ |
| {"bits": [0, 19], "name": "ST_CMD_REQSZ"} |
| ] |
| }, |
| "CP_VGT_CSINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_CSINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_DSINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_DSINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_GSINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_GSINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_GSPRIM_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_GSPRIM_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_HSINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_HSINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_IAPRIM_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_IAPRIM_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_IAVERT_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "IAVERT_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_IAVERT_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "IAVERT_COUNT_LO"} |
| ] |
| }, |
| "CP_VGT_VSINVOC_COUNT_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"} |
| ] |
| }, |
| "CP_VGT_VSINVOC_COUNT_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"} |
| ] |
| }, |
| "CP_VMID": { |
| "fields": [ |
| {"bits": [0, 3], "name": "VMID"} |
| ] |
| }, |
| "CP_WAIT_REG_MEM_TIMEOUT": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"} |
| ] |
| }, |
| "CS_COPY_STATE": { |
| "fields": [ |
| {"bits": [0, 2], "name": "SRC_STATE_ID"} |
| ] |
| }, |
| "DB_ALPHA_TO_MASK": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"}, |
| {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"}, |
| {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"}, |
| {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"}, |
| {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"}, |
| {"bits": [16, 16], "name": "OFFSET_ROUND"} |
| ] |
| }, |
| "DB_COUNT_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"}, |
| {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"}, |
| {"bits": [2, 2], "name": "DISABLE_CONSERVATIVE_ZPASS_COUNTS"}, |
| {"bits": [3, 3], "name": "ENHANCED_CONSERVATIVE_ZPASS_COUNTS"}, |
| {"bits": [4, 6], "name": "SAMPLE_RATE"}, |
| {"bits": [8, 11], "name": "ZPASS_ENABLE"}, |
| {"bits": [12, 15], "name": "ZFAIL_ENABLE"}, |
| {"bits": [16, 19], "name": "SFAIL_ENABLE"}, |
| {"bits": [20, 23], "name": "DBFAIL_ENABLE"}, |
| {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"}, |
| {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"} |
| ] |
| }, |
| "DB_DEPTH_BOUNDS_MAX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MAX"} |
| ] |
| }, |
| "DB_DEPTH_BOUNDS_MIN": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MIN"} |
| ] |
| }, |
| "DB_DEPTH_CLEAR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DEPTH_CLEAR"} |
| ] |
| }, |
| "DB_DEPTH_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "STENCIL_ENABLE"}, |
| {"bits": [1, 1], "name": "Z_ENABLE"}, |
| {"bits": [2, 2], "name": "Z_WRITE_ENABLE"}, |
| {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"}, |
| {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"}, |
| {"bits": [7, 7], "name": "BACKFACE_ENABLE"}, |
| {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"}, |
| {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"}, |
| {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"}, |
| {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"} |
| ] |
| }, |
| "DB_DEPTH_SIZE_XY": { |
| "fields": [ |
| {"bits": [0, 13], "name": "X_MAX"}, |
| {"bits": [16, 29], "name": "Y_MAX"} |
| ] |
| }, |
| "DB_DEPTH_VIEW": { |
| "fields": [ |
| {"bits": [0, 10], "name": "SLICE_START"}, |
| {"bits": [11, 12], "name": "SLICE_START_HI"}, |
| {"bits": [13, 23], "name": "SLICE_MAX"}, |
| {"bits": [24, 24], "name": "Z_READ_ONLY"}, |
| {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}, |
| {"bits": [26, 29], "name": "MIPID"}, |
| {"bits": [30, 31], "name": "SLICE_MAX_HI"} |
| ] |
| }, |
| "DB_DFSM_CONTROL": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"}, |
| {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"}, |
| {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"} |
| ] |
| }, |
| "DB_EQAA": { |
| "fields": [ |
| {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"}, |
| {"bits": [4, 6], "name": "PS_ITER_SAMPLES"}, |
| {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"}, |
| {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"}, |
| {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"}, |
| {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"}, |
| {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"}, |
| {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"}, |
| {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"}, |
| {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"}, |
| {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"}, |
| {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"} |
| ] |
| }, |
| "DB_HTILE_DATA_BASE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BASE_256B"} |
| ] |
| }, |
| "DB_HTILE_SURFACE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "RESERVED_FIELD_1"}, |
| {"bits": [1, 1], "name": "FULL_CACHE"}, |
| {"bits": [2, 2], "name": "RESERVED_FIELD_2"}, |
| {"bits": [3, 3], "name": "RESERVED_FIELD_3"}, |
| {"bits": [4, 9], "name": "RESERVED_FIELD_4"}, |
| {"bits": [10, 15], "name": "RESERVED_FIELD_5"}, |
| {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"}, |
| {"bits": [17, 17], "name": "RESERVED_FIELD_6"}, |
| {"bits": [18, 18], "name": "PIPE_ALIGNED"}, |
| {"bits": [19, 20], "name": "VRS_HTILE_ENCODING"} |
| ] |
| }, |
| "DB_OCCLUSION_COUNT0_HI": { |
| "fields": [ |
| {"bits": [0, 30], "name": "COUNT_HI"} |
| ] |
| }, |
| "DB_OCCLUSION_COUNT0_LOW": { |
| "fields": [ |
| {"bits": [0, 31], "name": "COUNT_LOW"} |
| ] |
| }, |
| "DB_PRELOAD_CONTROL": { |
| "fields": [ |
| {"bits": [0, 7], "name": "START_X"}, |
| {"bits": [8, 15], "name": "START_Y"}, |
| {"bits": [16, 23], "name": "MAX_X"}, |
| {"bits": [24, 31], "name": "MAX_Y"} |
| ] |
| }, |
| "DB_RENDER_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"}, |
| {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"}, |
| {"bits": [2, 2], "name": "DEPTH_COPY"}, |
| {"bits": [3, 3], "name": "STENCIL_COPY"}, |
| {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"}, |
| {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"}, |
| {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"}, |
| {"bits": [7, 7], "name": "COPY_CENTROID"}, |
| {"bits": [8, 11], "name": "COPY_SAMPLE"}, |
| {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}, |
| {"bits": [13, 13], "name": "PS_INVOKE_DISABLE"} |
| ] |
| }, |
| "DB_RENDER_OVERRIDE": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"}, |
| {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"}, |
| {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"}, |
| {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"}, |
| {"bits": [7, 7], "name": "FAST_Z_DISABLE"}, |
| {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"}, |
| {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"}, |
| {"bits": [10, 10], "name": "FORCE_COLOR_KILL"}, |
| {"bits": [11, 11], "name": "FORCE_Z_READ"}, |
| {"bits": [12, 12], "name": "FORCE_STENCIL_READ"}, |
| {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"}, |
| {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"}, |
| {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"}, |
| {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"}, |
| {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"}, |
| {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"}, |
| {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"}, |
| {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"}, |
| {"bits": [27, 27], "name": "FORCE_Z_DIRTY"}, |
| {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"}, |
| {"bits": [29, 29], "name": "FORCE_Z_VALID"}, |
| {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"}, |
| {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"} |
| ] |
| }, |
| "DB_RENDER_OVERRIDE2": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"}, |
| {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"}, |
| {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"}, |
| {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"}, |
| {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"}, |
| {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"}, |
| {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"}, |
| {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"}, |
| {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"}, |
| {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"}, |
| {"bits": [15, 17], "name": "HIS_SFUNC_FF"}, |
| {"bits": [18, 20], "name": "HIS_SFUNC_BF"}, |
| {"bits": [21, 21], "name": "PRESERVE_ZRANGE"}, |
| {"bits": [22, 22], "name": "PRESERVE_SRESULTS"}, |
| {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}, |
| {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"}, |
| {"bits": [26, 26], "name": "FORCE_VRS_RATE_FINE"}, |
| {"bits": [27, 28], "name": "CENTROID_COMPUTATION_MODE"} |
| ] |
| }, |
| "DB_RESERVED_REG_1": { |
| "fields": [ |
| {"bits": [0, 10], "name": "FIELD_1"}, |
| {"bits": [11, 21], "name": "FIELD_2"} |
| ] |
| }, |
| "DB_RESERVED_REG_2": { |
| "fields": [ |
| {"bits": [0, 3], "name": "FIELD_1"}, |
| {"bits": [4, 7], "name": "FIELD_2"}, |
| {"bits": [8, 12], "name": "FIELD_3"}, |
| {"bits": [13, 14], "name": "FIELD_4"}, |
| {"bits": [15, 16], "name": "FIELD_5"}, |
| {"bits": [17, 18], "name": "FIELD_6"}, |
| {"bits": [19, 20], "name": "FIELD_7"}, |
| {"bits": [28, 31], "name": "RESOURCE_LEVEL"} |
| ] |
| }, |
| "DB_RESERVED_REG_3": { |
| "fields": [ |
| {"bits": [0, 21], "name": "FIELD_1"} |
| ] |
| }, |
| "DB_RMI_L2_CACHE_CONTROL": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "WritePolicy", "name": "Z_WR_POLICY"}, |
| {"bits": [2, 3], "enum_ref": "WritePolicy", "name": "S_WR_POLICY"}, |
| {"bits": [4, 5], "enum_ref": "WritePolicy", "name": "HTILE_WR_POLICY"}, |
| {"bits": [6, 7], "enum_ref": "WritePolicy", "name": "ZPCPSD_WR_POLICY"}, |
| {"bits": [16, 17], "enum_ref": "ReadPolicy", "name": "Z_RD_POLICY"}, |
| {"bits": [18, 19], "enum_ref": "ReadPolicy", "name": "S_RD_POLICY"}, |
| {"bits": [20, 21], "enum_ref": "ReadPolicy", "name": "HTILE_RD_POLICY"}, |
| {"bits": [24, 24], "name": "Z_BIG_PAGE"}, |
| {"bits": [25, 25], "name": "S_BIG_PAGE"}, |
| {"bits": [26, 26], "name": "Z_NOALLOC"}, |
| {"bits": [27, 27], "name": "S_NOALLOC"}, |
| {"bits": [28, 28], "name": "HTILE_NOALLOC"}, |
| {"bits": [29, 29], "name": "ZPCPSD_NOALLOC"} |
| ] |
| }, |
| "DB_SHADER_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"}, |
| {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"}, |
| {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"}, |
| {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"}, |
| {"bits": [6, 6], "name": "KILL_ENABLE"}, |
| {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"}, |
| {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"}, |
| {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"}, |
| {"bits": [10, 10], "name": "EXEC_ON_NOOP"}, |
| {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"}, |
| {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"}, |
| {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}, |
| {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"}, |
| {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"}, |
| {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"}, |
| {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"}, |
| {"bits": [23, 23], "name": "PRE_SHADER_DEPTH_COVERAGE_ENABLE"} |
| ] |
| }, |
| "DB_SRESULTS_COMPARE_STATE0": { |
| "fields": [ |
| {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"}, |
| {"bits": [4, 11], "name": "COMPAREVALUE0"}, |
| {"bits": [12, 19], "name": "COMPAREMASK0"}, |
| {"bits": [24, 24], "name": "ENABLE0"} |
| ] |
| }, |
| "DB_SRESULTS_COMPARE_STATE1": { |
| "fields": [ |
| {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"}, |
| {"bits": [4, 11], "name": "COMPAREVALUE1"}, |
| {"bits": [12, 19], "name": "COMPAREMASK1"}, |
| {"bits": [24, 24], "name": "ENABLE1"} |
| ] |
| }, |
| "DB_STENCILREFMASK": { |
| "fields": [ |
| {"bits": [0, 7], "name": "STENCILTESTVAL"}, |
| {"bits": [8, 15], "name": "STENCILMASK"}, |
| {"bits": [16, 23], "name": "STENCILWRITEMASK"}, |
| {"bits": [24, 31], "name": "STENCILOPVAL"} |
| ] |
| }, |
| "DB_STENCILREFMASK_BF": { |
| "fields": [ |
| {"bits": [0, 7], "name": "STENCILTESTVAL_BF"}, |
| {"bits": [8, 15], "name": "STENCILMASK_BF"}, |
| {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"}, |
| {"bits": [24, 31], "name": "STENCILOPVAL_BF"} |
| ] |
| }, |
| "DB_STENCIL_CLEAR": { |
| "fields": [ |
| {"bits": [0, 7], "name": "CLEAR"} |
| ] |
| }, |
| "DB_STENCIL_CONTROL": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"}, |
| {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"}, |
| {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"}, |
| {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"}, |
| {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"}, |
| {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"} |
| ] |
| }, |
| "DB_STENCIL_INFO": { |
| "fields": [ |
| {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"}, |
| {"bits": [4, 8], "name": "SW_MODE"}, |
| {"bits": [9, 10], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, |
| {"bits": [11, 11], "name": "ITERATE_FLUSH"}, |
| {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, |
| {"bits": [13, 15], "name": "RESERVED_FIELD_1"}, |
| {"bits": [20, 20], "name": "ITERATE_256"}, |
| {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, |
| {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"} |
| ] |
| }, |
| "DB_VRS_OVERRIDE_CNTL": { |
| "fields": [ |
| {"bits": [0, 2], "name": "VRS_OVERRIDE_RATE_COMBINER_MODE"}, |
| {"bits": [4, 5], "name": "VRS_OVERRIDE_RATE_X"}, |
| {"bits": [6, 7], "name": "VRS_OVERRIDE_RATE_Y"} |
| ] |
| }, |
| "DB_Z_INFO": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"}, |
| {"bits": [2, 3], "name": "NUM_SAMPLES"}, |
| {"bits": [4, 8], "name": "SW_MODE"}, |
| {"bits": [9, 10], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"}, |
| {"bits": [11, 11], "name": "ITERATE_FLUSH"}, |
| {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"}, |
| {"bits": [13, 15], "name": "RESERVED_FIELD_1"}, |
| {"bits": [16, 19], "name": "MAXMIP"}, |
| {"bits": [20, 20], "name": "ITERATE_256"}, |
| {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"}, |
| {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"}, |
| {"bits": [28, 28], "name": "READ_SIZE"}, |
| {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"}, |
| {"bits": [31, 31], "name": "ZRANGE_PRECISION"} |
| ] |
| }, |
| "DB_Z_READ_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 7], "name": "BASE_HI"} |
| ] |
| }, |
| "GB_ADDR_CONFIG": { |
| "fields": [ |
| {"bits": [0, 2], "name": "NUM_PIPES"}, |
| {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"}, |
| {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"}, |
| {"bits": [8, 10], "name": "NUM_PKRS"}, |
| {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"}, |
| {"bits": [26, 27], "name": "NUM_RB_PER_SE"} |
| ] |
| }, |
| "GCEA_PERFCOUNTER0_CFG": { |
| "fields": [ |
| {"bits": [0, 7], "name": "PERF_SEL"}, |
| {"bits": [8, 15], "name": "PERF_SEL_END"}, |
| {"bits": [24, 27], "name": "PERF_MODE"}, |
| {"bits": [28, 28], "name": "ENABLE"}, |
| {"bits": [29, 29], "name": "CLEAR"} |
| ] |
| }, |
| "GCEA_PERFCOUNTER2_MODE": { |
| "fields": [ |
| {"bits": [0, 1], "name": "COMPARE_MODE0"}, |
| {"bits": [2, 3], "name": "COMPARE_MODE1"}, |
| {"bits": [4, 5], "name": "COMPARE_MODE2"}, |
| {"bits": [6, 7], "name": "COMPARE_MODE3"}, |
| {"bits": [8, 11], "name": "COMPARE_VALUE0"}, |
| {"bits": [12, 15], "name": "COMPARE_VALUE1"}, |
| {"bits": [16, 19], "name": "COMPARE_VALUE2"}, |
| {"bits": [20, 23], "name": "COMPARE_VALUE3"} |
| ] |
| }, |
| "GCEA_PERFCOUNTER_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "COUNTER_HI"}, |
| {"bits": [16, 31], "name": "COMPARE_VALUE"} |
| ] |
| }, |
| "GCEA_PERFCOUNTER_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "COUNTER_LO"} |
| ] |
| }, |
| "GCEA_PERFCOUNTER_RSLT_CNTL": { |
| "fields": [ |
| {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"}, |
| {"bits": [8, 15], "name": "START_TRIGGER"}, |
| {"bits": [16, 23], "name": "STOP_TRIGGER"}, |
| {"bits": [24, 24], "name": "ENABLE_ANY"}, |
| {"bits": [25, 25], "name": "CLEAR_ALL"}, |
| {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"} |
| ] |
| }, |
| "GCR_PERFCOUNTER1_SELECT": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERF_SEL"}, |
| {"bits": [24, 27], "name": "PERF_MODE"}, |
| {"bits": [28, 31], "name": "CNTL_MODE"} |
| ] |
| }, |
| "GDS_ATOM_BASE": { |
| "fields": [ |
| {"bits": [0, 15], "name": "BASE"}, |
| {"bits": [16, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_ATOM_CNTL": { |
| "fields": [ |
| {"bits": [0, 5], "name": "AINC"}, |
| {"bits": [6, 7], "name": "UNUSED1"}, |
| {"bits": [8, 9], "name": "DMODE"}, |
| {"bits": [10, 31], "name": "UNUSED2"} |
| ] |
| }, |
| "GDS_ATOM_COMPLETE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "COMPLETE"}, |
| {"bits": [1, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_ATOM_DST": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DST"} |
| ] |
| }, |
| "GDS_ATOM_OFFSET0": { |
| "fields": [ |
| {"bits": [0, 7], "name": "OFFSET0"}, |
| {"bits": [8, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_ATOM_OFFSET1": { |
| "fields": [ |
| {"bits": [0, 7], "name": "OFFSET1"}, |
| {"bits": [8, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_ATOM_OP": { |
| "fields": [ |
| {"bits": [0, 7], "name": "OP"}, |
| {"bits": [8, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_ATOM_SIZE": { |
| "fields": [ |
| {"bits": [0, 15], "name": "SIZE"}, |
| {"bits": [16, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_GWS_RESOURCE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "FLAG"}, |
| {"bits": [1, 12], "name": "COUNTER"}, |
| {"bits": [13, 13], "name": "TYPE"}, |
| {"bits": [14, 14], "name": "DED"}, |
| {"bits": [15, 15], "name": "RELEASE_ALL"}, |
| {"bits": [16, 26], "name": "HEAD_QUEUE"}, |
| {"bits": [27, 27], "name": "HEAD_VALID"}, |
| {"bits": [28, 28], "name": "HEAD_FLAG"}, |
| {"bits": [29, 29], "name": "HALTED"}, |
| {"bits": [30, 30], "name": "HEAD_QUEUE1"}, |
| {"bits": [31, 31], "name": "UNUSED1"} |
| ] |
| }, |
| "GDS_GWS_RESOURCE_CNT": { |
| "fields": [ |
| {"bits": [0, 15], "name": "RESOURCE_CNT"}, |
| {"bits": [16, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_GWS_RESOURCE_CNTL": { |
| "fields": [ |
| {"bits": [0, 5], "name": "INDEX"}, |
| {"bits": [6, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_OA_ADDRESS": { |
| "fields": [ |
| {"bits": [0, 15], "name": "DS_ADDRESS"}, |
| {"bits": [16, 19], "name": "CRAWLER_TYPE"}, |
| {"bits": [20, 23], "name": "CRAWLER"}, |
| {"bits": [24, 29], "name": "UNUSED"}, |
| {"bits": [30, 30], "name": "NO_ALLOC"}, |
| {"bits": [31, 31], "name": "ENABLE"} |
| ] |
| }, |
| "GDS_OA_CNTL": { |
| "fields": [ |
| {"bits": [0, 3], "name": "INDEX"}, |
| {"bits": [4, 31], "name": "UNUSED"} |
| ] |
| }, |
| "GDS_OA_COUNTER": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SPACE_AVAILABLE"} |
| ] |
| }, |
| "GDS_OA_INCDEC": { |
| "fields": [ |
| {"bits": [0, 30], "name": "VALUE"}, |
| {"bits": [31, 31], "name": "INCDEC"} |
| ] |
| }, |
| "GDS_OA_RING_SIZE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RING_SIZE"} |
| ] |
| }, |
| "GDS_RD_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "READ_ADDR"} |
| ] |
| }, |
| "GDS_RD_BURST_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BURST_ADDR"} |
| ] |
| }, |
| "GDS_RD_BURST_COUNT": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BURST_COUNT"} |
| ] |
| }, |
| "GDS_RD_BURST_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BURST_DATA"} |
| ] |
| }, |
| "GDS_RD_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "READ_DATA"} |
| ] |
| }, |
| "GDS_WRITE_COMPLETE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WRITE_COMPLETE"} |
| ] |
| }, |
| "GDS_WR_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WRITE_ADDR"} |
| ] |
| }, |
| "GDS_WR_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "WRITE_DATA"} |
| ] |
| }, |
| "GE1_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL0"}, |
| {"bits": [10, 19], "name": "PERF_SEL1"}, |
| {"bits": [20, 23], "name": "CNTR_MODE"}, |
| {"bits": [24, 27], "name": "PERF_MODE0"}, |
| {"bits": [28, 31], "name": "PERF_MODE1"} |
| ] |
| }, |
| "GE1_PERFCOUNTER0_SELECT1": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL2"}, |
| {"bits": [10, 19], "name": "PERF_SEL3"}, |
| {"bits": [24, 27], "name": "PERF_MODE2"}, |
| {"bits": [28, 31], "name": "PERF_MODE3"} |
| ] |
| }, |
| "GE_CNTL": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PRIM_GRP_SIZE"}, |
| {"bits": [9, 17], "name": "VERT_GRP_SIZE"}, |
| {"bits": [18, 18], "name": "BREAK_WAVE_AT_EOI"}, |
| {"bits": [19, 19], "name": "PACKET_TO_ONE_PA"} |
| ] |
| }, |
| "GE_DMA_FIRST_INDEX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "FIRST_INDEX"} |
| ] |
| }, |
| "GE_MAX_OUTPUT_PER_SUBGROUP": { |
| "fields": [ |
| {"bits": [0, 9], "name": "MAX_VERTS_PER_SUBGROUP"} |
| ] |
| }, |
| "GE_NGG_SUBGRP_CNTL": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PRIM_AMP_FACTOR"}, |
| {"bits": [9, 17], "name": "THDS_PER_SUBGRP"} |
| ] |
| }, |
| "GE_PC_ALLOC": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OVERSUB_EN"}, |
| {"bits": [1, 10], "name": "NUM_PC_LINES"} |
| ] |
| }, |
| "GE_STEREO_CNTL": { |
| "fields": [ |
| {"bits": [0, 2], "name": "RT_SLICE"}, |
| {"bits": [3, 6], "name": "VIEWPORT"}, |
| {"bits": [8, 8], "name": "EN_STEREO"} |
| ] |
| }, |
| "GE_USER_VGPR_EN": { |
| "fields": [ |
| {"bits": [0, 0], "name": "EN_USER_VGPR1"}, |
| {"bits": [1, 1], "name": "EN_USER_VGPR2"}, |
| {"bits": [2, 2], "name": "EN_USER_VGPR3"} |
| ] |
| }, |
| "GRBM_GFX_INDEX": { |
| "fields": [ |
| {"bits": [0, 7], "name": "INSTANCE_INDEX"}, |
| {"bits": [8, 15], "name": "SA_INDEX"}, |
| {"bits": [16, 23], "name": "SE_INDEX"}, |
| {"bits": [29, 29], "name": "SA_BROADCAST_WRITES"}, |
| {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"}, |
| {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"} |
| ] |
| }, |
| "GRBM_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 5], "name": "PERF_SEL"}, |
| {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, |
| {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, |
| {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [27, 27], "name": "TCP_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [28, 28], "name": "GE_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"} |
| ] |
| }, |
| "GRBM_PERFCOUNTER0_SELECT_HI": { |
| "fields": [ |
| {"bits": [1, 1], "name": "UTCL1_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [2, 2], "name": "GL2CC_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [3, 3], "name": "SDMA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [4, 4], "name": "CH_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [5, 5], "name": "PH_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [6, 6], "name": "PMM_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [7, 7], "name": "GUS_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [8, 8], "name": "GL1CC_BUSY_USER_DEFINED_MASK"} |
| ] |
| }, |
| "GRBM_SE0_PERFCOUNTER_SELECT": { |
| "fields": [ |
| {"bits": [0, 5], "name": "PERF_SEL"}, |
| {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"}, |
| {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"}, |
| {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [23, 23], "name": "UTCL1_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [24, 24], "name": "TCP_BUSY_USER_DEFINED_MASK"}, |
| {"bits": [25, 25], "name": "GL1CC_BUSY_USER_DEFINED_MASK"} |
| ] |
| }, |
| "GRBM_STATUS": { |
| "fields": [ |
| {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"}, |
| {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"}, |
| {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"}, |
| {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"}, |
| {"bits": [12, 12], "name": "DB_CLEAN"}, |
| {"bits": [13, 13], "name": "CB_CLEAN"}, |
| {"bits": [14, 14], "name": "TA_BUSY"}, |
| {"bits": [15, 15], "name": "GDS_BUSY"}, |
| {"bits": [16, 16], "name": "GE_BUSY_NO_DMA"}, |
| {"bits": [20, 20], "name": "SX_BUSY"}, |
| {"bits": [21, 21], "name": "GE_BUSY"}, |
| {"bits": [22, 22], "name": "SPI_BUSY"}, |
| {"bits": [23, 23], "name": "BCI_BUSY"}, |
| {"bits": [24, 24], "name": "SC_BUSY"}, |
| {"bits": [25, 25], "name": "PA_BUSY"}, |
| {"bits": [26, 26], "name": "DB_BUSY"}, |
| {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"}, |
| {"bits": [29, 29], "name": "CP_BUSY"}, |
| {"bits": [30, 30], "name": "CB_BUSY"}, |
| {"bits": [31, 31], "name": "GUI_ACTIVE"} |
| ] |
| }, |
| "GRBM_STATUS2": { |
| "fields": [ |
| {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"}, |
| {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"}, |
| {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"}, |
| {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"}, |
| {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"}, |
| {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"}, |
| {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"}, |
| {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"}, |
| {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"}, |
| {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"}, |
| {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"}, |
| {"bits": [14, 14], "name": "RLC_RQ_PENDING"}, |
| {"bits": [15, 15], "name": "UTCL2_BUSY"}, |
| {"bits": [16, 16], "name": "EA_BUSY"}, |
| {"bits": [17, 17], "name": "RMI_BUSY"}, |
| {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"}, |
| {"bits": [19, 19], "name": "SDMA_SCH_RQ_PENDING"}, |
| {"bits": [20, 20], "name": "EA_LINK_BUSY"}, |
| {"bits": [21, 21], "name": "SDMA_BUSY"}, |
| {"bits": [22, 22], "name": "SDMA0_RQ_PENDING"}, |
| {"bits": [23, 23], "name": "SDMA1_RQ_PENDING"}, |
| {"bits": [24, 24], "name": "SDMA2_RQ_PENDING"}, |
| {"bits": [25, 25], "name": "SDMA3_RQ_PENDING"}, |
| {"bits": [26, 26], "name": "RLC_BUSY"}, |
| {"bits": [27, 27], "name": "TCP_BUSY"}, |
| {"bits": [28, 28], "name": "CPF_BUSY"}, |
| {"bits": [29, 29], "name": "CPC_BUSY"}, |
| {"bits": [30, 30], "name": "CPG_BUSY"}, |
| {"bits": [31, 31], "name": "CPAXI_BUSY"} |
| ] |
| }, |
| "GRBM_STATUS3": { |
| "fields": [ |
| {"bits": [5, 5], "name": "GRBM_RLC_INTR_CREDIT_PENDING"}, |
| {"bits": [6, 6], "name": "GRBM_UTCL2_INTR_CREDIT_PENDING"}, |
| {"bits": [7, 7], "name": "GRBM_CPF_INTR_CREDIT_PENDING"}, |
| {"bits": [8, 8], "name": "MESPIPE0_RQ_PENDING"}, |
| {"bits": [9, 9], "name": "MESPIPE1_RQ_PENDING"}, |
| {"bits": [10, 10], "name": "MESPIPE2_RQ_PENDING"}, |
| {"bits": [11, 11], "name": "MESPIPE3_RQ_PENDING"}, |
| {"bits": [13, 13], "name": "PH_BUSY"}, |
| {"bits": [14, 14], "name": "CH_BUSY"}, |
| {"bits": [15, 15], "name": "GL2CC_BUSY"}, |
| {"bits": [16, 16], "name": "GL1CC_BUSY"}, |
| {"bits": [28, 28], "name": "GUS_LINK_BUSY"}, |
| {"bits": [29, 29], "name": "GUS_BUSY"}, |
| {"bits": [30, 30], "name": "UTCL1_BUSY"}, |
| {"bits": [31, 31], "name": "PMM_BUSY"} |
| ] |
| }, |
| "GRBM_STATUS_SE0": { |
| "fields": [ |
| {"bits": [1, 1], "name": "DB_CLEAN"}, |
| {"bits": [2, 2], "name": "CB_CLEAN"}, |
| {"bits": [3, 3], "name": "UTCL1_BUSY"}, |
| {"bits": [4, 4], "name": "TCP_BUSY"}, |
| {"bits": [5, 5], "name": "GL1CC_BUSY"}, |
| {"bits": [21, 21], "name": "RMI_BUSY"}, |
| {"bits": [22, 22], "name": "BCI_BUSY"}, |
| {"bits": [24, 24], "name": "PA_BUSY"}, |
| {"bits": [25, 25], "name": "TA_BUSY"}, |
| {"bits": [26, 26], "name": "SX_BUSY"}, |
| {"bits": [27, 27], "name": "SPI_BUSY"}, |
| {"bits": [29, 29], "name": "SC_BUSY"}, |
| {"bits": [30, 30], "name": "DB_BUSY"}, |
| {"bits": [31, 31], "name": "CB_BUSY"} |
| ] |
| }, |
| "IA_MULTI_VGT_PARAM": { |
| "fields": [ |
| {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, |
| {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, |
| {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, |
| {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, |
| {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, |
| {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"} |
| ] |
| }, |
| "IA_MULTI_VGT_PARAM_PIPED": { |
| "fields": [ |
| {"bits": [0, 15], "name": "PRIMGROUP_SIZE"}, |
| {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"}, |
| {"bits": [17, 17], "name": "SWITCH_ON_EOP"}, |
| {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"}, |
| {"bits": [19, 19], "name": "SWITCH_ON_EOI"}, |
| {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"}, |
| {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"}, |
| {"bits": [22, 22], "name": "EN_INST_OPT_ADV"}, |
| {"bits": [23, 23], "name": "HW_USE_ONLY"} |
| ] |
| }, |
| "PA_CL_CLIP_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "UCP_ENA_0"}, |
| {"bits": [1, 1], "name": "UCP_ENA_1"}, |
| {"bits": [2, 2], "name": "UCP_ENA_2"}, |
| {"bits": [3, 3], "name": "UCP_ENA_3"}, |
| {"bits": [4, 4], "name": "UCP_ENA_4"}, |
| {"bits": [5, 5], "name": "UCP_ENA_5"}, |
| {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"}, |
| {"bits": [14, 15], "name": "PS_UCP_MODE"}, |
| {"bits": [16, 16], "name": "CLIP_DISABLE"}, |
| {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"}, |
| {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"}, |
| {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"}, |
| {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"}, |
| {"bits": [21, 21], "name": "VTX_KILL_OR"}, |
| {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"}, |
| {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"}, |
| {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"}, |
| {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"}, |
| {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}, |
| {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"} |
| ] |
| }, |
| "PA_CL_NANINF_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"}, |
| {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"}, |
| {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"}, |
| {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"}, |
| {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"}, |
| {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"}, |
| {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"}, |
| {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"}, |
| {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"}, |
| {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"}, |
| {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"}, |
| {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"}, |
| {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"}, |
| {"bits": [13, 13], "name": "VS_W_INF_RETAIN"}, |
| {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"}, |
| {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"} |
| ] |
| }, |
| "PA_CL_NGG_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"}, |
| {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"}, |
| {"bits": [2, 9], "name": "VERTEX_REUSE_DEPTH"} |
| ] |
| }, |
| "PA_CL_UCP_0_X": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DATA_REGISTER"} |
| ] |
| }, |
| "PA_CL_VPORT_XOFFSET": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_XOFFSET"} |
| ] |
| }, |
| "PA_CL_VPORT_XSCALE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_XSCALE"} |
| ] |
| }, |
| "PA_CL_VPORT_YOFFSET": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_YOFFSET"} |
| ] |
| }, |
| "PA_CL_VPORT_YSCALE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_YSCALE"} |
| ] |
| }, |
| "PA_CL_VPORT_ZOFFSET": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_ZOFFSET"} |
| ] |
| }, |
| "PA_CL_VPORT_ZSCALE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_ZSCALE"} |
| ] |
| }, |
| "PA_CL_VRS_CNTL": { |
| "fields": [ |
| {"bits": [0, 2], "name": "VERTEX_RATE_COMBINER_MODE"}, |
| {"bits": [3, 5], "name": "PRIMITIVE_RATE_COMBINER_MODE"}, |
| {"bits": [6, 8], "name": "HTILE_RATE_COMBINER_MODE"}, |
| {"bits": [9, 11], "name": "SAMPLE_ITER_COMBINER_MODE"}, |
| {"bits": [13, 13], "name": "EXPOSE_VRS_PIXELS_MASK"}, |
| {"bits": [14, 14], "name": "CMASK_RATE_HINT_FORCE_ZERO"} |
| ] |
| }, |
| "PA_CL_VS_OUT_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"}, |
| {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"}, |
| {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"}, |
| {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"}, |
| {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"}, |
| {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"}, |
| {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"}, |
| {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"}, |
| {"bits": [8, 8], "name": "CULL_DIST_ENA_0"}, |
| {"bits": [9, 9], "name": "CULL_DIST_ENA_1"}, |
| {"bits": [10, 10], "name": "CULL_DIST_ENA_2"}, |
| {"bits": [11, 11], "name": "CULL_DIST_ENA_3"}, |
| {"bits": [12, 12], "name": "CULL_DIST_ENA_4"}, |
| {"bits": [13, 13], "name": "CULL_DIST_ENA_5"}, |
| {"bits": [14, 14], "name": "CULL_DIST_ENA_6"}, |
| {"bits": [15, 15], "name": "CULL_DIST_ENA_7"}, |
| {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"}, |
| {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"}, |
| {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"}, |
| {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"}, |
| {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"}, |
| {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"}, |
| {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"}, |
| {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"}, |
| {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"}, |
| {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"}, |
| {"bits": [27, 27], "name": "USE_VTX_LINE_WIDTH"}, |
| {"bits": [28, 28], "name": "USE_VTX_VRS_RATE"}, |
| {"bits": [29, 29], "name": "BYPASS_VTX_RATE_COMBINER"}, |
| {"bits": [30, 30], "name": "BYPASS_PRIM_RATE_COMBINER"} |
| ] |
| }, |
| "PA_CL_VTE_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"}, |
| {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"}, |
| {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"}, |
| {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"}, |
| {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"}, |
| {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"}, |
| {"bits": [8, 8], "name": "VTX_XY_FMT"}, |
| {"bits": [9, 9], "name": "VTX_Z_FMT"}, |
| {"bits": [10, 10], "name": "VTX_W0_FMT"}, |
| {"bits": [11, 11], "name": "PERFCOUNTER_REF"} |
| ] |
| }, |
| "PA_SC_AA_CONFIG": { |
| "fields": [ |
| {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"}, |
| {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"}, |
| {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"}, |
| {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"}, |
| {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}, |
| {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"}, |
| {"bits": [28, 28], "name": "SAMPLE_COVERAGE_ENCODING"}, |
| {"bits": [29, 29], "name": "COVERED_CENTROID_IS_CENTER"} |
| ] |
| }, |
| "PA_SC_AA_MASK_X0Y0_X1Y0": { |
| "fields": [ |
| {"bits": [0, 15], "name": "AA_MASK_X0Y0"}, |
| {"bits": [16, 31], "name": "AA_MASK_X1Y0"} |
| ] |
| }, |
| "PA_SC_AA_MASK_X0Y1_X1Y1": { |
| "fields": [ |
| {"bits": [0, 15], "name": "AA_MASK_X0Y1"}, |
| {"bits": [16, 31], "name": "AA_MASK_X1Y1"} |
| ] |
| }, |
| "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": { |
| "fields": [ |
| {"bits": [0, 3], "name": "S0_X"}, |
| {"bits": [4, 7], "name": "S0_Y"}, |
| {"bits": [8, 11], "name": "S1_X"}, |
| {"bits": [12, 15], "name": "S1_Y"}, |
| {"bits": [16, 19], "name": "S2_X"}, |
| {"bits": [20, 23], "name": "S2_Y"}, |
| {"bits": [24, 27], "name": "S3_X"}, |
| {"bits": [28, 31], "name": "S3_Y"} |
| ] |
| }, |
| "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": { |
| "fields": [ |
| {"bits": [0, 3], "name": "S4_X"}, |
| {"bits": [4, 7], "name": "S4_Y"}, |
| {"bits": [8, 11], "name": "S5_X"}, |
| {"bits": [12, 15], "name": "S5_Y"}, |
| {"bits": [16, 19], "name": "S6_X"}, |
| {"bits": [20, 23], "name": "S6_Y"}, |
| {"bits": [24, 27], "name": "S7_X"}, |
| {"bits": [28, 31], "name": "S7_Y"} |
| ] |
| }, |
| "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": { |
| "fields": [ |
| {"bits": [0, 3], "name": "S8_X"}, |
| {"bits": [4, 7], "name": "S8_Y"}, |
| {"bits": [8, 11], "name": "S9_X"}, |
| {"bits": [12, 15], "name": "S9_Y"}, |
| {"bits": [16, 19], "name": "S10_X"}, |
| {"bits": [20, 23], "name": "S10_Y"}, |
| {"bits": [24, 27], "name": "S11_X"}, |
| {"bits": [28, 31], "name": "S11_Y"} |
| ] |
| }, |
| "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": { |
| "fields": [ |
| {"bits": [0, 3], "name": "S12_X"}, |
| {"bits": [4, 7], "name": "S12_Y"}, |
| {"bits": [8, 11], "name": "S13_X"}, |
| {"bits": [12, 15], "name": "S13_Y"}, |
| {"bits": [16, 19], "name": "S14_X"}, |
| {"bits": [20, 23], "name": "S14_Y"}, |
| {"bits": [24, 27], "name": "S15_X"}, |
| {"bits": [28, 31], "name": "S15_Y"} |
| ] |
| }, |
| "PA_SC_BINNER_CNTL_0": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"}, |
| {"bits": [2, 2], "name": "BIN_SIZE_X"}, |
| {"bits": [3, 3], "name": "BIN_SIZE_Y"}, |
| {"bits": [4, 6], "enum_ref": "BinSizeExtend", "name": "BIN_SIZE_X_EXTEND"}, |
| {"bits": [7, 9], "enum_ref": "BinSizeExtend", "name": "BIN_SIZE_Y_EXTEND"}, |
| {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"}, |
| {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"}, |
| {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"}, |
| {"bits": [19, 26], "name": "FPOVS_PER_BATCH"}, |
| {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"}, |
| {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"}, |
| {"bits": [29, 30], "enum_ref": "BinMapMode", "name": "BIN_MAPPING_MODE"} |
| ] |
| }, |
| "PA_SC_BINNER_CNTL_1": { |
| "fields": [ |
| {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"}, |
| {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"} |
| ] |
| }, |
| "PA_SC_CENTROID_PRIORITY_0": { |
| "fields": [ |
| {"bits": [0, 3], "name": "DISTANCE_0"}, |
| {"bits": [4, 7], "name": "DISTANCE_1"}, |
| {"bits": [8, 11], "name": "DISTANCE_2"}, |
| {"bits": [12, 15], "name": "DISTANCE_3"}, |
| {"bits": [16, 19], "name": "DISTANCE_4"}, |
| {"bits": [20, 23], "name": "DISTANCE_5"}, |
| {"bits": [24, 27], "name": "DISTANCE_6"}, |
| {"bits": [28, 31], "name": "DISTANCE_7"} |
| ] |
| }, |
| "PA_SC_CENTROID_PRIORITY_1": { |
| "fields": [ |
| {"bits": [0, 3], "name": "DISTANCE_8"}, |
| {"bits": [4, 7], "name": "DISTANCE_9"}, |
| {"bits": [8, 11], "name": "DISTANCE_10"}, |
| {"bits": [12, 15], "name": "DISTANCE_11"}, |
| {"bits": [16, 19], "name": "DISTANCE_12"}, |
| {"bits": [20, 23], "name": "DISTANCE_13"}, |
| {"bits": [24, 27], "name": "DISTANCE_14"}, |
| {"bits": [28, 31], "name": "DISTANCE_15"} |
| ] |
| }, |
| "PA_SC_CLIPRECT_0_TL": { |
| "fields": [ |
| {"bits": [0, 14], "name": "TL_X"}, |
| {"bits": [16, 30], "name": "TL_Y"} |
| ] |
| }, |
| "PA_SC_CLIPRECT_RULE": { |
| "fields": [ |
| {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"} |
| ] |
| }, |
| "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "OVER_RAST_ENABLE"}, |
| {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"}, |
| {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"}, |
| {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"}, |
| {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"}, |
| {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"}, |
| {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"}, |
| {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"}, |
| {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"}, |
| {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"}, |
| {"bits": [16, 17], "enum_ref": "ScUncertaintyRegionMode", "name": "UNCERTAINTY_REGION_MODE"}, |
| {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"}, |
| {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"}, |
| {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"}, |
| {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"}, |
| {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"}, |
| {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"}, |
| {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"}, |
| {"bits": [25, 26], "name": "UNCERTAINTY_REGION_MULT"}, |
| {"bits": [27, 28], "name": "UNCERTAINTY_REGION_PBB_MULT"} |
| ] |
| }, |
| "PA_SC_EDGERULE": { |
| "fields": [ |
| {"bits": [0, 3], "name": "ER_TRI"}, |
| {"bits": [4, 7], "name": "ER_POINT"}, |
| {"bits": [8, 11], "name": "ER_RECT"}, |
| {"bits": [12, 17], "name": "ER_LINE_LR"}, |
| {"bits": [18, 23], "name": "ER_LINE_RL"}, |
| {"bits": [24, 27], "name": "ER_LINE_TB"}, |
| {"bits": [28, 31], "name": "ER_LINE_BT"} |
| ] |
| }, |
| "PA_SC_LINE_CNTL": { |
| "fields": [ |
| {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"}, |
| {"bits": [10, 10], "name": "LAST_PIXEL"}, |
| {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"}, |
| {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}, |
| {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"} |
| ] |
| }, |
| "PA_SC_LINE_STIPPLE": { |
| "fields": [ |
| {"bits": [0, 15], "name": "LINE_PATTERN"}, |
| {"bits": [16, 23], "name": "REPEAT_COUNT"}, |
| {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"}, |
| {"bits": [29, 30], "name": "AUTO_RESET_CNTL"} |
| ] |
| }, |
| "PA_SC_LINE_STIPPLE_STATE": { |
| "fields": [ |
| {"bits": [0, 3], "name": "CURRENT_PTR"}, |
| {"bits": [8, 15], "name": "CURRENT_COUNT"} |
| ] |
| }, |
| "PA_SC_MODE_CNTL_0": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MSAA_ENABLE"}, |
| {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"}, |
| {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"}, |
| {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}, |
| {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"}, |
| {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"} |
| ] |
| }, |
| "PA_SC_MODE_CNTL_1": { |
| "fields": [ |
| {"bits": [0, 0], "name": "WALK_SIZE"}, |
| {"bits": [1, 1], "name": "WALK_ALIGNMENT"}, |
| {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"}, |
| {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"}, |
| {"bits": [4, 6], "name": "WALK_FENCE_SIZE"}, |
| {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"}, |
| {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"}, |
| {"bits": [9, 9], "name": "TILE_COVER_DISABLE"}, |
| {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"}, |
| {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"}, |
| {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"}, |
| {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"}, |
| {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"}, |
| {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"}, |
| {"bits": [16, 16], "name": "PS_ITER_SAMPLE"}, |
| {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"}, |
| {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"}, |
| {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"}, |
| {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"}, |
| {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"}, |
| {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"}, |
| {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"}, |
| {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"}, |
| {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"} |
| ] |
| }, |
| "PA_SC_NGG_MODE_CNTL": { |
| "fields": [ |
| {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"}, |
| {"bits": [16, 23], "name": "MAX_FPOVS_IN_WAVE"} |
| ] |
| }, |
| "PA_SC_P3D_TRAP_SCREEN_H": { |
| "fields": [ |
| {"bits": [0, 13], "name": "X_COORD"} |
| ] |
| }, |
| "PA_SC_P3D_TRAP_SCREEN_HV_EN": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"}, |
| {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"} |
| ] |
| }, |
| "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE": { |
| "fields": [ |
| {"bits": [0, 15], "name": "COUNT"} |
| ] |
| }, |
| "PA_SC_P3D_TRAP_SCREEN_V": { |
| "fields": [ |
| {"bits": [0, 13], "name": "Y_COORD"} |
| ] |
| }, |
| "PA_SC_PERFCOUNTER1_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL"} |
| ] |
| }, |
| "PA_SC_RASTER_CONFIG": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"}, |
| {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"}, |
| {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"}, |
| {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"}, |
| {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"}, |
| {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"}, |
| {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"}, |
| {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"}, |
| {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"}, |
| {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"}, |
| {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"}, |
| {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"}, |
| {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"}, |
| {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"}, |
| {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"} |
| ] |
| }, |
| "PA_SC_RASTER_CONFIG_1": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"}, |
| {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"}, |
| {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"} |
| ] |
| }, |
| "PA_SC_SCREEN_EXTENT_CONTROL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"}, |
| {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"} |
| ] |
| }, |
| "PA_SC_SCREEN_EXTENT_MIN_0": { |
| "fields": [ |
| {"bits": [0, 15], "name": "X"}, |
| {"bits": [16, 31], "name": "Y"} |
| ] |
| }, |
| "PA_SC_SCREEN_SCISSOR_BR": { |
| "fields": [ |
| {"bits": [0, 15], "name": "BR_X"}, |
| {"bits": [16, 31], "name": "BR_Y"} |
| ] |
| }, |
| "PA_SC_SCREEN_SCISSOR_TL": { |
| "fields": [ |
| {"bits": [0, 15], "name": "TL_X"}, |
| {"bits": [16, 31], "name": "TL_Y"} |
| ] |
| }, |
| "PA_SC_SHADER_CONTROL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"}, |
| {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"}, |
| {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"}, |
| {"bits": [5, 6], "name": "WAVE_BREAK_REGION_SIZE"} |
| ] |
| }, |
| "PA_SC_TILE_STEERING_OVERRIDE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ENABLE"}, |
| {"bits": [1, 2], "name": "NUM_SE"}, |
| {"bits": [5, 6], "name": "NUM_RB_PER_SE"}, |
| {"bits": [12, 13], "name": "NUM_SC"}, |
| {"bits": [16, 17], "name": "NUM_RB_PER_SC"}, |
| {"bits": [20, 21], "name": "NUM_PACKER_PER_SC"} |
| ] |
| }, |
| "PA_SC_VPORT_ZMAX_0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_ZMAX"} |
| ] |
| }, |
| "PA_SC_VPORT_ZMIN_0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VPORT_ZMIN"} |
| ] |
| }, |
| "PA_SC_WINDOW_OFFSET": { |
| "fields": [ |
| {"bits": [0, 15], "name": "WINDOW_X_OFFSET"}, |
| {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"} |
| ] |
| }, |
| "PA_SC_WINDOW_SCISSOR_BR": { |
| "fields": [ |
| {"bits": [0, 14], "name": "BR_X"}, |
| {"bits": [16, 30], "name": "BR_Y"} |
| ] |
| }, |
| "PA_SC_WINDOW_SCISSOR_TL": { |
| "fields": [ |
| {"bits": [0, 14], "name": "TL_X"}, |
| {"bits": [16, 30], "name": "TL_Y"}, |
| {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"} |
| ] |
| }, |
| "PA_STATE_STEREO_X": { |
| "fields": [ |
| {"bits": [0, 31], "name": "STEREO_X_OFFSET"} |
| ] |
| }, |
| "PA_STEREO_CNTL": { |
| "fields": [ |
| {"bits": [1, 4], "name": "STEREO_MODE"}, |
| {"bits": [5, 7], "name": "RT_SLICE_MODE"}, |
| {"bits": [8, 11], "name": "RT_SLICE_OFFSET"}, |
| {"bits": [16, 18], "name": "VP_ID_MODE"}, |
| {"bits": [19, 22], "name": "VP_ID_OFFSET"} |
| ] |
| }, |
| "PA_SU_HARDWARE_SCREEN_OFFSET": { |
| "fields": [ |
| {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"}, |
| {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"} |
| ] |
| }, |
| "PA_SU_LINE_CNTL": { |
| "fields": [ |
| {"bits": [0, 15], "name": "WIDTH"} |
| ] |
| }, |
| "PA_SU_LINE_STIPPLE_CNTL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"}, |
| {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"}, |
| {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"}, |
| {"bits": [4, 4], "name": "DIAMOND_ADJUST"} |
| ] |
| }, |
| "PA_SU_LINE_STIPPLE_SCALE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"} |
| ] |
| }, |
| "PA_SU_LINE_STIPPLE_VALUE": { |
| "fields": [ |
| {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"} |
| ] |
| }, |
| "PA_SU_OVER_RASTERIZATION_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"}, |
| {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"}, |
| {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"}, |
| {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"}, |
| {"bits": [4, 4], "name": "USE_PROVOKING_ZW"} |
| ] |
| }, |
| "PA_SU_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL"}, |
| {"bits": [10, 19], "name": "PERF_SEL1"}, |
| {"bits": [20, 23], "name": "CNTR_MODE"}, |
| {"bits": [24, 27], "name": "PERF_MODE1"}, |
| {"bits": [28, 31], "name": "PERF_MODE"} |
| ] |
| }, |
| "PA_SU_PERFCOUNTER0_SELECT1": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL2"}, |
| {"bits": [10, 19], "name": "PERF_SEL3"}, |
| {"bits": [24, 27], "name": "PERF_MODE3"}, |
| {"bits": [28, 31], "name": "PERF_MODE2"} |
| ] |
| }, |
| "PA_SU_POINT_MINMAX": { |
| "fields": [ |
| {"bits": [0, 15], "name": "MIN_SIZE"}, |
| {"bits": [16, 31], "name": "MAX_SIZE"} |
| ] |
| }, |
| "PA_SU_POINT_SIZE": { |
| "fields": [ |
| {"bits": [0, 15], "name": "HEIGHT"}, |
| {"bits": [16, 31], "name": "WIDTH"} |
| ] |
| }, |
| "PA_SU_POLY_OFFSET_CLAMP": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CLAMP"} |
| ] |
| }, |
| "PA_SU_POLY_OFFSET_DB_FMT_CNTL": { |
| "fields": [ |
| {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"}, |
| {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"} |
| ] |
| }, |
| "PA_SU_POLY_OFFSET_FRONT_SCALE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCALE"} |
| ] |
| }, |
| "PA_SU_PRIM_FILTER_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"}, |
| {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"}, |
| {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"}, |
| {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"}, |
| {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"}, |
| {"bits": [5, 5], "name": "LINE_EXPAND_ENA"}, |
| {"bits": [6, 6], "name": "POINT_EXPAND_ENA"}, |
| {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"}, |
| {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"}, |
| {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"}, |
| {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"} |
| ] |
| }, |
| "PA_SU_SC_MODE_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "CULL_FRONT"}, |
| {"bits": [1, 1], "name": "CULL_BACK"}, |
| {"bits": [2, 2], "name": "FACE"}, |
| {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"}, |
| {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"}, |
| {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"}, |
| {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"}, |
| {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"}, |
| {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"}, |
| {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"}, |
| {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"}, |
| {"bits": [20, 20], "name": "PERSP_CORR_DIS"}, |
| {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}, |
| {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"}, |
| {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"}, |
| {"bits": [24, 24], "name": "KEEP_TOGETHER_ENABLE"} |
| ] |
| }, |
| "PA_SU_SMALL_PRIM_FILTER_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"}, |
| {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"}, |
| {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"}, |
| {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"}, |
| {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"} |
| ] |
| }, |
| "PA_SU_VTX_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PIX_CENTER"}, |
| {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"}, |
| {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"} |
| ] |
| }, |
| "RLC_GPM_PERF_COUNT_0": { |
| "fields": [ |
| {"bits": [0, 3], "name": "FEATURE_SEL"}, |
| {"bits": [4, 7], "name": "SE_INDEX"}, |
| {"bits": [8, 11], "name": "SA_INDEX"}, |
| {"bits": [12, 15], "name": "WGP_INDEX"}, |
| {"bits": [16, 17], "name": "EVENT_SEL"}, |
| {"bits": [18, 19], "name": "UNUSED"}, |
| {"bits": [20, 20], "name": "ENABLE"}, |
| {"bits": [21, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_GPU_IOV_PERF_CNT_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ENABLE"}, |
| {"bits": [1, 1], "name": "MODE_SELECT"}, |
| {"bits": [2, 2], "name": "RESET"}, |
| {"bits": [3, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_GPU_IOV_PERF_CNT_WR_ADDR": { |
| "fields": [ |
| {"bits": [0, 3], "name": "VFID"}, |
| {"bits": [4, 5], "name": "CNT_ID"}, |
| {"bits": [6, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"} |
| ] |
| }, |
| "RLC_PERFMON_CLK_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"} |
| ] |
| }, |
| "RLC_PERFMON_CNTL": { |
| "fields": [ |
| {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"}, |
| {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_CTRL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "StrobeResetPerfMonitors"}, |
| {"bits": [1, 1], "name": "StrobeStartAccumulation"}, |
| {"bits": [2, 2], "name": "StrobeRearmAccum"}, |
| {"bits": [3, 3], "name": "StrobeResetSpmBlock"}, |
| {"bits": [4, 7], "name": "StrobeStartSpm"}, |
| {"bits": [8, 8], "name": "StrobeRearmSwaAccum"}, |
| {"bits": [9, 9], "name": "StrobeStartSwa"}, |
| {"bits": [10, 10], "name": "StrobePerfmonSampleWires"}, |
| {"bits": [11, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_CTRLRAM_ADDR": { |
| "fields": [ |
| {"bits": [0, 10], "name": "addr"}, |
| {"bits": [11, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_CTRLRAM_ADDR_OFFSET": { |
| "fields": [ |
| {"bits": [0, 7], "name": "global_offset"}, |
| {"bits": [8, 15], "name": "spmwithaccum_se_offset"}, |
| {"bits": [16, 23], "name": "spmwithaccum_global_offset"}, |
| {"bits": [24, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_CTRLRAM_DATA": { |
| "fields": [ |
| {"bits": [0, 7], "name": "data"}, |
| {"bits": [8, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_DATARAM_32BITCNTRS_REGIONS": { |
| "fields": [ |
| {"bits": [0, 7], "name": "spp_addr_region"}, |
| {"bits": [8, 15], "name": "swa_addr_region"}, |
| {"bits": [16, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_DATARAM_ADDR": { |
| "fields": [ |
| {"bits": [0, 6], "name": "addr"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_DATARAM_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "data"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_DATARAM_WRCOUNT": { |
| "fields": [ |
| {"bits": [0, 18], "name": "DataRamWrCount"}, |
| {"bits": [19, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_MODE": { |
| "fields": [ |
| {"bits": [0, 0], "name": "EnableAccum"}, |
| {"bits": [1, 1], "name": "EnableSpmWithAccumMode"}, |
| {"bits": [2, 2], "name": "EnableSPPMode"}, |
| {"bits": [3, 3], "name": "AutoResetPerfmonDisable"}, |
| {"bits": [4, 4], "name": "SwaAutoResetPerfmonDisable"}, |
| {"bits": [5, 5], "name": "AutoAccumEn"}, |
| {"bits": [6, 6], "name": "SwaAutoAccumEn"}, |
| {"bits": [7, 7], "name": "AutoSpmEn"}, |
| {"bits": [8, 8], "name": "SwaAutoSpmEn"}, |
| {"bits": [9, 9], "name": "Globals_LoadOverride"}, |
| {"bits": [10, 10], "name": "Globals_SwaLoadOverride"}, |
| {"bits": [11, 11], "name": "SE0_LoadOverride"}, |
| {"bits": [12, 12], "name": "SE0_SwaLoadOverride"}, |
| {"bits": [13, 13], "name": "SE1_LoadOverride"}, |
| {"bits": [14, 14], "name": "SE1_SwaLoadOverride"}, |
| {"bits": [15, 15], "name": "SE2_LoadOverride"}, |
| {"bits": [16, 16], "name": "SE2_SwaLoadOverride"}, |
| {"bits": [17, 17], "name": "SE3_LoadOverride"}, |
| {"bits": [18, 18], "name": "SE3_SwaLoadOverride"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_SAMPLES_REQUESTED": { |
| "fields": [ |
| {"bits": [0, 7], "name": "SamplesRequested"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_STATUS": { |
| "fields": [ |
| {"bits": [0, 7], "name": "NumbSamplesCompleted"}, |
| {"bits": [8, 8], "name": "AccumDone"}, |
| {"bits": [9, 9], "name": "SpmDone"}, |
| {"bits": [10, 10], "name": "AccumOverflow"}, |
| {"bits": [11, 11], "name": "AccumArmed"}, |
| {"bits": [12, 12], "name": "SequenceInProgress"}, |
| {"bits": [13, 13], "name": "FinalSequenceInProgress"}, |
| {"bits": [14, 14], "name": "AllFifosEmpty"}, |
| {"bits": [15, 15], "name": "FSMIsIdle"}, |
| {"bits": [16, 16], "name": "SwaAccumDone"}, |
| {"bits": [17, 17], "name": "SwaSpmDone"}, |
| {"bits": [18, 18], "name": "SwaAccumOverflow"}, |
| {"bits": [19, 19], "name": "SwaAccumArmed"}, |
| {"bits": [20, 20], "name": "AllSegsDone"}, |
| {"bits": [21, 21], "name": "RearmSwaPending"}, |
| {"bits": [22, 22], "name": "RearmSppPending"}, |
| {"bits": [23, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_ACCUM_THRESHOLD": { |
| "fields": [ |
| {"bits": [0, 15], "name": "Threshold"} |
| ] |
| }, |
| "RLC_SPM_DESER_START_SKEW": { |
| "fields": [ |
| {"bits": [0, 6], "name": "DESER_START_SKEW"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_GFXCLOCK_HIGHCOUNT": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GFXCLOCK_HIGHCOUNT"} |
| ] |
| }, |
| "RLC_SPM_GFXCLOCK_LOWCOUNT": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GFXCLOCK_LOWCOUNT"} |
| ] |
| }, |
| "RLC_SPM_GLB_SAMPLEDELAY_IND_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "GLB_SAMPLEDELAY_INDEX"} |
| ] |
| }, |
| "RLC_SPM_GLB_SAMPLEDELAY_IND_DATA": { |
| "fields": [ |
| {"bits": [0, 6], "name": "data"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_GLOBALS_MUXSEL_SKEW": { |
| "fields": [ |
| {"bits": [0, 6], "name": "GLOBALS_MUXSEL_SKEW"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_GLOBALS_SAMPLE_SKEW": { |
| "fields": [ |
| {"bits": [0, 6], "name": "GLOBALS_SAMPLE_SKEW"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_GLOBAL_MUXSEL_ADDR": { |
| "fields": [ |
| {"bits": [0, 7], "name": "PERFMON_SEL_ADDR"}, |
| {"bits": [8, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_GLOBAL_MUXSEL_ADDR_OFFSET": { |
| "fields": [ |
| {"bits": [0, 15], "name": "OFFSET"}, |
| {"bits": [16, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_CNTL": { |
| "fields": [ |
| {"bits": [0, 11], "name": "RESERVED1"}, |
| {"bits": [12, 13], "name": "PERFMON_RING_MODE"}, |
| {"bits": [14, 15], "name": "RESERVED"}, |
| {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_GLB_SEGMENT_SIZE": { |
| "fields": [ |
| {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, |
| {"bits": [8, 15], "name": "GLOBAL_NUM_LINE"}, |
| {"bits": [16, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_RING_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "RING_BASE_HI"}, |
| {"bits": [16, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_RING_BASE_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RING_BASE_LO"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_RING_SIZE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RING_BASE_SIZE"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_SE3TO0_SEGMENT_SIZE": { |
| "fields": [ |
| {"bits": [0, 7], "name": "SE0_NUM_LINE"}, |
| {"bits": [8, 15], "name": "SE1_NUM_LINE"}, |
| {"bits": [16, 23], "name": "SE2_NUM_LINE"}, |
| {"bits": [24, 31], "name": "SE3_NUM_LINE"} |
| ] |
| }, |
| "RLC_SPM_PERFMON_SEGMENT_SIZE": { |
| "fields": [ |
| {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"}, |
| {"bits": [8, 10], "name": "RESERVED1"}, |
| {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"}, |
| {"bits": [16, 20], "name": "SE0_NUM_LINE"}, |
| {"bits": [21, 25], "name": "SE1_NUM_LINE"}, |
| {"bits": [26, 30], "name": "SE2_NUM_LINE"}, |
| {"bits": [31, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_RING_RDPTR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"} |
| ] |
| }, |
| "RLC_SPM_RING_WRPTR": { |
| "fields": [ |
| {"bits": [0, 4], "name": "RESERVED"}, |
| {"bits": [5, 31], "name": "PERFMON_RING_WRPTR"} |
| ] |
| }, |
| "RLC_SPM_SEGMENT_THRESHOLD": { |
| "fields": [ |
| {"bits": [0, 7], "name": "NUM_SEGMENT_THRESHOLD"}, |
| {"bits": [8, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_SE_MUXSEL_ADDR": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERFMON_SEL_ADDR"}, |
| {"bits": [9, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_SE_MUXSEL_DATA": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PERFMON_SEL_DATA"} |
| ] |
| }, |
| "RLC_SPM_SE_MUXSEL_SKEW": { |
| "fields": [ |
| {"bits": [0, 6], "name": "SE_MUXSEL_SKEW"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_SE_SAMPLEDELAY_IND_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SE_SAMPLEDELAY_INDEX"} |
| ] |
| }, |
| "RLC_SPM_SE_SAMPLE_SKEW": { |
| "fields": [ |
| {"bits": [0, 6], "name": "SE_SAMPLE_SKEW"}, |
| {"bits": [7, 31], "name": "RESERVED"} |
| ] |
| }, |
| "RLC_SPM_VIRT_CTRL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PauseSpmSamplingRequest"} |
| ] |
| }, |
| "RLC_SPM_VIRT_STATUS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SpmSamplingPaused"} |
| ] |
| }, |
| "RMI_PERF_COUNTER_CNTL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"}, |
| {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"}, |
| {"bits": [4, 5], "name": "TC_PERF_EN_SEL"}, |
| {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"}, |
| {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"}, |
| {"bits": [10, 13], "name": "PERF_COUNTER_CID"}, |
| {"bits": [14, 18], "name": "PERF_COUNTER_VMID"}, |
| {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"}, |
| {"bits": [25, 25], "name": "PERF_SOFT_RESET"}, |
| {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"} |
| ] |
| }, |
| "SCRATCH_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "OBSOLETE_ADDR"} |
| ] |
| }, |
| "SCRATCH_REG0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG0"} |
| ] |
| }, |
| "SCRATCH_REG1": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG1"} |
| ] |
| }, |
| "SCRATCH_REG2": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG2"} |
| ] |
| }, |
| "SCRATCH_REG3": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG3"} |
| ] |
| }, |
| "SCRATCH_REG4": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG4"} |
| ] |
| }, |
| "SCRATCH_REG5": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG5"} |
| ] |
| }, |
| "SCRATCH_REG6": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG6"} |
| ] |
| }, |
| "SCRATCH_REG7": { |
| "fields": [ |
| {"bits": [0, 31], "name": "SCRATCH_REG7"} |
| ] |
| }, |
| "SCRATCH_REG_ATOMIC": { |
| "fields": [ |
| {"bits": [0, 23], "name": "IMMED"}, |
| {"bits": [24, 26], "name": "ID"}, |
| {"bits": [27, 27], "name": "reserved27"}, |
| {"bits": [28, 30], "name": "OP"}, |
| {"bits": [31, 31], "name": "reserved31"} |
| ] |
| }, |
| "SCRATCH_UMSK": { |
| "fields": [ |
| {"bits": [0, 7], "name": "OBSOLETE_UMSK"}, |
| {"bits": [16, 17], "name": "OBSOLETE_SWAP"} |
| ] |
| }, |
| "SDMA0_PERFCNT_MISC_CNTL": { |
| "fields": [ |
| {"bits": [0, 15], "name": "CMD_OP"} |
| ] |
| }, |
| "SPI_BARYC_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"}, |
| {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"}, |
| {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"}, |
| {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"}, |
| {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"}, |
| {"bits": [20, 20], "name": "POS_FLOAT_ULC"}, |
| {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"} |
| ] |
| }, |
| "SPI_CONFIG_CNTL": { |
| "fields": [ |
| {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"}, |
| {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"}, |
| {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"}, |
| {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"}, |
| {"bits": [26, 26], "name": "FORCE_HALF_RATE_PC_EXP"}, |
| {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}, |
| {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"}, |
| {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"}, |
| {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"} |
| ] |
| }, |
| "SPI_CONFIG_CNTL_REMAP": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RESERVED"} |
| ] |
| }, |
| "SPI_INTERP_CONTROL_0": { |
| "fields": [ |
| {"bits": [0, 0], "name": "FLAT_SHADE_ENA"}, |
| {"bits": [1, 1], "name": "PNT_SPRITE_ENA"}, |
| {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"}, |
| {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"}, |
| {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"}, |
| {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"}, |
| {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"} |
| ] |
| }, |
| "SPI_PERFCOUNTER_BINS": { |
| "fields": [ |
| {"bits": [0, 3], "name": "BIN0_MIN"}, |
| {"bits": [4, 7], "name": "BIN0_MAX"}, |
| {"bits": [8, 11], "name": "BIN1_MIN"}, |
| {"bits": [12, 15], "name": "BIN1_MAX"}, |
| {"bits": [16, 19], "name": "BIN2_MIN"}, |
| {"bits": [20, 23], "name": "BIN2_MAX"}, |
| {"bits": [24, 27], "name": "BIN3_MIN"}, |
| {"bits": [28, 31], "name": "BIN3_MAX"} |
| ] |
| }, |
| "SPI_PS_INPUT_CNTL_0": { |
| "fields": [ |
| {"bits": [0, 5], "name": "OFFSET"}, |
| {"bits": [8, 9], "name": "DEFAULT_VAL"}, |
| {"bits": [10, 10], "name": "FLAT_SHADE"}, |
| {"bits": [11, 11], "name": "ROTATE_PC_PTR"}, |
| {"bits": [13, 16], "name": "CYL_WRAP"}, |
| {"bits": [17, 17], "name": "PT_SPRITE_TEX"}, |
| {"bits": [18, 18], "name": "DUP"}, |
| {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, |
| {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, |
| {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, |
| {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"}, |
| {"bits": [24, 24], "name": "ATTR0_VALID"}, |
| {"bits": [25, 25], "name": "ATTR1_VALID"} |
| ] |
| }, |
| "SPI_PS_INPUT_CNTL_20": { |
| "fields": [ |
| {"bits": [0, 5], "name": "OFFSET"}, |
| {"bits": [8, 9], "name": "DEFAULT_VAL"}, |
| {"bits": [10, 10], "name": "FLAT_SHADE"}, |
| {"bits": [11, 11], "name": "ROTATE_PC_PTR"}, |
| {"bits": [18, 18], "name": "DUP"}, |
| {"bits": [19, 19], "name": "FP16_INTERP_MODE"}, |
| {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"}, |
| {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"}, |
| {"bits": [24, 24], "name": "ATTR0_VALID"}, |
| {"bits": [25, 25], "name": "ATTR1_VALID"} |
| ] |
| }, |
| "SPI_PS_INPUT_ENA": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"}, |
| {"bits": [1, 1], "name": "PERSP_CENTER_ENA"}, |
| {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"}, |
| {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"}, |
| {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"}, |
| {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"}, |
| {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"}, |
| {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"}, |
| {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"}, |
| {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"}, |
| {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"}, |
| {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"}, |
| {"bits": [12, 12], "name": "FRONT_FACE_ENA"}, |
| {"bits": [13, 13], "name": "ANCILLARY_ENA"}, |
| {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"}, |
| {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"} |
| ] |
| }, |
| "SPI_PS_IN_CONTROL": { |
| "fields": [ |
| {"bits": [0, 5], "name": "NUM_INTERP"}, |
| {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"}, |
| {"bits": [8, 8], "name": "LATE_PC_DEALLOC"}, |
| {"bits": [9, 13], "name": "NUM_PRIM_INTERP"}, |
| {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}, |
| {"bits": [15, 15], "name": "PS_W32_EN"} |
| ] |
| }, |
| "SPI_SHADER_COL_FORMAT": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"}, |
| {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"}, |
| {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"}, |
| {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"}, |
| {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"}, |
| {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"}, |
| {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"}, |
| {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"} |
| ] |
| }, |
| "SPI_SHADER_IDX_FORMAT": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "IDX0_EXPORT_FORMAT"} |
| ] |
| }, |
| "SPI_SHADER_LATE_ALLOC_VS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "LIMIT"} |
| ] |
| }, |
| "SPI_SHADER_PGM_CHKSUM_PS": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CHECKSUM"} |
| ] |
| }, |
| "SPI_SHADER_PGM_HI_PS": { |
| "fields": [ |
| {"bits": [0, 7], "name": "MEM_BASE"} |
| ] |
| }, |
| "SPI_SHADER_PGM_LO_PS": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MEM_BASE"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC1_GS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "VGPRS"}, |
| {"bits": [6, 9], "name": "SGPRS"}, |
| {"bits": [10, 11], "name": "PRIORITY"}, |
| {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, |
| {"bits": [20, 20], "name": "PRIV"}, |
| {"bits": [21, 21], "name": "DX10_CLAMP"}, |
| {"bits": [23, 23], "name": "IEEE_MODE"}, |
| {"bits": [24, 24], "name": "CU_GROUP_ENABLE"}, |
| {"bits": [25, 25], "name": "MEM_ORDERED"}, |
| {"bits": [26, 26], "name": "FWD_PROGRESS"}, |
| {"bits": [27, 27], "name": "WGP_MODE"}, |
| {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"}, |
| {"bits": [31, 31], "name": "FP16_OVFL"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC1_HS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "VGPRS"}, |
| {"bits": [6, 9], "name": "SGPRS"}, |
| {"bits": [10, 11], "name": "PRIORITY"}, |
| {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, |
| {"bits": [20, 20], "name": "PRIV"}, |
| {"bits": [21, 21], "name": "DX10_CLAMP"}, |
| {"bits": [23, 23], "name": "IEEE_MODE"}, |
| {"bits": [24, 24], "name": "MEM_ORDERED"}, |
| {"bits": [25, 25], "name": "FWD_PROGRESS"}, |
| {"bits": [26, 26], "name": "WGP_MODE"}, |
| {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"}, |
| {"bits": [30, 30], "name": "FP16_OVFL"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC1_PS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "VGPRS"}, |
| {"bits": [6, 9], "name": "SGPRS"}, |
| {"bits": [10, 11], "name": "PRIORITY"}, |
| {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, |
| {"bits": [20, 20], "name": "PRIV"}, |
| {"bits": [21, 21], "name": "DX10_CLAMP"}, |
| {"bits": [23, 23], "name": "IEEE_MODE"}, |
| {"bits": [24, 24], "name": "CU_GROUP_DISABLE"}, |
| {"bits": [25, 25], "name": "MEM_ORDERED"}, |
| {"bits": [26, 26], "name": "FWD_PROGRESS"}, |
| {"bits": [27, 27], "name": "LOAD_PROVOKING_VTX"}, |
| {"bits": [29, 29], "name": "FP16_OVFL"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC1_VS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "VGPRS"}, |
| {"bits": [6, 9], "name": "SGPRS"}, |
| {"bits": [10, 11], "name": "PRIORITY"}, |
| {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"}, |
| {"bits": [20, 20], "name": "PRIV"}, |
| {"bits": [21, 21], "name": "DX10_CLAMP"}, |
| {"bits": [23, 23], "name": "IEEE_MODE"}, |
| {"bits": [24, 25], "name": "VGPR_COMP_CNT"}, |
| {"bits": [26, 26], "name": "CU_GROUP_ENABLE"}, |
| {"bits": [27, 27], "name": "MEM_ORDERED"}, |
| {"bits": [28, 28], "name": "FWD_PROGRESS"}, |
| {"bits": [31, 31], "name": "FP16_OVFL"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC2_GS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"}, |
| {"bits": [18, 18], "name": "OC_LDS_EN"}, |
| {"bits": [19, 26], "name": "LDS_SIZE"}, |
| {"bits": [27, 27], "name": "USER_SGPR_MSB"}, |
| {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC2_GS_VS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [16, 17], "name": "VGPR_COMP_CNT"}, |
| {"bits": [18, 18], "name": "OC_LDS_EN"}, |
| {"bits": [19, 26], "name": "LDS_SIZE"}, |
| {"bits": [27, 27], "name": "SKIP_USGPR0"}, |
| {"bits": [28, 28], "name": "USER_SGPR_MSB"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC2_HS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 7], "name": "OC_LDS_EN"}, |
| {"bits": [8, 8], "name": "TG_SIZE_EN"}, |
| {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [18, 26], "name": "LDS_SIZE"}, |
| {"bits": [27, 27], "name": "USER_SGPR_MSB"}, |
| {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC2_PS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 7], "name": "WAVE_CNT_EN"}, |
| {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"}, |
| {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"}, |
| {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"}, |
| {"bits": [27, 27], "name": "USER_SGPR_MSB"}, |
| {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC2_VS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCRATCH_EN"}, |
| {"bits": [1, 5], "name": "USER_SGPR"}, |
| {"bits": [6, 6], "name": "TRAP_PRESENT"}, |
| {"bits": [7, 7], "name": "OC_LDS_EN"}, |
| {"bits": [8, 8], "name": "SO_BASE0_EN"}, |
| {"bits": [9, 9], "name": "SO_BASE1_EN"}, |
| {"bits": [10, 10], "name": "SO_BASE2_EN"}, |
| {"bits": [11, 11], "name": "SO_BASE3_EN"}, |
| {"bits": [12, 12], "name": "SO_EN"}, |
| {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [22, 22], "name": "PC_BASE_EN"}, |
| {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}, |
| {"bits": [27, 27], "name": "USER_SGPR_MSB"}, |
| {"bits": [28, 31], "name": "SHARED_VGPR_CNT"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC3_GS": { |
| "fields": [ |
| {"bits": [0, 15], "name": "CU_EN"}, |
| {"bits": [16, 21], "name": "WAVE_LIMIT"}, |
| {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}, |
| {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC3_HS": { |
| "fields": [ |
| {"bits": [0, 5], "name": "WAVE_LIMIT"}, |
| {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"}, |
| {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}, |
| {"bits": [16, 31], "name": "CU_EN"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC3_PS": { |
| "fields": [ |
| {"bits": [0, 15], "name": "CU_EN"}, |
| {"bits": [16, 21], "name": "WAVE_LIMIT"}, |
| {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC4_GS": { |
| "fields": [ |
| {"bits": [0, 15], "name": "CU_EN"}, |
| {"bits": [16, 22], "name": "SPI_SHADER_LATE_ALLOC_GS"} |
| ] |
| }, |
| "SPI_SHADER_PGM_RSRC4_PS": { |
| "fields": [ |
| {"bits": [0, 15], "name": "CU_EN"} |
| ] |
| }, |
| "SPI_SHADER_POS_FORMAT": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"}, |
| {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"}, |
| {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"}, |
| {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}, |
| {"bits": [16, 19], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS4_EXPORT_FORMAT"} |
| ] |
| }, |
| "SPI_SHADER_REQ_CTRL_PS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SOFT_GROUPING_EN"}, |
| {"bits": [1, 4], "name": "NUMBER_OF_REQUESTS_PER_CU"}, |
| {"bits": [5, 8], "name": "SOFT_GROUPING_ALLOCATION_TIMEOUT"}, |
| {"bits": [9, 9], "name": "HARD_LOCK_HYSTERESIS"}, |
| {"bits": [10, 14], "name": "HARD_LOCK_LOW_THRESHOLD"}, |
| {"bits": [15, 15], "name": "PRODUCER_REQUEST_LOCKOUT"}, |
| {"bits": [16, 16], "name": "GLOBAL_SCANNING_EN"}, |
| {"bits": [17, 19], "name": "ALLOCATION_RATE_THROTTLING_THRESHOLD"} |
| ] |
| }, |
| "SPI_SHADER_USER_ACCUM_PS_0": { |
| "fields": [ |
| {"bits": [0, 6], "name": "CONTRIBUTION"} |
| ] |
| }, |
| "SPI_SHADER_USER_DATA_PS_0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "DATA"} |
| ] |
| }, |
| "SPI_SHADER_Z_FORMAT": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"} |
| ] |
| }, |
| "SPI_VS_OUT_CONFIG": { |
| "fields": [ |
| {"bits": [1, 5], "name": "VS_EXPORT_COUNT"}, |
| {"bits": [6, 6], "name": "VS_HALF_PACK"}, |
| {"bits": [7, 7], "name": "NO_PC_EXPORT"}, |
| {"bits": [8, 12], "name": "PRIM_EXPORT_COUNT"} |
| ] |
| }, |
| "SQC_CACHES": { |
| "fields": [ |
| {"bits": [0, 0], "name": "TARGET_INST"}, |
| {"bits": [1, 1], "name": "TARGET_DATA"}, |
| {"bits": [2, 2], "name": "INVALIDATE"}, |
| {"bits": [16, 16], "name": "COMPLETE"}, |
| {"bits": [17, 18], "name": "L2_WB_POLICY"} |
| ] |
| }, |
| "SQ_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 8], "name": "PERF_SEL"}, |
| {"bits": [20, 23], "name": "SPM_MODE"}, |
| {"bits": [28, 31], "name": "PERF_MODE"} |
| ] |
| }, |
| "SQ_PERFCOUNTER_CTRL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PS_EN"}, |
| {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, |
| {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, |
| {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, |
| {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, |
| {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, |
| {"bits": [6, 6], "name": "CS_EN"}, |
| {"bits": [8, 9], "name": "CNTR_RATE"}, |
| {"bits": [13, 13], "name": "DISABLE_FLUSH"}, |
| {"bits": [14, 14], "name": "DISABLE_ME0PIPE0_PERF"}, |
| {"bits": [15, 15], "name": "DISABLE_ME0PIPE1_PERF"}, |
| {"bits": [16, 16], "name": "DISABLE_ME1PIPE0_PERF"}, |
| {"bits": [17, 17], "name": "DISABLE_ME1PIPE1_PERF"}, |
| {"bits": [18, 18], "name": "DISABLE_ME1PIPE2_PERF"}, |
| {"bits": [19, 19], "name": "DISABLE_ME1PIPE3_PERF"} |
| ] |
| }, |
| "SQ_PERFCOUNTER_CTRL2": { |
| "fields": [ |
| {"bits": [0, 0], "name": "FORCE_EN"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_BUF0_BASE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BASE_LO"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_BUF0_SIZE": { |
| "fields": [ |
| {"bits": [0, 3], "name": "BASE_HI"}, |
| {"bits": [8, 29], "name": "SIZE"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_CTRL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "MODE"}, |
| {"bits": [2, 2], "name": "ALL_VMID"}, |
| {"bits": [3, 3], "name": "CH_PERF_EN"}, |
| {"bits": [4, 4], "name": "INTERRUPT_EN"}, |
| {"bits": [5, 5], "name": "DOUBLE_BUFFER"}, |
| {"bits": [6, 8], "name": "HIWATER"}, |
| {"bits": [9, 9], "name": "REG_STALL_EN"}, |
| {"bits": [10, 10], "name": "SPI_STALL_EN"}, |
| {"bits": [11, 11], "name": "SQ_STALL_EN"}, |
| {"bits": [12, 12], "name": "REG_DROP_ON_STALL"}, |
| {"bits": [13, 13], "name": "UTIL_TIMER"}, |
| {"bits": [14, 15], "name": "WAVESTART_MODE"}, |
| {"bits": [16, 17], "name": "RT_FREQ"}, |
| {"bits": [18, 18], "name": "SYNC_COUNT_MARKERS"}, |
| {"bits": [19, 19], "name": "SYNC_COUNT_DRAWS"}, |
| {"bits": [20, 22], "name": "LOWATER_OFFSET"}, |
| {"bits": [28, 28], "name": "AUTO_FLUSH_PADDING_DIS"}, |
| {"bits": [29, 29], "name": "AUTO_FLUSH_MODE"}, |
| {"bits": [30, 30], "name": "CAPTURE_ALL"}, |
| {"bits": [31, 31], "name": "DRAW_EVENT_EN"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_DROPPED_CNTR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "CNTR"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_MASK": { |
| "fields": [ |
| {"bits": [0, 1], "name": "SIMD_SEL"}, |
| {"bits": [4, 7], "name": "WGP_SEL"}, |
| {"bits": [9, 9], "name": "SA_SEL"}, |
| {"bits": [10, 16], "name": "WTYPE_INCLUDE"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_STATUS": { |
| "fields": [ |
| {"bits": [0, 11], "name": "FINISH_PENDING"}, |
| {"bits": [12, 23], "name": "FINISH_DONE"}, |
| {"bits": [24, 24], "name": "UTC_ERR"}, |
| {"bits": [25, 25], "name": "BUSY"}, |
| {"bits": [26, 26], "name": "EVENT_CNTR_OVERFLOW"}, |
| {"bits": [27, 27], "name": "EVENT_CNTR_STALL"}, |
| {"bits": [28, 31], "name": "OWNER_VMID"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_STATUS2": { |
| "fields": [ |
| {"bits": [0, 0], "name": "BUF0_FULL"}, |
| {"bits": [1, 1], "name": "BUF1_FULL"}, |
| {"bits": [4, 4], "name": "PACKET_LOST_BUF_NO_LOCKDOWN"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_TOKEN_MASK": { |
| "fields": [ |
| {"bits": [0, 10], "enum_ref": "ThreadTraceTokenExclude", "name": "TOKEN_EXCLUDE"}, |
| {"bits": [12, 12], "name": "BOP_EVENTS_TOKEN_INCLUDE"}, |
| {"bits": [16, 23], "enum_ref": "ThreadTraceRegInclude", "name": "REG_INCLUDE"}, |
| {"bits": [24, 25], "name": "INST_EXCLUDE"}, |
| {"bits": [26, 28], "name": "REG_EXCLUDE"}, |
| {"bits": [31, 31], "name": "REG_DETAIL_ALL"} |
| ] |
| }, |
| "SQ_THREAD_TRACE_WPTR": { |
| "fields": [ |
| {"bits": [0, 28], "name": "OFFSET"}, |
| {"bits": [31, 31], "name": "BUFFER_ID"} |
| ] |
| }, |
| "SQ_WAVE_ACTIVE": { |
| "fields": [ |
| {"bits": [0, 19], "name": "WAVE_SLOT"} |
| ] |
| }, |
| "SQ_WAVE_EXEC_HI": { |
| "fields": [ |
| {"bits": [0, 31], "name": "EXEC_HI"} |
| ] |
| }, |
| "SQ_WAVE_EXEC_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "EXEC_LO"} |
| ] |
| }, |
| "SQ_WAVE_FLUSH_IB": { |
| "fields": [ |
| {"bits": [0, 31], "name": "UNUSED"} |
| ] |
| }, |
| "SQ_WAVE_GPR_ALLOC": { |
| "fields": [ |
| {"bits": [0, 7], "name": "VGPR_BASE"}, |
| {"bits": [8, 15], "name": "VGPR_SIZE"}, |
| {"bits": [16, 23], "name": "SGPR_BASE"}, |
| {"bits": [24, 27], "name": "SGPR_SIZE"} |
| ] |
| }, |
| "SQ_WAVE_HW_ID1": { |
| "fields": [ |
| {"bits": [0, 4], "name": "WAVE_ID"}, |
| {"bits": [8, 9], "name": "SIMD_ID"}, |
| {"bits": [10, 13], "name": "WGP_ID"}, |
| {"bits": [16, 16], "name": "SA_ID"}, |
| {"bits": [18, 19], "name": "SE_ID"} |
| ] |
| }, |
| "SQ_WAVE_HW_ID2": { |
| "fields": [ |
| {"bits": [0, 3], "name": "QUEUE_ID"}, |
| {"bits": [4, 5], "name": "PIPE_ID"}, |
| {"bits": [8, 9], "name": "ME_ID"}, |
| {"bits": [12, 14], "name": "STATE_ID"}, |
| {"bits": [16, 20], "name": "WG_ID"}, |
| {"bits": [24, 27], "name": "VM_ID"} |
| ] |
| }, |
| "SQ_WAVE_HW_ID_LEGACY": { |
| "fields": [ |
| {"bits": [0, 3], "name": "WAVE_ID"}, |
| {"bits": [4, 5], "name": "SIMD_ID"}, |
| {"bits": [6, 7], "name": "PIPE_ID"}, |
| {"bits": [8, 11], "name": "CU_ID"}, |
| {"bits": [12, 12], "name": "SH_ID"}, |
| {"bits": [13, 14], "name": "SE_ID"}, |
| {"bits": [15, 15], "name": "WAVE_ID_MSB"}, |
| {"bits": [16, 19], "name": "TG_ID"}, |
| {"bits": [20, 23], "name": "VM_ID"}, |
| {"bits": [24, 26], "name": "QUEUE_ID"}, |
| {"bits": [27, 29], "name": "STATE_ID"}, |
| {"bits": [30, 31], "name": "ME_ID"} |
| ] |
| }, |
| "SQ_WAVE_IB_DBG1": { |
| "fields": [ |
| {"bits": [24, 24], "name": "WAVE_IDLE"}, |
| {"bits": [25, 31], "name": "MISC_CNT"} |
| ] |
| }, |
| "SQ_WAVE_IB_STS": { |
| "fields": [ |
| {"bits": [0, 3], "name": "VM_CNT"}, |
| {"bits": [4, 6], "name": "EXP_CNT"}, |
| {"bits": [7, 7], "name": "LGKM_CNT_BIT4"}, |
| {"bits": [8, 11], "name": "LGKM_CNT"}, |
| {"bits": [12, 14], "name": "VALU_CNT"}, |
| {"bits": [22, 23], "name": "VM_CNT_HI"}, |
| {"bits": [24, 24], "name": "LGKM_CNT_BIT5"}, |
| {"bits": [26, 31], "name": "VS_CNT"} |
| ] |
| }, |
| "SQ_WAVE_IB_STS2": { |
| "fields": [ |
| {"bits": [0, 1], "name": "INST_PREFETCH"}, |
| {"bits": [7, 7], "name": "RESOURCE_OVERRIDE"}, |
| {"bits": [8, 9], "name": "MEM_ORDER"}, |
| {"bits": [10, 10], "name": "FWD_PROGRESS"}, |
| {"bits": [11, 11], "name": "WAVE64"} |
| ] |
| }, |
| "SQ_WAVE_INST_DW0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "INST_DW0"} |
| ] |
| }, |
| "SQ_WAVE_LDS_ALLOC": { |
| "fields": [ |
| {"bits": [0, 8], "name": "LDS_BASE"}, |
| {"bits": [12, 20], "name": "LDS_SIZE"}, |
| {"bits": [24, 27], "name": "VGPR_SHARED_SIZE"} |
| ] |
| }, |
| "SQ_WAVE_M0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "M0"} |
| ] |
| }, |
| "SQ_WAVE_MODE": { |
| "fields": [ |
| {"bits": [0, 3], "name": "FP_ROUND"}, |
| {"bits": [4, 7], "name": "FP_DENORM"}, |
| {"bits": [8, 8], "name": "DX10_CLAMP"}, |
| {"bits": [9, 9], "name": "IEEE"}, |
| {"bits": [10, 10], "name": "LOD_CLAMPED"}, |
| {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}, |
| {"bits": [23, 23], "name": "FP16_OVFL"}, |
| {"bits": [27, 27], "name": "DISABLE_PERF"} |
| ] |
| }, |
| "SQ_WAVE_PC_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "PC_HI"} |
| ] |
| }, |
| "SQ_WAVE_PC_LO": { |
| "fields": [ |
| {"bits": [0, 31], "name": "PC_LO"} |
| ] |
| }, |
| "SQ_WAVE_POPS_PACKER": { |
| "fields": [ |
| {"bits": [0, 0], "name": "POPS_EN"}, |
| {"bits": [1, 2], "name": "POPS_PACKER_ID"} |
| ] |
| }, |
| "SQ_WAVE_SCHED_MODE": { |
| "fields": [ |
| {"bits": [0, 1], "name": "DEP_MODE"} |
| ] |
| }, |
| "SQ_WAVE_SHADER_CYCLES": { |
| "fields": [ |
| {"bits": [0, 19], "name": "CYCLES"} |
| ] |
| }, |
| "SQ_WAVE_STATUS": { |
| "fields": [ |
| {"bits": [0, 0], "name": "SCC"}, |
| {"bits": [1, 2], "name": "SPI_PRIO"}, |
| {"bits": [3, 4], "name": "USER_PRIO"}, |
| {"bits": [5, 5], "name": "PRIV"}, |
| {"bits": [6, 6], "name": "TRAP_EN"}, |
| {"bits": [7, 7], "name": "TTRACE_EN"}, |
| {"bits": [8, 8], "name": "EXPORT_RDY"}, |
| {"bits": [9, 9], "name": "EXECZ"}, |
| {"bits": [10, 10], "name": "VCCZ"}, |
| {"bits": [11, 11], "name": "IN_TG"}, |
| {"bits": [12, 12], "name": "IN_BARRIER"}, |
| {"bits": [13, 13], "name": "HALT"}, |
| {"bits": [14, 14], "name": "TRAP"}, |
| {"bits": [15, 15], "name": "TTRACE_SIMD_EN"}, |
| {"bits": [16, 16], "name": "VALID"}, |
| {"bits": [17, 17], "name": "ECC_ERR"}, |
| {"bits": [18, 18], "name": "SKIP_EXPORT"}, |
| {"bits": [19, 19], "name": "PERF_EN"}, |
| {"bits": [23, 23], "name": "FATAL_HALT"}, |
| {"bits": [27, 27], "name": "MUST_EXPORT"} |
| ] |
| }, |
| "SQ_WAVE_TRAPSTS": { |
| "fields": [ |
| {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"}, |
| {"bits": [10, 10], "name": "SAVECTX"}, |
| {"bits": [11, 11], "name": "ILLEGAL_INST"}, |
| {"bits": [12, 14], "name": "EXCP_HI"}, |
| {"bits": [15, 15], "name": "BUFFER_OOB"}, |
| {"bits": [16, 19], "name": "EXCP_CYCLE"}, |
| {"bits": [20, 23], "name": "EXCP_GROUP_MASK"}, |
| {"bits": [24, 24], "name": "EXCP_WAVE64HI"}, |
| {"bits": [28, 28], "name": "UTC_ERROR"}, |
| {"bits": [29, 31], "name": "DP_RATE"} |
| ] |
| }, |
| "SQ_WAVE_VGPR_OFFSET": { |
| "fields": [ |
| {"bits": [0, 5], "name": "SRC0"}, |
| {"bits": [6, 11], "name": "SRC1"}, |
| {"bits": [12, 17], "name": "SRC2"}, |
| {"bits": [18, 23], "name": "DST"} |
| ] |
| }, |
| "SX_BLEND_OPT_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"}, |
| {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"}, |
| {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"}, |
| {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"}, |
| {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"}, |
| {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"}, |
| {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"}, |
| {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"}, |
| {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"}, |
| {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"}, |
| {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"}, |
| {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"}, |
| {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"}, |
| {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"}, |
| {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"}, |
| {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"}, |
| {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"} |
| ] |
| }, |
| "SX_BLEND_OPT_EPSILON": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"}, |
| {"bits": [4, 7], "name": "MRT1_EPSILON"}, |
| {"bits": [8, 11], "name": "MRT2_EPSILON"}, |
| {"bits": [12, 15], "name": "MRT3_EPSILON"}, |
| {"bits": [16, 19], "name": "MRT4_EPSILON"}, |
| {"bits": [20, 23], "name": "MRT5_EPSILON"}, |
| {"bits": [24, 27], "name": "MRT6_EPSILON"}, |
| {"bits": [28, 31], "name": "MRT7_EPSILON"} |
| ] |
| }, |
| "SX_MRT0_BLEND_OPT": { |
| "fields": [ |
| {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"}, |
| {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"}, |
| {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"}, |
| {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"}, |
| {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"}, |
| {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"} |
| ] |
| }, |
| "SX_PERFCOUNTER2_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL"}, |
| {"bits": [20, 23], "name": "CNTR_MODE"}, |
| {"bits": [28, 31], "name": "PERF_MODE"} |
| ] |
| }, |
| "SX_PS_DOWNCONVERT": { |
| "fields": [ |
| {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"}, |
| {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"}, |
| {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"}, |
| {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"}, |
| {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"}, |
| {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"}, |
| {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"}, |
| {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"} |
| ] |
| }, |
| "SX_PS_DOWNCONVERT_CONTROL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "MRT0_FMT_MAPPING_DISABLE"}, |
| {"bits": [1, 1], "name": "MRT1_FMT_MAPPING_DISABLE"}, |
| {"bits": [2, 2], "name": "MRT2_FMT_MAPPING_DISABLE"}, |
| {"bits": [3, 3], "name": "MRT3_FMT_MAPPING_DISABLE"}, |
| {"bits": [4, 4], "name": "MRT4_FMT_MAPPING_DISABLE"}, |
| {"bits": [5, 5], "name": "MRT5_FMT_MAPPING_DISABLE"}, |
| {"bits": [6, 6], "name": "MRT6_FMT_MAPPING_DISABLE"}, |
| {"bits": [7, 7], "name": "MRT7_FMT_MAPPING_DISABLE"} |
| ] |
| }, |
| "TA_BC_BASE_ADDR": { |
| "fields": [ |
| {"bits": [0, 31], "name": "ADDRESS"} |
| ] |
| }, |
| "TA_BC_BASE_ADDR_HI": { |
| "fields": [ |
| {"bits": [0, 7], "name": "ADDRESS"} |
| ] |
| }, |
| "UTCL1_PERFCOUNTER0_SELECT": { |
| "fields": [ |
| {"bits": [0, 9], "name": "PERF_SEL"}, |
| {"bits": [28, 31], "name": "COUNTER_MODE"} |
| ] |
| }, |
| "VGT_DISPATCH_DRAW_INDEX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MATCH_INDEX"} |
| ] |
| }, |
| "VGT_DMA_BASE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BASE_ADDR"} |
| ] |
| }, |
| "VGT_DMA_BASE_HI": { |
| "fields": [ |
| {"bits": [0, 15], "name": "BASE_ADDR"} |
| ] |
| }, |
| "VGT_DMA_INDEX_TYPE": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, |
| {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"}, |
| {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"}, |
| {"bits": [6, 7], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, |
| {"bits": [8, 8], "name": "ATC"}, |
| {"bits": [9, 9], "name": "NOT_EOP"}, |
| {"bits": [10, 10], "name": "REQ_PATH"}, |
| {"bits": [11, 13], "name": "MTYPE"}, |
| {"bits": [14, 14], "name": "DISABLE_INSTANCE_PACKING"} |
| ] |
| }, |
| "VGT_DMA_MAX_SIZE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MAX_SIZE"} |
| ] |
| }, |
| "VGT_DMA_NUM_INSTANCES": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_INSTANCES"} |
| ] |
| }, |
| "VGT_DMA_SIZE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "NUM_INDICES"} |
| ] |
| }, |
| "VGT_DRAW_INITIATOR": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"}, |
| {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"}, |
| {"bits": [4, 4], "name": "SPRITE_EN_R6XX"}, |
| {"bits": [5, 5], "name": "NOT_EOP"}, |
| {"bits": [6, 6], "name": "USE_OPAQUE"}, |
| {"bits": [29, 31], "name": "REG_RT_INDEX"} |
| ] |
| }, |
| "VGT_DRAW_PAYLOAD_CNTL": { |
| "fields": [ |
| {"bits": [1, 1], "name": "EN_REG_RT_INDEX"}, |
| {"bits": [3, 3], "name": "EN_PRIM_PAYLOAD"}, |
| {"bits": [4, 4], "name": "EN_DRAW_VP"} |
| ] |
| }, |
| "VGT_ENHANCE": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MISC"} |
| ] |
| }, |
| "VGT_ESGS_RING_ITEMSIZE": { |
| "fields": [ |
| {"bits": [0, 14], "name": "ITEMSIZE"} |
| ] |
| }, |
| "VGT_ESGS_RING_SIZE_UMD": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MEM_SIZE"} |
| ] |
| }, |
| "VGT_ES_PER_GS": { |
| "fields": [ |
| {"bits": [0, 10], "name": "ES_PER_GS"} |
| ] |
| }, |
| "VGT_EVENT_ADDRESS_REG": { |
| "fields": [ |
| {"bits": [0, 27], "name": "ADDRESS_LOW"} |
| ] |
| }, |
| "VGT_EVENT_INITIATOR": { |
| "fields": [ |
| {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"}, |
| {"bits": [10, 26], "name": "ADDRESS_HI"}, |
| {"bits": [27, 27], "name": "EXTENDED_EVENT"} |
| ] |
| }, |
| "VGT_GROUP_DECR": { |
| "fields": [ |
| {"bits": [0, 3], "name": "DECR"} |
| ] |
| }, |
| "VGT_GROUP_FIRST_DECR": { |
| "fields": [ |
| {"bits": [0, 3], "name": "FIRST_DECR"} |
| ] |
| }, |
| "VGT_GROUP_PRIM_TYPE": { |
| "fields": [ |
| {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}, |
| {"bits": [14, 14], "name": "RETAIN_ORDER"}, |
| {"bits": [15, 15], "name": "RETAIN_QUADS"}, |
| {"bits": [16, 18], "name": "PRIM_ORDER"} |
| ] |
| }, |
| "VGT_GROUP_VECT_0_CNTL": { |
| "fields": [ |
| {"bits": [0, 0], "name": "COMP_X_EN"}, |
| {"bits": [1, 1], "name": "COMP_Y_EN"}, |
| {"bits": [2, 2], "name": "COMP_Z_EN"}, |
| {"bits": [3, 3], "name": "COMP_W_EN"}, |
| {"bits": [8, 15], "name": "STRIDE"}, |
| {"bits": [16, 23], "name": "SHIFT"} |
| ] |
| }, |
| "VGT_GROUP_VECT_0_FMT_CNTL": { |
| "fields": [ |
| {"bits": [0, 3], "name": "X_CONV"}, |
| {"bits": [4, 7], "name": "X_OFFSET"}, |
| {"bits": [8, 11], "name": "Y_CONV"}, |
| {"bits": [12, 15], "name": "Y_OFFSET"}, |
| {"bits": [16, 19], "name": "Z_CONV"}, |
| {"bits": [20, 23], "name": "Z_OFFSET"}, |
| {"bits": [24, 27], "name": "W_CONV"}, |
| {"bits": [28, 31], "name": "W_OFFSET"} |
| ] |
| }, |
| "VGT_GSVS_RING_OFFSET_1": { |
| "fields": [ |
| {"bits": [0, 14], "name": "OFFSET"} |
| ] |
| }, |
| "VGT_GS_INSTANCE_CNT": { |
| "fields": [ |
| {"bits": [0, 0], "name": "ENABLE"}, |
| {"bits": [2, 8], "name": "CNT"}, |
| {"bits": [31, 31], "name": "EN_MAX_VERT_OUT_PER_GS_INSTANCE"} |
| ] |
| }, |
| "VGT_GS_MAX_VERT_OUT": { |
| "fields": [ |
| {"bits": [0, 10], "name": "MAX_VERT_OUT"} |
| ] |
| }, |
| "VGT_GS_MODE": { |
| "fields": [ |
| {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"}, |
| {"bits": [3, 3], "name": "RESERVED_0"}, |
| {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"}, |
| {"bits": [6, 10], "name": "RESERVED_1"}, |
| {"bits": [11, 11], "name": "GS_C_PACK_EN"}, |
| {"bits": [12, 12], "name": "RESERVED_2"}, |
| {"bits": [13, 13], "name": "ES_PASSTHRU"}, |
| {"bits": [14, 14], "name": "COMPUTE_MODE"}, |
| {"bits": [15, 15], "name": "FAST_COMPUTE_MODE"}, |
| {"bits": [16, 16], "name": "ELEMENT_INFO_EN"}, |
| {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"}, |
| {"bits": [18, 18], "name": "SUPPRESS_CUTS"}, |
| {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"}, |
| {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"}, |
| {"bits": [21, 22], "name": "ONCHIP"} |
| ] |
| }, |
| "VGT_GS_ONCHIP_CNTL": { |
| "fields": [ |
| {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"}, |
| {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}, |
| {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"} |
| ] |
| }, |
| "VGT_GS_OUT_PRIM_TYPE": { |
| "fields": [ |
| {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"}, |
| {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"}, |
| {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"}, |
| {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"}, |
| {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"} |
| ] |
| }, |
| "VGT_GS_PER_ES": { |
| "fields": [ |
| {"bits": [0, 10], "name": "GS_PER_ES"} |
| ] |
| }, |
| "VGT_GS_PER_VS": { |
| "fields": [ |
| {"bits": [0, 3], "name": "GS_PER_VS"} |
| ] |
| }, |
| "VGT_HOS_CNTL": { |
| "fields": [ |
| {"bits": [0, 1], "name": "TESS_MODE"} |
| ] |
| }, |
| "VGT_HOS_MAX_TESS_LEVEL": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MAX_TESS"} |
| ] |
| }, |
| "VGT_HOS_MIN_TESS_LEVEL": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MIN_TESS"} |
| ] |
| }, |
| "VGT_HOS_REUSE_DEPTH": { |
| "fields": [ |
| {"bits": [0, 7], "name": "REUSE_DEPTH"} |
| ] |
| }, |
| "VGT_HS_OFFCHIP_PARAM_UMD": { |
| "fields": [ |
| {"bits": [0, 9], "name": "OFFCHIP_BUFFERING"}, |
| {"bits": [10, 11], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"} |
| ] |
| }, |
| "VGT_INDEX_TYPE": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}, |
| {"bits": [14, 14], "name": "DISABLE_INSTANCE_PACKING"} |
| ] |
| }, |
| "VGT_INDX_OFFSET": { |
| "fields": [ |
| {"bits": [0, 31], "name": "INDX_OFFSET"} |
| ] |
| }, |
| "VGT_INSTANCE_BASE_ID": { |
| "fields": [ |
| {"bits": [0, 31], "name": "INSTANCE_BASE_ID"} |
| ] |
| }, |
| "VGT_INSTANCE_STEP_RATE_0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "STEP_RATE"} |
| ] |
| }, |
| "VGT_LS_HS_CONFIG": { |
| "fields": [ |
| {"bits": [0, 7], "name": "NUM_PATCHES"}, |
| {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"}, |
| {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"} |
| ] |
| }, |
| "VGT_MAX_VTX_INDX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MAX_INDX"} |
| ] |
| }, |
| "VGT_MIN_VTX_INDX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "MIN_INDX"} |
| ] |
| }, |
| "VGT_MULTI_PRIM_IB_RESET_EN": { |
| "fields": [ |
| {"bits": [0, 0], "name": "RESET_EN"}, |
| {"bits": [1, 1], "name": "MATCH_ALL_BITS"} |
| ] |
| }, |
| "VGT_MULTI_PRIM_IB_RESET_INDX": { |
| "fields": [ |
| {"bits": [0, 31], "name": "RESET_INDX"} |
| ] |
| }, |
| "VGT_OUTPUT_PATH_CNTL": { |
| "fields": [ |
| {"bits": [0, 2], "name": "PATH_SELECT"} |
| ] |
| }, |
| "VGT_OUT_DEALLOC_CNTL": { |
| "fields": [ |
| {"bits": [0, 6], "name": "DEALLOC_DIST"} |
| ] |
| }, |
| "VGT_PRIMITIVEID_EN": { |
| "fields": [ |
| {"bits": [0, 0], "name": "PRIMITIVEID_EN"}, |
| {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}, |
| {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"} |
| ] |
| }, |
| "VGT_PRIMITIVEID_RESET": { |
| "fields": [ |
| {"bits": [0, 31], "name": "VALUE"} |
| ] |
| }, |
| "VGT_PRIMITIVE_TYPE": { |
| "fields": [ |
| {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"} |
| ] |
| }, |
| "VGT_REUSE_OFF": { |
| "fields": [ |
| {"bits": [0, 0], "name": "REUSE_OFF"} |
| ] |
| }, |
| "VGT_SHADER_STAGES_EN": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"}, |
| {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"}, |
| {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"}, |
| {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"}, |
| {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"}, |
| {"bits": [8, 8], "name": "DYNAMIC_HS"}, |
| {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"}, |
| {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"}, |
| {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"}, |
| {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}, |
| {"bits": [13, 13], "name": "PRIMGEN_EN"}, |
| {"bits": [14, 14], "name": "ORDERED_ID_MODE"}, |
| {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"}, |
| {"bits": [19, 20], "name": "GS_FAST_LAUNCH"}, |
| {"bits": [21, 21], "name": "HS_W32_EN"}, |
| {"bits": [22, 22], "name": "GS_W32_EN"}, |
| {"bits": [23, 23], "name": "VS_W32_EN"}, |
| {"bits": [24, 24], "name": "NGG_WAVE_ID_EN"}, |
| {"bits": [25, 25], "name": "PRIMGEN_PASSTHRU_EN"} |
| ] |
| }, |
| "VGT_STRMOUT_BUFFER_CONFIG": { |
| "fields": [ |
| {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"}, |
| {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"}, |
| {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"}, |
| {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"} |
| ] |
| }, |
| "VGT_STRMOUT_BUFFER_OFFSET_0": { |
| "fields": [ |
| {"bits": [0, 31], "name": "OFFSET"} |
| ] |
| }, |
| "VGT_STRMOUT_CONFIG": { |
| "fields": [ |
| {"bits": [0, 0], "name": "STREAMOUT_0_EN"}, |
| {"bits": [1, 1], "name": "STREAMOUT_1_EN"}, |
| {"bits": [2, 2], "name": "STREAMOUT_2_EN"}, |
| {"bits": [3, 3], "name": "STREAMOUT_3_EN"}, |
| {"bits": [4, 6], "name": "RAST_STREAM"}, |
| {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"}, |
| {"bits": [8, 11], "name": "RAST_STREAM_MASK"}, |
| {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"} |
| ] |
| }, |
| "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": { |
| "fields": [ |
| {"bits": [0, 8], "name": "VERTEX_STRIDE"} |
| ] |
| }, |
| "VGT_STRMOUT_VTX_STRIDE_0": { |
| "fields": [ |
| {"bits": [0, 9], "name": "STRIDE"} |
| ] |
| }, |
| "VGT_TESS_DISTRIBUTION": { |
| "fields": [ |
| {"bits": [0, 7], "name": "ACCUM_ISOLINE"}, |
| {"bits": [8, 15], "name": "ACCUM_TRI"}, |
| {"bits": [16, 23], "name": "ACCUM_QUAD"}, |
| {"bits": [24, 28], "name": "DONUT_SPLIT"}, |
| {"bits": [29, 31], "name": "TRAP_SPLIT"} |
| ] |
| }, |
| "VGT_TF_MEMORY_BASE_UMD": { |
| "fields": [ |
| {"bits": [0, 31], "name": "BASE"} |
| ] |
| }, |
| "VGT_TF_PARAM": { |
| "fields": [ |
| {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"}, |
| {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"}, |
| {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"}, |
| {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"}, |
| {"bits": [9, 9], "name": "DEPRECATED"}, |
| {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"}, |
| {"bits": [14, 14], "name": "DISABLE_DONUTS"}, |
| {"bits": [15, 16], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"}, |
| {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"}, |
| {"bits": [19, 19], "enum_ref": "VGT_DETECT_ONE", "name": "DETECT_ONE"}, |
| {"bits": [20, 20], "enum_ref": "VGT_DETECT_ZERO", "name": "DETECT_ZERO"}, |
| {"bits": [23, 25], "name": "MTYPE"} |
| ] |
| }, |
| "VGT_TF_RING_SIZE_UMD": { |
| "fields": [ |
| {"bits": [0, 15], "name": "SIZE"} |
| ] |
| }, |
| "VGT_VERTEX_REUSE_BLOCK_CNTL": { |
| "fields": [ |
| {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"} |
| ] |
| }, |
| "VGT_VTX_CNT_EN": { |
| "fields": [ |
| {"bits": [0, 0], "name": "VTX_CNT_EN"} |
| ] |
| } |
| } |
| } |
