commit 0d462dbee57b9f0f708e61f184db1650d59e1e73
author Jason Ekstrand <jason@jlekstrand.net> Fri Feb 21 10:59:38 2020 -0600
committer Jason Ekstrand <jason@jlekstrand.net> Thu Oct 08 01:14:46 2020 -0500
tree 8bc19357a3a759fc08a3ee5bf799d6586c36a86b
parent 459f68af3c9467eea9332f0d8ec493fdfc9f21a8

intel/fs: Add an alignment to VARYING_PULL_CONSTANT_LOAD_LOGICAL

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3932>

src/intel/compiler/brw_fs.cpp

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 5cb5056..339f36e 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -166,7 +166,8 @@
                                        const fs_reg &dst,
                                        const fs_reg &surf_index,
                                        const fs_reg &varying_offset,
-                                       uint32_t const_offset)
+                                       uint32_t const_offset,
+                                       uint8_t alignment)
 {
    /* We have our constant surface use a pitch of 4 bytes, so our index can
     * be any component of a vector, and then we load 4 contiguous
@@ -190,7 +191,8 @@
     */
    fs_reg vec4_result = bld.vgrf(BRW_REGISTER_TYPE_F, 4);
    fs_inst *inst = bld.emit(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL,
-                            vec4_result, surf_index, vec4_offset);
+                            vec4_result, surf_index, vec4_offset,
+                            brw_imm_ud(alignment));
    inst->size_written = 4 * vec4_result.component_size(inst->exec_size);
 
    shuffle_from_32bit_read(bld, dst, vec4_result,
@@ -2602,7 +2604,7 @@
          VARYING_PULL_CONSTANT_LOAD(ibld, inst->dst,
                                     brw_imm_ud(index),
                                     inst->src[1],
-                                    pull_index * 4);
+                                    pull_index * 4, 4);
          inst->remove(block);
       }
    }

src/intel/compiler/brw_fs.h

diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index bf57f8e..98db40a 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -117,7 +117,8 @@
                                    const fs_reg &dst,
                                    const fs_reg &surf_index,
                                    const fs_reg &varying_offset,
-                                   uint32_t const_offset);
+                                   uint32_t const_offset,
+                                   uint8_t alignment);
    void DEP_RESOLVE_MOV(const brw::fs_builder &bld, int grf);
 
    bool run_fs(bool allow_spilling, bool do_rep_send);

src/intel/compiler/brw_fs_nir.cpp

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index e7ce223..4706317 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4501,7 +4501,8 @@
 
          for (int i = 0; i < instr->num_components; i++)
             VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i), surf_index,
-                                       base_offset, i * type_sz(dest.type));
+                                       base_offset, i * type_sz(dest.type),
+                                       nir_dest_bit_size(instr->dest) / 8);
 
          prog_data->has_ubo_pull = true;
       } else {