commit d300b94e51cf8c91928a66478c387c1c3d76faab
author Jim Grosbach <grosbach@apple.com> Tue Sep 13 22:56:44 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Tue Sep 13 22:56:44 2011 +0000
tree ec80e75afe22e965199834021287ae6039ffc2e3
parent 8395c91d56990edf7d1068ddf51f4103b6f37d25

Remove unnecessary scope resolution operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139656 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 8e674e81..04b8649 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -1415,10 +1415,9 @@
                 SMLoc StartLoc, SMLoc EndLoc) {
     KindTy Kind = RegisterList;
 
-    if (llvm::ARMMCRegisterClasses[ARM::DPRRegClassID].
-        contains(Regs.front().first))
+    if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Regs.front().first))
       Kind = DPRRegisterList;
-    else if (llvm::ARMMCRegisterClasses[ARM::SPRRegClassID].
+    else if (ARMMCRegisterClasses[ARM::SPRRegClassID].
              contains(Regs.front().first))
       Kind = SPRRegisterList;