| commit | 9f7e8319947c65d9aef2a0f0984557c3b3a20656 | [log] [tgz] |
|---|---|---|
| author | Owen Anderson <resistor@mac.com> | Fri Aug 26 21:47:57 2011 +0000 |
| committer | Owen Anderson <resistor@mac.com> | Fri Aug 26 21:47:57 2011 +0000 |
| tree | 80904b4658e5f3ed89aecedd1413de844ea728d9 | |
| parent | 89df996ab20609676ecc8823f58414d598b09b46 [diff] |
Spelling fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138667 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 3cdcb05..6b87dfd 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2324,7 +2324,7 @@ default: return Fail; case ARM::tADR: - break; // tADR does not explicitly represent the PC as an oeprand. + break; // tADR does not explicitly represent the PC as an operand. case ARM::tADDrSPi: Inst.addOperand(MCOperand::CreateReg(ARM::SP)); break;