commit 34c4485b7479a12b5ef1cb15d27e96277e8a499a
author Eli Friedman <eli.friedman@gmail.com> Tue Sep 06 20:53:37 2011 +0000
committer Eli Friedman <eli.friedman@gmail.com> Tue Sep 06 20:53:37 2011 +0000
tree 3735fb0cbcbb5402a73c9c5c3d0c2725bb5a0557
parent 0b533a3bd39471d6dce5a4495f25323a0bb515e0

Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139179 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrInfo.td

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 9806d05..429fe9e 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1611,7 +1611,7 @@
 
 // Atomic pseudo-insts which will be lowered to ldrexd/strexd loops.
 // (These psuedos use a hand-written selection code).
-let usesCustomInserter = 1, Defs = [CPSR] in {
+let usesCustomInserter = 1, Defs = [CPSR], mayLoad = 1, mayStore = 1 in {
 def ATOMOR6432   : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
                               (ins GPR:$addr, GPR:$src1, GPR:$src2),
                               NoItinerary, []>;