commit 2a3f19d7e3f77d4d2f8e2b030d6ec1fa11b2abea
author Jim Grosbach <grosbach@apple.com> Mon Oct 03 23:03:26 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Mon Oct 03 23:03:26 2011 +0000
tree c4f037b56ba4ca7c01e1701a4701e1248c421a06
parent ff4216a68a5a142259c631b1370bff270bfd7e49

Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141043 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

diff --git a/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h b/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
index 982826a..9982fa6 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
+++ b/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
@@ -637,7 +637,7 @@
   /// floating-point value, then return -1.
   static inline int getFP64Imm(const APInt &Imm) {
     uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
-    int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023;   // -1022 to 1023
+    int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
     uint64_t Mantissa = Imm.getZExtValue() & 0xfffffffffffffULL;
 
     // We can handle 4 bits of mantissa.