Merge "Merge Android R (rvc-dev-plus-aosp-without-vendor@6692709)" into stage-aosp-master
diff --git a/decoder/armv7/ixheaacd_complex_fft_p2.s b/decoder/armv7/ixheaacd_complex_fft_p2.s
index 564f304..007b513 100644
--- a/decoder/armv7/ixheaacd_complex_fft_p2.s
+++ b/decoder/armv7/ixheaacd_complex_fft_p2.s
@@ -1,6 +1,7 @@
 .text
 .p2align 2
 .global ixheaacd_complex_fft_p2_asm
+.type ixheaacd_complex_fft_p2_asm, %function
 
 ixheaacd_complex_fft_p2_asm:
     STMFD           sp!, {r0-r12, lr}
diff --git a/decoder/armv7/ixheaacd_complex_ifft_p2.s b/decoder/armv7/ixheaacd_complex_ifft_p2.s
index 61765be..ef0e8cb 100644
--- a/decoder/armv7/ixheaacd_complex_ifft_p2.s
+++ b/decoder/armv7/ixheaacd_complex_ifft_p2.s
@@ -1,6 +1,7 @@
 .text
 .p2align 2
 .global ixheaacd_complex_ifft_p2_asm
+.type ixheaacd_complex_ifft_p2_asm, %function
 
 ixheaacd_complex_ifft_p2_asm:
     STMFD           sp!, {r0-r12, lr}
diff --git a/decoder/armv7/ixheaacd_dct3_32.s b/decoder/armv7/ixheaacd_dct3_32.s
index 749f3bb..cd10c33 100644
--- a/decoder/armv7/ixheaacd_dct3_32.s
+++ b/decoder/armv7/ixheaacd_dct3_32.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
 .global ixheaacd_dct3_32
+.type ixheaacd_dct3_32, %function
 .extern ixheaacd_radix4bfly
 .hidden ixheaacd_radix4bfly
 .extern ixheaacd_postradixcompute4
diff --git a/decoder/armv7/ixheaacd_dec_DCT2_64_asm.s b/decoder/armv7/ixheaacd_dec_DCT2_64_asm.s
index 059baec..e532c0d 100644
--- a/decoder/armv7/ixheaacd_dec_DCT2_64_asm.s
+++ b/decoder/armv7/ixheaacd_dec_DCT2_64_asm.s
@@ -29,6 +29,7 @@
 .hidden ixheaacd_sbr_imdct_using_fft
 
         .global ixheaacd_dec_DCT2_64_asm
+        .type ixheaacd_dec_DCT2_64_asm, %function
 
 ixheaacd_dec_DCT2_64_asm:
 
diff --git a/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop1.s b/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop1.s
index 578f9c1..8fb0d74 100644
--- a/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop1.s
+++ b/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop1.s
@@ -23,6 +23,7 @@
 .p2align 2
 
     .global ixheaacd_esbr_cos_sin_mod_loop1
+    .type ixheaacd_esbr_cos_sin_mod_loop1, %function
 ixheaacd_esbr_cos_sin_mod_loop1:
 
     STMFD           sp!, {r4-r12, r14}
diff --git a/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop2.s b/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop2.s
index 0c2844b..42bf6cc 100644
--- a/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop2.s
+++ b/decoder/armv7/ixheaacd_esbr_cos_sin_mod_loop2.s
@@ -23,6 +23,7 @@
 .p2align 2
 
     .global ixheaacd_esbr_cos_sin_mod_loop2
+    .type ixheaacd_esbr_cos_sin_mod_loop2, %function
 ixheaacd_esbr_cos_sin_mod_loop2:
 
     STMFD           sp!, {r4-r12, r14}
diff --git a/decoder/armv7/ixheaacd_esbr_fwd_modulation.s b/decoder/armv7/ixheaacd_esbr_fwd_modulation.s
index 82fb546..0186cfe 100644
--- a/decoder/armv7/ixheaacd_esbr_fwd_modulation.s
+++ b/decoder/armv7/ixheaacd_esbr_fwd_modulation.s
@@ -24,6 +24,7 @@
  .extern ixheaacd_esbr_cos_sin_mod
 .hidden ixheaacd_esbr_cos_sin_mod
  .global ixheaacd_esbr_fwd_modulation
+ .type ixheaacd_esbr_fwd_modulation, %function
 ixheaacd_esbr_fwd_modulation:
 
     STMFD           sp!, {r4-r12, lr}
diff --git a/decoder/armv7/ixheaacd_esbr_qmfsyn64_winadd.s b/decoder/armv7/ixheaacd_esbr_qmfsyn64_winadd.s
index fca39c0..ebfca72 100644
--- a/decoder/armv7/ixheaacd_esbr_qmfsyn64_winadd.s
+++ b/decoder/armv7/ixheaacd_esbr_qmfsyn64_winadd.s
@@ -13,6 +13,7 @@
 .text
 .p2align 2
       .global ixheaacd_esbr_qmfsyn64_winadd
+      .type ixheaacd_esbr_qmfsyn64_winadd, %function
 
 ixheaacd_esbr_qmfsyn64_winadd:          @ PROC
 
diff --git a/decoder/armv7/ixheaacd_esbr_radix4bfly.s b/decoder/armv7/ixheaacd_esbr_radix4bfly.s
index 7a4560d..75a1b77 100644
--- a/decoder/armv7/ixheaacd_esbr_radix4bfly.s
+++ b/decoder/armv7/ixheaacd_esbr_radix4bfly.s
@@ -20,6 +20,7 @@
 
 
 .global ixheaacd_esbr_radix4bfly
+.type ixheaacd_esbr_radix4bfly, %function
 
 ixheaacd_esbr_radix4bfly:
 
diff --git a/decoder/armv7/ixheaacd_fwd_modulation.s b/decoder/armv7/ixheaacd_fwd_modulation.s
index fec9a4e..d1f599a 100644
--- a/decoder/armv7/ixheaacd_fwd_modulation.s
+++ b/decoder/armv7/ixheaacd_fwd_modulation.s
@@ -24,6 +24,7 @@
  .extern ixheaacd_cos_sin_mod
 .hidden ixheaacd_cos_sin_mod
  .global ixheaacd_fwd_modulation
+ .type ixheaacd_fwd_modulation, %function
 ixheaacd_fwd_modulation:
 
     STMFD           sp!, {r3-r9, r12, lr}
diff --git a/decoder/armv7/ixheaacd_mps_complex_fft_64_asm.s b/decoder/armv7/ixheaacd_mps_complex_fft_64_asm.s
index 0f465d2..71af360 100644
--- a/decoder/armv7/ixheaacd_mps_complex_fft_64_asm.s
+++ b/decoder/armv7/ixheaacd_mps_complex_fft_64_asm.s
@@ -1,6 +1,7 @@
 .text
 .p2align 2
 .global ixheaacd_mps_complex_fft_64_asm
+.type ixheaacd_mps_complex_fft_64_asm, %function
 
 ixheaacd_mps_complex_fft_64_asm:
     @LDR    r4,[sp]
diff --git a/decoder/armv7/ixheaacd_post_radix_compute2.s b/decoder/armv7/ixheaacd_post_radix_compute2.s
index 39280b3..3e63b80 100644
--- a/decoder/armv7/ixheaacd_post_radix_compute2.s
+++ b/decoder/armv7/ixheaacd_post_radix_compute2.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
         .global ixheaacd_postradixcompute2
+        .type ixheaacd_postradixcompute2, %function
 
 
 ixheaacd_postradixcompute2:
diff --git a/decoder/armv7/ixheaacd_post_radix_compute4.s b/decoder/armv7/ixheaacd_post_radix_compute4.s
index 8977213..402d881 100644
--- a/decoder/armv7/ixheaacd_post_radix_compute4.s
+++ b/decoder/armv7/ixheaacd_post_radix_compute4.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
         .global ixheaacd_postradixcompute4
+        .type ixheaacd_postradixcompute4, %function
 
 
 ixheaacd_postradixcompute4:
diff --git a/decoder/armv7/ixheaacd_radix4_bfly.s b/decoder/armv7/ixheaacd_radix4_bfly.s
index cad16ea..3843b42 100644
--- a/decoder/armv7/ixheaacd_radix4_bfly.s
+++ b/decoder/armv7/ixheaacd_radix4_bfly.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
         .global ixheaacd_radix4bfly
+	.type ixheaacd_radix4bfly, %function
 
 ixheaacd_radix4bfly:
 
diff --git a/decoder/armv7/ixheaacd_sbr_imdct_using_fft.s b/decoder/armv7/ixheaacd_sbr_imdct_using_fft.s
index 5fe89e0..b8b5826 100644
--- a/decoder/armv7/ixheaacd_sbr_imdct_using_fft.s
+++ b/decoder/armv7/ixheaacd_sbr_imdct_using_fft.s
@@ -23,6 +23,7 @@
 .p2align 2
 
     .global ixheaacd_sbr_imdct_using_fft
+    .type ixheaacd_sbr_imdct_using_fft, %function
 ixheaacd_sbr_imdct_using_fft:
 
     STMFD           sp!, {r4-r12, lr}
diff --git a/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds.s b/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds.s
index 7ba32ad..d27a277 100644
--- a/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds.s
+++ b/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
     .global ixheaacd_sbr_qmfanal32_winadds
+    .type ixheaacd_sbr_qmfanal32_winadds, %function
 
 ixheaacd_sbr_qmfanal32_winadds:
 
diff --git a/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds_eld.s b/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds_eld.s
index ece2f35..78686c3 100644
--- a/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds_eld.s
+++ b/decoder/armv7/ixheaacd_sbr_qmfanal32_winadds_eld.s
@@ -1,6 +1,7 @@
 .text
 .p2align 2
 .global ixheaacd_sbr_qmfanal32_winadds_eld
+.type ixheaacd_sbr_qmfanal32_winadds_eld, %function
 
 ixheaacd_sbr_qmfanal32_winadds_eld:
 
diff --git a/decoder/armv7/ixheaacd_sbr_qmfsyn64_winadd.s b/decoder/armv7/ixheaacd_sbr_qmfsyn64_winadd.s
index a998634..befa118 100644
--- a/decoder/armv7/ixheaacd_sbr_qmfsyn64_winadd.s
+++ b/decoder/armv7/ixheaacd_sbr_qmfsyn64_winadd.s
@@ -22,6 +22,7 @@
 .text
 .p2align 2
       .global ixheaacd_sbr_qmfsyn64_winadd
+      .type ixheaacd_sbr_qmfsyn64_winadd, %function
 
 ixheaacd_sbr_qmfsyn64_winadd:
 
diff --git a/decoder/armv7/ixheaacd_shiftrountine.s b/decoder/armv7/ixheaacd_shiftrountine.s
index 9958e14..5609ab9 100644
--- a/decoder/armv7/ixheaacd_shiftrountine.s
+++ b/decoder/armv7/ixheaacd_shiftrountine.s
@@ -25,6 +25,7 @@
 .text
 .p2align 2
         .global ixheaacd_shiftrountine
+        .type ixheaacd_shiftrountine, %function
 ixheaacd_shiftrountine:
     CMP             r3, #0
     STMFD           sp!, {r4-r7, r12}
diff --git a/decoder/armv7/ixheaacd_shiftrountine_with_rnd_eld.s b/decoder/armv7/ixheaacd_shiftrountine_with_rnd_eld.s
index 642a338..d790594 100644
--- a/decoder/armv7/ixheaacd_shiftrountine_with_rnd_eld.s
+++ b/decoder/armv7/ixheaacd_shiftrountine_with_rnd_eld.s
@@ -1,6 +1,7 @@
 .text
 .p2align 2
 .global ixheaacd_shiftrountine_with_rnd_eld
+.type ixheaacd_shiftrountine_with_rnd_eld, %function
 
 ixheaacd_shiftrountine_with_rnd_eld:
     STMFD           sp!, {r4-r12, r14}
diff --git a/decoder/armv7/ixheaacd_shiftrountine_with_round.s b/decoder/armv7/ixheaacd_shiftrountine_with_round.s
index 9a43315..3658684 100644
--- a/decoder/armv7/ixheaacd_shiftrountine_with_round.s
+++ b/decoder/armv7/ixheaacd_shiftrountine_with_round.s
@@ -25,6 +25,7 @@
 .text
 .p2align 2
     .global ixheaacd_shiftrountine_with_rnd
+    .type ixheaacd_shiftrountine_with_rnd, %function
 ixheaacd_shiftrountine_with_rnd:
     STMFD           sp!, {r4-r12, r14}
     MOV             r4, #0x1f
diff --git a/decoder/armv7/ixheaacd_shiftrountine_with_round_hq.s b/decoder/armv7/ixheaacd_shiftrountine_with_round_hq.s
index a7b2d12..c842dfb 100644
--- a/decoder/armv7/ixheaacd_shiftrountine_with_round_hq.s
+++ b/decoder/armv7/ixheaacd_shiftrountine_with_round_hq.s
@@ -4,6 +4,7 @@
 .text
 .p2align 2
     .global ixheaacd_shiftrountine_with_rnd_hq
+    .type ixheaacd_shiftrountine_with_rnd_hq, %function
 ixheaacd_shiftrountine_with_rnd_hq:
 
     STMFD           sp!, {r4-r12, r14}